Praveen Meduri
• VHDL Coding
• Use FPGA (Nexys 4 DDR Board from Xilinx) to implement out designs
• 10 nm FinFET
• 3 Billion transistors
• Amazing !!!
Valuable Skill
• FPGA revolution has changed human lives
• Complement A A 1
A A 0
• Commutativity A B B A
A B B A
• Associativity
• Distributive Law
Boolean Algebra
• Duality f ( A, B,1,0,,) f ( A, B,0,1,,)
A A A
1 A 1
A AB A
A AB A B
• DeMorgan’s Theorem A B AB
A B A B
A A
A+B A•B
B B
A A
A•B A+B
B B
Operators, Basic Logic Gates
• AND A B A•B • NAND A B A•B
0 0 0 0 0 1
f (A,B) A B A B 0 1 0
f ( A, B ) A B A B 0 1 1
A 1 0 0 A 1 0 1
A•B A•B
B 1 1 1 B 1 1 0
• OR
A B A+B
f (A,B) A B A B 0 0 0 • NOR
A B A+B
A
0 1 1 f (A,B) A B A B
A+B 1 0 1 0 0 1
B
1 1 1 0 1 0
A
A+B 1 0 0
B
1 1 0
• NOT
C NOT ( A) A' A
Operators, Basic Logic Gates
Complex Logic Gates
Complex Logic Gates
CMOS Implementation of Logic Gates
CMOS Implementation of Logic Gates
What is this circuit?
a) Weak Inverter
b) Strong Inverter
c) Weak buffer
d) Strong buffer
Odd or Even Functions
Buffer
Buffer
Hi-Impedance Outputs
Hi-impedance Outputs continued…
3 – State Buffer
Transmission Gates
Circuit Example Using TG
Logic Minimization
K – Map Example
Logic Minimization
Part – 2