Microelectronic Circuits

Sedra and Smith, 6th Edition

Reading Notes (GMU ECE 333)
David Stein, Summer 2015

1
Chapter 1: Signals and Amplifiers

Microelectronics generally refers to the field of integrated circuits, up to and

including microprocessors - the devices reviewed in this text may be utilized
individually as discrete circuits, or as components of an integrated circuit

1.1: Signals

A signal is a carrier of information that can be processed in various ways - a

real-world measurement is first converted by a transducer to an electrical signal
- the signal can be equivalently represented in two ways: Thévenin form (a
voltage source vs (t) having a source resistance Rs (t) in series), or Norton form
(a current source is (t) having a source resistance Rs (t) in parallel) - these forms
are interchangeable (since vs (t) = Rs is (t), but Thévenin is preferred when the
source resistance is low; Norton is preferred when the source resistance is high
(see Exercise 1.1: when oriented in series, most of the source voltage is delivered
to the load when the load resistance is much larger than the source resistance;
when oriented in parallel, most of the source voltage is delivered to the load
when the load resistance is much smaller than the source resistance)

Information is contained in a signal as a time-varying magnitude of the current

or voltage - the analysis of the signal is easiest to conceptualize if it can be
represented mathematically, which can be difficult for arbitrary signals

1.2: Frequency Spectrum of Signals

A signal can be represented according to its frequency spectrum, as a set of

individual sinusoids of the form va (t) = Va sin(ωt + φ), where Va is the peak
amplitude, ω is the angular frequency, and φ is the phase shift - sinusoid ampli-
tude is commonly discussed as its average, represented by the root-mean-square,
rather than its peak value; the RMS value is simply peak
√
2
- the time-domain and
frequency-domain representations of a signal are equivalent and interchangeable

The frequency spectrum is determined as a Fourier series (for periodic signals)

and Fourier transforms (for both periodic and aperiodic signals, including ar-
bitrary signals) - the Fourier series produces a set of sinusoids with harmoni-
cally related frequencies, i.e., multiples of a fundamental frequency - the Fourier
transform is a continuous function over all frequencies, but the most significant
components of the signal are typically in a select range; e.g., an audio signal
encodes information for all frequencies, but only those within the range audible
to humans (20 Hz - 20 kHz) are significant; similarly, an analog video signal

2
only needs to be sampled between 0 and 4.5 MHz

1.3: Analog and Digital Signals

Most physical signals are analog, featuring a magnitude that can take on any
value within a certain range, and the amplitude is a continuous function - other
signals are digital, where the amplitude at specific times is within a defined set of
discrete values, such that the signal can be represented as a sequence of rational
numbers - an analog signal can first be sampled, by measuring it at regular time
intervals, and then quantized or digitized, by mapping each measurement to a
discrete value (usually through rounding)

While many number systems may be used to represent digital measurements,

binary number systems are the simplest and most common representation - the
quantization can either use only two values (low and high, represented as binary
0 and 1, or as a low voltage such as 0 V and a high voltage such as +5 V), or
a set of values that are represented each represented by a sequence of N binary
values from b0 , b1 , . . . , bN −1 , where the recorded value is represented as the sum
D = b0 20 + b1 21 + . . . + bN −1 2N −1 - the mapping or rounding that is inherent
in sampling creates a quantization error, which can be reduced by increasing
the resolution of the quantization (i.e., increasing N ) - quantization can be
achieved by an analog-to-digital (A/D) converter, which inputs an analog input
signal and outputs a series of binary values that together represent the digital
output - the reverse process can be achieved through a digital-to-analog (D/A)
converter, which converts a digital input signal into an analog output signal
(though lost resolution cannot be recaptured)

1.4: Amplifiers

Signal amplification: Transducers typically sample a signal with too little am-
plitude for effective processing, so the signal needs to be amplified to a larger
amplitude - linear amplifiers scale the input value as a linear proportion, in or-
der to avoid distortion that adds new information - thus, ideal amplifiers exhibit
the relationship vo (t) = Avi (t), where A is the amplifier gain

Voltage amplifiers operate by increasing the voltage of a signal, as above - power

amplifiers operate by increasing the current with little or no voltage gain - an
audio system may feature both a voltage amplifier (as a preamplifier), and a
power amplifier (which feeds the voltage to the speakers with a higher current,
thus amplifying the volume of both soft and loud music passages)

The voltage gain of a linear voltage amplifier is defined as:

3
Av = vvoi
The transfer characteristic of the linear amplifier is shown as a plot of vi against
vo , and is a straight line with slope A for a linear voltage amplifier - similarly,
a current amplifier has a current gain Ai = iioi - both types of amplifiers have a
power gain Ap = Av Ai = PPLI = vvoi iiio

Gain is often expressed in decibels on a logarithmic scale, such as voltage gain

= 20 log(|Av |) dB; an increase of 6 dB indicates a doubling of the voltage, and
an increase of 20 dB indicates a tenfold increase in voltage - similarly, current
gain = 20 log(|Ai |) dB - however, power gain is expressed as 10 log(|Ap |) dB; on
this scale, power doubles with an increase of 3 dB, and by a factor of 100 with
a 20 dB increase

Since amplifiers add power, they require connection to a power source - an

example amplifier is connected to a positive power source VCC , which delivers
a current ICC , and a negative power source VEE , which delivers a (negative)
current IEE - both of the opposite terminals of the voltage sources (the negative
terminal of VCC , and the positive terminal of VEE ) are connected to ground,
along with a ground terminal of the amplifier - together, these power sources
deliver DC power:
Pdc = VCC ICC + VEE IEE
The amplifier exhibits a power-balance equation:
Pdc + PI = PL + Pdissipated
A power efficiency for the amplifier can also be calculated as:
ν = PPdc
L
· 100

Amplifier saturation: Amplifiers only generate a linear signal over a limited

range of input voltages, where the power delivered by the power supplies can
linearly scale to produce the proportional output - if the voltage is too high,
amplifier saturation occurs, where the voltage increase is limited by a ceiling
and distortion of the signal occurs

Symbol conventions:
iC (t): A time-varying current signal; i.e., a total instantaneous current
IC : The time-invariant DC component of iC (t)
ic (t): The time-varying alternating component of iC (t)
Ic : The peak amplitude of ic (t)
Thus, iC (t) = IC + ic (t), and ic (t) = Ic sin(ωt)

4
1.5: Circuit Models for Amplifiers

Amplifier types:
vo
Voltage amplifier: Avo = vi

io
Current amplifier: Ais = is

Transconductance amplifier (translates an input voltage to an output current):

Gm = vioi

Transresistance amplifier (translates an input current to an output voltage):

Rm = viio

5
While each amplifier type may more natively fit a particular scenario, all four
types are equivalent

Voltage amplifier: According to this model, the amplifier is a voltage-controlled

voltage source with an open-circuit voltage gain of Avo , an input resistance Ri ,
and an output resistance Ro - the transfer function is v0 = Avo vi RLR+R
L
o
, and the
RL
voltage gain is Av = Avo RL +Ro - in an ideal amplifier, Ro = 0, and Av = Avo ;
thus, Avo is the open-circuit voltage gain, when 100% of the resistance is at the
load - similarly, the source resistance diminishes the amount of voltage measured
over the input: vi = vs RiR+R i
s
, so it is ideal to maximize the value of Ri - for
any combination of parameters, the actual gain is:
Av = vvos = Avo RiR+Ri RL
s RL +Ro

In some cases, the voltage is acceptable, but the source resistance is high, and
raisin the input resistance to compensate would cause signal attenuation - a
buffer amplifier can be used to drive the voltage with greater current

Cascaded amplifiers: Sometimes multiple stages are needed to achieve a desired

amplification - e.g., in the following scenario, the stage-1 amplifier reduces the
input voltage from 100 k Ω to 1 k Ω; the stage-2 amplifier has a high voltage
gain; and the stage-3 amplifier acts as a buffer amplifier to drive the amplified
voltage with low output resistance

1.6: Frequency Response of Amplifiers

Amplifier frequency response can be measured by providing a sinusoidal wave of

a known amplitude and frequency, and measuring the amplitude and phase shift
of the output (a linear amplifier will not change the frequency) - the transfer
function, T (ω), has both a gain (|T (ω)| = VVoi ) and a phase shift (∠T (ω) = φ) -
the complete frequency response can be evaluated as a Bode plot, which reveals
both the gain (amplitude response) and the phase shift (phase response) at each
input frequency

6
The frequency response of an amplifier can be determined from the circuit
model, but where capacitors and inductors are replaced by their reactances
1
(for capacitors, reactance = jωC ; for inductors, reactance = jωL ) - the trans-
fer function can be represented as a complex function T (s) = VVoi (s)
(s)
, and can be
evaluated as T (jω) to determine the response to various physical frequencies

Single-time-constant (STC) networks are circuits comprising only one reactive

element and one resistance, which can be modeled according to one time con-
L
stant τ = RC = R - different types of STC networks have a characteristic
response to various inputs, such as sinusoidal, step, and pulse - most networks
exhibit either low-pass-filter or high-pass-filter characteristics - tuned amplifiers
feature both a low-pass filter and a high-pass filter, and therefore pass frequen-
cies only within a desired range

The components of the circuit also determine the shape of the responses at gain
falloff points: internal capacitance can cause a loss of gain at high frequencies,
while the inclusion of a coupling capacitor between amplifier stages can cause
a loss of gain at low frequencies - integrated circuit amplifiers typically do not
feature coupling capacitors, but are directly-coupled DC low-pass amplifiers

7
Chapter 3: Semiconductors

Solid-state devices such as diodes and transistors are made from semiconduct-
ing materials- this chapter focuses on the physical properties and behavior of
semiconductor materials

Most semiconductors are made from silicon, through a specific fabrication pro-
cess - an integrated circuit containing a vast number of transistors can be carved
from a single silicon crystal, leading to a monolithic circuit - the conductivity
of silicon is altered to create these devices by the controlled introduction of
impurity atoms, in a process called doping

3.1: Intrinsic Semiconductors

Semiconducting materials are defined as any material exhibiting conductivity

between conductors (e.g., copper) and insulators (e.g., glass) - semiconducting
materials may be made of one element, such as germanium or silicon, or com-
pounds, typically (group III or V) + (group II or VI), such as gallium-arsenide

Silicon is the most widely used semiconducting material in use today - silicon
has four valence electrons, and can form four covalent bonds with neighbor-
ing atoms to form a regular lattice structure - at low temperatures, all covalent
bonds are intact and all electrons are non-mobile, so silicon is an insulator; how-
ever, at room temperature, an electron can break free and drift apart and move
according to an electric field (“thermal generation”) - the deficit of an electron
from its original atom creates a positively charged “hole” that attracts an elec-
tron from a neighboring atom, so the “hole” moves in the opposite direction of
the electric field - the number of free electrons and holes scales proportionally
with temperature - the conductivity of a material is measured as a number of
charge carriers per unit volume (cm3 ) - free electrons and holes also settle in
other atoms and therefore stop acting as charge carriers (“recombination”)

This process can be quantified: temperature affects the thermal generation rate,
which in turn determines the number of charge carriers, which in turn deter-
mines the recombination rate:
ni = n = p - also, p · n = (ni )2 , where:
n = the current / average / typical number of free electrons per unit volume
p = the current / average / typical number of holes per unit volume
ni = the number of charge carriers of either type (holes or electrons) per unit
volume

For any material:

8
 3 Eg
ni = BT 2 e 2kT , where:
B = a material-dependent parameter for the material
Eg = bandgap energy
k = Boltzmann’s constant (8.62 · 10−5 eV
K )

For silicon:
3
B = 7.3 · 15015 k − 2
Eg = 1.12eV
At room temperature, ni = 1.5 · 1010 chargecmcarriers
3

3.2: Doped Semiconductors

The value of ni for silicon at room temperature is too small to be useful, and also
fluctuates too much with temperature - carrier concentration can be improved
by injecting a dopant, which introduces an impurity that substantially increases
either holes or free electrons

n-type doped silicon can be created with a dopant having five valence electrons,
such as phosphorus; the extra electron becomes a donor, without creating a
hole: the positive charge remains with the dopant (“bound charge”) - the de-
gree of doping determines (ND ) determines the concentration of donor atoms,
which is usually much greater than the number of intrinsic free electrons ni ;
thus, the number of free electrons in n-type doped silicon nn ≈ ND ; the num-
ber of holes, pn , is initially unchanged, but diminishes due to recombination
with free electrons - accordingly, in n-type material, electrons are the “majority
charge carriers” and holes are the “minority charge carriers”) - when the rates
of thermal generation and recombination are equal (“thermal equilibrium”),
n2i
pn nn = n2i , where pn ≈ ND

p-type doped silicon can be created with a dopant having three valence elec-
trons, such as boron - as a consequence, boron accepts an extra electron from a
neighboring silicon atom, creating a bound negative charge at the boron atom
(“acceptor” atom) and a hole in the neighboring atom that can act as a charge
carrier - the degree of doping with acceptor atoms (NA ) creates a number of
holes (pp = NA ) that is much greater than the number of intrinsic charge charge
n2i
carriers - as above, at thermal equilibrium, pp np = n2i , where np ≈ NA

Note that both n-type and p-type silicon are electrically neutral; the type of
material just determines whether an electric current results in a propagation of
electrons or a propagation of holes

9
3.3: Current Flow in Semiconductors

Drift current: When an electric field is applied to a semiconductor crystal,

holes move in the direction of the field, and free electrons move in the opposite
direction

The velocity of holes is:

vp−drif t = µp E cm
s , where:
V
E = strength of electric field, measured in cm
2
cm2
µp = hole mobility, measured in cmV·s - for intrinsic silicon, µp = 480 V·s ,

Similarly, the velocity of free electrons is:

vn−drif t = −µn E cm
s , where:
E = strength of electric field
2
µn = electron mobility - for intrinsic silicon, µn = 1, 350 cm
V·s

The hole drift current density (i.e., current of holes per cross-sectional unit area)
is:
I
Jp = Ap = qpvp−drif t

For a particular section of material, the hole drift current is:

Ip = Aqpvp−drif t = Aqpµp E = Jp A, where:
A = cross-sectional area
q = charge magnitude (for a single electron, q = 1.6 · 10−19 coulombs)
p = concentration of holes

Similarly, the electron drift current density (i.e., current of electrons per cross-
sectional unit area) is:
Jn = − IAn = −qpvn−drif t

And the electron drift current is:

In = −Aqnvn−drif t = −Aqnµn E = Jn A

The total drift current density is:

J = Jp + Jn = q(pµp + nµn )E, or J = σE, where:
σ = the conductivity of the material measured by σ = q(pµp + nµn )

Alternatively, total drift current can be expressed in terms of resistivity, where:

J = Eρ
Conversely, resistivity can be defined as:
ρ= EJ , where
ρ = resistivity measured in terms of Ω · cm

Diffusion current: When the concentration of charge carriers is higher in one

part of a material than another, the charge carriers tend to diffuse, thus creating

10
a diffusion current from the high-concentration area to the low concentration
area

For an area of material with an abundance of holes:

Jp = −qDp dp(x)
dx , where
Dp = the diffusivity or diffusion constant of holes, i.e., the rate at which holes
can diffuse through the material
dpx
dx = rate of change of concentration of holes (note: this is negative, since
diffusion causes concentration to fall)

Similarly, for an area of material with an abundance of free electrons:

Jn = qDn dn(x)
dx , where
Dn is the diffusivity of electrons dpx
dx = rate of change of concentration of free
electrons

Thermal voltage: For any material:

Dp
VT = D
µn = µp , or
n

VT = kTq
This is known as the thermal voltage; at room temperature, T ≈ 300 and
VT = 25.9 mV

3.4: The pn Junction with Open-Circuit Terminals

A pn junction can be created by creating a region of p-type silicon adjacent to

a region of n-type silicon, with metal contacts at each end (the metal contact
at the p-type silicon end forms the anode, and the metal contact at the n-type
silicon end forms the cathode):

In an open circuit (when the terminals are disconnected), an interaction occurs

at the interface - the edge of the p-type material, featuring an excess of holes,
binds extra electrons from the edge of the n-type material - both charges become
bound, creating a “depletion region” - the depletion region exhibits a diffusion
current ID from the p-type region to the n-type region, which is the sum of
the hole diffusion current from the p-type region to the n-type region, and the
free electron diffusion current from the n-type region to the p-type region - the

11
depletion of free electrons in the n-type region causes some of the bound positive
charges to remain “uncovered,” and the depletion of holes in the p-type region
creates uncovered bound negative charges

The creation of uncovered bound charges in the depletion region creates a volt-
age difference across the border, and a static electric field from the n-type
material to the p-type material - this electric field serves creates a “barrier volt-
age” V0 , which is measurable over the depletion region (from the n-type region
to the p-type region) - this voltage prevents the further migration of holes and
electrons, and reduces the diffusion current

Drift current: In addition to blocking diffusion of majority carriers, the electric

field promotes the transport of minority carriers - e.g., a thermally generated
hole that appears in the n-type region may randomly migrate toward the edge
of the barrier region, and the electric field sweeps it over the border into the p-
type region - this transport of minority charge carriers creates a drift current IS
in the opposite direction of the diffusion current (i.e., from the n-type material
to the p-type material) - the magnitude of this current is dependent upon the
availability of charge carriers (and hence temperature), but independent of the
actual voltage

Equilibrium: In an open circuit, when ID > IS , the depletion region widens

until the diffusion current falls; similarly, when ID < IS , the depletion region
narrows until diffusion rises - thus, an equilibrium is established where ID = IS ,
and is maintained by the barrier voltage V0 - with no external voltage applied,
equilibrium is established with a “junction built-in voltage” across the pn junc-
tion:
V0 = VT ln( NAn·N
2
D
)
i
For silicon at room temperature, 0.6V < V0 < 0.9V
This barrier voltage is strictly internal to the pn material, and is not observ-
able between the cathode and anode, because contact voltages are created that
balance the junction built-in voltage

12
Depletion region width: When equilibrium is reached, the width of each half
of the depletion region is proportional to the concentration of majority charge
carriers on the opposite side - the ratio of the widths is defined as:
xn NA
xp = ND , where
xn = the width of the n-type portion of the junction (adjacent to the n-type
region but positively charged)
xp = the width of the p-type portion of the junction (adjacent to the o-type
region but negatively charged)

The total width q

of the depletion region is:
W = xn + xp = 2qs ( N1A + N1D )V0 , where
s = electrical permittivity of material (for silicon, s = 1.04 · 10−12 cm
F
)

The width of each side can be calculated as:

xn = W NAN+N
A
D
xp = W NAN+N
D
D

The charge stored in each half of the depletion region is defined as:
|Q+ | = qAxn ND , and
|Q− | = qAxp NA , where
A = the cross-sectional area of the material
Note that the charges are balanced: |Q+ | = |Q− |

3.5: The pn Junction with an Applied Voltage

When a DC voltage is applied across the terminals of a pn junction, with the

higher potential at the p terminal, the device is forward-biased; when the voltage
is higher at the n terminal, the device is reverse-based

In reverse bias, when a voltage VR is applied, the barrier voltage increases to

V0 + VR , which significantly reduces ID - however, IS is not affected by the
barrier voltage, as it is rate-limited by thermal generation, so a small reverse
current
q appears - the width of the depletion region also expands:
W = 2s ( N1A + N1D )(V0 + VR )
The amount
q of charge stored in the junction is:
QJ = A 2s q( NNAA+N
ND
D
)(V0 + VR )

In forward bias, the voltage VF reduces the build-in voltage V0 , which dramat-
ically raises the diffusion current ID , and diminishes the width of the depletion
region - the total observed current is I = ID − IS

Carrier injection: When forward-biased, the pn junction allows many more of

13
the majority carriers to cross the barrier into the opposite region - at the border
of the depletion region in the n-type region, an excess number of holes are
deposited, in the amount of:
V
pn (xn ) = pn0 e VT , where
xn refers to the boundary between the depletion region and the n-type region
2
pn0 = the equilibrium concentration of n nin
This amount is the sum of the equilibrium concentration, pn0 , and the excess
holes that are deposited by the voltage; the excess is measured as:
V
Excess = pn0 e VT − pn0

The concentration continues deeper into the diffusion region, and diminishes at
an exponential rate:
V −x−xn
pn (x) = pn0 + pn0 e VT e Lp , where
x − xn = the distance from the depletion region border
Lp = the diffusion length of the material (smaller value = faster recombination of
excess charge carriers with majority carriers in the region = more rapid dropoff
in concentration)

The diffusion current density under an applied voltage is:

V −x−xn
D
Jp (x) = q Lpp pn0 (e VT − 1)e LP

The recombination of holes with electrons in the n-type region is strongest at

the border of the depletion region, and diminishes further from the border - the
applied voltage causes a current that injects electrons into the n-type region
to replenish those that participate in recombination - the total current in the
n-type material is therefore the same as the current at the border:
V
D
Jp (xn ) = q Lpp pn0 (e VT − 1)

The same process occurs with the diffusion of electrons into the p-type region,

14
and recombination with holes - the current density created by this process is:
V
Jn (−xp ) = q D
Ln np0 (e
n VT
− 1)

The total current, as the sum of both currents, is determined as:

V
D
I = Aqn2i ( Lp NpD + LD n
n NA
)(e VT − 1)

In reverse-bias, when the voltage is negative and significantly greater than the
thermal voltage, the exponential term is essentially zero, so:
V
I = Is (e VT − 1) ≈ −Is , where
D
Is = Aqn2i ( Lp NpD + LD n
n NA
)
However, at a large negative voltage, breakdown occurs at a negative voltage
V = −VZ

Zener breakdown: When VZ < 5V, breakdown occurs due to the zener effect,
where the voltage is strong enough to break some covalent bonds, thus gener-
ating a significant number of mobile charge carriers - only a small change in
voltage in the neighborhood of −VZ is sufficient to create a large current

Avalanche breakdown: When VZ > 7V, breakdown occurs due to the avalanche
effect - in this model, the minority carriers crossing the depletion zone have
enough kinetic energy to break covalent bonds - the liberated charge carriers
also have a large kinetic energy, and thereby break covalent bonds between other
toms - the resulting “avalanche” of freed charge carrier creates the breakdown
current through the junction

3.6: Capacitative Effects in the pn Junction

The pn junction stores charge in two areas: the depletion region (predominant
during reverse bias), and the n-type and p-type regions (predominant during
forward bias) - different mechanisms are involved in each area

Junction√capacitance: The reverse-biased junction stores charge according to:

QJ = αq V0 + VR , where
α = A 2s q NNAA+N
ND
D
This can also be expressed as:
dQ
Cj = dVRj |VR =VQ = 2√Vα+V
0 r
α
At zero reverse-bias, the capacitance of the junction is Cj0 = √
2 Vo

The effects described above result in a pn junction that changes abruptly at

the junction boundary - other devices have a graded junction with a gradient
from n-type material to p-type material - the junction capacitance of these pn
junctions changes as a function of the grading coefficient

15
Diffusion capacitance: In the forward-biased junction, carrier injection causes
recombination with the majority carriers in each region, causing an excess of
minority carriers - this excess manifests as a stored charge in each region - for
the p-type region, the stored charge is determined as:
Qp = Aq(pn (xn ) − pn0 )Lp = τp Ip , where
L2p
τp = Dp = hole lifetime in the n-type region

Similarly, in the n-type region, the stored charge is:

Qn = τn In

The time constants τp , τn represent the average time for an injected charge
carrier to recombine with a majority charge carrier in the region - the charge
carriers lost to recombination at this rate are replenished by the current Ip , In
- the total stored charge during forward bias is:
Q = τp Ip + τn In
this can be expressed as a function of the total current:
Q = τT I, where
τT = the mean transit time of the junction - the capacitative effect is therefore
determined as:
Cd = ( VτTT )I

16
Chapter 4: Diodes

Some circuit devices exhibit nonlinear characteristics, but can be used in lin-
ear electronics - diodes are two-terminal devices that exhibit nonlinear i − v
characteristics - diodes are useful for many purposes, such as rectification and
amplification - several models can be used to represent the diode at varying
levels of accuracy and complexity

4.1: The Ideal Diode

Diodes typically have a positively charged terminal (an anode) and a negatively
charged terminal (a cathode) - an ideal diode simply has two modes: when a
positive voltage is applied over the anode and cathode (“forward-biased”), the
diode behaves as a short circuit; no voltage is absorbed, and current passes
through freely (the diode is “on”) - when a negative voltage is applied over
the anode and cathode (“reverse-biased”), the diode absorbs all voltage, and
passes no current (the diode is “off”) - the i − v characteristic of this device
is piecewise linear: a horizontal zero-current section at v ≤ 0, and a vertical
section at v = 0+

Rectification: Ideal diodes can be used as a rectifier circuit, which converts a

bidirectional alternating signal into a unidirectional signal - the input signal vi
has an average value of zero, and the output vo has a positive average value
(which can be considered a “DC component” over which the output signal al-
ternates)

Diode logic gates: A combination of diodes can function as a logic gate when
provided with discrete input voltages (such as 0 volts representing a “low” value
and +5 volts representing a “high” value) - a logic OR and AND gates can be
formed this way:

17
4.2: Terminal Characteristics of Junction Diodes

Simple diodes can be formed from a pn junction, which conducts substantial

current in the forward direction and almost no current in reverse - the typical
pn junction exhibits a positive vertical current at a small positive voltage −VZK ;
a negative vertical current at a certain large negative voltage; and a zero current
at intermediate voltages (the “breakdown” region):

In a more accurate representation, the zero-voltage reverse-biased region ex-

hibits a small leakage current, and the transition points represent nonlinear,
exponential growth over a small voltage range:

18
The forward-bias
v
region exhibits current according to the equation:
i = IS (e VT − 1)
IS = saturation current (specific to a particular diode, and temperature-sensitive)
v = input voltage
VT = thermal voltage = kT q
k = Boltzmann’s constant = 8.62 · 10−5 eV K = 1.38 · 10
−23 J
K
T = temperature in kelvin
q = electron charge = 1.6 · 10−19 C
Alternatively, VT = 0.0862T mV; at room temperature, VT = 25.3 mV

Saturation current scales proportionally with the cross-sectional area of the

diode: if the diode cross-section doubles, IS doubles - saturation current is also
very temperature-sensitive: at T + = 5◦ , IS doubles - however, IS is typically
in the range of 10v−12 for silicon diodes, so for any significant amount of forward
current, i ≈ IS e VT

Diode voltage can also be expressed as v = VT ln IiS - a ratio of voltages and

currents can be expressed as V2 − V1 = VT ln II21

In practice, forward current is typically negligible for any positive voltage up to

about 0.5 V (the “cut-in voltage”), and then turns almost vertically positive -
therefore, when a pn junction diode is “on” with any forward voltage exceeding
the cut-in voltage, the diode absorbs a constant voltage (about 0.5 V) and
otherwise operates as a short - diodes typically have a current rating indicating
a range of forward currents over which the diode functions as expected

19
Since IS is temperature-sensitive, the voltage drop is also temperature-sensitive:

Reverse-biased region: The current in this region is largely determined by the

saturation current: i ≈ IS - actual diodes typically exhibit a somewhat larger
reverse current (e.g., 1 nA) due to leakage effects, which are also temperature-
dependent and tend to double for T + = 10◦

Breakdown region: When the reverse voltage exceeds a threshold value ( VZK
), voltage increases steeply - the diode is not destroyed in this process, but the
abrupt change in the neighborhood of VZK may cause current to change rapidly
over a small fluctuation in voltage

4.3: Modeling the Diode Forward Characteristics

Exponential model: The most accurate description of the forward characteristic

VD
is the exponential model presented above, where ID = IS e VT when VDD ≥ 0.5
V - when the diode is included in a circuit featuring a resistor, the current can
also be modeled according to Kirchhoff’s current law: ID = VDDR−VD

Graphical analysis: The Kirchhoff’s current law equation provides a line in the
v − i plot with slope − R1 (the “load line”) - the exponential model provides a
non-linear equation for the current through the diode - the intersection of these
equations provides an intersection point (the “operating point”) indicating the
actual voltage and current of the diode

20
Iterative analysis: The equations above can be applied iteratively until the val-
ues converge

Example: For a diode that exhibits 1 mA at a voltage of 0.7 V, find the current
ID and voltage VD when positioned in a circuit with VDD = 5 V and R = 1 k
Ω.

Answer:
Start with the load line equation, ID = VDDR−VD :
ID = 5−0.7
1000 = 4.3mA
Next apply the exponential equation, V2 − V1 = VT ln II12 = 25mV ln II12 :
V2 = 0.7 + (25mV · ln( 4.3mA
1mA )) = 0.738 V
Apply the load line equation again:
ID = 5−0.738
1000 = 4.262mA
Apply the exponential equation again:
V2 = 0.738 + (25mV · ln( 4.262mA
4.3mA )) = 0.738 V
This yields convergence at ID = 4.262mA, V2 = 0.738V, which is our answer

Constant-voltage-drop model: A less accurate but easier estimate of diode be-

havior can just presume that the diode imposes a constant voltage drop on a
forward voltage:

21
Ideal-diode model: Completely neglecting the voltage drop enables very quick
analysis, but exhibits significant inaccuracy; the constant-voltage-drop model is
almost as conceptually easy and provides a much better approximation

Small-signal model: In some cases, a small alternating signal vd (t) is imposed

on a large DC voltage VD - we can find the slope of the exponential curve at the
quiescent point VD , and then presume that over this small range, curve is rela-
tively linear - the linearity is estimated according to the incremental resistance
rd = VIDT = VTVD - this small-signal approximation works when |vd (t)| ≤ 0.5mV
IS e V T

Voltage regulation: Diodes are used to create a regulated voltage, where a circuit
provides a constant DC voltage in spite of changes in the load and/or changes in
the power supply voltage - because the diode exhibits a nearly constant voltage
over a large range of currents, the input to a diode will exhibit a relatively
steady 0.7 V over a wide range of currents - higher voltages can be achieved by
connecting diodes in series; e.g., a series of three diodes provides a steady 2 V
over a wide range of currents

4.4: Operation in the Reverse Breakdown Region - Zener

Diodes

The abrupt change in the reverse breakdown region can be useful in some con-
texts, such as voltage regulators, because the diode maintains its voltage with
high precision over a range of currents - zener diodes are manufactured that
operate specifically in this range - a zener diode can be positioned in a reverse-
bias position and subjected to a negative voltage from anode to cathode (i.e., a
positive voltage over the cathode to anode); the diode consumes a very specific
voltage ( VZ ) over a range of currents ( IZ ) - the consumed voltage does change
slightly, based on an incremental resistance rz , such that δV = rz δI, but this
value is typically in the range of 10 Ω - in the actual “knee” region near VZK ,
the resistance changes abruptly, so it is best to avoid operating a zener diode

22
in this region - zener diodes are available with VZ in the range of a few volts to
hundreds of volts, and can operate within a range of currents

A simple model of zener diodes is reflected by the equation VZ = VZ0 + rz IZ -

in practice, VZ0 is very close to VZK

The zener voltage is temperature-dependent, and is defined by a temperature

coefficient, TC (mV / ◦ C), which can be positive or negative - each zener
diode has a particular profile curve for TC at a range of voltages; many zener
diodes have a current point where TC = 0, and therefore are not temperature-
dependent when operated at that current - the temperature coefficient can also
be reduced by connecting a reverse-biased zener diode in series with a forward-
conducting diode that has an opposite temperature coefficient

4.5: Rectifier Circuits

Diodes are useful as rectifiers in many context - example: in an AC-to-DC

power supply, an alternating current is provided to a full-wave diode rectifier
that produces a fully rectified current, then to a low-pass filter that averages
each rectified cycle (but which still exhibits a time-dependent “ripple”), and
finally to a voltage regulator that provides a constant current to a load

(This process often begins with a step-down transformer: a first voltage, such as
120 V, runs through a first coil with N1 turns that induces a current in a second
coil with N2 turns, so that the voltage fed into the diode rectifier is 120 · N 2
N1
- in addition to stepping down the voltage, this also electrically insulates the
equipment from surges on the line)

Half-wave rectifier:

(
0, vs < VD
Using the constant-voltage-drop model, v0 = - two rele-
vs − VD , vs ≥ VD
vant factors for rectifier diodes: maximum current-handling capability, and peak
inverse voltage (PIV) that diode must withstand without reaching breakdown
- best to use diodes where VZK is well above the PIV - rectifier diodes also do

23
not work well for small-voltage signals; these scenarios call for a combination of
a diode and an op-amp

Center-tapped full-wave rectifier:

A full-wave rectifier can be designed by center-tapping the step-down coil of the

transformer, and using two diodes that direct current away from either end - the
average power of this rectifier will be larger than for the half-rectifier - however,
each diode experiences PIV = 2Vs − VD

Bridge rectifier:

A bridge rectifier can be designed as a Wheatstone bridge, featuring a combi-

nation of two pairs of diodes, each of which passes current over a load resistor
during half of a cycle and resists the flow of current during the other half of the
cycle - bridge rectifiers use twice as many diodes as a center-tapped rectifier,
and also imposes a two-diode voltage drop instead of a one-diode voltage drop
- however, the bridge rectifier does not require center-tapping, and therefore
required a coil that is half the length of the center-tapped rectifier - also, the
PIV is distributed over two diodes, as PIV = Vs − VD

Peak rectifier:

24
(Note: This is a half-wave peak rectifier; a full-wave peak rectifier can be con-
structed by also including a diode across the load resistor) - in order to transform
an AC rectified voltage into a DC voltage, a capacitor can be added in parallel
with the load resistor - the capacitor rapidly charges when the voltage is near
its peak, and then discharges to maintain the voltage while the rectified current
falls - as the capacitor discharges, it loses a bit of voltage until the next peak
of the source voltage - the result is a nearly-DC voltage with a “ripple” as the
capacitor charges and discharges, which is determined as:
Vo = Vp − 12 Vr , where
Vp = peak voltage
Vr = ripple voltage magnitude, where
Vr = fILC

The conduction interval δt is defined as:

Vp cos(ωδt ) = Vp − Vr

Peak rectifiers can be used as peak detectors, such as an AM demodulation

devices

Precision half-wave rectifier:

A “superdiode” can be generated with the addition of an op-amp to provide a

half-wave rectified output v0 that captures the full amplitude of the input signal
- this occurs because the feedback loop causes the op-amp to drive an output
voltage of va = vi + vD , i.e., higher than the input voltage - the actual output
voltage, after the diode voltage drop, is vo = va − VD = vi

25
4.6: Limiting and Clamping Circuits

Voltage limiter:

Since diodes provide a (nearly) constant voltage drop in a forward-biased range,

diodes can be used to impose as a voltage limit - the constant-voltage-drop
model causes this to appear as a “hard limit” with a sharp inflection point, but
real diodes provide a “soft limit” with a more gradual approach to the cutoff
voltage - limiting can be imposed on positive or negative voltage (by reversing
the orientation of the diode), and can be offset by placing a voltage source in
series with the other side of the diode - two limits can be imposed with a pair
of diodes

Clamped capacitor:

When this voltage source provides a negative voltage of −V , current flows

through the diode (which has zero output) until the capacitor is fully charged -
when the voltage source then shifts to a positive voltage +V , the diode resists
the flow of current, with a magnitude of +V − (−V ) - the result is that where
the input voltage varies from −V to +V , the diode exhibits an output voltage
of 0 to (+V − (−V )) - that is, this diode adds a DC component to the fluctu-
ating AC source; the output is said to be “clamped” at a higher value - adding
a resistor in parallel with the diode allows current to flow during each cycle,
causing a slightly skewed output

Voltage doubler:

26
The combination of a clamped capacitor and a peak rectifier causes an output
that is twice the magnitude of the input

4.7: Special Diode Types

Schottky-Barrier Diode (SBD): This type of diode is not formed by a pn junc-

tion, but by an n-type material in contact with metal - while operating very
similarly to a diode, this diode does not exhibit capacitance in the n-type ma-
terial, thus avoiding capacitance and raising the switching speed of the diode -
the forward voltage drop is also lower (0.3 to 0.5 V, vs. 0.6 to 0.8 V)

Varactors: The reverse-bias capacitance of the depletion region is voltage-

dependent, and can be used in some applications (e.g., self-tuning radio re-
ceivers) - special diodes called varactors can be designed that exhibit this prop-
erty with consistent voltage-dependent variance

Photodiodes: Most diodes are shielded from light, because photons can break
covalent bonds in the depletion and create a current - optoelectronics can make
use of this effect by exposing the junction to light that increases the current of
a set voltage when exposed to light - solar cells also make use of this effect to
transform light into voltage

Light-emitting diodes: A diode made with a particular type of material (direct-

bandgap material) causes light to be emitted when carrier-injected minority
carriers recombine with majority carriers in each region - LEDs can be made to
produce light across a variety of wavelengths, including single-wavelength LEDs
(“laser diodes”)

Optoisolator: An LED can transform voltage into light that is then captured
by a photodiode and converted back into voltage - this combination enables the
transmission of voltage with electrical isolation, which reduces interference and
the effects of current surges and spikes

27
Chapter 5: MOS Field-Effect Transistors

Many types of three-terminal devices allow the voltage between two terminals
to act as a switch that controls the flow of current through the third termi-
nal - there are two types of transistors: metal-oxide-semiconductor field-effect
transistors (MOSFETs) and bipolar junction transistors (BJTs) - MOSFETs
are widely used, particularly in integrated circuits, and can be smaller, more
energy-efficient, and more simply and cheaply manufactured than BJTs, and
integrated circuits often pack large numbers of MOSFETs into a small pack-
age - MOSFETs can also exhibit analog behavior, and ICs often implement
“mixed-mode” designs

5.1: Device Structure and Physical Operation

Basic MOSFET structure:

A p-doped single-crystal silicon wafer substrate is provided, and two regions

(the “source” and the “drain”) are heavily n-doped - a layer of silicon dioxide
(SiO2), about 1 to 10 nm (10 to 100 angstroms), is developed on the surface
to cover the region between the source and drain (the “channel” region), and a
layer of metal is deposited atop the silicon dioxide to form a gate electrode (“G”)
- metal contacts are formed to the source (“S”), drain (“D”), and substrate or
body (“B”) - because the oxide layer physically insulates the gate electrode from
the device body, very little current flows through the gate

28
This structure forms pn-junctions with the source and drain regions - these
regions are ordinarily kept reverse-biased, with the drain higher than the source
- a positive voltage applied to the gate terminal causes current to flow through
the channel between the source and drain - the length ( L ) and width ( W ) of
the channel affect the performance of the device - note that, at this basic level,
the source and drain are physically identical and can be physically reversed

At zero voltage, the MOSFET acts as a pair of diodes (between the p-type
material and the source, and the p-type material and the drain), and impose a
resistance on the order of 1012 Ω

The application of a positive voltage (vGS is applied to the gate pushes free
holes under the gate further downward in the substrate; the bound negative
charges of the donor atoms are uncovered, creating a negatively charged region
- this voltage also draws electrons into this region, right under the oxide layer,
from the n-type source and drain regions - this “induced” n-type region forms
a channel (“inversion layer”) - a positive voltage is then applied between source
and drain (vDS ) allows current to flow through the channel - this structure
therefore forms a n-channel MOSFET in a general region of p-type material

Capacitative effects: The gate and channel regions form act as a parallel-plate
capacitor separated by the silicon dioxide insulator, with positive charge accu-
mulating in the gate and negative charge accumulating in the channel region -
the electric field created in the channel region controls the conductivity of the
region and the resulting current when a voltage vDS is applied

The gate has a threshold voltage Vtn , usually between 0.3 and 1 volt - when
vDS = 0, the channel has zero voltage, and the voltage across the oxide is (vGS
- an effective voltage or overdrive voltage is defined as vOV = vGS − Vtn - the
capacitance of the channel is defined as:
C = COX (W L), where
W, L = the width and length of the channel
COX = oxide capacitance (often expressed in square microns), and is defined
as:
COX = tOXOX
, where
OX = the permittivity of silicon dioxide = 3.90 = 3.45 · 10−11 F/m
tOX = the thickness of the oxide layer

The amount of charge stored in the channel is defined as

|Q| = CvOV = Cox W LvOV
It is sometimes desirable to express charge in terms of channel length:
|Q|
unit channel length = Cox W vOV
The charge stored in the channel increases proportionally with vOV , and is often
depicted as a “deeper” channel

29
When a small positive voltage VDS is imposed between the drain and the source
while a channel is induced, the voltage creates an electric field defined as:
|E| = vDS
L
Electron drift occurs in the direction of source to drain, the amount of:
Electron drift velocity = µn |E|
This drift causes a current from drain to source, in the amount:
iD = µn Cox W L vOV vDS
In this small-voltage scenario, the channel acts as a linear resistor, with con-
ductance:
gDS = µn Cox W L vOV
The first factor, µn Cox , is determined by the material manufacturing process,
and is often expressed as the process transconductance parameter: kn0 = µn Cox ,
in units VA2
The second factor, W L , is often called the aspect ratio, and is the easiest factor to
select in order to achieve a desired conductance; manufacturing processes typ-
ically have sufficient precision to create a particular minimum channel length,
and are characterized as such, e.g., a 45-nm manufacturing process
The product of the process transconductance parameter and the aspect ra-
tio is often expressed together as the MOSFET transconductance parameter:
kn = kn0 WL
Therefore, when vDS is small, the MOSFET operates as a voltage-controlled
resistor:
1
rDS = µ C W (v
n ox L GS −Vtn )
The small-vDS MOSFET therefore has the following iD − vDS characteristic:

The resistance has slope (vGS − Vtn ); when vGS = Vtn , the line has a slope of
zero, i.e., infinite resistance

Triode region: As vDS increases while vGS is held at a constant overdrive voltage
VOV > Vtn , vDS exists as a voltage drop over the length of the channel, from
vGS = Vtn + VOV to vGD = vGS − vDS = Vtn + VOV − vDS :

30
The voltage difference between the gate and the source/drain regions determines
the depth of the channel, so the channel is deepest at the source and shallowest
at the drain - as vDS increases toward VOV , the channel resistance increases as
well, until VDS = VOV = VGS − Vtn , at which point the taper of the channel at
the drain equals zero

The current can be expressed as a function of the area of the channel:

iD = kn0 W 1
L (VOV − 2 vDS )vDS

Saturation region: As vDS scales beyond VOV , the channel is no longer induced
at the drain end, and in fact at VDS > VGS − Vtn , the positive voltage of
the drain causes the channel to not exist even farther from the drain (“channel
pinch-off’) - as the iD −vDS characteristic shows, current saturates in this region
of operation, and is no longer dependent on vDS - the saturation region occurs
at:
VDSsat = VOV = VGS − Vtn
iD = 12 kn0 W 2
L VOV

Subthreshold region: It is not entirely true that no current flows at vGS < Vtn ;
at values of vGS very near Vtn , a small current flows - the current exhibits
exponential growth based on vGS s, much like ordinary pn junctions - some
devices are making use of the subthreshold region

31
p-channel MOSFET: The same engineering process can result in the creation
of a p-channel MOSFET - starting with an n-type material, a pair of p+ source
and drain regions are formed - an oxide insulating layer is formed between,
with a gate polysilicon layer, and metal terminals are formed for the source,
drain, gate, and grounded body - the MOSFET exhibits a threshold voltage
Vtp , which is negative by convention - and a channel forms when vGS < Vtp
(i.e., when the negative voltage of the gate exceeds the threshold voltage) - in
order to discuss this in a more familiar manner, the equations are written in
terms of magnitude: |vGS | > |Vtp | - the process transconductance parameter,
kp0 = µp Cox , further determines the transistor transconductance parameter kp =
kp0 W
L - PMOS devices used to be prevalent but are now supplanted by NMOS
devices, because µn exceeds µp by a factor of 2 to 4, allowing for faster device
speeds

Complementary metal-oxide semiconductors (CMOS): Many scenarios require

both NMOS and PMOS devices - this can be achieved by starting with one
material, forming a “well” in which a device of the other type is formed, and
creating a silicon dioxide isolation structure in between

5.2: Current-Voltage Characteristics

An n-type MOSFET is typically shown as the following symbol, with an arrow

showing the direction of current flow:

As noted earlier, the MOSFET is a symmetric device, so the source and drain
regions are arbitrarily selected to match the direction of current flow - in an n-

32
type MOSFET, the drain is always more positive than the source, and current
flows from drain to source; in a p-type MOSFET, the drain is always more
negative than the source, and holes (and hence current) move from source to
drain

The iD − vDS characteristics are mapped by setting vGS , and measuring the
current over the range of vDS :

The current reflects the three regions described above:

• vGS < Vtn : Cutoff region (including sub-threshold region)

• vDS < vOV = vGS − Vtn : Triode region (including the near-linear small-
voltage region)
• vDS > vOV = vGS − Vtn : Saturation region

MOSFETs can also be modeled as an iD − vGS characteristic by setting vDS

and measuring the current over a range of vGS :

The current of this circuit remains the same:

iD = 12 kn0 W
L (vGS − Vtn )
2

This configuration is useful as an amplifier, but its nonlinearity at low voltages

33
can be problematic - however, in a large-voltage content that operates in the
linear region, the vGS model can be considered equivalent to a voltage-controlled
current source dependent upon vGS

Saturation-mode output resistance: The VCCS model described above is some-

what idealized, by presuming that iD and vDS are unrelated in saturation mode
- in reality, as vDS > vOV increases, increasing channel pinch-off causes a volt-
age drop due to the reduction in channel length (“channel-length modulation”),
and iD increases with vDS - this resistance manifests as a small additional term
in the current equation:
iD = 12 kn0 W 2
L (vGS − Vt n) (1 + λvDS ), where
λ = a device-specific parameter indicating the proportionality of vDS and iD
due to channel-length modulation - this factor is determined by process technol-
ogy, and is inversely proportional with channel length (since smaller channels
are more susceptible to length reduction) - λ is sometimes expressed as VA = λ1 ,
which in turn is often expressed as VA = VA0 L based on process technology at a
particular length; VA0 is often in the range of 5 to 50 µm
V
- for a particular vGS ,
output resistance can be represented as:
δiD −1
ro = ( δv DS
) = λI1D = VIDA , where
ID = drain current without channel-length modulation

Characteristics of p-channel MOSFET: The p-channel MOSFET behaves in an

almost identical manner, and exhibits an iD − vGS characteristic:
iD = 12 kp0 W 2
L (vSG − |Vtp |) (1 + |λ|vSD )

5.3: MOSFET Circuits at DC

(Examples of circuit analysis and design problems)

5.4: Applying the MOSFET in Amplifier Design

The basic MOSFET operates as a voltage-controlled current source, where VGS

controls ID - although this behavior is nonlinear, configurations can be devised
that provide a near-linear response

Simple voltage amplifier circuit:

34
The current output of the MOSFET is passed through a load resistor, and the
voltage between the resistor and the drain is the output: vDS = VDD − iD RD

The voltage transfer characteristic (VTC) of this amplifier is as follows:

When VGS < Vt , the MOSFET is in the cut-off mode; as VGS rises above Vt , the
MOSFET begins transmitting current in the saturation mode, in a near-linear
manner; and when VGS > VD S, the amplifier transitions to triode mode and
the output becomes nonlinear

The MOSFET can be used in a linear application by selecting a bias point,

Q, where VGS and VDS are in the middle of the near-linear region - a small
signal vgs (t) can be imposed on a DC voltage of VGS to obtain an output
in the middle of the near-linear region, such that vDS (t) scales linearly with
vGS (t) = VGS + vgs (t)

dvDS
The voltage gain of the amplifier at this point is Av = dvGS , which is defined
as:

35
Av = −kn VOV RD = − 2IVDOV RD

The output is 180 degrees out of phase with the input (hence the negative gain),
and is proportional to RD , kn , VOV
The gain is restricted by the magnitude of the input:
|Avmax | = 2VDD
VOV

Determining VTC by graphical analysis: The quiescent point Q can be deter-

mined by graphing the curves for each input signal vGS (t):

For a selected VDD and VGS , each selection of vgs (t) leads to a value vGS (t)
that generates a curve of iD over the range of vDS , as determined by RD :
iD = VRDD
D
− R1D vDS
The load line has four important points:

• A : vGS = Vt , so MOSFET is in cutoff mode and no current flows

• Q : vGS = VGS , i.e., quiescent
• B : the load line enters the triode region
• C : vGS = VD D, when the MOSFET acts as a closed switch with resistance
rDS (“closure resistance”)

Choosing Q: If we presume that RDS is fixed but VGS is constant, the intended
use of the amplifier may guide the selection of Q - choosing a point too close
to either axis may create problems: if too close to the x-axis, a signal swing
of vGS < Vt causes the MOSFET to turn off, so the signal is “clipped” due
to insufficient “head room”; and if too close to the y-axis, a signal swing of
vGS < vDS will cause the MOSFET to enter the triode region and produce
distorted output due to insufficient “leg room”

36
5.5: Small-Signal Operation and Models

For a particular amplifier circuit, the DC bias current ID and bias voltage, at
the bias point Q, can be found by setting vGS = 0:
1
ID = r2 kn (VGS − Vt )2 = 12 kn (VOV )2
VDS = VDD − RD ID
This provides an amplifier with the range of vgs as:
VDS + Vt + VGS < vgs < VDD
The current for any value of vGS can be written as:
iD = 21 kn (VGS − Vt )2 + kn (VGS − Vt )vgs + 21 kn (vgs )2
The first term is the DC bias current; the second term is directly proportional
to vgs ; and the third component is nonlinear distortion, which is minimized to
promote linearity by keeping vgs within a small range:
vgs  2VOV
When calculated over a small range, the last term can be disregarded, and
current can be expressed as:
iD ≈ ID + id , where
id = kn (VGS − Vt )vgs
The linearity of this region can be expressed as the transconductance of the
amplifier:
gm = vigsd
= kn (VGS − Vt ) = kn VOV = δvδiD
GS
The voltage drop can similarly be expressed as the sum of the bias voltage and
the signal voltage:
vDS = VD D − RD (ID + id )
vds = −id RD = −gm vgs RD
The amplification can be written as:
Av = vvdsgs
= −gm RD

37
The small-signal amplifier can be expressed as two equivalent circuits:

• Hybrid Π model:

This model involves just a voltage-controlled current source with current

:
ID = gm vgs , where
gm = kn VOV = V2IOVD
, and
vgs = voltage drop over the current source
In this equivalent-circuit model, any ideal voltage sources are replaced by
short circuits, and any ideal current sources are replaced by an open circuit
- if channel modulation is also taken into account, a resistor is positioned
in parallel with the current source, with resistance:
r0 = |VIDA |
And the current is:
ID = 12 kn VOV
2

The voltage gain is defined as:

Av = vvdsgs
W
The transconductance gm interrelates three design parameters: L , VOV , ID

38
 - any two of these design parameters can be selected, and the third design
parameter can be calculated accordingly
• T model:

In this equivalent-circuit model, a voltage-controlled current source is

placed in series from source to drain with a resistor of value g1m , and
the gate connects in between - the input resistance connecting to the gate
is ideally infinite - output resistance can be modeled as a resistor of value
ro in parallel with the combination

5.6: Basic MOSFET Amplifier Configurations

General model of a MOSFET amplifier:

In an ideal model, the input resistance Ri = ∞, and the output resistance

Ro = 0 - in reality:

vi
• Input resistance: Rin = ii
vo
• Open-circuit voltage gain: Avo = vi |RL =∞

39
 • Voltage gain: Av = Avo RLR+R
L
o

• Output resistance: Ro = vixx , where ix is a current applied to the output

terminal when the input is zero, and vx is a voltage measured over the
output terminal
vo
• Overall voltage gain: Gv = vsig

Three basic configurations exist for MOSFET amplifiers:

• Common Source (CS): Source is grounded; input voltage is applied at

the gate; resistor diode RD is positioned in parallel with MOSFET, and
output voltage is read over the resistor
The generic model is adapted for the common source amplifier as follows:
Rin = ∞
vgs = vi
vo = −gm vgs 1 1+ 1
RD ro
1
Avo = −gm 1
+ r1o
≈ −gm RD
RD
Common − sourceamplif iers
• Common Gate (CG): Gate is grounded; an input voltage is applied at the source;
resistor diode RD is positioned in parallel with MOSFET, and output voltage
is read over the resistor

• Common Drain (CD) or Source Follower: Drain is grounded; input voltage is

applied at the gate; load resistor RL is connected to the source, and output
voltage is read over the resistor

5.7: Biasing in MOS Amplifier Circuits

Biasing is the process of applying a DC drain current ID and drain-to-source

voltage VDS to maintain operation of the MOSFET in saturation mode for
small-signal applications

Biasing by fixing VGS : This model involves simple biasing by fixing the gate
current, such as using a voltage divider - however, this type of biasing is difficult
to apply consistently, because some MOSFET properties ( µn , Cox ) can vary
by devices even produced using the same process, and Vt , µn are temperature-
dependent

Biasing by fixing VG :

40
A better model involves fixing VG and connecting a resistor to the source, such
that VG = VGS + RS ID - in this case, if VG  VGS , then ID is determined by
VG and RS , and is therefore predictable and stable; and if VG rises above VGS ,
the resistor provides negative resistance that reduces the magnitude of changes
in the current

Biasing using drain-to-gate feedback resistor:

Connecting the drain to the gate (through a resistor RG ) causes negative feed-
back - if the current ID increases, the voltage after the resistor RD is reduced,
which reduces VGS and reduces ID - similarly, if the current decreases, the volt-
age drop over RD is less, and the gate voltage increases to allow more current

Biasing using constant current source:

41
When the gates of two MOSFETs are connected and a current is provided
through one, the current through the other is determined as a ratio of the W
L
W2
L2
of each MOSFET: I2 = I1 W1
- this configuration is known as a current mirror
L1

5.8: Discrete-Circuit MOS Amplifiers

MOSFETs can be used as a combination of discrete components to build am-

plifiers, using the concepts provided above - this section covers single-stage
amplifiers, based on the following components using a constant-current biasing
arrangement

The components used solely in the AC portion are connected by capacitors -

a bypass capacitor connects ground in parallel with the current source, which

42
allows the signal to bypass the input resistance of the current source - coupling
capacitors are used to isolate vsig and vo to prevent interference from the DC
input component

Common-source amplifier:

This amplifier exhibits high amplification:

Gv = − RGR+Rsig gm (RD ||RL ||ro )
G

Common-source amplifier with unbypassed source resistance:

43
The inclusion of a source resistor allows an increase in the gain:
(RD ||RL ||ro )
Gv = − RGR G
+Rsig 1
+R
gm s

Common-gate amplifier:

Although presenting low gain, this amplifier presents better performance for
high-frequency signals

Common-drain amplifier (source follower):

This amplifier presents no gain (Avo = 1), but enables a reproduction of a

high-resistance input signal to a low-output resistance

Amplifier response frequency: Amplifiers typically show consistent gain only

for signals within a specific frequency range (within the “bandwidth” of the
amplifier) - at lower frequencies, the capacitance of the capacitors fails to isolate

44
the low-frequency signal from the zero-frequency DC component; while at higher
1
frequencies, the reactance of the capacitors ( jωC ) becomes significant and
reduces the gain

5.9: The Body Effect and Other Topics

The basic diagram of the MOSFET indicates that a terminal is connected to

the substrate body - this connection is not relevant (or even present) for dis-
crete circuits, but in integrated circuits, the substrate is shared by many densely
packed MOS transistors, and the body can exhibit a slight positive voltage that
makes it difficult to maintain reverse bias and cutoff - this effect can be reduced
by connecting the substrate the most negative power supply in an NMOS cir-
cuit, or the most positive supply in a PMOS circuit - however, this voltage can
increase the voltage
p needed topachieve forward bias:
Vt = Vt0 + γ( 2φf + VSB − 2φf ), where
Vt0 = the threshold voltage when VSB = 0
φf , γ are physical parameters determined by the fabrication process ( γ is the
“body-effect parameter”)
The effect of the body voltage is to create a second voltage difference between
the source and body, vbs , which acts as a second gate that also controls the
current (“backgate”) - the effect is modeled as:
δiD
gmb = δv BS

Temperature effects: Both Vt and k 0 are temperature-dependent: Vt decreases

with rising temperature and increases current; k 0 decreases with temperature
and thus decreases current (this effect is more prevalent)

Breakdown: Three kinds of breakdown can occur in MOSFETs:

• Avalanche breakdown: As the drain voltage increases to a particularly

high value (usually in the range of 20 V to 150 V), the drain-to-substrate

45
 pn junction exhibits weak-avalanche breakdown
• Punch-through: In devices with short channels, a high drain voltage can
cause pinch-off to reach all the way to the source, causing a high current
increase

• Gate oxide breakdown: A high VGS (more than 30 V) can permanently

damage the gate oxide - this can occur due to static charge stored on the
gate capacitor - this effect can be decreased by adding clamping diodes to
the input terminals

Velocity saturation: High electric fields can impose an upper limit on the drift
velocity of carrier charges; in very-short-channel devices, this can occur below
vDS < 1V - this effect causes current to depend linearly on vGS rather than
2
according to vGS , and can cause gm to become independent of vGS

Depletion-type MOSFETs: The MOSFETs in this chapter involve a channel

that is induced by voltage (“enhancement-type” MOSFETs) - other MOSFETs
have a physically implanted channel, where negative voltages applied to the gate
and drain deplete the channel of charge carriers, reducing and eventually cutting
off the current - some MOSFETs can be operated both in depletion mode and
enhancement mode

46
Chapter 6: Binary Junction Transistors (BJTs)

BJTs, like MOSFETs, are useful as controlled sources, as switches, and as logic
inverters - BJTs were first discovered after MOSFETs, but were more useful for a
while until MOSFET manufacturing techniques were improved - however, BJTs
are still more useful in some cases, such as extreme environmental conditions
and very-high-frequency devices (e.g., emitter-coupled logic); other contexts use
MOSFETs in conjunction with BJTs

6.1: Device Structure and Physical Operation

Two types of BJTs are possible: pnp BJTs and npn BJTs - the npn BJT is
manufactured by creating a highly doped n-type emitter, a lightly doped p-
type base, and a lightly doped n-type collector, with metal contacts forming
terminals connected to each region (pnp BJTs simply reverse the doping types
of the regions) - most of the following discussion will focus on the npn BJT, but
the same properties apply to the pnp BJT

The BJT has two pn junctions: the emitter-base junction (EBJ) and the collector-
base junction (CBJ) - the relative voltages of the terminals determine whether
each junction is forward- or reverse-biased, and thus the operating properties of
the device:

EBJ CBJ Mode

Reverse Reverse Cutoff
Forward Reverse Forward Active Mode
Reverse Forward Reverse Active Mode
Forward Forward Saturation

Typically, the forward active mode is used when the transistor is configured as
an amplifier, and the saturation and cutoff modes are used when the transistor
is configured as a switch

47
Forward-active mode: This mode arises in the npn BJT when vE < vB < vC ,
exhibiting a conventional current from collector to emitter

In the forward active mode, the EBJ is forward-biased and the CBJ is reverse-
biased - this forward bias creates two types of current: electrons injected from
the emitter into the base, and holes injected from the base into the emitter
(the doping levels create a much higher electron current than hole current) -
the injected electrons diffuse through the base region, with the concentration
steadily diminishing across the length of the base (reduced a bit further by
recombination) - the electron concentration just beyond the EBJ is defined as:
vBE
np (0) = np0 e VT , where:
np0 is the thermal equilibrium value of majority carriers in the base region
This injection also gives rise to an electron diffusion current:
dnp (x) n (0)
In = AE qDn dx = AE qDn (− pW ), where
AE = the cross-sectional area of the emitter-base junction
Because electrons flow left-to-right (emitter-to-base), this diffusion gives rise to
a conventional current from right-to-left

Forward-active mode collector current: Because the CBJ is reverse-biased,

injected electrons that diffuse across the base to reach the CBJ are swept across
the junction due to the barrier voltage - this gives rise to a collector current,
which is defined
VBE
as:
iC = IS e VT , where
IS = saturation current, which is defined as:
n A qDN n2i
IS = AE qDN Wp0 = ENA w
Notably, the collector current iC is independent of VCB ; as long as this value
is positive (to maintain reverse-bias), the saturation and collector currents are
not dependent on the actual voltage - the linear dependence on the area enables
otherwise-identical devices to exhibit currents as a ratio (e.g., if the same voltage
is applied to two BJTs with a 1:2 area ratio, the current through each BJT will
also have a 1:2 ratio)

48
Forward-active mode base current: The base current iB has two compo-
nents: iB1 , the injection of holes from the base region into the emitter region,
and iB2 , the supply of holes from the terminal in response to the loss of holes
from recombination - the total base current is defined as:
iB = iB1 + iB2
VBE
Since iB is proportional to e VT , just like iC , the base current is always pro-
portional to the emitter current:
iB =iC
β , where
β = the common-emitter current gain, which is a transistor parameter that is
usually in the range of 50 to 200 - it is desirable to keep β high - this factor is
inversely proportional to the length of the base region (hence W is usually kept
small), and directly proportional to the doping ratio of the base and emitter
NA
regions ( N D
)

Forward-active mode current relationships: The current through the npn

BJT in forward-active mode creates a conventional current from collector to
emitter - the total emitter current is defined as:
VBE
iE = iC + iB = β+1β Ci = β+1
β IS e VT

To simplify this equation, we can define a parameter α as the common-base

current gain:
β α
α = β+1 (or conversely, β = 1− , such that
vBE
iS
iE = αe
VT

Forward-active mode equivalent-circuit models: When a positive VBE

voltage is applied to an npn BJT, the collector emits a constant current that is
independent of VCB as long as the CBJ remains reverse-biased ( VC B ≥ 0 ) -
because the base current is ideally very small, iC ≈ iE - the npn BJT therefore
operates as a constant-current source, where the current is defined by VBE -
based on this behavior, four equivalent circuit models are possible:

49
This model is a voltage-controlled current source - note that the current in this
model does not scale linearly, but exponentially, with the measured voltage

This model is a current-controlled current source - again, the current in this

model does not scale linearly, but exponentially, with the measured current -
the gain between iE (as input) and iC (as output) is determined by α, which is
why α is called the common-base current gain

50
This model is a two-port voltage-controlled current source

This model is a two-port current-controlled current source - the gain between

iB (as input) and iC (as output) is determined by β, which is why β is called
the common-emitter current gain

A typical npn BJT is formed as follows:

51
Unlike a MOSFET which is structurally symmetric and reversible, the structural
asymmetry makes this device non-reversible, with α ≈ 1 and a large β value

Reverse-active mode: This mode arises in the npn BJT when vE > vB > vC
- the BJT in reverse-active mode operates similarly to forward-active mode, but
with a much lower value of β, making this mode undesirable

Cutoff mode: This mode arises in the npn BJT when vE > vB < vC , such
that both junctions are reversed-biased - in this mode, the reverse biases of the
EBJ and CBJ effectively prevent the flow of current

Saturation mode: This mode arises in the npn BJT when vE < vB > vC ,
such that both junctions are forward-biased - note that the forward-active mode
of the npn BJT can be maintained as long as vCB ≥ −0.4 V (since forward-
bias of the pn junction only occurs at +4 V) - below this value, the npn BJT
is in saturation mode - the collector current is reduced, and the base current
increases, dependent upon vCB :
vBE vBC
iC = IS e vVT − ISC e vVT
BE BC
iB = IβS e VT + ISC e VT
This relationship causes the value of β to change based on vBC ; i.e., vBC “forces”
β to a value lower than the constant value of β in forward-active mode - the
resulting new value of β is called βforced , and is defined as:
βforced = iiB
C
|saturation ≤ β
This provides two ways to determine whether the BJT is in saturation mode:
either vCB < −0.4 V, or iiB C
<β
The depth of the saturation mode can be expressed as:
vCEsat = vBE − vCE , where
vCEsat = 0.3 V indicates that the transistor is at the edge of saturation, and
vCEsat ≤ 0.2 V indicates that the transistor is deep in the saturation region
The saturation-mode BJT can be modeled as follows:

The pnp BJT:

52
The pnp BJT works in a similar manner as the npn BJT, except that the current
is mainly conducted by holes, and conventional current is from the emitter to
the collector - also, a base current runs out of the BJT rather than into the base
region

6.2: Current-Voltage Characteristics

npn and pnp BJTs exhibit current flow in opposite directions, and are repre-
sented by the direction of the arrow (always pointing from positive to negative)
- currents are always measured in the positive direction - the following diagrams
show the currents of npn and pnp BJTs respectively:

53
Collector-base reverse current: The reverse current across the collector-base
junction, with the emitter open-circuited, is denoted ICBO ; the value is typically
in the nA range, and is dependent upon VCB , doubling for each 10◦ C increase

BJT iC − vBE Characteristic: Since iC varies logarithmically with vBE and is

temperature-dependent, the BJT exhibits the following relationship:

Early effect: The voltage vCE has a small but positive relationship with iC ,
which also scales with higher values of vBE - iC − vBE is a straight line, and,
extrapolating backward, we find a common point −VA that defines the relation-
ship:

This relationship occurs because of the base-width modulation effect: raising

vCE increases the reverse-bias voltage, increases the width of the depletion re-
gion, and decreases the effective base width (i.e., the width of the transistor

54
 1
acting as the base region); since IS W , a shorter effective base width increases
the current - the Early effect can be modeled as follows:
VBE
iC = IS e VT (1 + vVCE
A
)
This can also be modeled as output resistance:
ro = VA +V
IC
CE

0
We can also define IC as the collector current with the Early effect neglected,
and that ro = VI 0A
C
δiC
We can also measure β as β = δi B
; i.e., vary iB by a little, and notice the
change in iC - this property actually exhibits differences in alternating-current
and direct-current circumstances, but we can disregard this difference for now
In saturation, ICsat = βforced IB , where βforced < β - as a result, the Early ef-
fect is attenuated in saturation, but leads to significant differences in the active
mode due to larger values of β

BJT Circuits at DC

Examples of BJT circuits operating in direct-current scenarios: Presume that

VBE = 0.7V; VCEsat = 0.2V when saturated; and disregard Early effect - the
first question is: Which mode is the transistor in?

• First presume that the BJT is in forward-active mode, and verify that
behavior matches VCB > −0.4V
IC
• If not, presume that the BJT is in saturation mode, and verify that IB =
βforced < β

55
6.4: Applying the BJT in Amplifier Design

Natively, the BJT operates as a transconductance amplifier (i.e., a voltage-

controlled current source): vBE controls IC - these types of amplifiers can easily
be converted to a voltage amplifier (i.e., a voltage-controlled current source)
by inserting a resistor RC at the collector and measuring its voltage drop -
the relationship between input voltage vBE and output voltage iC RC does not
change linearly (the response depends on whether vBE places the BJT in the
cutoff mode, active mode, or saturation mode), but can be converted to a linear
amplifier over a small range

Simple amplifier and its voltage transfer characteristic (vBE → vCE :

This transistor has output vCE = VCC − iC RC - the active mode shows strong
gain (steep slope) with output:
vBE
vCE = VC C − RC IS e VT
While this range, described broadly, is nonlinear, it becomes more linear on a
small scale - we can make use of this region as a linear amplifier by confining
our input to this range

Biasing the BJT: A point Q along this curve can be selected in the middle of
the range, and a constant voltage source VBE can be applied to bias the base
up to this point:

56
At this point, the BJT exhibits output:
VBE
IC = IS e VT
Then we apply to the base a second voltage source, vbe , which carries a small-
signal variation - the total instantaneous value applied to the base is:
vBE (t) = VBE + vbe (t)
This variance produces linear output vCE as long as vbe is kept small; linearity
decreases with higher magnitude of vbe

The voltage gain AV of the amplifier is:

dvCE
AV = dv BE
|vBE ≈VBE
The voltage gain can also be expressed as:
AV = − VICT RC
This indicates that the voltage gain is proportional to the voltage drop of RC ,
so we can increase the gain by increasing RC - however, if VCC is constant,
increasing RC correspondingly decreases VCE and pushes the quiescent point
toward the cutoff region, thus reducing the maximum swing (specifically, head
room) of the small signal

Determining the VTC by graphical analysis:

57
We can determine the VTC by graphing vCE vs.iC , for various values of vBE , and
superimposing a line representing VRC - this line (the “load line”) begins at the
horizontal axis at vCE = VCC , and has a negative slow − R1C - the intersection
of the load line with each value represents the voltage of VCE for each value of
vBE

6.5: Small-Signal Operation and Models

When evaluating circuit models for small-signal amplification, first set the small
signal vbe to zero, and evaluate the circuit to determine its direct-current bias
VBE - applying a small-signal voltage over the direct-current bias results in the
following models:
vBE = VBE + vbe

Collector current: The collector current in the small-signal model is defined as:
VBE vbe
iC = IS e VT e VT
If vbe << VT , then the following approximations can be used:
iC ≈ IC (1 + vVbe
T
)
iC = IC + VICT vbe
This latter term is the signal component of the combined signal:
ic = VICT vbe
This can be rewritten using transconductance:
gm = VICT
ic = gm vbe
Transconductance defines a linear, positive relationship between vbe and iC :

Base current: As usual, the base current is a factor of the collector current, but

58
we can now separate the base current into the direct-current component and
the small-signal component:
iB = iβC = IβC + IβV
C vbe
T
= IβC (1 + vVbe
T
= IβC + vbeβgm
The small-signal component of the base current is:
ib = gβm vbe
The small-signal input resistance is defined as the resistance between the base
and the emitter, looking into the base:
rπ = vibe
b
= gβm = VIBT

Emitter current: The total emitter current can also be broken into components:
iE = iαC = IαC + iαc
The small-signal emitter resistance is defined as the resistance between the base
and the emitter, looking into the emitter:
re = vibe
e
= VIET = gαm ≈ g1m
The base resistance rπ and emitter resistance re are related as follows:
vbe = ib rπ = ie re
rπ = iieb re

Voltage Gain: In the small-circuit model, the amplifier is operating as a transcon-

ductance amplifier, where vbe causes a proportional current ic = gm vbe to flow
- the amplifier can be converted to a voltage amplifier by positioning a resistor
at the conductor:
vCE = VCC − iC RC = VCE − ic RC
The voltage gain of the amplifier is measured as:
AV = vvce
be
= −gm RC = − ICVRT
C

Hybrid π models: The small-signal BJT amplifier can be equivalently repre-

sented by a hybrid π model of the circuit, with separate branches for ic and
ib , and the collector current represented as either ic = gm vbe or ic = βib - this
model explicitly includes the base resistance, rπ

59
T model: The small-signal BJT amplifier can also be equivalently represented
by a T model, with the collector and base feeding into the emitter - this model
explicitly includes the emitter resistance, re

60
Application of small-signal equivalent circuits: The process for evaluating a
circuit using a small-signal model is as follows:

• Determine the DC operating point and the DC collector current IC

IC
• Calculate the parameters of the small-signal model: gm = VT ; rπ =
β VT α
gm ; re = IE = gm

• Substitute a small-signal equivalent circuit

• Analyze the circuit to determine the required quantities

Early effect in small-signal models: The models above disregard the Early effect,
but this can be modeled by supplementing each model with a resistor ro , with
the following value:
r0 = VICA

The Early effect reduces both vo and AV :

vo = −gm vbe (RC ||ro )

6.6: Basic BJT Amplifier Configurations

Three basic BJT amplifier configurations are possible - the small-signal version
of each amplifier can be substituted with this model:

61
Each amplifier has several properties:

vi
• Input resistance: Rin = ii
vx
• Output resistance, when vsig = 0: : Ro = ix
vo
• Voltage gain of the amplifier: Av = vi
vo
• Voltage gain of the amplifier under open-circuit conditions: Avo = vi |RL =∞
vo
• Overall voltage gain: Gv = vsig

Common-emitter (CE) amplifier:

The equivalent circuit for the common-amplifier BJT is:

• Input resistance: Rin = rπ

• Output voltage: vo = −gm vπ )(RC ||ro )

62
 • Open-circuit voltage gain: Avo = −gm (RC ||ro )
• Output resistance: Ro = RC ||ro
rπ
• Voltage gain: Av = −gm (RC ||RL ||ro ) Overall voltage gain: Gv = − rπ +R sig
gm (RC ||RL ||ro )
For the common-emitter amplifier, input resistance tends to be low (increasing
the input resistance decreases the gain), and output resistance and open-circuit
voltage gain are high

The properties of the amplifier change if a resistor is positioned at the emitter

- this changes the circuit in the following ways:

• The input resistance is then reflected as:

Rin = (β + 1)(re + Re )
The input resistance thus increases by a factor of Rree - this property is
termed the “resistance-reflection rule”: i.e., the input resistance reflects
the resistance of the emitter
• The voltage gain is reduced by a factor of gm Re - the gain can be main-
tained by increasing the input signal proportionally by a factor of gm Re

The effect of the emitter resistor is to reduce the dependence of Gv on β, and

to improve the high-frequency response of the amplifier

Common-base (CB) amplifier:

For common-base amplifiers, the Early effect is typically small and is disregarded
to simplify the analysis

• Input resistance: Rin = re

63
 • Output voltage: v0 = −αie Rc

• Open-circuit voltage gain: Avo = gm RC

• Output resistance: Ro = RC

• Voltage gain: Av = gm (RC ||RL ) - note that the low input resistance
reduces the magnitude of the input signal, and the achievable gain
C ||RL
• Overall voltage gain: Gv = α RRsigh +re

The gain of this amplifier is very small, but it maintains a good frequency
response at higher frequencies, so it is often used in combination with other
amplifier types

Common-collector (CE) amplifier:

The common-collector amplifier functions as an emitter follower, and is useful

when a voltage signal is presented with a high input resistance, such that at-
taching a load directly to the input causes a very small signal across the load
- the CE amplifier uses the input signal at the base to drive a current through
the emitter with a much lower output resistance

• Input resistance: Rin = β + 1)(re + RL ) (another example of resistance

reflection)
• Open-circuit voltage gain: Avo = 1
• Output resistance: Ro = re

64
 RL
• Voltage gain: Av = RL +re

(β+1)RL
• Overall voltage gain: Gv = (β+1)(RL +re )+Rsig

6.7: Biasing in BJT Amplifier Circuits

A BJT amplifier is biased to ensure that the gain of the amplifier remains
constant across all frequencies of interest - two biasing solutions that do not
work well: applying a fixed VBE (very small deviations in VBE lead to large
changes in the output), and providing a constant base current (variations in β
in different circuits lead to significant differences in gain)

Classical discrete-circuit bias: If only one voltage source is available, a four-

resistor network is used as a voltage divider to provide a fixed voltage the the
base

This circuit can be evaluated by substituting the left half with its Thévenin
equivalent, and then applying KVL from the base voltage to the emitter ground
- this circuit can be made more resistant to variations in temperature and β by
RB
making VBB >> VBE and RE >> β+1 - this arrangement provides negative
feedback: if RE increases, the rise in VE causes a decrease in VBE , which reduces
the flow of current through the transistor; conversely, if RE falls, the lower VE
and higher VBE cause more current to flow across the resistor

Two-power-supply version: If two power supplies VCC , −VEE are available, the
base can be grounded (resistor RB is only needed if the signal is capacitively
coupled to the base)

65
Collector-to-base feedback resistor: A resistor connecting the collector and base
can provide negative feedback - this circuit can be analyzed by applying KVL
over VCC , RC , RB , VBE , andtheemitterground :
− VCC + IE RC + IB RB + VBE = 0

Constant-current source: A constant current source can be applied from the

emitter

Current mirror: Two identical transistors can be connected at the base and
emitter, and a positive voltage is applied to RC of one transistor - this creates
a reference current IREF through R that must be matched by the current I in
the other transistor

Since the transistors are identical, the base currents and emitter currents are
identical; the reference current IREF is determined by applying KVL from VCC

66
through the collector-base connection, over VBE , and to −VEE :
I = IREF = VCC −VBER
+VEE

6.8: Discrete-Circuit BJT Amplifiers

The constant-current biasing model can be combined with the amplifier types
discussed in 6.6:

When combined with any model, capacitors are used to connect the AC com-
ponents for the amplification (the capacitors connected to the input and output
terminals are called “coupling” capacitors; the capacitor coupled to the ground
is called a “bypass” capacitor)

Biased common-emitter circuit:

67
Biased common-emitter circuit with unbypassed resistance:

Biased common-base circuit:

68
Biased common-collector (voltage follower) circuit:

Frequency response: Common-emitter amplifiers typically demonstrate constant

gain over a significant frequency range (the bandwidth of the amplifier) - at
lower frequencies, the gain and frequency response are diminished because the
impedances of the coupling and bypass capacitors begin attenuating the low-
frequency signal; at higher frequencies, the capacitance of the pn junction be-
comes significant

6.9: Transistor Breakdown and Temperature Effects

The maximum voltage applicable to a BJT is limited by the breakdown voltage

of the reverse-biased junction - the breakdown voltage is typically around 50 V -
breakdown of the collector-base junction is typically not destructive, but break-
down of the emitter-base junction causes a runaway current that permanently
reduces β; however, the EBJ can still be used as a zener diode, which does not
depend on β

69
One complexity that has been disregarded is that β is dependent on the bias
current, but the bias current is typically chosen to make β as large as possible
- β is also temperature-dependent, which affects the transistor when operating
at high power levels

70