OPAMP FEEDBACK AMPLIFIER

Reference: OPAMP and Linear Integrated Circuits by Ramakant A. Gayakwad, PHI

5.1 Voltage series feedback amplifier (non-inverting amplifier)

 Schematic diagram of voltage series feedback amplifier is shown below,

 The block diagram of the circuit is shown below,

 At the input loop, vid  vin  vf .

 The closed loop gain is AF  vo vin .
 Again, vo  A  v1  v2  .
R1
 Now, v1  vin and v2  vf  vo (assuming Ri R1 ).
R1  RF
 R1v o 
 Therefore, vo  A  v in  
 R1  R F 
A  R1  R F  v in
Or, vo  .
R1  R F  AR1
vo A  R1  R F 
 Thus, A F   .
v in R1  R F  AR1
RF
 Since A is very large, we can assume AR1 R1  RF and therefore AF  1  .
R1
 vf R1
 The gain of the feedback circuit is B   .
vo R1  RF
 Above two equations imply AF = 1/B in ideal case.
A  R1  R F  A A
 Now, A F    .
R1  R F  AR1  R1  1  AB
1 A 
 R1  R F 
 For an OPAMP vid  vo A .
 Since A is very large vid  vo A  0 V Or, v1  v2 .
 Above equation implies that the voltage at non-inverting input terminal of an
OPAMP is approximately equal to that at the inverting terminal provided A is very
large.
 Therefore if the inverting terminal is grounded, the voltage at non-inverting input
terminal is at ground potential and vice-versa. Alternatively it can be said that
the non-inverting input terminal is “virtually” grounded if the inverting terminal
is grounded.
 The voltage-series feedback amplifier with OPAMP equivalent circuit is shown
below.

 The input resistance of the amplifier with feedback can be defined as,
v vin
RiF  in  .
Iin Vid Ri
1  AB
 Now, vid  vo A and v in  vo .
A
1  AB vo AR i  1  AB R .
 Therefore, R iF    i
A vo
 Therefore input impedance of the non-inverting amplifier is (1+AB) times that of
an OPAMP without feedback.
 The output resistance of a non-inverting amplifier can be calculated using its
Thevenin theorem of dependent source, as shown below (reduce independent
source vin to zero and apply an external voltage vo).

 The output resistance can be defined as RoF  vo io .

 At the output node, io = ia + ib.
 Since  RF  R1  R i R o we can approximate ia ib and io  ia .
 At the output loop, vo  Roio  Avid  0 .
Or, io   vo  Avid  R o .
R1
 Now, vid  v1  v2  0  vf  vf   vo  Bvo .
R1  RF
vo  ABvo vo 1  AB 
 Therefore, io   .
Ro Ro
vo Ro
 The output resistance is RoF   .
io 1  AB
 Above equation shows that the output resistance of the voltage series feedback
amplifier is 1/(1+AB) times the output resistance Ro. Alternatively, output
resistance of OPAMP with voltage series feedback is much smaller than the
output resistance without feedback.
 The gain-bandwidth product of an OPAMP is constant and is equal to its unity
gain-bandwidth (UGB) product.
 Therefore if fo be the break point of an open-loop OPAMP and fF be the bandwidth
of an OPAMP with feedback then UGB = Afo = AFfF, or, fF = Afo/AF.
 Therefore, fF  Afo 1  AB  A  fo 1  AB  .
 Therefore, for an OPAMP with negative feedback the bandwidth is (1+AB) times
that of without feedback.
  If we open the resistance R1 and short the resistance RF, as shown below, then
the gain of the non-inverting amplifier becomes lowest and equal to one.
 Such circuit is called a voltage follower because the output voltage is equal and
in phase with the input. In other words the output follows the input.

 It is similar to the discrete emitter follower.

 The voltage follower is preferred over emitter follower as it has much higher input
resistance and the output amplitude is exactly equal to the input.
 Since the gain of the non-inverting amplifier changes from A to A/(1+AB), the
total output offset voltage with feedback is also 1/(1+AB) times the voltage
without feedback.
 Therefore, Total output offset voltage with feedback = Total output offset voltage
without feedback/(1+AB) Or, VooT   Vsat 1  AB  , where Vsat is the saturation
voltage or maximum voltages the output of an OPAMP can reach.

Numerical:

1. The 741C OPAMP having A  2 105 , Ri = 2 MΩ, Ro = 75 Ω, fo  5 Hz , Supply

voltages = 15 V , and output voltage swing = 13 V is connected with R1 = 1
kΩ and RF = 10 kΩ. Calculate AF, RiF, RoF, fF and VooT. Repeat the problem for
voltage follower.

R1 1 1
B  
R1  RF 1  10 11
2  105
1  AB  1   18182.8
11
A 2  105
AF    10.99
1  AB 18182.8
R iF  R i 1  AB   2  106  18182.8  36.36  109 Ω  36.36 GΩ
Ro 75
R oF    4.12  103 Ω  4.12 mΩ
1  AB 18182.8
 fF  fo 1  AB   5  18182.8  90.9  103  90.9 kHz
 vsat 13
vooT    0.715  103 V  0.715 mV
1  AB 18182.8
For voltage follower R1 = ∞ and RF = 0 Ω. Therefore B  1 and 1  AB  A .
Therefore, AF  1 .
R iF  R i 1  AB   AR i  2  106  2  105  4  1011 Ω  400 GΩ
Ro R 75
R oF   o   0.375  103 Ω  0.375 mΩ
1  AB A 2  105
fF  fo 1  AB   fo A  5  2  105  106  1 MHz
 vsat  vsat 13
vooT    5
 65  106 V  65 μV
1  AB A 2  10

5.2 Voltage shunt feedback amplifier (Inverting amplifier)

 OPAMP voltage shunt feed-back amplifier is shown below.

 The input voltage drives the inverting terminal. Amplified as well as inverted
output signal is also applied to the inverting input via feedback resistor.
 At the node v2, we have iin = iF + iB2.
 Since Ri is very large, the bias current is negligibly small and we can write
v  v2 v2  vo
iin  iF Or, in  .
R1 RF
 Again, v1  v2  vo A .
 Since v1 = 0, we get v2   vo A .
vin   vo A    vo A   vo
vo ARF
 Therefore,  Or, AF 

R1 RF vin R1  RF  AR1
 Since the internal gain of the OPAMP (A) is very high we can assume
AR1 R1  RF and AF   RF R1 .
 The negative sign indicates that the input and output signals are 180o out of
phase.
 The feedback gain expression can be written as
AR F  R1  R F  AK
AF    .
1  A R1  R1  R F  1  AB
Where “K” is voltage attenuation factor and is given by K  R F  R1  R F 
“B” is gain of feedback circuit and is given by B  R1  R1  R F  .
 The block diagram of inverting amplifier is

K R  R1  R F  R
 If AB 1 then 1  AB  AB and A F    F  F.
B R1  R1  R F  R1
 Above expression can also be found using virtual ground concept.
 Assuming virtual ground iin  iF .
vin  v2 v2  vo
 Therefore,  .
R1 RF
vin v vo R
 Since v1 = v2 = 0,  o or, AF   F .
R1 RF vin R1
v 
 Above equation can be written as, vo    in  R F  iinR F .
 R1 
 This means that if we replace the vin and R1 combination by a current source iin,
as shown below, the output voltage vo becomes proportional to the input voltage.

 In other words the figure represents a current to voltage converter that converts
the input current into a proportional output voltage.
 Further if R1 = RF the output signal is equal in amplitude but opposite In phase
to that of input signal.
 This circuit represents an inverter.
 For inverter B = ½ and hence 1  AB  A 2 .
 The input resistance of an inverting amplifier can be calculated by splitting RF
into two miller components, as shown below.

 R  
 For the circuit, R iF  R1   F  R i  .
 1  A  
 R 
 Since Ri and A is very large  F  Ri  0 Ω and we get, RiF  R1 .
1  A 
 Thevenin equivalent circuit for RoF of the inverting amplifier is shown below. The
circuit is exactly the same as non-inverting amplifier. Therefore the output
resistance of inverting amplifier is same to that of the non-inverting amplifier.
Specifically, R oF  vo io  R o 1  AB  .
 Afo 1  AB  fo 1  AB 
 Since UGB = Afo = AFfF, or, fF = Afo/AF, we can write fF  . 
AK K
 Total output offset voltage with feedback = Total output offset voltage without
feedback/(1+AB) Or, VooT   Vsat 1  AB  , where Vsat is the saturation voltage or
maximum voltages the output of an OPAMP can reach.

Numerical

2. The 741C OPAMP having A  2 105 , Ri = 2 MΩ, Ro = 75 Ω, fo  5 Hz , Supply

voltages = 15 V , and output voltage swing = 13 V is connected with R1 = 470
Ω and RF = 4.7 kΩ. Calculate AF, RiF, RoF, fF and VooT.

R1 470 1
B  
R1  RF 470  4700 11
RF 4700 1
K  
R1  RF 470  4700 1.1
2  105
1  AB  1   18182.8
11
AK 2  105
AF     10
1  AB 18182.8  1.1
  
 R   
R iF  R1   F  R i   470  
4700  2 10   470 Ω
6

 1  A   
 1  2  10
5
 
 
Ro 75
R oF    4.12  103 Ω  4.12 mΩ
1  AB 18182.8
f 1  AB 
fF  o  5  18182.8  1.1  100  10 3  100 kHz
K
 vsat 13
vooT    0.715  103 V  0.715 mV
1  AB 18182.8

5.3 Summing amplifier (Adder)

5.3.1 Inverting summing amplifier
 A summing amplifier or adder circuit using OPAMP is shown below.
 Since the non-inverting terminal is at ground potential, node A of the circuit is
also virtually grounded.
 Since RiF is very high, iin  i1  i2  iN  iF .
v1  0 v2  0 vN  0 0  v0
 Therefore,     .
R1 R2 RN RF
 v1 v2 vN v
Or,     0
R1 R2 RN RF
v v v 
Or, v0  R F  1  2   N 
 R1 R 2 RN 
 Such amplifier is called scaling or weighted amplifier as each input voltage is
amplified by a different factor.
 If R1  R2   RN  R then v0   R F  v1  v2   vN  R .
 If RF R  1 N then v0    v1  v2   vN  N . Therefore the output is the average
of the input voltages.
 Further if RF = R then v0    v1  v2   vN  . Thus output is the algebraic sum
of the input voltages.

5.3.2 Non-inverting summing amplifier

 A 3-input non-inverting summing amplifier is show below:

 Assumption: Input impedance of the amplifier is very high. Therefore we can

assume potential at nodes V1 and V2 are equal.
 Using superposition principle at node V1 we can write
R2 R2 R2
V1  Va  Vb  Vc
RR 2 RR 2 RR 2
Or, V1   Va  Vb  Vc  3
 0  V2 V2  Vo
 Now, 
R1 RF
Vo V V  R  RF   R  RF   RF 
Or,  2  2  V2  1  Or, Vo  V2  1   V2 1  
R F R F R1  R1R F   R1   R1 
 R  V  Vb  Vc
 Since V2  V1 we can write, Vo  1  F  a .
 R1  3
 Above equation implies that output voltage is average of the input voltage times
R
the gain of the circuit 1  F . Such amplifier is known as averaging amplifier.
R1
 To get the actual average RF should be zero and R1 should be opened.
R
 To get summed output 1  F should be equal to 3 or RF should be equal to 2R1.
R1

Numerical
3. For an OPAMP inverting summing amplifier V1 = + 1 V, V2 = +2 V and V3 = + 3V.
If R1 = R2 = R3 = 3 kΩ and RF = 1 kΩ then calculate the output voltage. Assume
supply voltage is 15 V and OPAMP is initially nulled.

v v vN  1 2 3
v0  R F  1  2     1      2 V
 R1 R 2 RN  3 3 3

4. For an OPAMP non-inverting summing amplifier V1 = + 2 V, V2 = -3 V and V3 =

+ 4V. If R = R1 =1 kΩ and RF = 2 kΩ then calculate the output voltage. Assume
supply voltage is 15 V and OPAMP is initially nulled.

 R  V  Vb  Vc  2 2 3  4
Vo  1  F  a  1   3V
 R1  3  1 3

5.4 Difference amplifier (Subtractor)

 An OPAMP differential amplifier is shown below.
  Assumption: Input impedance of the amplifier is very high. Therefore we can
assume potential at nodes V1 and V2 are equal.
v  v x v x  vo
 At node vx we can write, 1 
R1 R2
v2  v x v x  0
 Since vx = vy at node vy we can write,  .
R1 R2
 Subtracting the former equation from the later, we get
v2  v x  v1  v x v x  v x  vo

R1 R2
Or, vo  R 2  v2  v1  R1 .
 Above equation implies that output voltage is difference of the input voltage times
the gain of the circuit R2 R1 . Such amplifier is known as difference amplifier.
 To get actual difference output (or subtraction) R2 R1 should be equal to 1 or R2
should be equal to R1.

5.5 Summing amplifier using differential configuration:

 Let us consider the following circuit.

 Assumption: Input impedance of the amplifier is very high. Therefore we can

assume potential at nodes V1 and V2 are equal.
 The output voltage of the above circuit can be derived using superposition
principle.
 If only Va is present while rest are absent (or grounded) then the circuit is an
inverting amplifier in which the inverting input is virtually grounded. Therefore,
Voa   RVa R  Va .
 Similarly only Vb is present while rest are absent (or grounded) then, Vob  Vb .
  If only Vc is present while rest are absent (or grounded) then the circuit is a non-
inverting amplifier in which the voltage at non-inverting input is
R2 V
V1  Vc  c .
RR 2 3
 R  Vc
 The output voltage due to Vc alone is Voc  1   V1  3   Vc .
 R 2 3
 Similarly only Vd is present while rest are absent (or grounded) then, Vod  Vd .
 Thus the total output voltage, when all inputs are present, is
Vo  Va  Vb  Vc  Vd .
 The gain of the amplifier is 1, but any scale factor can be used for the inputs by
selecting proper external resistors.

5.6 Instrumentation amplifier:

 Schematic diagram of an instrumentation amplifier that uses a resistive
transducer bridge is shown below. The bridge can also be excited with ac voltage.

 The resistance of the resistive transducer (RT) changes when the physical quantity
(such as temperature) changes.
RB Vdc R V R R
 For balanced bridge Va = Vb, which implies,  A dc Or, C  T .
RB  RC R A  R T RB R A
  The bridge is balanced initially at the reference condition. However, as the
physical quantity changes, the resistance of the transducer also changes  R  ,
which causes the bridge to unbalance  Va  Vb  .
R A Vdc RB Vdc
 In unbalance case Va  and Vb  .
R A   R T  R  RB  RC
 The voltage difference at the output of the bridge is
R A Vdc R V
Vab  Va  Vb   B dc .
R A   R T  R  R B  R C
RVdc
 If RA = RB = RC = RT = R, then Vab   .
2  2R  R 
 The output voltage is applied to the differential instrumentation amplifier. In the
instrumentation amplifier the voltage followers are used to eliminate the loading
of the bridge circuit.
 The gain of the difference amplifier is –RF/R1. Therefore output voltage is
R RVdc
Vo  F .
R1 2  2R  R 
RF RVdc
 If R is small then  2R  R   2R and we can write Vo  .
R1 4R
 Above equation indicates that output voltage is proportional to the change in
resistance of the transducer.
Numerical:

5. For an instrumentation amplifier R1 = 1 kΩ, RF = 4.7 kΩ, RA = RB = RC = 100 kΩ

and Vdc = +5 V. RT = 100 kΩ at 25oC. Assuming temperature coefficient of the
transducer is – 1 kΩ/oC Determine the output voltage at 0oC and 100oC. OPAMP
is biased by 15 V .

At 0oC, R  1 0  25   25 kΩ
RF RVdc 4.7 25  5
Therefore, Vo    1.47 V
R1 4R 1 4 100
At 100oC, R  1100  25   75 kΩ
R F RVdc 4.7  75   5
Therefore, Vo    4.41 V
R1 4R 1 4  100

5.7 Differential input and differential output amplifier

 Schematic diagram of differential input and differential output amplifier is shown
below.
 Using superposition principle the output Vox due to inputs Vx and Vy is
 R  R
Vox  1  F  Vx  F Vy .
 R1  R1
  R  R
 Similarly output ay Vy is Voy  1  F  Vy  F Vx .
 R1  R1
 The differential output is
 R  R  R  R
Vo  Vox  Voy  1  F  Vx  F Vy  1  F  Vy  F Vx
 R1  R1  R1  R1
 2R F   2R F 
Or, Vo  1    Vx  Vy   1   Vin
 R1   R1 
 The differential input and differential output amplifier is very useful in noisy
environments, especially if the input signal is relatively low, because it rejects the
common-mode noise voltages.

Numerical

6. For a differential input and differential output amplifier input voltage is 100 mV.
The required output is 3.7 V. Determine RF if R1 is 100 Ω. Assume the OPAMP is
initially nulled.

 2RF  3
3.7  1  100 10
 100 
Which gives, RF = 1.8 kΩ.

5.8 Voltage to current converter

 Schematic diagram of voltage to current converter is shown below.
 Vin  V1 V0  V1
 At node V1 we can write I1 + I2 = IL Or,   IL
R R
Or, Vin  V0  2V1  RIL Or, V1   Vin  V0  RIL  2
 Since the OPAMP is connected in non-inverting mode the output voltage is
 R
V0  1   V1  2V1  Vin  V0  RIL Or, Vin  RIL .
 R
 Therefore the load current is proportional to the input voltage.

Numerical
7. For a voltage to current converter Vin = 5 V, R = 10 kΩ and V1 = 1 V. Find the
load current and output voltage. Assume the OPAMP is initially nulled.

Vin 5
IL    0.5  103 A  0.5 mA
R 10  103
V0  2V1  2 V

5.9 The integrator

 Schematic diagram of the integrator circuit is shown below.

 Since the non-inverting terminal is at ground potential we can assume the node
v2 is at ground potential.
v 0 d
 From the circuit we can write in  CF  0  vo 
R1 dt
 vin dv
Or,  CF o .
R1 dt
t
1
R1CF 0
Or, v o   v indt  C

where “C” is the integration constant and is proportional to the value of output
voltage vo at time t = 0.

 Above equation implies the output voltage is directly proportional to the negative
integral of the input voltage and inversely proportional to the time constant CFR1.
 Therefore if the input is a sine wave, the output will be a cosine wave; or if the
input is a square wave, the output will be a triangular wave.
 When vin = 0 the integrator works as an open-loop amplifier, because the
capacitor acts as an open circuit to the input offset voltage Vio.
 Therefore a practical integrator uses a resistor RF across CF, as shown below.

 The RF limits the low frequency gain and hence minimizes the variations in the
output voltage.
5.10 The differentiator
 Schematic diagram of a differentiator circuit is shown below.

 Since the non-inverting terminal is at ground potential we can assume the node
v2 is at ground potential.
d 0  vo dv
 From the circuit we can write C1  vin  0   Or, vo  R F C1 in .
dt RF dt
 Above equation implies the output voltage is CFR1 times the negative
instantaneous rate of change of vin with time.
 Therefore a cosine input will produce a sine wave output, or a triangular input
will produce a square wave output
Numerical:
8. Calculate the output voltage of the following OPAMP circuit.

The problem can be solved using superposition principle.

1
When only the -2 V supply is present, the output is V2V     2  2 V .
1
  1
When only the 1+ V supply is present, the output is V1V  1    1  2 V .
 1

Therefore net output of the first OPAMP is V2V  V1V  2  2  4 V .

Since the inverting input of the second OPAMP is at +4 V the non-inverting input
is also at +4 V.

Further since the input impedance is very high we can assume net input current
at the non-inverting terminal is zero.

4  Vo 0  4
Therefore,  Or, Vo  8 V .
1 1

9. The OPAMP in the circuit shown below has a slew rate 0.8 V /µS. If the input
signal is vin  0.25sin  ωt  , calculate the maximum usable frequency.

The circuit is an inverting amplifier. Hence the output voltage is

470
vo  t     0.25sin  ωt   5.34sin  ωt  V .
22

dvo
Therefore, SR  0.8  106   5.34ωcos  ωt  max  5.34ω V/S
dt max

0.8  106
Or, fmax   23.85  103 Hz  23.85 kHz .
2π  5.34

10. Assuming the OPAMP of the following current-to-voltage converter is ideal,

calculate the transfer impedance of the circuit.
 Since the non-inverting terminal is at ground potential, the inverting terminal is
also virtually grounded.

VP  0 Vo  VP 0  VP
Therefore, at the node P, we have,   .
45 55.5 5

Vo V V V Vo 55.5 55.5 55.5

Or,  P  P  P Or,     13.33
55.5 45 55.5 5 VP 45 55.5 5

Further we can write 0  VP  VP  45Iin , where “Iin” is the input current.

Vo
So we get,  13.33  45  103  6  105 Ω  0.6 MΩ .
Iin

11. Design a programmable gain amplifier, show below, with output

Vo  2Va  5Vb  5Vc  3Vd . Show that the circuit is not physible if gain of Vc is
greater than or equal to 7. Redesign the above circuit for output
Vo  2Va  5Vb  7Vc  3Vd .

The problem can be solved using superposition principle.

V  V1 V1  0 V1  R c  R 
When only Va is present, at node V1 we can write, a   .
Ra Rc R RcR
R  R 1   R a R c  R a R  R cR 
Or, Va  V1R a  c    V1  .
 RcR Ra   RcR 
Rc R
Or, V1  Va
Ra Rc  Ra R  Rc R
V2  Vo 0  V2 V R  Rd 
Now at the node V2 we can write,   2 b
Rf Rb Rd R bR d
 1 Rb  Rd   R bR d  R f R b  R f R d 
Or, Vo  V2R f     V2  
 Rf R bR d   R bR d 
R bR d
Or, V2  Vo
R bR d  R f R b  R f R d
Rc R R bRd
Since V1 = V2, we get, Va  Vo
Ra Rc  Ra R  RcR R bR d  R f R b  R f R d
Vo R c R  R bR d  R f R b  R f R d 
Or,  2 (A)
Va R bR d  R a R c  R a R  R c R 
A similar analysis, when only Vc is present, shows that
Vo R a R  R bR d  R f R b  R f R d 
 5 (B)
Vc R bR d  R a R c  R a R  R c R 
Taking ratio of the above two equations we get,
 Va R a R  R bR d  R f R b  R f R d  R bR d  R a R c  R a R  R cR  R a 5
  
Vc R b R d  R a R c  R a R  R c R  R c R  R bR d  R f R b  R f R d  R c 2
Or, Ra  5Rc 2

When only Vb is present the case is a simple non inverting amplifier (Since V 1 is at
ground potential, V2 will be virtually ground. Further since V2 = 0 both the terminals
of Rd will be at zero potential and no current will flow through it).

Therefore we can write, Vo Vb  Rf Rb  5 ,

Or, Rb  Rf 5

A similar analysis, when only Vd is present, gives Rd  Rf 3 .

From (A), we can write,

R R R R 
RcR  f f  R f f  Rf f 
Vo R c R  R bR d  R f R b  R f R d   5 3 5 3 
  2
Va R bR d  R a R c  R a R  R c R  R f R f  5R c 5R c 
R  R  R R
5 3  2
c c 
2 

 1 1 1 1  3  5 
R c RR 2f     15R  
Or, 2  15 5 3    15   18R 2
Rf  5R c 5R   5R c  5R  2R  5R c  7R
Rc    R  
15  2 2   2 

Or, 18R  10Rc  14R

Or, Rc  2R 5
 5 5 2R
and R a  Rc  R
2 2 5

If gain of Vc is 7 then we get Ra  7Rc 2 and we get

R R R R 
RcR  f f  R f f  R f f 
Vo R c R  R bR d  R f R b  R f R d   5 3 5 3 
  2
Va R bR d  R a R c  R a R  R c R  R f R f  7R c 7R c 
R  R  R R
5 3  2
c c 
2 

 1 1 1 1  3  5 
R c RR 2f     15R  
Or, 2  15 5 3    15   18R 2
Rf  7R c 7R   7R c  7R  2R  7R c  9R
Rc    R  
15  2 2   2 

Or, RC = 0 and
Ra = 0

However if RC = 0 and Ra = 0 then from equation (A) and (B) we get both Vo Va and
Vo Vc is equal to zero, which is contradictory.

A similar analysis for gain of Vc greater than zero shows both Rc and Ra becomes
negative, which is impossible.
To get the above output let us consider the following circuit

Rf R R R
For the circuit, Vo  2Va  5Vb  7Vc  3Vd  Va  f Vb  f Vc  f Vd
Ra Rb Rc Rd
 Comparing the left and right hand side we can write
Ra = Rf/2, Rb = Rf/5, Rc = Rf/7 and Rd = Rf/3.

12. Determine the output voltage of the following circuits.

R2
Voltage at the node Y is, v y  v2 .
R1  R2

v1  v x d
At the node X we have,  C  v x  vo 
R3 dt
t
1
Or, v x  v o 
CR 3   v1  v x  dt
0

t
R2 1  R2 
Since vx = vy, we can write,
R1  R 2
v2  vo    v1 
CR 3 0 
v2  dt
R1  R 2 

t
R2 1  R2 
Or, vo 
R1  R 2
v2    v1 
CR 3 0 
v2  dt
R1  R 2 

13. Determine the output voltage of the following circuits.

R v
Voltage at the node Y is, v x  v2  2 .
RR 2
 v1  v x v x  vP
At the node X we have, 
R1 R1
Or, vP  2v x  v1 .
v x  vP vP  vo vP  0
At node P,  
R1 R1 R1
Or, vo  3vP  v x
Substituting the expression of vP we get, vo  5v x  3v1
5
Substituting the expression of vx we get, vo  v2  3v1
2

5.11 Logarithmic amplifier:

 A logarithmic amplifier uses a grounded base transistor in feedback path, as
shown.

 Since the base non-inverting terminal of the OPAMP is at ground potential, the
inverting terminal, and hence the collector of the transistor is at ground
potential.
 Since both the collector and base of the transistor is at ground potential the
transistor acts like a diode and the emitter current can be expressed as
 qVE 
IE  IS  e kT  1 .
 
 
 qVE  qVE
IC
 Further since IC  IE , we can write IC  IS  e kT  1 , Or, e kT  1
  IS
 
qVE
kT  IC 
 Since IC IS , we can write, e kT  IC IS Or, VE  ln   .
q  IS 
 At the inverting input node of the OPAMP we have, Ii   Vin  0  R1  Vin R1  IC .
kT  Vin 
 Therefore, VE  ln  .
q  R1IS 
 Further at the emitter terminal of the transistor, VE  Vo .
kT  Vin 
 Therefore, Vo   ln  .
q  R1IS 
 Above equation implies that the output voltage is proportional to the logarithmic
of the input voltage.
0.4343kT  V 
 By proper scaling, we can write, Vo   log10  in  .
q  R1IS 
 An alternative circuit for logarithmic amplifier is shown below:

 It may be noted that the emitter saturation current (IS) varies from transistor to
transistor and also with temperature. Thus a stable voltage reference cannot be
obtained.
 This can be eliminated with the following circuit
 The transistors are kept close together and on sane silicon wafer. Therefore,
IS1  IS2  IS .
kT  Vin 
 So, V1   ln   and
q  R1IS 
kT  Vref 
V2   ln  .
q  R1IS 
 Therefore,
kT  Vref  kT  Vin  kT  Vin 
Vo  V2  V1  
ln   ln   ln  .
q  R1IS  q  R1IS  q  Vref 
 The output voltage Vo still depends on temperature and is directly proportional
to T.
Vo,compR TC
 This is compensated by the OPAMP4 for which we can write, Vo  .
R 2  R TC
R 2  R TC  R 
 Therefore, Vo,comp  Vo  1  2  Vo .
R TC  R TC 
 Above equation implies that the last stage provides a gain where RTC is a
temperature sensitive resistance with positive temperature coefficient.
 Another form of temperature compensated logarithmic amplifier, using two
OPAMPS, is shown below:
5.12 Anti-logarithmic amplifier:
 An anti-logarithmic amplifier is shown below.

kT  Vo  kT  Vref 
 For the circuit VQ1,BE  ln   and VQ2,BE  ln  .
q  R1IS  q  R1IS 
kT  Vo 
 Since the base of Q1 is tied to ground, VA  VQ1,BE   ln  .
q  R1IS 
R TC
 The base voltage of Q2 is, VQ2,B  Vin .
R2  R TC
 The emitter voltage of Q2 is,
R TC kT  Vref 
VQ2,E  VQ2,B  VQ2,EB  VQ2,B  VQ2,BE  Vin  ln  .
R 2  R TC q  R1IS 
 Since VA  VQ2,E , we can write
kT  Vo   R TC  kT  Vref 
 ln    Vin   ln  
q  R1IS   R 2  R TC  q  R1IS 
 R TC kT 
  Vo   Vref  
 kT  Vo 
Or, Vin   ln    ln     ln  
R2  R TC q   R1IS   R1IS  
 q  Vref 
 q   R TC   Vo 
Or,     Vin  ln  
 kT   R 2  R TC   Vref 
 q   R TC   Vo   Vo 
Or, 0.4343    Vin  0.4343 ln    log10  
 kT   R 2  R TC   Vref   Vref 
 V   q   R TC 
Or, KVin  log10  o  where K  0.4343   
 Vref   kT   R 2  R TC 

Or, Vo Vref  10K Vin
Or, Vo  Vref 10KVin .

 Other basic forms of anti-logarithmic amplifiers are

(a) Using transistor

(b) Using diode