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MP1570A

SONET/SDH/PDH/ATM
Analyzer
Service Manual

Fourth Edition

• Read this manual before using the equipment.


• To ensure that the equipment is used safely, read the
"For Safety" in the MP1570A SONET/SDH/PDH/ATM
Analyzer Operation Manual Vol.1 and Vol.2 first.
• Keep this manual with the equipment.

ANRITSU CORPORATION

Document No.: M-W1756BE-4.0 i


Safety Symbols
To prevent the risk of personal injury or loss related to equipment malfunction, Anritsu Corporation uses the following
safety symbols to indicate safety-related information. Insure that you clearly understand the meanings of the symbols
BEFORE using the equipment. Some or all of the following five symbols may not be used on all Anritsu equipment.
In addition, there may be other labels attached to products which are not shown in the diagrams in this manual.

Symbols used in manual


This indicates a very dangerous procedure that could result in serious injury or
DANGER death if not performed properly.

WARNING This indicates a hazardous procedure that could result in serious injury or death if
not performed properly.

CAUTION This indicates a hazardous procedure or danger that could result in light-to-severe
injury, or loss related to equipment malfunction, if proper precautions are not taken.

Safety Symbols Used on Equipment and in Manual


The following safety symbols are used inside or on the equipment near operation locations to provide information
about safety items and operation precautions. Insure that you clearly understand the meanings of the symbols
and take the necessary precautions BEFORE using the equipment.

This indicates a prohibited operation. The prohibited operation is indicated


symbolically in or near the barred circle.

This indicates an obligatory safety precaution. The obligatory operation is indi-


cated symbolically in or near the circle.

This indicates warning or caution. The contents are indicated symbolically in or


near the triangle.

This indicates a note. The contents are described in the box.

These indicate that the marked part should be recycled.

MP1570A
SONET/SDH/PDH/ATM Analyzer
Service Manual

1 May 2000 (First Edition)


10 December 2003 (Fourth Edition)

Copyright © 2000-2003, ANRITSU CORPORATION.


All rights reserved. No part of this manual may be reproduced without the prior written permission of the
publisher.
The contents of this manual may be changed without prior notice.
Printed in Japan
ii
For Safety
WARNING
1. ALWAYS refer to the operation manual when working near locations at
which the alert mark shown on the left is attached. If the operation, etc.,
is performed without heeding the advice in the operation manual, there
is a risk of personal injury. In addition, the equipment performance may
be reduced.
Moreover, this alert mark is sometimes used with other marks and de-
scriptions indicating other dangers.

2. Measurement Categories
This instrument is designed for Measurement category I (CAT I). Don't
use this instrument at the locations of measurement categories from
CAT II to CAT IV.
In order to secure the safety of the user making measurements, IEC
61010 clarifies the range of use of instruments by classifying the loca-
tion of measurement into measurement categories from I to IV.
The category outline is as follows:
Measurement category I (CAT I):
Secondary circuits of a device connected to an outlet via a power trans-
former etc.
Measurement category II (CAT II):
Primary circuits of a device with a power cord (portable tools, home
appliance etc.) connected to an outlet.
Measurement category III (CAT III):
Primary circuits of a device (fixed equipment) to which power is directly
supplied from the power distribution panel, and circuits from the distri-
bution panel to outlets.
Measurement category IV (CAT IV):
All building service-line entrance circuits through the integrating watt-
meter and primary circuit breaker (power distribution panel).

iii
For Safety
WARNING
3. Laser radiation warning
• NEVER look directly into the cable connector on the equipment nor
into the end of a cable connected to the equipment. If laser radiation
enters the eye, there is a risk of injury.
• Laser Radiation Markings on a following page show the Laser Safety
label attached to the equipment near the cable connector.

4. When supplying power to this equipment, connect the accessory 3-pin


power cord to a grounded outlet. If a grounded outlet is not available,
before supplying power to the equipment, use a conversion adapter and
ground the green wire, or connect the frame ground on the rear panel of
the equipment to ground. If power is supplied without grounding the
equipment, there is a risk of receiving a severe or fatal electric shock.

5. This equipment cannot be repaired by the user. DO NOT attempt to


Repair open the cabinet or to disassemble internal parts. Only Anritsu-trained
service personnel or staff from your sales representative with a knowl-
edge of electrical fire and shock hazards should service this equipment.
WARNING
There are high-voltage parts in this equipment presenting a risk of se-
vere injury or fatal electric shock to untrained personnel. In addition,
there is a risk of damage to precision parts.

Falling Over 6. This equipment should be used in the correct position. If the cabinet is
turned on its side, etc., it will be unstable and may be damaged if it falls
over as a result of receiving a slight mechanical shock.
And also DO NOT use this equipment in the position where the power
switch operation is difficult.

iv
For Safety
WARNING
7. DO NOT short the battery terminals and never attempt to disassemble it
or dispose of it in a fire. If the battery is damaged by any of these
actions, the battery fluid may leak.
This fluid is poisonous.
Battery Fluid DO NOT touch it, ingest it, or get in your eyes. If it is accidentally in-
gested, spit it out immediately, rinse your mouth with water and seek
medical help. If it enters your eyes accidentally, do not rub your eyes,
irrigate them with clean running water and seek medical help. If the
liquid gets on your skin or clothes, wash it off carefully and thoroughly.

8. This instrument uses a Liquid Crystal Display (LCD); DO NOT subject


the instrument to excessive force or drop it. If the LCD is subjected to
strong mechanical shock, it may break and liquid may leak.
This liquid is very caustic and poisonous.
LCD DO NOT touch it, ingest it, or get in your eyes. If it is ingested acciden-
tally, spit it out immediately, rinse your mouth with water and seek medi-
cal help. If it enters your eyes accidentally, do not rub your eyes, irrigate
them with clean running water and seek medical help. If the liquid gets
on your skin or clothes, wash it off carefully and thoroughly.

v
For Safety
CAUTION
1. Before Replacing the fuses, ALWAYS remove the power cord from the
poweroutlet and replace the blown fuses. ALWAYS use new fuses of
the type and rating specified on the fuse marking on the rear panel of
Replacing Fuse
the cabinet.

CAUTION T___A indicates a time-lag fuse.


___A or F___ A indicate a normal fusing type fuse.

There is risk of receiving a fatal electric shock if the fuses are replaced
with the power cord connected.

2. Keep the power supply and cooling fan free of dust.


• Clean the power inlet regularly. If dust accumulates around the
power pins, there is a risk of fire.
Cleaning • Keep the cooling fan clean so that the ventilation holes are not ob-
structed. If the ventilation is obstructed, the cabinet may overheat
and catch fire.

3. The maximum input levels of the optical signal are 0 dBm for
MU150002A 10G input, −8 dBm for MU150002A Option 01 2.5G input,
and +3 dBm for MU150017A/B input. Excessive input level can dam-
age the internal devices and circuit.

Before performing a self loop-back test, always install 15 dB (when


MP0127A/MP0128A/MP0129A or MU150008A/MU150009A/
MU150010A installed), 10 dB (when MU150002A installed), or 5 dB
(when MU150017A/B installed) attenuator between the output connec-
tor and the input connector.

vi
For Safety
WARNING
Laser Safety The laser safety is assured by correct operation of the warning means of
the laser output. Before using the optical output, if it is not possible to
check the optical emission using the warning means of the laser output at
power-on or when the optical output switch is set to on, the laser output
may be faulty. Do not use the equipment and call our service department
or representative to request repair.

Optical units for the MP1570A SONET/SDH/PDH/ATM Analyzer have


Class 1 laser emitting parts as specified in IEC 60825-1, or Class I and IIIb
parts as specified in 21CFR 1040.10 (refer to Table 1). Classes are indi-
cated on the label at the top panel of this equipment and the front panel of
each unit (refer to Table 2 and Figs 1 to 5).

Do not look directly into the end of any cable connected to the optical out-
put connector of the unit. Laser light can seriously damage the eyes. Op-
erating this unit in a procedure other than that as described above might
result in injury or damage from laser emission. Please follow the handling
instructions carefully.

Table 1 Class of each unit


Standard name
Model number
IEC 60825-1 21CFR 1040.10
MP0111A Class 1 Class I
MP0112A Class 1 Class I
MP0113A Class 1 Class I
MP0122B Class 1 Class I
MP0127A Class 1 Class IIIb
MP0128A Class 1 Class IIIb
MP0129A Class 1 Class IIIb
MU150001A/B Class 1 Class IIIb
MU150008A Class 1 Class IIIb
MU150009A Class 1 Class IIIb
MU150010A Class 1 Class IIIb
MU150031A/C Class 1 Class IIIb
MU150061A/B Class 1 Class IIIb

vii
For Safety
Class 1 indicates the danger degree of the laser radiation specified below
according to IEC 60825-1.

Class 1: Lasers that are safe under reasonably foreseeable conditions


of operation, including the use of optical instruments for
intrabeam viewing.

And, Class I, IIa, II, IIIa and IIIb indicates the degree of danger of the laser
radiation outlined below as defined by 21CFR 1040.10.

Class I: Class I labels of laser radiation are not considered to be haz-


ardous.

Class IIa: Class IIa labels of laser radiation are not considered to be
hazardous if viewed for any period of time less than or equal
to 1×103 seconds but are considered to be a chronic viewing
hazard for any period of time greater than 1×103 seconds.
The wavelength range of laser radiating is in 400 to 710 nm.

Class II: Class II labels of laser radiation are considered to be a chronic


viewing hazard. The wavelength range of laser radiating is in
400 to 710 nm.

Class IIIa: Class IIIa labels of laser radiation are considered to be, de-
pending upon the irradiance, either an acute intrabeam view-
ing hazard or chronic viewing hazard, and an acute viewing
hazard if viewed directly with optical instruments. The wave-
length range of laser radiating is in 400 to 710 nm.

Class IIIb: Class IIIb labels of laser radiation are considered to be an


acute hazard to skin and eyes from direct radiation.

viii
For Safety
Table 2
No. Label Description

[1] Aperture label


(FDA 21CFR 1040.10)

[2] Explanatory label


(FDA 21CFR 1040.10)

[3] Explanatory label


(IEC 60825-1)

Warning label
[4]
(IEC 60825-1)

Certification label
[5]
(FDA 21CFR 1040.10)

Identification label
[6]
(FDA 21CFR 1040.10)

ix
Fig. 1 MP0111A, MP0112A, MP0113A Front Panel of Unit

CAUTION
When only a Unit is purchased, an adhesive label is supplied with the Unit.
Please, attach it to the place, shown above.

x
Fig. 2 MP0122B Front Panel of Unit and Top Panel of MP1570A
(Products shipping besides U.S.A.)

CAUTION
When only a Unit is purchased, an adhesive label is supplied with the Unit.
Please, attach it to the place, shown above.

xi
Fig. 3 MP0122B Front Panel of Unit and Top Panel of MP1570A
(Products shipping to U.S.A.)

CAUTION
When only a Unit is purchased, an adhesive label is supplied with the Unit.
Please, attach it to the place, shown above.

xii
Fig. 4 MP0127A, MP0128A, MP0129A, MU150008A, MU150009A,
MU150010A Front Panel of Unit and Top Panel of MP1570A
(Products shipping besides U.S.A.)

CAUTION
When only a Unit is purchased, an adhesive label is supplied with the Unit.
Please, attach it to the place, shown above.

xiii
Fig. 5 MP0127A, MP0128A, MP0129A, MU150008A, MU150009A,
MU150010A Front Panel of Unit and Top Panel of MP1570A
(Products shipping to U.S.A.)

CAUTION
When only a Unit is purchased, an adhesive label is supplied with the Unit.
Please, attach it to the place, shown above.

xiv
Fig. 6 MU150001A/B, MU150031A/C, MU150061A/B
Front Panel of Unit and Top Panel of MP1570A
(Products shipping besides U.S.A.)

CAUTION
When only a Unit is purchased, an adhesive label is supplied with the Unit.
Please, attach it to the place, shown above.

xv
Fig. 7 MU150001A/B, MU150031A/C, MU150061A/B
Front Panel of Unit and Top Panel of MP1570A
(Products shipping to U.S.A.)

CAUTION
When only a Unit is purchased, an adhesive label is supplied with the Unit.
Please, attach it to the place, shown above.

xvi
For Safety
Security Measure Functions
The MP0127A, MP0128A, MP0129A, MU150001A/B, MU150008A, MU150009A, MU150010A,
MU150031A/C, MU150061A/B are provided with the following security measure functions to
prevent the possibility of infliction bodily injury on operators.
• Laser cut-off
When the cable is disconnected from the optical output section, the protective cover closes and
the laser emission stops.
• Laser output key lock
The laser output is mainly controlled by the key switch of the laser On/Off. When the switch is
set to the OFF position, the key can be removed. In this state, the laser is locked off.
• Remote control using the remote interlock connectors
To ensure safe control of the laser output from a remote location, the laser output can be
controlled using the remote interlock connectors of the Laser Output Remote Interlock section.
When both the ends of these two connectors (white and black) are connected electrically, the
laser can be emitted. When both the ends are disconnected, it is not possible to emit the laser.
For the voltage of the open end, the potential is +5 V at the white connector for the black con-
nector. The laser output can be controlled by any equipment with a 0/+5 V interface.
• Laser emission indicators
These indicators on the optical output light while laser is being emitted.
• Laser output warning
When the laser is set to ON, the laser emission indicator lights as a warning or 3 to 4 seconds
before laser is actually emitted. The laser is not emitted during this period.

Handling
The following safety precautions should be observed when handling the MP0127A, MP0128A,
MP0129A, MU150001A/B, MU150008A, MU150009A, MU150010A, MU150031A/C, MU150061A/B.
• Before installing/removing this unit in/from the main frame, always make sure the main frame
power switch is set to OFF.
• Before connecting/disconnecting a cable to/from the optical output section of this unit, always be
sure to set the Laser On/Off key switch to OFF.

xvii
For Safety
CAUTION
Replacing Memory This equipment uses a Poly-carbomonofluoride lithium battery to back-up
Back-up Battery the memory. This battery must be replaced by a service engineer when it
has reached the end of its useful life; contact the Anritsu sales section or
your nearest representative.
Note: The battery used in this equipment has a maximum useful life of
7 years. It should be replaced before this period has elapsed.

Make sure that the output level from the MP0111A, MP0112A, MP0113A,
MP0122B, MP0127A, MP0128A, MP0129A, MU150001A, MU150001B,
MU150008A, MU150009A, MU150010A, MU150031A/C or MU150061A
does not exceed the maximum rated input level when connecting.

The laser output is mainly controlled by the key switch of the laser On/Off.
Before turning the equipment on, be sure to set the Laser On/Off key switch
to OFF.

Before making the connections, make sure that the input level does not
exceed the absolute maximum rating level of the equipment.
The input device may be damaged when the input level exceeds the maxi-
mum rating of MP0127A, MP0128A, MP0129A, MU150002A,
MU150008A, MU150009A and MU150017A/B in particular. Before per-
forming a self loop-back test, always insert the attached 15-dB optical at-
tenuator between the input and output connectors for the MP0127A,
MP0128A, MP0129A, MU150008A, MU150009A and MU150010A. For
the MU150002A or MU150017A/B, use the 10-dB or 5-dB attenuator, re-
spectively. The input device will be damaged if the direct output is con-
nected by using the optical cable only.

Floppy Disk Don't place in a dusty area.


Clean the magnetic head periodically for normal operation.
Use a cleaning kit sold at market for cleaning.
Anritsu does not recommend any specific cleaning kit. Contact with Anritsu
or our sales representative if you inquire about the cleaning kit.
If the floppy disk drive malfunctions even after the cleaning, it is considered
to be a fault. Ask for repair to Anritsu or our sales representative.

xviii
Equipment Certificate
Anritsu Corporation certifies that this equipment was tested before shipment using
calibrated measuring instruments with direct traceability to public testing organiza-
tions recognized by national research laboratories including the National Institute of
Advanced Industrial Science and Technology, and the Communications Research
Laboratory, and was found to meet the published specifications.

Anritsu Warranty
Anritsu Corporation will repair this equipment free-of-charge if a malfunction occurs
within 1 year after shipment due to a manufacturing fault, provided that this warranty is
rendered void under any or all of the following conditions.

• The fault is outside the scope of the warranty conditions described in the operation
manual.
• The fault is due to mishandling, misuse, or unauthorized modification or repair of
the equipment by the customer.
• The fault is due to severe usage clearly exceeding normal usage.
• The fault is due to improper or insufficient maintenance by the customer.
• The fault is due to natural disaster including fire, flooding, earthquake, etc.
• The fault is due to use of non-specified peripheral equipment, peripheral parts,
consumables, etc.
• The fault is due to use of a non-specified power supply or in a non-specified instal-
lation location.

In addition, this warranty is valid only for the original equipment purchaser. It is not
transferable if the equipment is resold.

Anritsu Corporation will not accept liability for equipment faults due to unforeseen and
unusual circumstances, nor for faults due to mishandling by the customer.

Anritsu Corporation Contact


If this equipment develops a fault, contact Anritsu Service and Sales offices at the
address at the end of paper-edition manual or the separate file of CD-edition manual.

xix
Notes On Export Management
This product and its manuals may require an Export License/Approval by
the Government of the product's country of origin for re-export from your
country.
Before re-exporting the product or manuals, please contact us to confirm
whether they are export-controlled items or not.
When you dispose of export-controlled items, the products/manuals are
needed to be broken/shredded so as not to be unlawfully used for
military purpose.

Disposing of Product
The MP1570A employs a Lithium Battery. Also, the MP0111A,
MP0112A, MP0113A, MP0122B, MP0127A, MP0128A, MP0129A,
MU150001A/B, MU150002A, MU150008A, MU150009A, MU150010A,
MU150017A/B, MU150031A/C, MU150061A/B use PD/LD modules
including arsenic. The MP0130A use IC including arsenic. At the end of
its life, the equipment should be recycled or disposed properly according
to the local disposal regulations.

xx
CE Conformity marking
Anritsu affixes the CE Conformity marking on the following product (s) in accordance
with the Council Directive 93/68/EEC to indicate that they conform with the EMC and
LVD directive of the European Union (EU).

CE Marking

1. Product Model
Model: MP1570A SONET/SDH/PDH/ATM ANALYZER
and
Plug-in Units: See Table 1.

2. Applied Directive and Standards


EMC: Council Directive 89/336/EEC
LVD: Council Directive 73/23/EEC

3. Applied Standards
• EMC: Emission: EN61326: 1997 / A2: 2001 (Class A)
Immunity: EN61326: 1997 / A2: 2001 (Annex A)

Performance Criteria*
IEC 61000-4-2 (ESD) B
IEC 61000-4-3 (EMF) A
IEC 61000-4-4 (Burst) B
IEC 61000-4-5 (Surge) B
IEC 61000-4-6 (CRF) A
IEC 61000-4-8 (RPFMF) A
IEC 61000-4-11 (V dip/short) B

*: Performance Criteria
A: During testing normal performance within the specification lim-
its
B: During testing, temporary degradation, or loss of function or per-
formance which is self-recovering

Harmonic current emissions:


EN61000-3-2: 2000 (Class A equipment)
• LVD: EN61010-1: 2001 (Pollution Degree 2)
xxi
C-tick Conformity marking
Anritsu affixes the C-tick marking on the following product (s) in accordance with the
regulation to indicate that they conform with the EMC framework of Australia/New
Zealand.

C-tick marking

N274
1. Product Model
Model: MP1570A SONET/SDH/PDH/ATM ANALYZER
and
Plug-in Units: See Table 1.

2. Applied Standards
EMC: Emission:
AS/NZS 2064.1 / 2 (ISM, Group 1, Class A equipment)

xxii
Table 1 List of the Product Name and Model Name
Model Name Product Name
Main Frame
MP1570A SONET/SDH/PDH/ATM ANALYZER
Plug in Units
MP0105A CMI UNIT
MP0108A NRZ UNIT
MP0111A Optical 156M/622M (1.31) UNIT
MP0112A Optical 156M/622M (1.55) UNIT
MP0113A Optical 156M/622M (1.31/1.55) UNIT
MP0121A 2/8/34/139/156M UNIT
MP0122A 1.5/45/52M UNIT
MP0122B 1.5/45/52/52M (1.31) UNIT
MP0123A ATM UNIT
MP0124A 2/8/34/139M 156/622M Jitter UNIT
MP0125A 1.5/45/52M 156/622M Jitter UNIT
MP0126A 2/8/34/139M 1.5/45/52M 156/622M Jitter UNIT
MP0127A 2.5G (1.31) UNIT
MP0128A 2.5G (1.55) UNIT
MP0129A 2.5G (1.31/1.55) UNIT
MP0130A 2.5G Jitter UNIT
MP0131A Add/Drop UNIT
MU150000A 2.5G/10G UNIT
MU150001A Optical 10G Tx (1.55) UNIT
MU150001B Optical 10G Tx (1.55) UNIT
MU150002A Optical 10G Rx (narrow) UNIT
MU150005A 2/8/34/139M 156/622M Jitter UNIT
MU150006A 1.5/45/52M 156/622M Jitter UNIT
MU150007A 2/8/34/139M 1.5/45/52M 156/622M Jitter UNIT
MU150008A 2.5G (1.31) UNIT
MU150009A 2.5G (1.55) UNIT
MU150010A 2.5G (1.31/1.55) UNIT
MU150011A 2.5G Jitter UNIT
MU150017A Optical 10G Rx (Wide) Unit
MU150017B Optical 2.5G/10G Rx (Wide) Unit
MU150031A Optical 10G (1.55) High Power Tx Unit
MU150031C Optical 2.5G (1.55)/10G (1.55) High Power Tx Unit
MU150061A Optical 10G (1.31) Tx Unit
MU150061B Optical 2.5G (1.31)/10G (1.31) Tx Unit
MU154882A GPIB/ETHERNET INTERFACE

xxiii
Power Line Fuse Protection
For safety, Anritsu products have either one or two fuses in the AC power lines as
requested by the customer when ordering.

Single fuse: A fuse is inserted in one of the AC power lines.

Double fuse: A fuse is inserted in each of the AC power lines.

Example 1: An example of the single fuse is shown below:

Fuse Holder

SE
FU

Example 2: An example of the double fuse is shown below:

Fuse Holders

SE SE
FU

FU

xxiv
About this manual
This is a service manual written for service personnel trained by Anritsu Service
Course and describes how to service the Anritsu MP1570A SONET/SDH/PDH/ATM
Analyzer, how to install the latest software version, and how to troubleshoot faults.

Section 1 Outline of Operation


This section describes the configuration and the block diagram of this system.

Section 2 Upgrading Software


This section describes how to upgrade the software of this system.

Section 3 Performance Test


This section describes the output signal waveform test, input signal margin test and
electrical performance test using a self-test function.

Section 4 Troubleshooting
This section describes how to locate faulty modules.

Section 5 Replacing Modules


This section describes how to replace modules.

Appendix A Self-test Error Codes


This appendix provides selftest error codes.

Appendix B Term Conversion Table


Berween SONET and SDH
This appendix provides term conversion table between SONET and SDH.

This explains repair by exchanging modules but does not describe parts-level repair of
modules.
For specifications, operating instructions and a details of panel controls of MP1570A,
refer to the separate operation manuals.

I
Table of Contents

For Safety ...................................................... iii

About This Manual........................................ I

Section 1 Outline of Operation ................... 1-1


1.1 Exchangable Module Lists .............................................. 1-2
1.2 Block Diagram ................................................................ 1-5
1.3 Module Functions ........................................................... 1-6
1.4 General Circuit Diagram ................................................. 1-11

Section 2 Upgrading Software .................... 2-1


2.1 Confirmation of the Software Revision
(Option/Revision Screen) and Method of All Initial
Value Settings ................................................................. 2-2
2.2 Upgrading the Software (Install Screen) ......................... 2-3

Section 3 Performance Test........................ 3-1


3.1 General ........................................................................... 3-3
3.2 Equipment Required ....................................................... 3-4
3.3 Interface Performance Test ............................................ 3-6
3.4 Jitter Performance Test (MP0124A/MP0125A/
MP0126A) ....................................................................... 3-45
3.5 Jitter Performance Test (MU150005A/MU150006A/
MU150007A/MU150011A) .............................................. 3-61
3.6 Internal Performance Test .............................................. 3-77
3.7 M1570A Self-test System Program ................................ 3-79

II
Section 4 Troubleshooting.......................... 4-1
4.1 General ........................................................................... 4-2
4.2 Troubleshooting Preliminaries ........................................ 4-2
4.3 Selftest ............................................................................ 4-3
4.4 Troubleshooting Using Selftest ....................................... 4-5
4.5 Checking Other Modules ................................................ 4-34

Section 5 Replacing Modules ..................... 5-1


5.1 Disassembly ................................................................... 5-2
5.2 MP1570A Disassembly ................................................... 5-2

Appendix A Self-test Error Code ................ A-1


A.1 About Self-test Error Code .............................................. A-2
A.2 Error Details .................................................................... A-3

Appendix B Term Conversion Table Between


SONET and SDH...................... B-1

III
IV.
Section 1 Outline of Operation
This section explains the functions of the MP1570A and the equipment composition.

1.1 Exchangable Module Lists ........................................ 1-2


1.1.1 Exchangable Module Lists of MP1570A ........ 1-2
1.1.2 Exchangable Module Lists of MU150000A ... 1-4
1.2 Block Diagram .......................................................... 1-5
1.2.1 Block Diagram of MP1570A .......................... 1-5
1.2.2 Block Diaglam of MU150000A ...................... 1-6
1.3 Module Functions ..................................................... 1-6
1.3.1 MP1570A ....................................................... 1-6
1.3.2 MP0121A ....................................................... 1-7
1.3.3 MP0122A ....................................................... 1-7
1.3.4 MP0122B ....................................................... 1-8
1.3.5 MP0123A ....................................................... 1-8
1.3.6 MP0124A/MP0125A/MP0126A ..................... 1-8
1.3.7 MP0127A/MP0128A/MP0129A ..................... 1-8
1.3.8 MP0130A ....................................................... 1-8
1.3.9 MP0131A ....................................................... 1-8
1.3.10 MU150000A .................................................. 1-8
1.3.11 MU150001A .................................................. 1-9
1.3.12 MU150001B .................................................. 1-9
1.3.13 MU150002A .................................................. 1-9
1.3.14 MU150005A/MU150006A/MU150007A ........ 1-9
1.3.15 MU150008A/ MU150009A/ MU150010A ...... 1-9
1.3.16 MP0111A/MP0112A/MP0113A ..................... 1-10
1.3.17 MP0105A ....................................................... 1-10
1.3.18 MP0108A ....................................................... 1-10
1.3.19 MU150031A/C ............................................... 1-10
1.3.20 MU150061A/B ............................................... 1-10
1.4 General Circuit Diagram ........................................... 1-11
1.4.1 MP1570A ....................................................... 1-11
1.4.2 MU150000A .................................................. 1-13

1-1
Section 1 Outline of Operation

1.1 Exchangable Module Lists


1.1.1 Exchangable Module Lists of MP1570A
The MP1570A is composed of the 16 exchangable modules listed in Table 1-1.
If they develop a fault, simply changing the modules can repair it.
Plug-in units that can be inserted into the MP1570A are listed in Table 1-2.

Table1-1 Exchangable Modules of MP1570A


Part Number Name Construction
Drawing Number
MM100168A MOTHER2 44Y106817
MM100169A L-F 44Y107417B
MM100170A R-F 44Y107417
MM100171A PRT 44Y103644C
MM100172A CPU 44Y106985
MM100173A SDH 44Y106819
MM100175A DC-DC CONVERTER 44Y107334B
MM100176A 44Z106763 Power supply unit (1fuse) 44Z106763
MM100177A 44Z106763B Power supply unit (2fuse) 44Z106763B
S4Z10398 3.5FDD-1/2S-2.0/1.6/1.0 S4Z10398
NL6448BC20-08 LCD NO.1256
65PWB31 INVERTER NO.1256
STP211B-192 PRINTER NO.1521
MM100174A GPIB/232C 44Y103658C
MM100179A ETHERNET 44Y106567
MM100180A VGA OUTPUT 44Y106554C

1-2
1.1 Exchangable Module Lists

Table 1-2 Plug-in Units of MP1570A


Part Number Name Construction
Drawing Number
MP0121A 2/8/34/139/156M UNIT 44Y104523
MP0122A 1.5/45/52M UNIT 44Y104524
MP0122B 1.5/45/52/52M (1.31) UNIT 44Y104524B
MP0123A ATM UNIT 44Y104545
MP0124A 2/8/34/139M 156/622M JITTER UNIT 44Y104525
MP0125A 1.5/45/52M 156/622M JITTER UNIT 44Y104525B
MP0126A 2/8/34/139M 1.5/45/52M 44Y104525C
156/622M JITTER UNIT
MP0127A 2.5G(1.31) UNIT 44Y104473C
MP0128A 2.5G(1.55) UNIT 44Y104473B
MP0129A 2.5G(1.31/1.55) UNIT 44Y104473
MP0130A 2.5G JITTER UNIT 44Y105521
MP0131A ADD/DROP UNIT 44Y105464

MU150001A OPTICAL 10G TX(1.55) UNIT 44Y107885C


MU150001B OPTICAL 10G TX (1.55) UNIT 44Y107885
MU150002A OPTICAL 10G RX (NARROW) UNIT 44Y107886
MU150005A 2/8/34/139M 156/622M JITTER UNIT 44Y107667A
MU150006A 1.5/45/52M 156/622M JITTER UNIT 44Y107667B
MU150007A 2/8/34/139M 1.5/45/52M 156/622M 44Y107667C
JITTER UNIT
MU150008A 2.5G (1.31) UNIT 44Y107557C
MU150009A 2.5G (1.55) UNIT 44Y107557B
MU150010A 2.5G (1.31/1.55) UNIT 44Y107557
MU150011A 2.5G JITTER UNIT 44Y105521B

MP0105A CMI UNIT 44Y100961C


MP0108A NRZ UNIT 44Y101019
MP0111A OPTICAL 156M/622M (1.31) UNIT 44Y102644C
MP0112A OPTICAL 156M/622M (1.55) UNIT 44Y102644D
MP0113A OPTICAL 156M/622M (1.31/1.55) UNIT 44Y103904
MU150031A OPTICAL 10G (1.55) HIGH POWER 44Y109644A
TX UNIT
MU150031C OPTICAL 2.5G (1.55)/10G (1.55) HIGH 44Y109644B
POWER TX UNIT
MU150061A OPTICAL 10G (1.31) TX UNIT 44Y110381A
MU150061B OPTICAL 2.5G (1.31)/10G (1.31) TX 44Y110381B
UNIT

1-3
Section 1 Outline of Operation

1.1.2 Exchangable Module Lists of MU150000A


The MU15000A is composed of the 2 exchangable modules listed in Table 1-3.
If they develop a fault, simply changing the modules can repair it.

Table 1-3 Exchangable Modules of MU150000A


Part Number Name Construction
Drawing Number
MM100181A 10G TX 44Y106839
MM100182A 10G RX 44Y106841
MM100183A Frame memory/capture 44Y106869

1-4
1.2 Block Diagram

1.2 Block Diagram


1.2.1 Block Diagram of MP1570A
Fig. 1-1 shows a block diagram of the MP1570A

STP211B-192 Interface Unit MM100173A


PRINTER SDH

MM100171A
PRT
Unit slot1

MM100176A/177A
Power Supply Unit

NL6448BC20-08 Unit slot2


LCD

MM100168A
MM100175A A01
MOTHER2 Unit slot3
DC-DC MOTHER1

65PWB31
INVERTER

Unit slot4
MM100169A
L-F

Unit slot5
MM100170A
R-F

Back Unit MM100172A S4Z10398


CPU FDD

Fig. 1-1 Block Diagram of MP1570A Exchangable Modules

1-5
Section 1 Outline of Operation

1.2.2 Block Diaglam of MU150000A


Fig. 1-2 shows a block diagram of MU150000A.

Dummy board or
MM100181A MM 100182A
MM100183A
Frame memory/
10G Tx 10G RX
capture

Fig. 1-2 Block Diagram of MU150000A

1.3 Module Functions


1.3.1 MP1570A
(1) MOTHER2
This module transmits the signals between the modules.

(2) L-F
This module sends the data set using the front panel keys (Local, Panel lock,
Printer, FDD) to the CPU module or PRT module.

(3) R-F
This module displays on the front panel LEDs, the error alarm detected, and send
the data set using the front panel keys (Setup, Test menu, Result, Analyze, Set,
Cancel, Help, ←, →, ↑, ↓, Start/Stop, Alarm, Error, History, Reset) to the CPU
module.

(4) PRT
This module controls the built-in printer.

(5) CPU
This module controls all the modules.

(6) SDH
This module generates and detects the SDH framed signals.

1-6
1.3 Module Functions

(7) DC-DC CONVERTER


This module converts DC 5V to DC 2.5V.

(8) 44Z106763 Power supply unit


This module provides DC power to each module.

(9) FDD (Floppy Disk Drive)


This module saves the measurement conditions or the analyze data to the floppy
disks, and loads the measurement conditions or the analyze data from these.

(10) LCD
This module displays the setting values and measurement results.

(11) INVERTER
This module supplies high voltage (1500Vrms) to LCD.

(12) GPIB/232C
This module has connectors for remote operation.

(13) ETHERNET
This module has connectors for remote operation.

(14) VGA OUTPUT


This module has connectors for VGA output and remote operation.

1.3.2 MP0121A
This unit generates and detects the E1 to E4 (2/8/34/139 Mbit/s) signals. It has 156
Mbit/s CMI encode/decode and clock recovery functions.

1.3.3 MP0122A
This unit generates and detects the electrical DS1/Ds3 (1.5/45 Mbit/s) and 52 Mbit/s
signals.

1-7
Section 1 Outline of Operation

1.3.4 MP0122B
For the MP0122B, a 52 Mbit/s optical interface (1.31 µm) is added to the MP0122A.

1.3.5 MP0123A
This unit generates and analyzes ATM cells.

1.3.6 MP0124A/MP0125A/MP0126A
These units have functions of jitter/wander addition, frequency offset and jitter/wander
measurement. The difference of these units is bit rates. Available Bit rates are below.
MP0124A: 2/8/34/139 M 156/622 Mbit/s
MP0125A: 1.5/45/52 M 156/622 Mbit/s
MP0126A: 2/8/34/139 M 1.5/45/52 M 156/622 Mbit/s

1.3.7 MP0127A/MP0128A/MP0129A
These units generate and detect the 2488 Mbit/s signals.
It has both optical interface and electrical interface.
Available the optical interface is below.
MP0127A: wavelength 1.31 µm
MP0128A: wavelength 1.55 µm
MP0129A: wavelength 1.31/1.55 µm switchable

1.3.8 MP0130A
This unit has functions of jitter/wander addition, frequency offset and jitter measure-
ment (2488 Mbit/s).

1.3.9 MP0131A
This unit has the functions which add/drop the PDH/DSn signal to/from the SDH Map-
ping.

1.3.10 MU150000A
1.3.10.1 MM100181A
This module generates the 2488/9953 Mbit/s signals.

1.3.10.2 MM100182A
This module detects the 2488/9953 Mbit/s signals.

1.3.10.3 MM100183A
This module has the functions which edit and analyze 26 frames data.

1-8
1.3 Module Functions

1.3.11 MU150001A
This unit has the E/O converter.
Available the optical interface and bit rate is below.
MU150001A: wavelength 1.55 µm, bit rate 9953 Mbit/s
MU150001A-01: wavelength 1.31 µm, bit rate 2488 Mbit/s
MU150001A-02: wavelength 1.55 µm, bit rate 2488 Mbit/s
MU150001A-03: wavelength 1.31/1.55 µm, bit rate 2488 Mbit/s

1.3.12 MU150001B
This unit has the function of 40 km transmission. The difference between MU150001A
and MU150001B is only it.
Available the optical interface and bit rate is below.
MU150001B: wavelength 1.55 µm, bit rate 9953 Mbit/s
MU150001B-01: wavelength 1.31 µm, bit rate 2488 Mbit/s
MU150001B-02: wavelength 1.55 µm, bit rate 2488 Mbit/s
MU150001B-03: wavelength 1.31/1.55 µm, bit rate 2488 Mbit/s

1.3.13 MU150002A
This unit has the O/E converter with clock recovery.
Available bit rate is below.
MU150002A: bit rate 9953 Mbit/s
MU150002A-01: bit rate 2488 Mbit/s
MU150002A-04: Available for 10G (1.31)

1.3.14 MU150005A/MU150006A/MU150007A
These units have functions of jitter/wander addition, frequency offset and jitter/wander
measurement. The difference of these units is bit rates. Available Bit rates are below.
MU150005A: 2/8/34/139M 156/622 Mbit/s
MU150006A: 1.5/45/52M 156/622 Mbit/s
MU150007A: 2/8/34/139M 1.5/45/52M 156/622 Mbit/s

1.3.15 MU150008A/ MU150009A/ MU150010A


These units generate and detect the 2488 Mbit/s signals.
It has both optical interface and electrical interface.
Available the optical interface is below.
MU150008A: wavelength 1.31 µm
MU150009A: wavelength 1.55 µm
MU150010A: wavelength 1.31/1.55 µm switchable

1-9
Section 1 Outline of Operation

1.3.16 MP0111A/MP0112A/MP0113A
These units have the E/O converter and the O/E converter with clock recovery (156/
622 Mbit/s). Available the optical interface is below.
MP0111A: wavelength 1.31 µm
MP0112A: wavelength 1.55 µm
MP0113A: wavelength 1.31/1.55 µm switchable.

1.3.17 MP0105A
This unit has the 156 Mbit/s CMI encoder and decoder.

1.3.18 MP0108A
This module has the NRZ data (156/622 Mbit/s) input/output with clock.

1.3.19 MU150031A/C
These units have the E/O converter with optical high power output. Available the
optical interface and bit rate is below.
MU150031A: wavelength 1.55 µm, bit rate 9953 Mbit/s.
MU150031C: wavelength 1.55 µm, bit rate 2488/9953 Mbit/s.

1.3.20 MU150061A/B
These units have the E/O converter.
Available the optical interface and bit rate is below.
MU150061A: wavelength 1.31 µm, bit rate 9953 Mbit/s.
MU150061C: wavelength 1.31 µm, bit rate 2488/9953 Mbit/s.

1-10
1.4 General Circuit Diagram

1.4 General Circuit Diagram


These diagrams describes connections of cables between exchangable modules.
1.4.1 MP1570A

1-11
Section 1 Outline of Operation

1-12
1.4 General Circuit Diagram

1.4.2 MU150000A

1-13
Section 1 Outline of Operation

1-14 .
Section 2 Upgrading Software
The software for operating MP1570A is stored on floppy disk and can be updated. To
update the software, first check the current software version.

2.1 Confirmation of the Software Revision


(Option/Revision Screen) and Method of All Initial
Value Settings ........................................................... 2-2
2.2 Upgrading the Software (Install Screen) ................... 2-3
2.2.1 System Software Installation ......................... 2-3
2.2.2 Installer Program Installation ......................... 2-4
2.2.3 FPGA Data Installation .................................. 2-5

2-1
Section 2 Upgrading Software

2.1 Confirmation of the Software Revision (Option/Revi-


sion Screen) and Method of All Initial Value Settings
This analyzer can show the software revision, inserted units and installed options at the
Option/Revision screen. The backup RAM clearing can be done at this screen.
This subscreen opens when power is turned on with the “LOCAL” key held down.

[1] [6]

[2] [7]

[3]

[4]
[5]

Table 2-1 Description of Option/Revision Screen


No. Display Description
[1] Installed software revision Displays the number of the software revision
installed on the mainframe.
[2] Model type Displays the model name.
[3] Option No. Function Displays the numbers and function names of the
mainframe options.
[4] slot 1, slot 2, slot 3, slot 4/5 Displays the model name, serial number, name
of the optional functions mounted.
[5] Interface unit Displays the unit name, and serial number of the
unit mounted on the front panel.
[6] Restart The “Set” key is used to reset and return to the
normal screen.
[7] Backup RAM clear On/off for deleting the measurement conditions
stored in memory.
: Not delete
: Delete
When the Restart key at is used to activate
the measurement screen, all the initial values
are set as the measurement conditions.
2-2
2.2 Upgrading the Software (Install Screen)

2.2 Upgrading the Software (Install Screen)


2.2.1 System Software Installation
When performing the install processing, this screen indicates the activation condition
and guidance message of the processing.
This screen is displayed if power is turned on with the “History” + “Reset” keys held
down, simultaneously.

[6] [5]

[1]
[2]
[3]
[4]

Table 2-2 Description of Install Screen


No. Display Description
[1] Installed software revision Indicates the revision information.
After the installation completed, this is up-
dated.
[2] Install Software Sets the object to be installed.
[3] Source Sets the install method.
[4] Guidance Message Indicates the guidance message of the install
processing.
[5] Install Execute After completion of disc processing and instal-
lation, the reverse cursor is displayed here.
[6] Restart Pressing the “Set” key resets this screen, and
moves to the ordinary screen.

2-3
Section 2 Upgrading Software

2.2.2 Installer Program Installation


Use this Install screen to upgrade the installer program.
This screen is displayed if power is turned on with the “Print Now” + “Feed” keys held
down, simultaneously.
The revision number of the installer is displayed at upper right of the Install screen.
When the installer program is upgraded, the software of the mainframe is erased. So
prepare the software beforehand.

[3] [4]

[1]

[2]

Table 2-3 Description of Installer Program Install Screen


No. Display Description
[1] Installed Program revision Displays revision information.
Updated after completion of installation.
[2] Guidance/Message Displays guidance message for installation.
[3] Restart Press the “Set” key to reset and then move to
Install screen.
Install the software of the mainframe.
[4] Install Execute After completion of disk processing and instal-
lation, the reverse cursor is displayed here.

Note:
In ordinary use, there are no needs to upgrade (install) the installer program.
Install screen is green to protect the installation from mis-operation.
Prepare the software beforehand.
After upgrading the Installer, the software of the mainframe must be installed.

2-4
2.2 Upgrading the Software (Install Screen)

2.2.3 FPGA Data Installation


The MP1570A and some units use FPGA.
Show these updateable units in table 2-4.
When these FPGA need to be updated, install the data following FPGA install screen
guidance.
This screen is displayed if power is turned on with the “Setup” + “Analyze” keys held
down, simultaneously.

Table 2-4 Updateable Units


Part Number Name
MP0122A 1.5/45/52M UNIT
MP0122B 1.5/45/52/52M (1.31) UNIT
MP0123A ATM UNIT
MP0124A 2/8/34/139M 156/622M JITTER UNIT
MP0125A 1.5/45/52M 156/622M JITTER UNIT
MP0126A 2/8/34/139M 1.5/45/52M
156/622M JITTER UNIT
MP0127A 2.5G(1.31) UNIT
MP0128A 2.5G(1.55) UNIT
MP0129A 2.5G(1.31/1.55) UNIT
MP0130A 2.5G JITTER UNIT
MU150000A 2.5G/10G UNIT
MU150005A 2/8/34/139M 156/622M JITTER UNIT
MU150006A 1.5/45/52M 156/622M JITTER UNIT
MU150007A 2/8/34/139M 1.5/45/52M 156/622M JITTER UNIT
MU150008A 2.5G(1.31) UNIT
MU150009A 2.5G(1.55) UNIT
MU150010A 2.5G(1.31/1.55) UNIT
MU150011A 2.5G JITTER UNIT

2-5
Section 2 Upgrading Software

[3] [4]

[1]

[2]

Table 2-5 Description of Installer Program Install Screen


No. Display Description
[1] Installed data revision Indicates the revision information.
After the Installation completed, this is up-
dated.
[2] Guidance Message Indicates the guidance message of the Install
processing.
[3] Restart Pressing the “Set” key resets this screen, and
moves to the ordinary screen.
[4] Install execute After completion of disc processing and instal-
lation, the reverse cursor is displayed here.

2-6.
Section 3 Performance Test

3.1 General ..................................................................... 3-3


3.2 Equipment Required ................................................. 3-4
3.3 Interface Performance Test ...................................... 3-6
3.3.1 Clock Sync. Output, 156 M Sync. .................. 3-6
3.3.2 Frame Sync. Output ...................................... 3-9
3.3.3 External Clock Input ...................................... 3-10
3.3.4 DCS Input ...................................................... 3-12
3.3.5 2/8/34/139/156 M CMI/HDB3 Output
Waveform ...................................................... 3-14
3.3.6 1.5/45/52 M AMI/B8ZS/B3ZS Output
Waveform ...................................................... 3-19
3.3.7 MP0105A Output Waveform ......................... 3-22
3.3.8 MP0108A, MP0127A/MP0128A/MP0129A,
MU150008A/MU150009A/MU150010A
Electrical Output ............................................ 3-23
3.3.9 MU150000A Electrical Output ....................... 3-24
3.3.10 Optical Unit (MP0111A/MP0112A/MP0113A),
MP0122B, MP0127A/MP0128A/MP0129A,
MU150001A/B, MU150008A/MU150009A/
MU150010A, MU150031A/C, MU150061A/B
Optical Output Waveform .............................. 3-25
3.3.11 CMI/HDB3 Input ............................................ 3-27
3.3.12 AMI/B8ZS Input ............................................. 3-29
3.3.13 B3ZS Input .................................................... 3-30
3.3.14 MP0105A Input .............................................. 3-31
3.3.15 Optical Unit (MP0111A/MP0112A/MP0113A),
MP0122B Input .............................................. 3-32
3.3.16 MP0127A/MP0128A/MP0129A, MU150002A,
MU150008A/MU150009A/MU150010A
Optical Input .................................................. 3-33
3.3.17 Optical Unit (MP0111A/MP0112A/MP0113A),
MP0122B, MP0127A/MP0128A/MP0129A,
MU150002A, MU150008A/MU150009A/
MU150010A Power Meter Accuracy ............. 3-34
3.3.18 MP0122B, MP0127A/MP0128A/MP0129A,
MU150008A/MU150009A/MU150010A
Monitor Input ................................................. 3-35
3.3.19 2/34/139 M CMI/HDB3 Drop Output
Waveform ...................................................... 3-36
3.3.20 1.5/45 M AMI/B8ZS/B3ZS Drop Output
Waveform ...................................................... 3-39
3.3.21 CMI/HDB3 Add Input ..................................... 3-41

3-1
Section 3 Performance Test

3.3.22 AMI/B8ZS Add Input ...................................... 3-42


3.3.23 B3ZS Add Input ............................................. 3-43
3.3.24 MP0127A/MP0128A/MP0129A, MU150008A/
MU150009A/MU150010A Receive Clock
Output ............................................................ 3-44
3.4 Jitter Performance Test (MP0124A/MP0125A/
MP0126A) ................................................................. 3-45
3.4.1 Frequency Offset Accuracy ........................... 3-45
3.4.2 10 MHz Lock Signal Input ............................. 3-47
3.4.3 Jitter Tx Amplitude Accuracy ......................... 3-49
3.4.4 External Jitter Modulation Input (75 Ω) .......... 3-51
3.4.5 Jitter Reference Clock Output ....................... 3-53
3.4.6 Jitter Rx Accuracy .......................................... 3-54
3.4.7 Jitter Demodulation Output ............................ 3-58
3.4.8 Jitter Reference Clock Input .......................... 3-59
3.4.9 Wander Reference Output/Input ................... 3-60
3.5 Jitter Performance Test (MU150005A/MU150006A/
MU150007A/MU150011A) ....................................... 3-61
3.5.1 Frequency Offset Accuracy ........................... 3-61
3.5.2 10 MHz Lock Signal Input ............................. 3-63
3.5.3 Jitter Tx Amplitude Accuracy ......................... 3-65
3.5.4 Jitter Reference Clock Output ....................... 3-68
3.5.5 Jitter Rx Accuracy .......................................... 3-69
3.5.6 Jitter Demodulation Output ............................ 3-73
3.5.7 Jitter Reference Clock Input .......................... 3-75
3.5.8 Wander Reference Output/Input ................... 3-76
3.6 Internal Performance Test ........................................ 3-77
3.6.1 Checking Main Frame Internal Functions ...... 3-77
3.6.2 Checking Interface-unit Internal Functions .... 3-78
3.7 M1570A Self-test System Program .......................... 3-79
3.7.1 Outline ........................................................... 3-79
3.7.2 Description of Operation Screen ................... 3-81
3.7.3 Selftest .......................................................... 3-96

3-2
3.1 General

3.1 General
This section describes how to perform the MP1570A and plug-in units performance
test and how to evaluate their results.
The performance test may be performed for acceptance inspections, checks after repair
or adjustment, or periodic calibration.
Execute the performance test at regular intervals as preventive maintenance for impor-
tant evaluation items. We recommend that performance tests should be performed
regularly once or twice a year.

To measure at the highest accuracy, the test must be performed at room temperature,
AC power supply voltage fluctuations must be minimized, and there must be no prob-
lem with noise, vibrations, dust, or humidity.

Note:
The Performance Test require the MP1570A to be set to a All Initial state at the
beginning of each test.
Method of All Initial value setting is described at Section 2.1 “Option/Revision
screen”.

3-3
Section 3 Performance Test

3.2 Equipment Required


Table 3-1 Equipment Required
Recommended Test Item
Equipment Required Performance
Model Name Paragraph No.
Frequency counter MF76A Frequency range: 1 MHz to 18 GHz 3.3.1
3.3.3
3.4.1
Oscilloscope Frequency range: DC to 20 GHz 3.3.3
(Sampling oscilloscope) 3.3.8
3.3.9
3.3.10
3.3.24
3.4.2
3.4.5
3.5.2
3.5.4
Oscilloscope Frequency range: DC to 1 G 3.3.1 to 3.3.8
3.3.19 to 3.3.20
3.4.7
3.5.6
Impedance matching Frequency range: DC to 200 MHz 3.3.2
Pad 75 Ω/50 Ω 3.3.5
3.3.6
3.3.7
3.3.19
3.3.20
Impedance matching Frequency range: DC to 10 MHz 3.3.6
Pad 100 Ω/50 Ω 3.3.20
Impedance matching Frequency range: DC to 10 MHz 3.3.5
Pad 120 Ω/50 Ω 3.3.19
Impedance transformer 3.3.3
3.3.4
Clock generator Frequency range: 0.05 to 12 GHz 3.3.3
3.3.4
3.4.2
3.5.2
ECL terminator 3.3.8
Waveform monitor 3.3.10
(O/E converter)
4th Bessel LPF MA1514A 156 M 3.3.10
MA1515A 622 M
MA1619A 2488 M
MF1010 9952 M

3-4
3.2 Equipment Required

Recommended Test Item


Equipment Required Performance
Model Name Paragraph No.
Coaxial cable 3C-2WS cable 6 dB loss at 1.0 MHz 3.3.11
3.3.21
6 dB loss at 4.2 MHz 3.3.14
6 dB loss at 17.0 MHz
12 dB loss at 70.0 MHz
12.7 dB loss at 78.0 MHz
728 0/450/900 feet 3.3.13
3.3.23
ABAM 655 feet 3.3.12
3.3.22
Resistance attenuator Frequency range DC to 500 MHz 3.3.11
3.3.12
3.3.13
3.3.14
Optical attenuator MP9610B Wavelength: 1.0 to 1.6 µm 3.3.15
3.3.16
3.3.17
Optical power meter ML9001A Wave length range: 1.0 to 1.6 µm 3.3.15
(with power sensor) (with MA9712A) Measurement range: –40 to 10 dBm 3.3.16
3.3.17
Spectrum analyzer MS2602A Frequency range: 100 to 8.5 GHz 3.4.3
3.5.3
Signal generator MG3633A Frequency range: 10 k to 2700 MHz 3.4.4
2-channel signal generator Frequency range: 10 MHz 3.4.2
3.5.2
SDH/SONET Analyzer ME3620A 3.3.18
(Transmitter) ME0301A
ME0302B
ME0304B

3-5
Section 3 Performance Test

3.3 Interface Performance Test


3.3.1 Clock Sync. Output, 156 M Sync.
1. Waveform level
(1) Test specifications
Frequency 1.544 MHz
2.048 MHz
8.448 MHz
34.368 MHz
44.736 MHz
139.264 MHz
51.84 MHz
155.52 MHz
155.52 MHz (MP0127A/MP0128A/MP0129A)
155.52 MHz (MU150008A/MU150009A/MU150010A)
155.52 MHz (MU150000A)
622.08 MHz
Level ECL (AC) nominal 0.7 Vp–p

(2) Connection

MP1570A+Unit Oscilloscope
Clock Sync./
• • • • 156 M Sync.
• • • • Input
• • • •

Fig. 3-1 Clock Sync Output Test

(3) Test procedure


Test the output waveform by following steps:
(a) Connect the cable as shown in Fig. 3-1.
(b) Set the Bit rate to 1.5 M (Lowest Bit rate of interface unit).
(c) Be sure the waveform level is put within the specifications.
(d) Set the Bit rate to next higher through 9953 M in turn, and be sure that its
level is put within the specifications.

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3.3 Interface Performance Test

Note:
The pulse mask does not consider the amount of attenuation of pad.
To verify the level, perform calculations considering the attenuation.
Frame sync output signal (2 M/8 M/34 M/139 M) is available when frame is
turned on.
To test 2.5 G unit and MU150000A, connect the cables with the 156 M Sync. of
the unit.

2. Frequency accuracy

Note:
If a jitter unit is inserted, refer to 3.4.1/3.5.1 “Frequency offset accuracy” test.

(1) Test specifications


Frequency 1.544 MHz
2.048 MHz
8.448 MHz
34.368 MHz
44.736 MHz
139.264 MHz
51.84 MHz
155.52 MHz
155.52 MHz (MP0127A/MP0128A/MP0129A)
155.52 MHz (MU150008A/MU150009A/MU150010A)
155.52 MHz (MU150000A)
622.08 MHz
Accuracy ±7 ppm (2 M/8 M/34 M/139 M) (1.5 M, 45 M)
±3.5 ppm (52 M/156 M/622 M)

(2) Connection

MP1570A+Unit Frequency counter

Clock Sync/
• • • • 156 M Sync.
• • • • Input
• • • •

Fig. 3-2 Clock Sync Output Accuracy Test

3-7
Section 3 Performance Test

(3) Test procedure


Test the frequency accuracy by following steps:
(a) Connect the cable as shown in Fig. 3-2.
(b) Set the Bit rate to 1.5 M (Lowest Bit rate of interface unit).
(c) Be sure the frequency is put within the nominal bit rate value given in (1).
(d) Set the Bit rate to next higher through 9953 M in turn, and be sure that its
level is put within the specifications.

Note:
To test 2.5 G unit and MU150000A, connect the cable with the 156 M sync. of
the unit.

3-8
3.3 Interface Performance Test

3.3.2 Frame Sync. Output


(1) Test specifications
Period 125 µs (1.5 M)
250 µs (2 M)
100.4 µs (8 M)
44.7 µs (34 M)
106.4 µs (45 M)
21.025 µs (139 M)
125 µs (52 M)
125 µs (156 M/156 M CMI)
125 µs (622 M)
Level TTL
Waveform

2M High
Low
250 µs

Other bit rate High


Low
Period

(2) Connection

MP1570A+Unit Oscilloscope

Frame
• • • • Sync.
• • • • Input
• • • •

75 Ω/50 Ω

Fig. 3-3 Frame Sync Output Test

(3) Test procedure


Test the output waveform by following steps:
(a) Connect the cable as shown in Fig. 3-3.
(b) Set the Bit rate to 1.5 M (Lowest Bit rate of interface unit).
(c) Be sure the level is TTL level and the period of signal is correct.
(d) Set the Bit rate to next higher through 622 M in turn, and be sure that its
period is put within the specifications.

3-9
Section 3 Performance Test

3.3.3 External Clock Input


(1) Test specifications
(a) 1.5 M-2.5 G configuration
Frequency 1.544 MHz
2.048 MHz
8.448 MHz
34.368 MHz
44.736 MHz
139.264 MHz
51.84 MHz
155.52 MHz
622.08 MHz
2488.32 MHz (MP0127A/MP0128A/MP0129A,
MU150008A/MU150009A/
MU150010A)
Frequency offset
–100 to +100 ppm
Input level ECL (AC) nominal 0.8 Vp–p
(b) 2.5 G-10 G configulation (MU150000A)
Frequency 2488.32 MHz
9953.28 MHz
Frequency offset
–100 to +100 ppm
Input level 1.0 to 0.6 Vp–p
Note:
To test 2.5 G unit and MU150000A, connect the cables with the 156 M Sync.
and the external clock input of the unit.

(2) Connection

MP1570A+Unit Oscilloscope Frequency counter

ClockSync./
• • • • 156 M Sync.
• • • • Input Trig Input
• • • • Ext
Input

Clock generator

Impedance transformer

Fig. 3-4 External Clock Input Test (External)


3-10
3.3 Interface Performance Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as follows:
2/8/34/139/156 M CMI: 75 Ω CMI/HDB3 output to 75 Ω CMI/HDB3 input
1.5 M: 100 Ω AMI/B8ZS output to 100 Ω AMI/B8ZS in-
put
45 M/52 M: 75 Ω B3ZS output to 75 Ω B3ZS input
156 M/622 M: MP0105A: CMI output to CMI input
MP0108A: Data output to Data input
Clock output to Clock input
Optical unit: Output to input
2488 M (MP0127A/MP0128A/MP0129A, MU150008A/MU150009A/
MU150010A):
Optical: Output to input
2488 M (MU150000A): Data output to Data input
Clock output to Data input
9953 M: Data output of Data input
Clock output to Data input
(b) Set the Bit rate to 1.5 M.
(c) Set the Clock to External.
(d) Set the clock generator frequency to 1.544 MHz, wait a few seconds, then
check that all Alarm/Errors LEDs on the panel are unlit.
(e) Be sure that the clock loss LED is lit when the External clock input connector
is open.
(f) Set the clock generator frequency offset to +100 ppm through –100 ppm.
Each time, wait a few seconds, then check that all Alarm/Errors LEDs on the
panel are unlit.
(g) Be sure that the clock sync output signal from MP1570A synchronizes with
signal from clock generator.
(h) Set the Bit rate to 2 M through 9953 M in turn, then repeat step (d)P through
step (g) (Clock generator frequency is equal to bit rate.)

3-11
Section 3 Performance Test

3.3.4 DCS Input


(1) Test specifications
Frequency 64 KHz
1.544 MHz
2.048 MHz
Frequency offset
–50 to +50 ppm

(2) Connection

MP1570A+Unit Oscilloscope

Clock Sync./
• • • • 156 M Sync.
• • • • Input Trig
• • • • DCS Input

Clock generator

Impedance transformer

Fig. 3-5 DCS Input Test

3-12
3.3 Interface Performance Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-5.
(b) Set the Bit rate to 52 M.
(c) Set the Clock to Locked (2.048 MHz).
(d) Ensure the loop-back for the bit rate that should be measured.
(e) Set the clock generator frequency to 2.048 MHz, wait a few seconds, then
check that all Alarm/Errors LEDs on the panel are unlit.
(f) Be sure that the clock loss LED is lit when the DCS Input connector is open.
(g) Set the clock generator frequency offset to +50 ppm through –50 ppm. Each
time, wait a few seconds, then check that all Alarm/Errors LEDs on the panel
are unlit.
(h) Be sure that the Clock sync output signal from MP1570A synchronizes with
signal from clock generator.
(i) Set the Bit rate to 156 M through 9953 M, then repeat step (f) through step
(g).
(j) Set the Clock to Locked (Balanced), then repeat step (f) through step (h).
(k) Set the Clock to Locked 1.5 MHz, then repeat step (d) through step (h).
(l) Set the clock to Locked 64 kHz, then repeat step (d) through step (h).

3-13
Section 3 Performance Test

3.3.5 2/8/34/139/156 M CMI/HDB3 Output Waveform


Test the output waveform by following these steps:
1. Connect the units as illustrated in (1) depending on the frequency and interface.
2. Set the frequency and interface using the Mapping subscreen of the Setup main
screen.
3. Be sure that the waveform is put within the pulse mask shown in (2).
4. Repeat steps 1, 2, and 3 to perform test on the frequencies and interfaces.

Note:
The pulse mask in (2) does not consider the amount of attenuation of pad. To
verify the level, perform calculations considering the attenuation.

(1) Connection
• 2 M balanced

MP1570A Oscilloscope
Clock Sync.
Output
Trig
50 Ω
Input
50 Ω

Balanced output

120 Ω/50 Ω

Fig. 3-6 HDB3 Output Waveform (Balanced) Test

• 2 M/8 M/34 M/139 M/156 M unbalanced

MP1570A Oscilloscope
Clock Sync.
Output
Trig
50 Ω
Input
50 Ω

Unbalanced output

75 Ω/50 Ω

Fig. 3-7 CMI/HDB3 Output Waveform (Unbalanced) Test

3-14
3.3 Interface Performance Test

(2) Pulse mask


• 2M

V = 100 %
Balanced: 3V
Unbalanced: 2.37 V

• 8M

3-15
Section 3 Performance Test

• 34 M

3-16
3.3 Interface Performance Test

• 139 M CMI
Norminal Peak-to-peak voltage (V): 1 ±0.1 V
binary 0

binary 1

3-17
Section 3 Performance Test

• 156 M CMI

binary 0

binary 1

3-18
3.3 Interface Performance Test

3.3.6 1.5/45/52 M AMI/B8ZS/B3ZS Output Waveform


Test the output waveform by the following these steps:
1. Connect the units as illustrated in (1) depending on the frequency and interface.
2. Set the frequency, DSX and interface using the Mapping subscreen of the Setup
main screen.
(1.5M: DSX = 655 ft, 45/52 M: DSX = 450 ft)
3. Be sure that the waveform is put within the pulse mask shown in (2).
4. Repeat steps 1, 2, 3 to perform test on the frequencies and interfaces.

Note:
The pulse mask in (2) does not consider the amount of attenuation of pad. To
verify the level, perform calculations considering the attenuation.

(1) Connection
• 1.5 M balanced

MP1570A Oscilloscope
Clock Sync.
Output
Trig
50 Ω
Input
50 Ω

Balanced output

100 Ω/50 Ω

Fig. 3-8 AMI/B8ZS Output Waveform Test

• 45/52 M unbalanced

MP1570A Oscilloscope
Clock Sync.
Output
Trig
50 Ω
Input
50 Ω

Unbalanced output

75 Ω/50 Ω

Fig. 3-9 B3ZS Output Waveform Test

3-19
Section 3 Performance Test

(2) Pulse mask


• 1.5 M

V = 100 %
Normalized Amplitude
Balanced: 2.4 to 3.6 V
1.5

0.5

-0.5

-1
-1 -0.5 0 0.5 1 1.5
Time, in Unit Intervals

• 45 M
V = 100 %
Normalized Amplitude
Unbalanced: 0.36 to 0.85 V
1.5

0.5

-0.5

-1
-1 -0.5 0 0.5 1 1.5
Time, in Unit Intervals

3-20
3.3 Interface Performance Test

• 52 M
V = 100 %
Normalized Amplitude
Unbalanced: 0.36 to 0.85 V
1.5

0.5

-0.5

-1
-1 -0.5 0 0.5 1 1.5
Time, in Unit Intervals

3-21
Section 3 Performance Test

3.3.7 MP0105A Output Waveform


To test the output waveform, follow these steps:
1. Mount the MP0105A unit on the main frame.
2. Connect the units as illustrated in (1).
3. Set the frequency to 156 M at the Mapping subscreen of the Setup main screen.
4. Be sure that the waveform is put within the pulse mask shown in (2).

Note:
The pulse mask in (2) does not consider the amount of attenuation of pad. To
verify the level, perform calculations considering the attenuation.

(1) Connection

MP1570A Oscilloscope
Clock Sync.
Output
Trig
50 Ω
Input
MP0105A/B 50 Ω

Output

75 Ω/50 Ω

Fig. 3-10 MP0105A Output Waveform Test

For 156 M CMI pulse mask, see page 3-13

3-22
3.3 Interface Performance Test

3.3.8 MP0108A, MP0127A/MP0128A/MP0129A, MU150008A/


MU150009A/MU150010A Electrical Output
To test the output waveform, follow these steps:
1. Mount the MP0108A, MP0127A/MP0128A/MP0129A and MU150008A/
MU150009A/MU150010A units on the main frame.
2. Connect the units as illustrated in (1).
3. Set the frequency at 156 M to 2488 M on the Mapping subscreen of the Setup main
screen.
4. Be sure that timing in (2) is satisfied.

(1) Connection

MP1570A Clock Sync. Oscilloscope


Output (156 M Sync.
output of 2.5 G unit)
2.5 G unit Trig
50 Ω
Input1 Input2
MP0108A 50 Ω 50 Ω

Data output Clock output


ECL terminator

Fig. 3-11 MP0108A Output Waveform Test

(2) Timing

Clock

Data

Set A
max A Frequency
max A 156 M 1.6 ns

622 M 0.4 ns

2488 M 80 ps
*1
2488 M 40 ps
*1: MU150008A/MU150009A/150010A
3-23
Section 3 Performance Test

3.3.9 MU150000A Electrical Output


To test the output wave forma these steps:
1. Mout MU150000Aunit on the main frame.
2. Connect the units as illusurated in (1)
3. Set the frequency at 9953M on the Mappaing subscreen of the Setup main screen.
4. Be sure that timing in (2) is satisfied.

(1) Connection

MP1570A 156 M Sync. Output Oscilloscope


(side panel of MU150000A)
Trig
50 Ω
MU150000A
Input
50 Ω

Data output

Fig. 3-12 MU150000A Output Waveform Test

(2) Timing

max A
Set A
Frequency
max A 2488 M 80 ps

9953 M 15 ps

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3.3 Interface Performance Test

3.3.10 Optical Unit (MP0111A/MP0112A/MP0113A), MP0122B, MP0127A/


MP0128A/MP0129A, MU150001A/B, MU150008A/MU150009A/
MU150010A, MU150031A/C, MU150061A/B Optical Output Wave-
form
To test the output waveform, follow these steps:
1. Mount a unit of MP0111A/MP0112A/MP0113A, MP0122B, MP0127A/
MP0128A/MP0129A, MU150001A/B or MU150008A/MU150009A/
MU150010A, MU150031A/C, MU150061A/B on the main frame.
2. Connect the units as illustrated in (1).
3. Set the frequency (52 M, 156 M, 622 M, 2488 M or 9952 M) on the Mapping
subscreen of the Setup main screen.
4. Set the wavelength (1.31 µm or 1.55 µm) on the Mapping sub screen of the setup
main screen.
5. Be sure that the timing is in the pulse mask of (2).
6. Test all SDH frequencies by repeating steps 2 and 4.

(1) Connection

MP1570A Oscilloscope
Clock Sync Output
(156 M Sync. Output
of side panel unit)
Trig
50 Ω
MP0122B, MU150000A,
MU150001A/B, 2.5 G Input
unit 50 Ω
MP0111A, MP0112A,
Output MP0113A

O/E
4th Bessel LPF
156 M: MA1514A
622 M: MA1515A
2488 M: MA1619A
9953 M: MF1010

Fig. 3-13 Optical Output Waveform Test

3-25
Section 3 Performance Test

(2) Pulse mask

; ;
1+Y1

; ; ;
1

; ;
Y2

;
;;; ;
0.5

Y1

-Y1

0 X1 X2 X3 X4 1

*1 *2
52 M/156 M 622 M 2488 M 9953 M 9953 M

X1/X4 0.15/0.85 0.25/0.75 0.25/0.75 0.40/0.60 0.40/0.60

X2/X3 0.35/0.65 0.40/0.60 0.40/0.60 0.40/0.60 0.40/0.60

Y1/Y2 0.20/0.80 0.20/0.80 0.25/0.75 0.30/0.70 0.25/0.75

*1 : MU150001A/B
*2 : MU150031A/C, MU150061A/B

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3.3 Interface Performance Test

3.3.11 CMI/HDB3 Input


(1) Test specifications
Bit rate 2.048 Mbit/s
8.448 Mbit/s
34.368 Mbit/s
139.264 Mbit/s
155.52 Mbit/s
Input level
Nominal value 2.37±0.237 Vo–p (2 M/8 M)
1±0.1 Vo–p (34 M)
1±0.1 Vp–p (139 M, 156 M)
Cable loss 0 to 6 dB (at 1 MHz for 2 M, at 4.2 MHz for 8 M)
0 to 12 dB (at 17 MHz for 34 M, at 70 MHz for 139 M)
0 to 12.7 dB (at 78 MHz for 156 M)
Addition gain 20 dB

(2) Connection

MP1570A+MP0121A
Coaxial Resistance
cable attenuator
• • • •
• • • •
Xm
• • • •

Fig. 3-14 CMI/HDB3 Input Level Test (Unbalanced)

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-14.
(b) Set the Bit rate to 2 M and the 2 M setting-interface to Unbalanced.
(c) Set the Monitor mode to off.
(d) Set the resistance attenuator value to 0 dB, wait a few seconds, then check
that all Alarm/Errors LEDs on the panel are unlit.
(e) Set the Monitor mode to on.
(f) Set the resistance attenuator value to 19 dB, 20 dB and 21 dB. Each time,
wait a few seconds, then check that all Alarm/Errors LEDs on the panel are
unlit.
(g) Replace the coaxial cable with a cable of 10 m or less, then repeat step (c)
through step (f).
3-27
Section 3 Performance Test

(h) Set the Bit rate to 8 M, and repeat step (c) through step (g).
(i) Set the Bit rate to 34 M, and repeat step (c) through step (g).
(j) Set the Bit rate to 139 M, and repeat step (c) through step (g).
(k) Set the Bit rate to 156 M CMI, and repeat step (c) through step (g).

3-28
3.3 Interface Performance Test

3.3.12 AMI/B8ZS Input


(1) Test specifications
Bit rate 1.544 Mbit/s
Input level
Nominal value 3 Vo–p, –6 to 20 dB after passing through 655 feet ABAM
cable.
Addition gain 20 dB

(2) Connection

MP1570A+MP0122A/B
ABAM Resistance
cable attenuator
• • • •
• • • •
Xm
• • • •

Fig. 3-15 AMI/B8ZS Input Level Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-15.
(b) Set the Bit rate to 1.5 M and the DSX to 0 feet.
(c) Set the Monitor mode to off.
(d) Set the resistance attenuator value to 0 dB, wait a few seconds, then check
that all Alarm/Errors LEDs on the panel are unlit.
(e) Set the Monitor mode to on.
(f) Set the resistance attenuator value to 19 dB, 20 dB and 21 dB. Each time,
wait a few seconds, then check that all Alarm/Errors LEDs on the panel are
unlit.

3-29
Section 3 Performance Test

3.3.13 B3ZS Input


(1) Test specifications
Bit rate 44.736 Mbit/s
51.84 Mbit/s
Input level
Nominal value 0.91 Vo–p, –6 to 6 dB +0/450/900 Feet 728 cable
Addition gain 20 dB

(2) Connection

MP1570A+MP0122A/B
Coaxial Resistance
cable attenuator
• • • •
• • • •
Xm
• • • •

Fig. 3-16 B3ZS Input Level Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-16.
(b) Set the Bit rate to 45 M and set the DSX to 0 feet.
(c) Set the Monitor mode to off.
(d) Set the resistance attenuator value to 0 dB and 6 dB, wait a few seconds, then
check that all Alarm/Errors LEDs on the panel are unlit.
(e) Set the Monitor mode to on.
(f) Set the resistance attenuator value to 14 dB and 26 dB. Each time, wait a few
seconds, then check that all Alarm/Errors LEDs on the panel are unlit.
(g) Replace the coaxial cable with a cable of 450 feet, then repeat step (c)
through (f).
(h) Replace the coaxial cable with a cable of 900 feet, then repeat step (c)
through (d).
(i) Set the Bit rate to 52 M, and repeat step (c) through (h).

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3.3 Interface Performance Test

3.3.14 MP0105A Input


(1) Test specifications
Bit rate 155.52 Mbit/s
Input level
Nominal value 1±0.1 Vp–p
Cable loss 0 to 12.7 dB (at 78 MHz for 156 M)
Addition gain 20 dB

(2) Connection

MP1570A+MP0105A
Coaxial Resistance
cable attenuator
• • • •
• • • •
Xm
• • • •

Fig. 3-17 MP0105A Input Level Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-17.
(b) Set the Bit rate to 156 M.
(c) Set the Monitor mode to off.
(d) Set the resistance attenuator value to 0 dB, wait a few seconds, then check
that all Alarm/Errors LEDs on the panel are unlit.
(e) Set the Monitor mode to on.
(f) Set the resistance attenuator value to 19 dB, 20 dB and 21 dB. Each time,
wait a few seconds, then check that all Alarm/Errors LEDs on the panel are
unlit.
(g) Replace the coaxial cable with a cable of 10 m or less, then repeat step (c)
through step (f).

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Section 3 Performance Test

3.3.15 Optical Unit (MP0111A/MP0112A/MP0113A), MP0122B Input


(1) Test specifications
Bit rate 51.84 Mbit/s
155.52 Mbit/s
622.08 Mbit/s
Input level –8 to –33 dBm (for 52 M/156 M)
–8 to –28 dBm (for 622 M)

(2) Connection

MP1570A+Optical unit
Optical Optical
power meter attenuator
• • • •
• • • •
• • • •

Fig. 3-18 Optical Unit Input Level Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-18.
(b) Set the Bit rate to 52 M (1.31).
(c) Vary the optical attenuator value to that the output level of the optical attenu-
ator is –33 dBm (when the bit rate is 622 M, that level is –28 dBm), wait a
few seconds, then check that all Alarm/Errors LEDs on the panel are unlit.
(d) Set the Bit rate to 156 M, and repeat step (c).
(e) Set the Bit rate to 622 M, and repeat step (c).

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3.3 Interface Performance Test

3.3.16 MP0127A/MP0128A/MP0129A, MU150002A, MU150008A/


MU150009A/MU150010A Optical Input
(1) Test specifications
(a) MP0127A/MP0128A/MP0129, MU150008A/MU150009A/MU150010A
Bit rate 2488.32 Mbit/s
Input level –9 to –28 dBm (Narrow, 10 to 30 ºC)
–9 to –27 dBm (Narrow, 0 to 40 ºC)
–9 to –20 dBm (Wide, 10 to 40 ºC)
(b) MU150002A
Bit rate 2488.32 Mbit/s
Input level –8 to –30 dBm

Bit rate 9953.28 Mbit/s


Input level –2 to –16 dBm

(2) Connection

MP1570A Unit
Optical Optical
power meter attenuator
• • • •
• • • •
• • • •

Fig. 3-19 Optical Unit Input Level Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-21.
(b) Set the Bandwidth to Narrow.
(c) Vary the optical attenuator value to that the output level of the optical attenu-
ator is whithin the specificasions, wait a few seconds, then check that all
Alarm/Errors LEDs on the panel are unlit.
(d) Set the Bandwidth to Wide, and repeat step (c).

Note:
To test MU150002A, MU150001A/B is required.

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Section 3 Performance Test

3.3.17 Optical Unit (MP0111A/MP0112A/MP0113A), MP0122B,


MP0127A/MP0128A/MP0129A, MU150002A, MU150008A/
MU150009A/MU150010A Power Meter Accuracy
(1) Test specifications
Absolute accuracy <±1 dB (at –20 dBm)
<±2 dB (at –20 dBm for 2488 Mbit/s)
<±2 dB (at –10 dBm for 9953 Mbit/s)

(2) Connection

MP1570A+Optical unit
Optical Optical
power meter attenuator
• • • •
• • • •
• • • •

Fig. 3-20 Optical Unit Power Meter Accuracy Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-19.
(b) Set the Bit rate to 52 M.
(c) Vary the optical attenuator value to that the output level of the optical power
meter is –20/–10 dBm.
(d) Connect the cable to the optical unit and measure the optical power at
MP1570A opt. power meter screen.
(e) Be sure the optical power is put within the specification.
(f) Set the Bit rate to next higher through 9953 M in turn, and be sure that its
power is put within the specifications.

3-34
3.3 Interface Performance Test

3.3.18 MP0122B, MP0127A/MP0128A/MP0129A, MU150008A/


MU150009A/MU150010A Monitor Input
(1) Test specifications
Bit rate 51.84 Mbit/s
2488.32 Mbit/s
Input level 0.1 to 1 Vp–p

(2) Connection

SDH/SONET analyzer
MP1570A ME3620A (TX)

Data Input
ECL

Fig. 3-20 Monitor Input Test

(3) Test procedure


(a) Connect the cable as shown in Fig. 3-20.
(b) Set the Bit rate to 52 M Electrical.
(c) Set Monitor Input ON.
(d) Set the Bandwidth to Narrow.
(e) Set ME3620A output level within the specification, wait a few seconds, then
check that all Alarm/Errors LEDs on the panel are unlit.
(f) Set the Bandwidth to Wide, and repeat step (e).
(g) Set the Bit rate to 2488 M Electrical, and repeat step (c).

3-35
Section 3 Performance Test

3.3.19 2/34/139 M CMI/HDB3 Drop Output Waveform


Test the Drop output waveform by following these steps:
1. Connect the units as illustrated in (1) depending on the Mapping and interface.
2. Set the Bit rate to 156 M and the Mapping to Async. Mapping.
3. Set the Add to OFF and the Drop to ON.
4. Be sure that the waveform is put within the pulse mask shown in (2).
5. Repeat steps 1 through step 4 to perform test on the Mappings and interfaces.

Note:
The pulse mask in (2) does not consider the amount of attenuation of pad. To
verify the level, perform calculations considering the attenuation.

(1) Connection
• 2 M balanced

MP1570A+MP0121A
+MP0131A+Interface Unit Oscilloscope

Input
Balanced Output 50 Ω
(MP0131A)

120 Ω/50 Ω

Fig. 3-22 HDB3 Drop Output Waveform (Balanced) Test

• 2 M/34 M/139 M unbalanced

MP1570A+MP0121A
+MP0131A+Interface Unit Oscilloscope

Input
Unbalanced Output 50 Ω
(MP0131A)

75 Ω/50 Ω

Fig. 3-23 CMI/HDB3 Drop Output Waveform (Unbalanced) Test

3-36
3.3 Interface Performance Test

(2) Pulse mask


• 2M

V = 100 %
Balanced: 3V
Unbalanced: 2.37 V

• 34 M

3-37
Section 3 Performance Test

• 139 M CMI

Norminal Peak-to-peak voltage (V): 1 ±0.1 V


binary 0

binary 1

3-38
3.3 Interface Performance Test

3.3.20 1.5/45 M AMI/B8ZS/B3ZS Drop Output Waveform


Test the output waveform by the following these steps:
1. Connect the units as illustrated in (1) depending on the Mapping and interface.
2. Set the Bit rate to 156 M and the Mapping to Async. Mapping.
3. Set the Add to OFF and the Drop to ON.
4. When Mapping is 1.5 M (Async.), set the DSX to 655 ft. When 45 M (Async.), set
the DSX to 450 ft.
5. Be sure that the waveform is put within the pulse mask shown in (2).
6. Repeat steps 1 through step 5 to perform test on the Mappings and interfaces.

Note:
The pulse mask in (2) does not consider the amount of attenuation of pad. To
verify the level, perform calculations considering the attenuation.

(1) Connection
• 1.5 M balanced

MP1570A+MP0122A/B
+MP0131A+Interface Unit Oscilloscope

Input
Balanced Output 50 Ω
(MP0131A)

100 Ω/50 Ω

Fig. 3-24 AMI/B8ZS Drop Output Waveform Test

• 45 M unbalanced

MP1570A+MP0122A/B
+MP0131A+Interface Unit Oscilloscope

Input
Unbalanced Output 50 Ω
(MP0131A)

75 Ω/50 Ω

Fig. 3-25 B3ZS Drop Output Waveform Test


3-39
Section 3 Performance Test

(2) Pulse mask


• 1.5 M

Normalized Amplitude Balanced: 2.4 to 3.6 Vo-p


1.5

0.5

-0.5

-1
-1 -0.5 0 0.5 1 1.5
Time, in Unit Intervals

• 45 M

Normalized Amplitude Unbalanced: 0.36 to 0.85 Vo-p


1.5

0.5

-0.5

-1
-1 -0.5 0 0.5 1 1.5
Time, in Unit Intervals

3-40
3.3 Interface Performance Test

3.3.21 CMI/HDB3 Add Input


(1) Test specifications
Bit rate 2.048 Mbit/s
34.368 Mbit/s
139.264 Mbit/s
Input level
Nominal value 2.37±0.237 Vo–p (2 M)
1±0.1 Vo–p (34 M)
1±0.1 Vp–p (139 M)
Cable loss 0 to 6 dB (at 1 MHz for 2 M)
0 to 12 dB (at 17 MHz for 34 M, at 70 MHz for 139 M)

(2) Connection

[1] MP1570A+MP0121A
+MP0131A+Interface Unit [2] MP1570A+MP0121A
Coaxial
cable
• • • • to MP0131A • • • •
• • • • Xm • • • •
• • • • • • • •

Fig. 3-26 CMI/HDB3 Add Input Level Test (Unbalanced)

(3) Test procedure


Test the Add input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-26.
(b) Set the Bit rate of [2] MP1570A to 2 M and the 2 M setting-interface to
Unbalanced.
(c) Set the Bit rate of [1] MP1570A to 156 M and Mapping to 2 M (Async.).
(d) Set the Add to ON and the Drop to OFF. Check that all Alarm/Errors LEDs
on the panel are unlit.
(e) Replace the coaxial cable with a cable of 10 m or less, then check that all
Alarm/Errors LEDs on the panel are unlit.
(f) Set the Bit rate of [2] MP1570A to 34 M. Set the Mapping of [1] MP1570A
to 34 M (Async.) and check LEDs.
(g) Set the Bit rate of [2] MP1570A to 139 M. Set the Mapping of [1] MP1570A
to 139 M (Async.) and check LEDs.

3-41
Section 3 Performance Test

3.3.22 AMI/B8ZS Add Input


(1) Test specifications
Bit rate 1.544 Mbit/s
Input level
Nominal value 3 Vo–p, –3 to 2 dB after passing through 655 feet ABAM
cable.

(2) Connection

[1] MP1570A+MP0122A/B
+MP0131A+Interface Unit [2] MP1570A+MP0122A/B
ABAM
cable
• • • • to MP0131A • • • •
• • • • 655 feet • • • •
• • • • • • • •

Fig. 3-27 AMI/B8ZS Add Input Level Test

(3) Test procedure


Test the Add input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-27.
(b) Set the Bit rate of [2] MP1570A to 1.5 M and the DSX to 0 feet.
(c) Set the Bit rate of [1] MP1570A to 156 M and Mapping to TU11-1.5 M
(Async.).
(d) Set the Add to ON and the Drop to OFF. Check that all Alarm/Errors LEDs
on the panel are unlit.
(e) Replace the ABAM cable with a cable of 10 m or less, then check that all
Alarm/Errors LEDs on the panel are unlit.

3-42
3.3 Interface Performance Test

3.3.23 B3ZS Add Input


(1) Test specifications
Bit rate 44.736 Mbit/s
Input level
Nominal value 0.91 Vo–p, –6 to 6 dB +0/450/900 Feet 728 cable

(2) Connection

[1] MP1570A+MP0122A/B
+MP0131A+Interface Unit [2] MP1570A+MP0122A/B
Coaxial
cable
• • • • to MP0131A • • • •
• • • • 450 feet • • • •
• • • • • • • •

Fig. 3-28 B3 ZS Add Input Level Test

(3) Test procedure


Test the Add input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-28.
(b) Set the Bit rate of [2] MP1570A to 45 M and set the DSX to 0 feet.
(c) Set the Bit rate of [1] MP1570A to 156 M and Mapping to 45 M (Async.).
(d) Set the Add to ON and the Drop to OFF. Check that all Alarm/Errors LEDs
on the panel are unlit.
(e) Replace the coaxial cable with a cable of 900 feet, then check that all Alarm/
Errors LEDs on the panel are unlit.

3-43
Section 3 Performance Test

3.3.24 MP0127A/MP0128A/MP0129A, MU150008A/MU150009A/


MU150010A Receive Clock Output
1. Waveform level
(1) Test specifications
Frequency 2488.32 MHz
Level ECL (AC) nominal 0.7 Vp–p

(2) Connection

MP1570A+Unit Oscilloscope
Recieve
• • • • clock output
• • • • Trig
156 M Sync.
• • • • 50 Ω
Input
Input
Output 50 Ω

Fig. 3-29 Recieve Clock Output Test

(3) Test procedure


Test the output waveform by following steps:
(a) Connect the cable as shown in Fig. 3-29.
(b) Set the Bit rate to 2488 M.
(c) Be sure the waveform level is put within the specifications.

3-44
3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

3.4 Jitter Performance Test (MP0124A/MP0125A/


MP0126A)
3.4.1 Frequency Offset Accuracy
(1) Test specifications
Frequency
MP0124A MP0125A MP0126A MP0130A
2.048 MHz 1.544 MHz 2.048 MHz 1.544 MHz 2488.32 MHz
8.448 MHz 44.736 MHz 8.448 MHz 44.736 MHz
34.368 MHz 51.84 MHz 34.368 MHz 51.84 MHz
139.264 MHz 155.520 MHz 139.264 MHz
155.520 MHz 622.080 MHz 155.520 MHz
622.080 MHz 622.080 MHz
Offset MP0124A/25A/26A ±999.9 ppm/0.1 ppm
MP0130A ±70 ppm/0.1 ppm
Accuracy ±0.1 ppm

(2) Connection

MP1570A+Unit MP0124A/25A/26A Frequency counter


Clock sync Output
MP0130A
• • • • CLK Output
• • • • Input
• • • •

Fig. 3-30 Frequency Offset Accuracy Test

(3) Test procedure


Test the clock accuracy by following steps:
(a) Connect the cables as shown in Fig. 3-30.
(b) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(c) Set the Jitter to off.
(d) Set the Offset to 0.0 ppm.
(e) Be sure the frequency accuracy is put within the specification.
(f) Set the Offset to –999.9 ppm.
(g) Be sure the frequency accuracy is put within the specification.
(h) Set the Offset to +999.9 ppm.
(i) Be sure the frequency accuracy is put within the specification.
(j) Set the Bit rate to next higher through 622 M in turn, and be sure that its value
is put within the specifications.

3-45
Section 3 Performance Test

(k) Set the Bit rate to 2488 M.


(l) Set the Jitter to off.
(m) Set the Offset to 0.0 ppm.
(n) Be sure the frequency accuracy is put within the specification.
(o) Set the Offset to –70 ppm.
(p) Be sure the frequency accuracy is put within the specification.
(q) Set the Offset to +70 ppm.
(r) Be sure the frequency accuracy is put within the specification.

3-46
3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

3.4.2 10 MHz Lock Signal Input


(1) Test specifications
Frequency 10 MHz
Level 0 to 10 dBm (50 Ω)
Frequency offset ±50 ppm

(2) Connection

MP1570A+Unit MP0124A/25A/26A Oscilloscope


Clock sync Output
MP0130A
• • • • CLK Output
• • • • Input Trig
• • • • Ext. 10 M
Ref Input

2ch signal generator

CH1 CH2

Fig. 3-31 10 MHz lock Signal Input Test

(3) Test procedure


Test the 10 MHz lock signal input by following steps:
(a) Ensure the loop-back for the bit rate that should be measured.
(b) Set the Bit rate to 1.5 M (Lowest Bit rate of the interface unit).
(c) Set the Clock to Lock 10 MHz.
(d) Connect the cable as shown in Fig. 3-31.
(e) Set the signal generator frequency of channel A to 10 MHz and channel B to
8 kHz, wait a few seconds, then check that all Alarm/Errors LEDs on the
panel are unlit.
(f) Be sure that clock loss LED is lit when the 10 M lock input connector is open.
(g) Set the signal generator frequency of both channel offset to +50 ppm through
–50 ppm. Each time, wait a few seconds, then check that all Alarm/Errors
LEDs on the panel are unlit.
(h) Be sure that the Clock sync output signal from MP1570A synchronizes with
signal from signal generator.
(i) Set the Bit rate to next higher through 622 M, then repeat step (f) through
step (h).
(j) Set the Bit rate to 2488 M.

3-47
Section 3 Performance Test

(k) Set the signal generator frequency of both channel offset to +50 ppm through
–50 ppm. Each time, wait a few seconds, then check that all Alarm/Errors
LEDs on the panel are unlit.
(l) Be sure that the CLK output signal from MP0130A synchronizes with signal
from signal generator.

3-48
3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

3.4.3 Jitter Tx Amplitude Accuracy


(1) Test specifications
Bit rate
MP0124A MP0125A MP0126A MP0130A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Amplitude accuracy
2 UI range: ±5 %±0.05 UIp–p/at fr Hz
20 UI range: ±5 %±0.3 UIp–p/at fr Hz
Where,
fr= 500 Hz (1.5 M/20 UI range), fr= 100 kHz (156 M, 622 M, 2488 M/2 UI
range),
fr= 20 kHz (2488 M/20 UI range), fr= 1 kHz (others)

(2) Connection

MP1570A+Unit Spectrum analyzer


MP0130A
CLK Output
• • • •
• • • • Input
• • • •
50 Ω

MP0124A/25A/26A
Clock Sync

Fig. 3-32 Jitter Tx Amplitude Accuracy Test

(3) Test procedure


Test the jitter Tx amplitude accuracy by following steps.
(a) Set the Spectrum analyzer as follows
Center frequency: 1.544 kHz or 2048 kHz (Lowest Bit rate of
the interface unit).
Reference level: +10 dBm
Video bandwidth: 100 Hz
Frequency span: 5 kHz
Sweep time: 1.0 s
Resolution bandwidth: 100 Hz
(b) Connect the cable as shown in Fig. 3-32
(c) Set the Bit rate to 2 M or 1.5 M.
3-49
Section 3 Performance Test

(d) Set the Jitter to “ON”.


(e) Set the Range to 2 UI.
(f) Set the Modulation frequency to fr=1000 Hz.
(g) Adjust the Jitter amplitude until the first bessel null is observed on the Spec-
trum analyzer. (See Fig. 3-33)
(h) Be sure that the Jitter Tx amplitude is satisfied the table 3-32.
(i) Adjust the jitter amplitude until the second bessel null is observed on the
Spectrum analyzer.
(j) Be sure that the Jitter Tx amplitude is satisfied the table 3-32.
(k) Set the Range to 20 UI.
(l) Check the Jitter Tx amplitude accuracy for each value in table 3-33.
(m) Set the Bit rate to next higher through 2488 M in turn, and be sure that its
value is put within the specifications.

Table 3-2 2 UI Range Jitter Tx Amplitude Accuracy Test Limit


Jitter Amplitude Minimum Amplitude Maximum Amplitude
(UIp–p) (UIp–p) (UIp–p)
First Bessel Null 0.765 0.676 0.853
Second Bessel Null 1.757 1.619 1.894

Table 3-3 20 UI Range Jitter Tx Amplitude Accuracy Test Limit


Jitter Amplitude Minimum Amplitude Maximum Amplitude
(UIp–p) (UIp–p) (UIp–p)
Bessel Null 19.01 17.76 20.20

Fig. 3-33 Example of Bessel Null

3-50
3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

3.4.4 External Jitter Modulation Input (75 Ω)


(1) Test specifications
Bit rate
MP0124A MP0125A MP0126A MP0130A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Sensitivity
2 UI range: nominal 2 UI/1 Vp–p
20 UI range: nominal 20 UI/1 Vp–p
800 UI range: nominal 800 UI/1 Vp–p (2488 M)

(2) Connection

MP1570A+Unit Signal generator

Ext. Mod
• • • • Input
• • • • Output
• • • •
75 Ω

Fig. 3-34 External Jitter Modulation Input Test

(3) Test procedure


Test the input signal level by following steps:
(a) Connect the cable as shown in Fig. 3-34.
(b) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(c) Set the Jitter to “ON”.
(d) Set the Range to 2 UI.
(e) Set the Modulation source to External.
(f) Set the signal generator as follows.
Frequency: 1000 Hz
Amplitude: 0.5 Vp–p
(g) Be sure that the Jitter Tx amplitude is satisfied for the specifications.
(h) Set the Bit rate to next higher through 622 M in turn.
(i) Set the Range to 20 UI, then repeat step 6 through step (h).
(j) Set the Bit rate to 2488 M.
(k) Set the Jitter to “ON”.
(l) Set the Range to 2 UI.

3-51
Section 3 Performance Test

(m) Set the Modulation source to External.


(n) Set the signal generator as follows.
Frequency: 100 kHz
Amplitude: 0.5 Vp–p
(o) Be sure that the Jitter Tx amplitude is satisfied for the specifications.
(p) Set the Range to 32 UI.
(q) Set the signal generator as follows.
Frequency: 20 kHz
Amplitude: 0.5 Vp–p
(r) Be sure that the Jitter Tx amplitude is satisfied for the specifications.
(s) Set the Range to 800 UI.
(t) Set the signal generator as follows.
Frequency: 10 Hz
Amplitude: 0.5 Vp–p
(u) Be sure that the Jitter Tx amplitude is satisfied for the specifications.

3-52
3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

3.4.5 Jitter Reference Clock Output


(1) Test specifications
Bit rate
MP0124A MP0125A MP0126A MP0130A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Level ECL (AC) nominal 0.8 Vp–p

(2) Connection

MP1570A+Unit Oscilloscope
Ref Clk
• • • • Output
• • • • Input Trig
• • • •

MP0124A/25A/26A
Clock sync Output
MP0130A
CLK Output

Fig. 3-35 Jitter Reference Clock Output Test

(3) Test procedure


Test the output waveform by following steps:
(a) Connect the cable as shown in Fig. 3-35.
(b) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(c) Set the Jitter to “OFF”.
(d) Be sure the waveform level is put within the specifications.
(e) Set the Bit rate to next higher through 2488 M in turn, and be sure that its
level is put within the specifications.

3-53
Section 3 Performance Test

3.4.6 Jitter Rx Accuracy


(1) Test specifications
Bit rate
MP0124A MP0125A MP0126A MP0130A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Meas. Accuracy
[UIpp]: ±5 %±W UIpp at fr Hz
Additional 0.01 UIpp/dB at 156 Mbit/s Opt with input level
<–25 dBm
Additional 0.01 UIpp/dB at 622 Mbit/s Opt with input level
<–20 dBm
Additional 0.01 UIpp/dB at 2488 Mbit/s Opt with input level
–12 dBm to –10 dBm
[UIrms]: ±5 %±Y UIpp at fr Hz
Additional 0.002 UIrms/dB at 156 Mbit/s Opt with input level
<–25 dBm
Additional 0.002 UIrms/dB at 622 Mbit/s Opt with input level
<–20 dBm
Additional 0.002 UIrms/dB at 2488 Mbit/s Opt with input level
–12 dBm to –10 dBm

3-54
3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

Frequency response error referring to error at fr Hz


±5 % (2 to 20 Hz), ±2 % (20 Hz to 300 kHz), ±3 % (300 k to 1
MHz),
±5 % (1 to 3 MHz), ±10 % (3 to 20 MHz),
fr= 100 kHz (156 M, 622 M, 2488 M/2 UI range), fr= 500 Hz (1.5
M/20 UI range)
fr= 20 kHz (2488 M/32 UI range), fr= 1 kHz (others)

Bit rate W (UIp-p)** Y (UIrms)***


(Mbit/s) 2 UI 20 UI 32 UI 2 UI 20 UI 32 UI
1.544 0.040 0.22 – 0.006 0.04 –
2.048 0.040 0.22 – 0.006 0.04 –
8.448 0.040 0.22 – 0.006 0.04 –
34.368 0.040 0.22 – 0.017 0.04 –
44.736 0.040 0.22 – 0.006 0.04 –
139.264 0.040 0.30 – 0.022 0.06 –
51.84 0.040 0.22 – 0.017 0.05 –
155.52 (CLK) 0.035 0.20 – 0.017 0.05 –
155.52 (CMI) 0.070 0.30 – 0.022 0.06 –
155.52 (Opt)* 0.070 0.30 – 0.022 0.06 –
622.08 (CLK) 0.050 0.20 – 0.027 0.07 –
622.08 (Opt)* 0.100 0.30 – 0.032 0.08 –
2488.32 (CLK) 0.030 – 0.60 0.007 – 0.35
2488.32 (Opt)* 0.110 – 2.2 0.027 – 0.55
* +10 to +40 ºC
** with HP1+LP
*** with HP+LP, option 01

3-55
Section 3 Performance Test

(2) Connection

MP1570A+Unit

• • • •
• • • •
• • • •

2/8/34/139/156 M CMI : 75 Ω CMI/HDB3 output to 75 Ω CMI/HDB3 input


1.5 M : 100 Ω AMI/B8ZS output to 100 Ω AMI/B8ZS input
45 M/52 M : 75 Ω B3ZS output to 75 Ω B3ZS input

For 1.5 M, 2 M, 8 M, 34 M, 45 M, 139 M, 52 M, 156 M (CMI) test

MP1570A+Unit MP1570A+Unit

• • • • • • • •
• • • • • • • •
• • • • • • • •

156 M/622 M STM-16 : Output to Input


MP0105A: CMI output to CMI input For 2488 M test
MP0108A: Data output to Data input
Clock output to Clock input
Optical unit: Output to input

For MP0105A, MP0108A, MP0111A, MP0112A, MP0113A test

Fig. 3-36 Jitter Rx Accuracy Test

(3) Test procedure


Test the Jitter Rx accuracy by following steps.
(a) Before this test, check the Jitter TX amplitude accuracy according to the
3.4.3 “Jitter Tx amplitude accuracy test”.
(b) Connect the cables as shown in Fig. 3-36. In case of MP0108A, then connect
both clock and data.
(c) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(d) Set the Jitter to “ON”.
(e) Set the Modulation frequency to fr Hz.
(f) Set the Range to 2 UIp–p.
3-56
3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

(g) Set the Filter to “HP1+LP”.


(h) Adjust the Amplitude on the Jitter Tx display to 1.00 UIp–p.
(i) Set the Unit to UIp–p on the Result display.
(j) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-4.
(k) Set the Range to 20 UIp–p.
(l) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(m) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-4.
(n) Set the Bit rate to next higher through 622 M in turn, and be sure that its value
is put within the specifications.
(o) Set the Bit rate to 2488 M.
(p) Set the Jitter to “ON”.
(q) Set the Modulation frequency to fr Hz.
(r) Set the Range to 2 UIp–p.
(s) Set the Filter to “HP1+LP”.
(t) Adjust the Amplitude on the Jitter Tx display to 1.00 UIp–p.
(u) Set the Unit to UIp–p on the Result display.
(v) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-4.
(w) Set the Range to 32 UIp–p.
(x) Adjust the amplitude on the Jitter Tzx display to 10.0 UIp–p.
(y) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-4.

Table 3-4 Jitter Rx Accuracy Test Limit


Range 2 UI range 20 UI range 32 UI range
Unit UIp–p UIp–p UIp–p
MIN/MAX MIN MAX MIN MAX MIN MAX
1.5 M AMI/B8ZS 0.91 1.09 9.28 10.72
2 M HDB3 0.91 1.09 9.28 10.72
8 M HDB3 0.91 1.09 9.28 10.72
34 M HDB3 0.91 1.09 9.28 10.72
45 M B3ZS 0.91 1.09 9.28 10.72
139 M CMI 0.91 1.09 9.20 10.80
52 M B3ZS 0.91 1.09 9.28 10.72
CMI 0.88 1.12 9.20 10.80
CLOCK 0.915 1.085 9.30 10.70
156 M
OPTICAL
0.880 1.120 9.20 10.80
INTERFACE
CLOCK 0.900 1.100 9.30 10.70
622 M OPTICAL
0.850 1.150 9.20 10.80
INTERFACE
CLOCK 0.92 1.08 9.39 11.1
2488 M OPTICAL 0.84 1.16 7.3 12.7
INTERFACE

3-57
Section 3 Performance Test

3.4.7 Jitter Demodulation Output


(1) Test specifications
Demodulation output
2 UI range nominal 1 Vp–p/2 UIp–p
20 UI range nominal 1 Vp–p/20 UIp–p
32 UI range nominal 1 Vp–p/32 UIp–p (2488 M)

(2) Connection

MP1570A+Unit Oscilloscope

• • • •
• • • • Input
• • • •

Jitter
Demod.
output

Fig. 3-37 Jitter Demodulation Output Test

(3) Test procedure


Test the Jitter demodulation output test by following steps:
(a) Connect the cable as shown in Fig. 3-37.
(b) Ensure the loop-back for the bit rate that should be measured.
(c) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(d) Set the Jitter to “ON”.
(e) Set the Range to 2 UI.
(f) Set the Modulation frequency to fr=1000 Hz.
(g) Adjust the amplitude on the Jitter Tx display to 1.00 UIp–p.
(h) Be sure the waveform level is put within specifications.
(i) Set the Range to 20 UI.
(j) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(k) Be sure the waveform level is put within specifications.
(l) Set the Bit rate to 2488 M.
(m) Set the Jitter to “ON”.
(n) Set the Range to 2 UI.
(o) Set the Modulation frequency to fr=1000 Hz.
(p) Adjust the amplitude on the Jitter Tx display to 1.00 UIp–p.
(q) Be sure the waveform level is put within specifications.
(r) Set the Range to 32 UI.
(s) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(t) Be sure the waveform level is put within specifications.

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3.4 Jitter Performance Test (MP0124A/MP0125A/MP0126A)

3.4.8 Jitter Reference Clock Input


(1) Test specifications
Bit rate
MP0124A MP0125A MP0126A MP0130A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Level ECL (50 Ω) nominal 0.8 Vp–p

(2) Connection

MP1570A+Unit

• • • •
• • • •
Jitter Ref. clock input
• • • •

Jitter Ref.
clock output

Fig. 3-38 Jitter Reference Clock Input Test

(3) Test procedure


Test the Jitter reference clock input by following steps:
(a) Connect the cable as shown in Fig. 3-38.
(b) Ensure the loop-back for the bit rate that should be measured.
(c) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(d) Set the Ref input to External.
(e) Set the Jitter to “ON”.
(f) Set the Modulation frequency to fr=1000 Hz.
(g) Set the Range to 20 UIp–p.
(h) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(i) Be sure that the Jitter Rx amplitude is displayed 10 UIp–p.
(j) Set the Bit rate to next higher through 622 M in turn, and be sure that its value
is put within specifications.
(k) Set the Bit rate to 2488 M.
(l) Set the Ref input to External.
(m) Set the Jitter to “ON”.
(n) Set the Modulation frequency to fr=1000 Hz.
(o) Set the Range to 32 UIp–p.
(p) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(q) Be sure that the Jitter Rx amplitude is displayed 10 UIp–p.
3-59
Section 3 Performance Test

3.4.9 Wander Reference Output/Input


(1) Test specifications
Bit rate
MP0124A MP0125A MP0126A MP0130A
2.048 Mbit/s 1.544 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 2.048 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 8.448 Mbit/s
139.264 Mbit/s 155.52 Mbit/s 34.368 Mbit/s
155.52 Mbit/s 622.08 Mbit/s 44.736 Mbit/s
622.08 Mbit/s 51.84 Mbit/s
139.264 Mbit/s
155.52 Mbit/s
622.08 Mbit/s

(2) Connection

MP1570A+Unit

• • • •
• • • •
• • • •
Wander Ref.
input

Wander Ref.
CLK output

Fig. 3-39 Wander Reference Output/Input Test

(3) Test procedure


Test the reference clock output by following steps:
(a) Connect the cable as shown in Fig. 3-39.
(b) Ensure the loop-back for the bit rate that should be measured.
(c) Set the Bit rate to 2 M or 1.5 M. (Lowest Bit rate of the interface unit)
(d) Set the Ref input to Ref output (same frequency).
(e) Set the Rx Meas. select to Jitter & Wander.
(f) Set the Mode to single 10 sec.
(g) Press Start/stop key to initiate the measurement.
(h) Be sure that Ref Loss isn’t displayed on the screen.
(i) Set the Bit rate to next higher through 2488 M in turn, and be sure that its
value is put within specifications.

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3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

3.5 Jitter Performance Test (MU150005A/MU150006A/


MU150007A/MU150011A)
3.5.1 Frequency Offset Accuracy
(1) Test specifications
Frequency
MU150005A MU150006A MU150007A MU150011A
2.048 MHz 1.544 MHz 2.048 MHz 1.544 MHz 2488.32 MHz
8.448 MHz 44.736 MHz 8.448 MHz 44.736 MHz
34.368 MHz 51.84 MHz 34.368 MHz 51.84 MHz
139.264 MHz 155.520 MHz 139.264 MHz
155.520 MHz 622.080 MHz 155.520 MHz
622.080 MHz 622.080 MHz
Offset MU150005A/6A/7A ±999.9 ppm/0.1 ppm
MU150011A ±100 ppm/0.1 ppm
Accuracy ±0.1 ppm

(2) Connection

MP1570A+Unit MU150005A/6A/7A Frequency counter


Clock sync Output
MU150011A
• • • • CLK Output
• • • • Input
• • • •

Fig. 3-40 Frequency Offset Accuracy Test

(3) Test procedure


Test the clock accuracy by following steps:
(a) Connect the cables as shown in Fig. 3-40.
(b) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(c) Set the Jitter to off.
(d) Set the Offset to 0.0 ppm.
(e) Be sure the frequency accuracy is put within the specification.
(f) Set the Offset to –999.9 ppm.
(g) Be sure the frequency accuracy is put within the specification.
(h) Set the Offset to +999.9 ppm.
(i) Be sure the frequency accuracy is put within the specification.
(j) Set the Bit rate to next higher through 622 M in turn, and be sure that its value
is put within the specifications.

3-61
Section 3 Performance Test

(k) Set the Bit rate to 2488 M.


(l) Set the Jitter to off.
(m) Set the Offset to 0.0 ppm.
(n) Be sure the frequency accuracy is put within the specification.
(o) Set the Offset to –100 ppm.
(p) Be sure the frequency accuracy is put within the specification.
(q) Set the Offset to +100 ppm.
(r) Be sure the frequency accuracy is put within the specification.

3-62
3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

3.5.2 10 MHz Lock Signal Input


(1) Test specifications
Frequency 10 MHz
Level 0 to 10 dBm (50 Ω)
Frequency offset ±50 ppm

(2) Connection

MP1570A+Unit MU150005A/6A/7A Oscilloscope


Clock sync Output
MU150011A
• • • • CLK Output
• • • • Input Trig
• • • • Ext. 10 M
Ref Input

2ch signal generator

CH1 CH2

Fig. 3-41 10 MHz Lock Signal Input Test

(3) Test procedure


Test the 10 MHz lock signal input by following steps:
(a) Ensure the loop-back for the bit rate that should be measured.
(b) Set the Bit rate to 1.5 M (Lowest Bit rate of the interface unit).
(c) Set the Clock to Lock 10 MHz.
(d) Connect the cable as shown in Fig. 3-41.
(e) Set the signal generator frequency of channel A to 10 MHz and channel B to
8 kHz, wait a few seconds, then check that all Alarm/Errors LEDs on the
panel are unlit.
(f) Be sure that clock loss LED is lit when the 10 M lock input connector is open.
(g) Set the signal generator frequency of both channel offset to +50 ppm through
–50 ppm. Each time, wait a few seconds, then check that all Alarm/Errors
LEDs on the panel are unlit.
(h) Be sure that the Clock sync output signal from MP1570A synchronizes with
signal from signal generator.
(i) Set the Bit rate to next higher through 622 M, then repeat step (g) through
step (h).
(j) Set the Bit rate to 2488 M.

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Section 3 Performance Test

(k) Set the signal generator frequency of both channel offset to +50 ppm through
–50 ppm. Each time, wait a few seconds, then check that all Alarm/Errors
LEDs on the panel are unlit.
(l) Be sure that the CLK output signal from MU150011A synchronizes with
signal from signal generator.

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3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

3.5.3 Jitter Tx Amplitude Accuracy


(1) Test specifications
Bit rate
MU150005A MU150006A MU150007A MU150011A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Amplitude accuracy
2 UI range: (±0 % of setting) ±0.02 UIp–p
16 UI range: (±0 % of setting) ±0.3 UIp–p
80 UI range: (±0 % of setting) ±1.2 UIp–p
400 UI range: (±0 % of setting) ±6.0 UIp–p
800 UI range: (±0 % of setting) ±12.5 UIp–p

Bit Rate (bit/s) Variable Error Q Frequency Range (Hz)


±12 % 0.1 to 2
1.544 M
±8 % 2 to 40 k
±12 % 0.1 to 10
2.048 M
±8 % 10 to 100 k
±12 % 0.1 to 20
8.448 M
±8 % 20 to 400 k
±12 % 0.1 to 100
34.368 M ±8 % 100 to 500 k
±12 % 500 k to 800 k
±12 % 0.1 to 2
44.736 M
±8 % 2 to 400 k
±12 % 0.1 to 100
±8 % 100 k to 500 k
139.264 M
±12 % 500 k to 2 M
±15 % 2M to 3.5 M
±12 % 0.1 to 300
51.84 M
±8 % 300 to 400 k
±12 % 0.1 to 500
155.52 M ±8 % 500 to 500 k
±12 % 500 k to 1.5 M
±12 % 0.1 to 1k
±8 % 1k to 500 k
622.08 M
±12 % 500 k to 2M
±15 % 2M to 6M

3-65
Section 3 Performance Test

Bit Rate (bit/s) Variable Error Q Frequency Range (Hz)


±12 % 0.1 to 5k
±8 % 5 k to 500 k
2488.32 M
±12 % 500 k to 2 M
±15 % 2 M to 20 M

(2) Connection

MP1570A+Unit Spectrum analyzer


MU150011A
CLK Output
• • • •
• • • • Input
• • • •
50 Ω

MU150005A/6A/7A
Clock Sync

Fig. 3-42 Jitter Tx Amplitude Accuracy Test

(3) Test procedure


Test the jitter Tx amplitude accuracy by following steps.
(a) Set the Spectrum analyzer as follows
Center frequency: 1.544 kHz or 2048 kHz (Lowest Bit rate of
the interface unit).
Reference level: +10 dBm
Video bandwidth: 100 Hz
Frequency span: 5 kHz
Sweep time: 1.0 s
Resolution bandwidth: 100 Hz
(b) Connect the cable as shown in Fig. 3-42
(c) Set the Bit rate to 2 M or 1.5 M.
(d) Set the Jitter to “ON”.
(e) Set the Range to 2 UI.
(f) Set the Modulation frequency to fr=1000 Hz.
(g) Adjust the Jitter amplitude until the first bessel null is observed on the Spec-
trum analyzer. (See Fig. 3-43)
(h) Be sure that the Jitter Tx amplitude is satisfied the table 3-42.
(i) Adjust the jitter amplitude until the second bessel null is observed on the
Spectrum analyzer.
(j) Be sure that the Jitter Tx amplitude is satisfied the table 3-42.
(k) Set the Range to 16 UI.
(l) Check the Jitter Tx amplitude accuracy for each value in table 3-43.

3-66
3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

(m) Set the Bit rate to next higher through 2488 M in turn, and be sure that its
value is put within the specifications.

Table 3-5 2 UI Range Jitter Tx Amplitude Accuracy Test Limit


Jitter amplitude Minimum amplitude Maximum amplitude
(UIp–p) (UIp–p) (UIp–p)
First Bessel Null 0.765 0.684 0.846
Second Bessel Null 1.757 1.596 1.918

Table 3-6 16 UI Range Jitter Tx Amplitude Accuracy Test Limit


Jitter amplitude Minimum amplitude Maximum amplitude
(UIp–p) (UIp–p) (UIp–p)
Bessel Null 14.75 13.27 16.23

Fig. 3-43 Example of Bessel Null

3-67
Section 3 Performance Test

3.5.4 Jitter Reference Clock Output


(1) Test specifications
Bit rate
MU150005A MU150006A MU150007A MU150011A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Level ECL (AC) nominal 0.8 Vp–p

(2) Connection

MP1570A+Unit Oscilloscope
Ref Clk
• • • • Output
• • • • Input Trig
• • • •

MU150005A/6A/7A
Clock sync Output
MU150011A
CLK Output

Fig. 3-44 Jitter Reference Clock Output Test

(3) Test procedure


Test the output waveform by following steps:
(a) Connect the cable as shown in Fig. 3-44.
(b) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(c) Set the Jitter to “OFF”.
(d) Be sure the waveform level is put within the specifications.
(e) Set the Bit rate to next higher through 2488 M in turn, and be sure that its
level is put within the specifications.

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3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

3.5.5 Jitter Rx Accuracy


(1) Test specifications
Bit rate
MU150005A MU150006A MU150007A MU150011A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Meas. Accuracy
[UIp-p]: ±5 %±W UIp-p at fr Hz
Additional 0.01 UIp-p/dB at 156 Mbit/s Opt with input level
<–25 dBm
Additional 0.01 UIp-p/dB at 622 Mbit/s Opt with input level
<–20 dBm
Additional 0.01 UIp-p/dB at 2488 Mbit/s Opt with input level
–12 dBm to –10 dBm
[UIrms]: ±5 %±Y UIp-p at fr Hz
Additional 0.002 UIrms/dB at 156 Mbit/s Opt with input level
<–25 dBm
Additional 0.002 UIrms/dB at 622 Mbit/s Opt with input level
<–20 dBm
Additional 0.002 UIrms/dB at 2488 Mbit/s Opt with input level
–12 dBm to –10 dBm

3-69
Section 3 Performance Test

Frequency response error referring to error at fr Hz


±5 % (2 to 20 Hz), ±2 % (20 Hz to 300 kHz), ±3 % (300 k to 1
MHz),
±5 % (1 to 3 MHz), ±10 % (3 to 20 MHz),
fr= 100 kHz (156 M, 622 M, 2488 M/2 UI range), fr= 500 Hz (1.5
M/16 UI range)
fr= 20 kHz (2488 M/32 UI range), fr= 10 Hz (400/800UI range),
fr= 1 kHz (others)

Bit rate W (UIp-p)** Y (UIrms)***


(Mbit/s) 2 UI 20 UI 32 UI 2 UI 20 UI 32 UI
1.544 0.040 0.22 – 0.006 0.04 – PRBS 220–1
2.048 0.040 0.22 – 0.006 0.04 – PRBS 215–1
8.448 0.040 0.22 – 0.006 0.04 – PRBS 215–1
34.368 0.040 0.22 – 0.008 0.05 – PRBS 223–1
44.736 0.040 0.22 – 0.008 0.05 – PRBS 215–1
139.264 0.040 0.30 – 0.008 0.05 – PRBS 223–1
51.84 0.040 0.30 – 0.010 0.06 – VC3 PRBS 223–1
155.52 (CLK) 0.050 0.22 – 0.008 0.05 –
VC4
155.52 (CMI) 0.070 0.30 – 0.010 0.06 –
PRBS 223–1
155.52 (Opt)* 0.070 0.30 – 0.010 0.06 –
622.08 (CLK) 0.050 0.22 – 0.010 0.06 – VC4-4C
622.08 (Opt)* 0.100 0.30 – 0.012 0.08 – PRBS 223–1
2488.32 (CLK) 0.050 – 0.60 0.010 – 0.06 VC4-16C
2488.32 (Opt)* 0.100 – 2.2 0.012 – 0.08 PRBS 223–1
* +10 to +40 ºC
** with HP1+LP
*** with HP+LP, option 01

3-70
3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

(2) Connection

MP1570A+Unit

• • • •
• • • •
• • • •

2/8/34/139/156 M CMI : 75 Ω CMI/HDB3 output to 75 Ω CMI/HDB3 input


1.5 M : 100 Ω AMI/B8ZS output to 100 Ω AMI/B8ZS input
45 M/52 M : 75 Ω B3ZS output to 75 Ω B3ZS input

For 1.5 M, 2 M, 8 M, 34 M, 45 M, 139 M, 52 M, 156 M (CMI) test

MP1570A+Unit MP1570A+Unit

• • • • • • • •
• • • • • • • •
• • • • • • • •

156 M/622 M STM-16 : Output to Input


MP0105A: CMI output to CMI input For 2488 M test
MP0108A: Data output to Data input
Clock output to Clock input
Optical unit: Output to input

For MP0105A, MP0108A, MP0111A, MP0112A, MP0113A test

Fig. 3-45 Jitter Rx Accuracy Test

(3) Test procedure


Test the Jitter Rx accuracy by following steps.
(a) Before this test, check the Jitter TX amplitude accuracy according to the
3.5.3 “Jitter Tx amplitude accuracy”.
(b) Connect the cables as shown in Fig. 3-45. In case of MP0108A, then connect
both clock and data.
(c) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(d) Set the Jitter to “ON”.
(e) Set the Modulation frequency to fr Hz.
(f) Set the Range to 2 UIp–p.
3-71
Section 3 Performance Test

(g) Set the Filter to “HP1+LP”.


(h) Adjust the Amplitude on the Jitter Tx display to 1.00 UIp–p.
(i) Set the Unit to UIp–p on the Result display.
(j) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-7.
(k) Set the Range to 20 UIp–p.
(l) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(m) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-7.
(n) Set the Bit rate to next higher through 622 M in turn, and be sure that its value
is put within the specifications.
(o) Set the Bit rate to 2488 M.
(p) Set the Jitter to “ON”.
(q) Set the Modulation frequency to fr Hz.
(r) Set the Range to 2 UIp–p.
(s) Set the Filter to “HP1+LP”.
(t) Adjust the Amplitude on the Jitter Tx display to 1.00 UIp–p.
(u) Set the Unit to UIp–p on the Result display.
(v) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-7.
(w) Set the Range to 32 UIp–p.
(x) Adjust the amplitude on the Jitter Tzx display to 10.0 UIp–p.
(y) Be sure that the Jitter Rx amplitude is satisfied for the value in the table 3-7.

Table 3-7 Jitter Rx Accuracy Test Limit


Range 2 UI range 20 UI range 32 UI range
Unit UIp–p UIp–p UIp–p
MIN/MAX MIN MAX MIN MAX MIN MAX
1.5 M AMI/B8ZS 0.91 1.09 9.28 10.72
2 M HDB3 0.91 1.09 9.28 10.72
8 M HDB3 0.91 1.09 9.28 10.72
34 M HDB3 0.91 1.09 9.28 10.72
45 M B3ZS 0.91 1.09 9.28 10.72
139 M CMI 0.91 1.09 9.20 10.80
52 M B3ZS 0.88 1.12 9.20 10.80
CMI 0.88 1.12 9.20 10.80
156 M CLOCK 0.9 1.10 9.28 10.72
OPTICAL
0.88 1.12 9.20 10.80
INTERFACE
CLOCK 0.900 1.100 9.28 10.72
622 M OPTICAL
0.85 1.15 9.20 10.80
INTERFACE
CLOCK 0.90 1.10 9.39 11.1
2488 M OPTICAL 0.84 1.15 7.3 12.7
INTERFACE

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3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

3.5.6 Jitter Demodulation Output


(1) Test specifications
Demodulation output
2 UI range nominal 1 Vp–p/2 UIp–p
20 UI range nominal 1 Vp–p/20 UIp–p
32 UI range nominal 1 Vp–p/32 UIp–p (2488 M)
400 UI range nominal 1 Vp–p/400 UIp–p

(2) Connection

MP1570A+Unit Oscilloscope

• • • •
• • • • Input
• • • •

Jitter
Demod.
output

Fig. 3-46 Jitter Demodulation Output Test

(3) Test procedure


Test the Jitter demodulation output test by following steps:
(a) Connect the cable as shown in Fig. 3-46.
(b) Ensure the loop-back for the bit rate that should be measured.
(c) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(d) Set the Jitter to “ON”.
(e) Set the Range to 2 UI.
(f) Set the Modulation frequency to fr=1000 Hz.
(g) Adjust the amplitude on the Jitter Tx display to 1.00 UIp–p.
(h) Be sure the waveform level is put within specifications.
(i) Set the Range to 20 UI.
(j) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(k) Be sure the waveform level is put within specifications.
(l) Set the Modulation frequency to fr=10 Hz
(m) Adjust the amplitude on the Tx to 200 UIp-p.
(n) Be sure the wave form level is put within specifications.
(o) Set the Bit rate to 2488 M.
(p) Set the Jitter to “ON”.
(q) Set the Range to 2 UI.
(r) Set the Modulation frequency to fr=1000 Hz.
(s) Adjust the amplitude on the Jitter Tx display to 1.00 UIp–p.
(t) Be sure the waveform level is put within specifications.

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Section 3 Performance Test

(u) Set the Range to 32 UI.


(v) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(w) Be sure the waveform level is put within specifications.

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3.5 Jitter Performance Test (MU150005A/MU150006A/MU150007A/MU150011A)

3.5.7 Jitter Reference Clock Input


(1) Test specifications
Bit rate
MU150005A MU150006A MU150007A MU150011A
2.048 Mbit/s 1.544 Mbit/s 2.048 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 8.448 Mbit/s 44.736 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 34.368 Mbit/s 51.84 Mbit/s
139.264 Mbit/s 155.520 Mbit/s 139.264 Mbit/s
155.520 Mbit/s 622.080 Mbit/s 155.520 Mbit/s
622.080 Mbit/s 622.080 Mbit/s
Level ECL (50 Ω) nominal 0.8 Vp–p

(2) Connection

MP1570A+Unit

• • • •
• • • •
Jitter Ref. clock input
• • • •

Jitter Ref.
clock output

Fig. 3-47 Jitter Reference Clock Input Test

(3) Test procedure


Test the Jitter reference clock input by following steps:
(a) Connect the cable as shown in Fig. 3-47.
(b) Ensure the loop-back for the bit rate that should be measured.
(c) Set the Bit rate to 2 M or 1.5 M (Lowest Bit rate of the interface unit).
(d) Set the Ref input to External.
(e) Set the Jitter to “ON”.
(f) Set the Modulation frequency to fr=1000 Hz.
(g) Set the Range of Tx to 16 UIp–p.
(h) Set the Range of Rx to 20 UIp–p.
(i) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(j) Be sure that the Jitter Rx amplitude is displayed 10 UIp–p.
(k) Set the Bit rate to next higher through 622 M in turn, and be sure that its value
is put within specifications.
(l) Set the Bit rate to 2488 M.
(m) Set the Ref input to External.
(n) Set the Jitter to “ON”.
(o) Set the Modulation frequency to fr=1000 Hz.
(p) Set the Range to 32 UIp–p.
(q) Adjust the amplitude on the Jitter Tx display to 10.0 UIp–p.
(r) Be sure that the Jitter Rx amplitude is displayed 10 UIp–p.
3-75
Section 3 Performance Test

3.5.8 Wander Reference Output/Input


(1) Test specifications
Bit rate
MU150005A MU150006A MU150007A MU150011A
2.048 Mbit/s 1.544 Mbit/s 1.544 Mbit/s 2488.32 Mbit/s
8.448 Mbit/s 44.736 Mbit/s 2.048 Mbit/s
34.368 Mbit/s 51.84 Mbit/s 8.448 Mbit/s
139.264 Mbit/s 155.52 Mbit/s 34.368 Mbit/s
155.52 Mbit/s 622.08 Mbit/s 44.736 Mbit/s
622.08 Mbit/s 51.84 Mbit/s
139.264 Mbit/s
155.52 Mbit/s
622.08 Mbit/s

(2) Connection

MP1570A+Unit

• • • •
• • • •
• • • •
Wander Ref.
input

Wander Ref.
CLK output

Fig. 3-48 Wander Reference Output/Input Test

(3) Test procedure


Test the reference clock output by following steps:
(a) Connect the cable as shown in Fig. 3-48.
(b) Ensure the loop-back for the bit rate that should be measured.
(c) Set the Bit rate to 2 M or 1.5 M. (Lowest Bit rate of the interface unit)
(d) Set the Ref input to Ref output (same frequency).
(e) Set the Rx Meas. select to Jitter & Wander.
(f) Set the Mode to single 10 sec.
(g) Press Start/stop key to initiate the measurement.
(h) Be sure that Ref Loss isn’t displayed on the screen.
(i) Set the Bit rate to next higher through 2488 M in turn, and be sure that its
value is put within specifications.

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3.6 Internal Performance Test

3.6 Internal Performance Test


3.6.1 Checking Main Frame Internal Functions
This check can be performed at the Selftest subscreen of the Setup main screen.
1. Move the cursor to “Type”, and press the Set key. An item selection window
opens. Select “Mainframe test”.
2. According to the message displayed on the screen, connect the cables.

Input

Output

3. Press the Start/Stop key to start selftest.


4. When test is completed, the buzzer sounds, and the result of judgement is dis-
played on the screen.
• PASS
Indicates that the result of selftest is normal.
• FAIL
Indicates that the result of selftest is abnormal.
If the built-in printer is on (when the Print key LED on the top of the main
frame is lit), the result of judgement is automatically printed.

If the result of selftest is abnormal, an error code is displayed. For details of


error codes, see “Appendix A”.

Note:
This built-in self-test can check only errors whose error code character is not
underlined. (See appendix A.) To check errors whose error code character is
underlined, the MP1570A Self-test system software is required. As to the
method of the performance, see para. 3.7.

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Section 3 Performance Test

3.6.2 Checking Interface-unit Internal Functions


This check can be performed at the Selftest subscreen of the Setup main screen.
1. Move the cursor to “Type”, and press the Set key. An item selection window
opens. Select MPxxxx Interface test”. To be able to check the interface unit, it
must be inserted to the slot in the MP1570A beforehand. A plural number of tests
may be performed for check depending on the type of the interface unit.
2. According to the message displayed on the screen, connect the cable.

3. Press the Start/Stop key to start selftest.


4. When all the items are checked, selftest is terminated automatically.
When test is completed, the buzzer sounds, and the result of judgement is dis-
played on the screen.
• PASS
Indicates that the result of selftest is normal.
• FAIL
Indicates that the result of selftest is abnormal.
If the built-in printer is on (when the Print key LED on the top of the main
frame is lit), the result of judgement is automatically printed.

If the result of selftest is abnormal, an error code is displayed. For details of


error codes, see “Appendix A”.

Note:
When carrying out the interface test of the MP0111A/MP0112A/MP0113A,
always connect the optical fiber cable, directly, without using an attenuator. If
an attenuator is inserted, the optical-power measuring item of the selftest be-
comes FAIL.
This built-in self-test can check only errors whose error code character is not
underlined. (See appendix A.) To check errors whose error code character is
underlined, the MP1570A Self-test system software is required. As to the
method of the performance, see para. 3.7.

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3.7 M1570A Self-test System Program

3.7 M1570A Self-test System Program


3.7.1 Outline
MP1570A Selftest System is the software designed to conduct an operation check on
the functions not included in the Selftest functions incorporated in the MP1570A Main
Frame.

3.7.1.1 Applicable Test Models

Table 3-8 Test Models

Model Name Product Name Remarks


MP1570A SONET/SDH/PDH/ATM Analyzer
MU150000A 2.5G/10G UNIT
MU150001A OPTICAL 10G TX(1.55) UNIT The MU150001A and
MU150002A OPTICAL 10G RX(NARROW) UNIT MU150002A are tested in pairs.
MU150005A 2/8/34/139M 156M/622M JITTER UNIT
MU150006A 1.5/45/52M 156M/622M JITTER UNIT
MU150007A 2/8/34/139M 1.5/45/52M 156M/622M JITTER
UNIT
MU150008A 2.5G(1.31) UNIT
MU150009A 2.5G(1.55) UNIT
MU150010A 2.5G(1.31/1.55) UNIT
MU150011A 2.5G JITTER UNIT

MP0121A 2/8/34/139/156M UNIT


MP0122A 1.5/45/52M UNIT
MP0122B 1.5/45/52/52M(1.31) UNIT
MP0124A 2/8/34/139M 156M/622M JITTER UNIT
MP0125A 1.5/45/52M 156M/622M JITTER UNIT
MP0126A 2/8/34/139M 1.5/45/52M 156M/622M JITTER
UNIT
MP0127A 2.5G(1.31) UNIT
MP0128A 2.5G(1.55) UNIT
MP0129A 2.5G(1.31/1.55) UNIT
MP0130A 2.5G JITTER UNIT

MP0105A CMI UNIT


MP0111A OPTICAL 156M/622M(1.31) UNIT
MP0112A OPTICAL 156M/622M(1.55) UNIT
MP0113A OPTICAL 156M/622M(1.31/1.55) UNIT

Note:
The MP0123A ATM unit is not applicable.

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Section 3 Performance Test

3.7.1.2 System Configuration


Equipment used
• Personal computer compatible with IBM-PC/AT 1 unit
• GPIB interface board(National Instruments Corp.) 1 piece
Accommodating NI-488.2M software
• GPIB interface cable 1 piece or more
• Various interface cables

PC requirements
• CPU: Pentium 90 MHz or more
• Memory: 32 MB or more
• HDD: Required empty capacity of 20 MB
• Display: Required resolution of 800 × 600 or more
• OS: MS Windows 95/98

Software Configuration
MP1570A Selftest System software has been created, using Visual Basic Version 6
(Microsoft) as a development language. Also, it builds the Microsoft Access 97 data-
base file.

3.7.1.3 Installing the Software and Preparations


Preparing the Computer
(1) Start Windows, and install NI-488.2M software in advance.
(2) Turn off the computer, and insert the GPIB interface board into the computer's
extension slot.
(3) Start NI-488.2M software, and select a corresponding board.
(4) Conduct a diagnostic test for NI-488.2M software to check for any errors.
For details, refer to NI-488.2M Software manual.

Installing the Selftest software


Install the Selftest software from MP1570A Selftest System Setup Disk, as below.
Execute the Setup.exe file of Disk1 and follow the displayed instructions to install the
software.

◆ If the application software created with Visual Basic Version 4/5 has been already
installed, a part of the RUN TIME file will be rewritten, causing that software to
fail.
◆ If other than 97 version of Microsoft Access has been installed, the system may not
function properly.

Uninstalling the Software


Open Start-Settings-Control Panel-Add/Remove Programs in Windows.
Select and remove "MP1570A Selftest System."

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3.7 M1570A Self-test System Program

3.7.2 Description of Operation Screen


3.7.2.1 Main Window
When the system is started, the [Main Window] shown in Fig. 3-49 appears together
with the initial data. The following briefs the functions in this screen.

Main Operation

[7] [9] [1] [2] [3] [8] [4] [5] [6]

Fig. 3-49 Main Window

[1] Model name box


Displays the name of the measurable test model. When there are multiple mod-
els, you can select one of them.
[2] Option box
Displays the option to be installed in the test model. You can select out of mul-
tiple options.
[3] Serial Number box
Displays the serial number of the test model or it can be entered. The serial
number entered here is recorded in the database.
[4] Temperature box
Select the ambient temperature for running the program.
Select Normal, High, or Low. The temperature selected here is recorded in the
database.
[5] Mode box
Select measurement items or grouped ones prior to starting measurement.
• File ...... Continuously measures the items displayed in the File item area.
• Select ... Continuously measures the items optionally selected.
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Section 3 Performance Test

[6] F1: Measure button


Starts measurement. If Select has been selected in the Mode box, the Measure-
ment Items List window is opened.
[7] File Item select box (Enabled when "File" is selected in the Measurement Mode
box)
Selects a file among File1 to File4 which contains measurement items grouped in
advance.
[8] F2: Registration button (Enabled when "File" is selected in the Measurement
Mode box)
Registers the measurement items in the file selected in the File Item select box.
Pressing this button opens the Measurement Item Select window, allowing you to
select and register the measurement items.
[9] Registered measurement item display (Enabled when "File" is selected in the
Measurement Mode box)
Lists the measurement items registered in the file selected in the File Item select
box.

Menu Bar
The following outlines the menu bar in the Main screen.

[1] [2] [3] [4]

Fig. 3-50 Menu Bar

[1] File
Operates the data files or the database. It is also used to exit the Selftest software.
[2] System
Sets a GPIB address or displays a connection block diagram.
[3] Options
Sets the font or sound used for the Selftest software.
[4] Help
Displays the version information of the Selftest software.

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3.7 M1570A Self-test System Program

3.7.2.2 Main Window Menu


The following describes the functions of the menu bar of the Main window.

File Menu
Operates the data files or the database. It is also used to exit the system.

Fig. 3-51 File Menu

Set Path...
Sets a folder where you can read or write various data files.
For details, refer to 3.7.2.5 Set Path Window.

(1) DataBase...
Optimizes and repairs the database.
• Optimizing ...... Optimizes the database.
A confirmation message is displayed upon completion of optimization. Unless the
HDD has an empty area more than a database capacity, an error message is dis-
played.
• Repair .............. Repairs the database.
A confirmation message is displayed upon execution. A confirmation message is
displayed again upon completion of repair.

Fig. 3-52 File Database Menu

(2) Exit
Exits the system.
Selecting this function opens an exit inquiry message box.
• Ok ............ Exits the program.
• Cancel ..... Returns to the Main window without exiting the program.

Fig. 3-53 Exit Inquiry Message box

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Section 3 Performance Test

System Menu
Used to initialize the system, set the GPIB address, or display the connection block
diagram, as below.

Fig. 3-54 System Menu


(1) GPIB Address...
Sets the GPIB addresses for the test model and remotely controlled facilities.
For details, refer to 3.7.2.6.
(2) System Block Diagram...
Displays the model configuration of the measuring system.

Options
Alters the environment of the software.

Fig. 3-55 Options Menu

(1) Font
Sets or alters the font used for the software.
For details, refer to 3.7.2.8 Font Setting Window.
(2) Sound
Sets or alters the sound emitted upon completion of measurement.
For details, refer to 3.7.2.9 Sound Setting Window.

Help
(1) About
Displays the system name, version information, and copyright of the Selftest software.
Selecting the F1:Ok button closes the window.

Fig. 3-56 About Window

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3.7 M1570A Self-test System Program

3.7.2.3 Measurement Item Select Window


In the Main window, selecting the Measure or Registration button opens the Measure-
ment Item Select window.

[2] [1] [2] [1]

[3] [4] [5] [6] [7]


Fig. 3-57 Measurement Item Select Screen

[1] Measurement item name


Lists the measurement item names corresponding to Mode name under Instru-
ment in the Main window.
[2] Measurement-item check box
Determines whether the relevant measurement item should be selected or not.
When selecting the measurement item, check in the box.
If a check mark is displayed, the measurement item name is changed to blue.
[3] Number of check marks display box
Displays the number of measurement items currently selected with the check
mark.
[4] F4:Down/F5:Up button
Not displayed when the number of measurement items is 22 or less (only one
page).
Selecting F5:Up displays the items on the next page, and F4:Down displays those
on the previous page.
[5] F2:Select Item button
Selecting this button exits selection of measurement items, and takes you to the
next window, as described below.
• If no measurement item has been selected, you are returned to the previous
window.
• If this Measurement Item Select window is opened by the Measure button in
the Main window, you are taken to the Measurement Result Display window,
prior to measurement.
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Section 3 Performance Test

• If multiple units have been set in the Number of Measurement unit box in the
Main window, you are taken to the Multi-serial Number Input window.
• If this Measurement Item Select window is opened by selecting the Registra-
tion button in the Main window, you are returned to the Main window.
[6] F8:Cancel button
Cancels selection of measurement items and returns you to the previous window.
[7] F3: All Clear button
Clears all the selected measurement items (all the measurement item check boxes
to Off).

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3.7 M1570A Self-test System Program

3.7.2.4 Measurement Result Display Window


Measurement Result Display Window at Measurement Start

[7] [5] [6] [9] [8] [10] [4] [3] [2] [1]

Fig. 3-58 Measurement Result Display Window at Measurement Start

[1] F1:Start button


Starts measurement.
[2] F8:Cancel button
Returns you to the Measurement Item Select window.
[3] Fail Mode select switch
Capable of selecting the stop mode when the measurement result is "Fail."
• Stop Measurement When the measurement result is "Fail," the program stops
upon termination of that faulty measurement item.
• Continue Measurement Even if the measurement result is "Fail," the pro-
gram continues to run, measuring all the selected items.
[4] Meas. Mode select switch
Sets the measurement mode. There are the following two measurement modes:
• Single mode .... Interrupts measurement upon completion of each measure-
ment item, and displays a message box.
• All mode ......... Continues measurement until all the selected measurement
items are finished.
[5] Measurement Mode display
Displays the mode selected in the Measurement Item Select window.

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Section 3 Performance Test

[6] Date & Time


Displays the measurement-start date and time. The display format depends on
the [Region] setting in Windows OS.
The measurement-end date and time is also displayed upon completion of all the
selected measurement items.
◆ When Japanese-version Windows is being used, the date display may be trans-
formed. In this case, select the Japanese-accommodating font at Main-Op-
tions-Font.
[7] Item Name
Displays the measurement item name currently under measurement.
[8] Measurement result display area
On measurement in progress, displays the measurement item name, error code,
etc..
[9] Summary
Displays the Pass/Fail judgment results of the finished measurement items.
[10] Status bar display area
On measurement in progress, displays the current model setting information.

Measurement Result Display Window at Measurement Completion:

[5] [4] [3] [2] [1]

Fig. 3-59 Measurement Result Display Window at


Measurement Completion

[1] F1:Ok button


Exits this window to return you to the Measurement Item Select window or Main
window.

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3.7 M1570A Self-test System Program

[2] Measurement time display


Displays the time spend for measurement of all the selected measurement items.
[3] Overall Judgment display
Displays overall judgment result (Pass/Fail) of all the test items.
[4] Measurement result data display area
Displays the address and error code when an internal measurement item results in
"Fail."
Displays all the measurement time, and the addresses and serial numbers of the
test models upon completion of all the measurement items.
[5] Data Output menu
Execution of this menu allows you to output the data (in the measurement result
data display area) to the printer or a text file, as below.
(a) Printer/File.......Select either the Windows standard printer or text file.
(b) File Mode New/Append......When file output (File) is selected, select
whether you want to create a new file or append the data to an existing file.
(c) F1:Ok button........Executes data output.
When creating a file, a window appears to indicate a file storage location.
(d) F8:Cancel..........Ends processing.

[a] [b] [d] [c]

Fig. 3-60 Measurement Data Output Window

3-89
Section 3 Performance Test

Displaying the Measurement Result Data:


When the measurement of the selected test target unit is completed, the measurement
result data is displayed in the measurement result display area in the Measurement
Result Display window, as below.
[1] Displays a unit name.
[2] Displays the GPIB addresses and error codes of the test models; they are not
displayed if there are no errors.
[3] Displays all the measurement time.
[4] Finally, displays the serial numbers (S/N) corresponding to the GPIB addresses
of the test models.

[1] [2] [3] [4]

Fig. 3-61 Example of Measurement Result Display Data

◆ Multiple error codes may be displayed, depending on a combination of units. This is


due to executing the same measurement item with different measuring conditions;
so, it is not abnormal.

Recording in the Database


For the measurement result, only the Pass/Fail information is recorded in the database
file in the MDB format. The database file can be read with MS-Access 97.

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3.7 M1570A Self-test System Program

3.7.2.5 Set Path Window


[1] [2] [5] [4] [7] [6] [1]

Fig. 3-62 Set Path Window

[1] Item select switches


Select a type of data file in which you want to save the measurement data.
• DataBase ---- Database file
• Report ---- Measurement result data file
• Cal Data ---- Facility's calibration data file (Setting invalid for this software)
[2] Drive select box
Select a drive.
[3] Folder select area
Select a folder.
[4] Path information display area
Displays the path for selecting the drive and folder.
[5] Saved path display area
Displays the registered path information.
[6] F1:Save button
Registers the set/selected path data, and closes the window.
[7] F8: Cancel button
Cancels the registration of path data, and closes the window.

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Section 3 Performance Test

3.7.2.6 GPIB Address Setting Window

This window is used to set the GPIB addresses of the test models and remotely con-
trolled facilities.

[3] [1] [4] [5] [2]

Fig. 3-63 GPIB Address Setting Window

[1] Measurement System select switch


When there are multiple measurement systems installed, select one of them.
[2] F2:System Change button
This button is enabled by altering the setting with the Measurement System select
switch, and displays the address data according to the system settings.
[3] Address setting box
This box is to set the GPIB address of the model you want to control remotely.
Valid address numbers range is from 1 to 30, and cannot be duplicated for the
different models.
Setting "-1" disables remote control of the model.
[4] F1:Save button
This button is enabled when the address is altered. It is used to save the address
data.
If the address number is duplicated for the different models, an error message is
displayed.
[5] F8:Cancel button
Returns you to the Main window. If this button is selected without saving the
altered data, the previous data is restored.

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3.7 M1570A Self-test System Program

3.7.2.7 System Block Diagram Window


[1] [3] [2]

Fig. 3-64 System Block Diagram Window

[1] Connection block diagram display


Displays a connection diagram.
[2] F1:Ok button
Closes the window, and returns you to the Main window.
[3] F2:Copy button
Prints the connection block diagram. The object printer is a Windows standard
printer.

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Section 3 Performance Test

3.7.2.8 Font Setting Window


This window sets the font used in this software.

[1] [5] [4] [2] [3] [7] [6]

Fig. 3-65 Font Setting Window

[1] Font select box


Select a font name you want to use in the system. "MS Sans Serif" is selected as
the initial value.
[2] Font style select box
Select a font style. A fixed value of "Regular" is selected for this system.
[3] Size select box
Select a font size. A fixed value of "10" point has been selected for this system.
[4] Sample display box
Displays the selected font sample.
[5] Script select box
Select a type of script you want to use for this system.
[6] OK button
Saves the settings, and returns you to the Main window.
[7] Cancel button
Restores the previous settings, and returns you to the Main window without sav-
ing the settings.

◆ As this window depends on the Windows OS to be used, Japanese-version Windows


displays the characters in Japanese.

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3.7 M1570A Self-test System Program

3.7.2.9 Sound Setting Window


[1] [3] [4] [5] [6] [7] [9] [8] [2]

Fig. 3-66 Sound Setting Window

[1] File display area


Displays the path for a sound data file.
[2] F2:File button
Displays the File Select window to select the sound data file.
[3] Mode select switch
Determines whether the sound is to be used or not (On/Off) upon completion of
measurement.
[4] Max play time (min) box
Sets the sound time with ten-key pad. A setting range is 1 to 30 minutes.
[5] F1:Once button
Turns On the sound only once.
[6] F4:Loop button
Turns On the sound during the interval set in the Max play time (min) box.
[7] F5:Stop button
Stops the sound test.
[8] F1:Ok button
Saves the set information of sound data, and closes the window to return to the
Main window.
[9] F8:Cancel button
Closes the window without saving the set information of sound data, and returns
to the Main window.

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Section 3 Performance Test

3.7.3 Selftest
3.7.3.1 Preparing the Test Model
[1] Connect the computer to the test model (MP1570A) with a GPIB interface cable.
[2] Install necessary units in the test model, and connect between Output and Input of
each unit with cables.

3.7.3.2 Preparing for Measurement


Run the Selftest software to open the Main window.
(1) Registering the address of the test model
Execute Menu-System-GPIB Address... to set the GPIB address of the test
model.
(2) Selecting the Model Name
There are two types of test target units, as below. Select one of them.
• Mainframe ........... Tests the function unit inserted into the mainframe.
• Interface Unit ...... Tests the interface unit on the front of the mainframe.
(3) Selecting the Measurement Mode
Choose "Select" if the test target unit is not the same every time.
Choose "File" if the test target unit is the same every time, and register the mea-
surement unit in a file.
(4) Inputting the Serial Number
Input the serial number of the test model.

3.7.3.3 Starting Measurement


The following describes the procedure to start the measurement, assuming that Mea-
surement Mode: Select and Number of Measurement unit: 1.
(1) Select the Measure button in the Main window.
(2) Select the unit inserted into the mainframe using the list of test target units in the
Measurement Item Select window.
When Model Name is Interface Unit, you can select only one kind from the list.
(3) Select the Select Item button.
(4) The Measurement Result Display window opens. Select the Start button.
If the set GPIB address does not match the test model, the error message box
opens.
Operate the following buttons.

Fig. 3-67 GPIB Address Error Message

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3.7 M1570A Self-test System Program

• Abort ........ Aborts measurement, resulting in the measurement end state. At


that time, the message box appears again.
• Retry ......... Retries the same processing, and continues measurement after nor
malized.
• Ignore ....... Ignores the current address, and opens the window where a new
address is to be input. Operate the following boxes.
• Input box .....Input the new address data with the ten-key pad.
• Ok ............... Registers the input data to exit the window.
• Cancel ......... Cancels input operation, and closes the window.

Fig. 3-68 GPIB Address Input Window

[5] The computer controls the test model and starts measurement.
A character animation of "Measuring ..." is displayed during measurement.
The F5 Break button is also displayed.
[6] To stop measurement, press the Break button. A confirmation message is dis-
played when the test model completes one processing.

Fig. 3-69 "Measuring" and "Break" Button

Fig. 3-70 Break Message Box

• Retry ............. Re-measures the measurement item from the beginning, which
is selected when the Break button is pressed.
• Continue ....... Continues measurement.
• Return ........... Ends measurement.

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Section 3 Performance Test

[7] A confirmation message box is displayed when measurement of the selected


measurement unit is completed.

Fig. 3-71 Measurement End Message Box

• Retry ........ Measures the currently selected unit again.


• Return ...... Ends measurement and allows you to view the measurement result.
[8] When you want to print or save the measurement result display data in a file,
select the Data Out menu.
[9] Select the Ok button to return to the previous Measurement Item Select window.
[10] Select the Cancel button in the Measurement Item Select window to return to the
Main window.
◆ The character animation of "Measuring ..." may stop for a while during measure-
ment. This is not abnormal, because it takes time for internal processing of the test
models.

3.7.3.4 Measurement Result Data


If an error code is displayed, it indicates that the test model has an error.
The information on the error codes can be searched for from MP1570A SONET/SDH/
PDH/ATM/Analyzer Service Manual, Appendix A Selftest Error Code.

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3.7 M1570A Self-test System Program

3.7.3.5 Test Target Units and Measurement Items


Table 3-9 lists the measurement items for the test target units.

Table 3-9 List of Test Target Units and Measurement Items

MP0121A
MP0122A
MP0122B
MP0127A
MP0128A
MP0129A
MU150000A
MU150001A/02A
MU150008A
MU150009A
MU150010A
Test Target Unit

Measurement Item

Error Addition test


Alarm Addition test
Clock Alarm Addition test
Optical Power Measurement
OH Monitor Measurement
Path Trace Test
Pointer Sequence Measurement
Mux/Demux Alarm Addition test
Delay Measurement
Justification test
NDF,C,C1/C2 test
MP0124A
MP0125B
MP0126A
MP0130A
MU150005A
MU150006A
MU150007A
MU150011A
MP0105A
MP0111A
MP0112A
MP0113A
Test Target Unit

Measurement Item

Optical Power Measurement


Tx Jitter Tolerance test
Rx Intrinsic Jitter test
Wander Measurement
Tx Intrinsic Jitter test
Hit Counter test
Note: mark indicates valid item.

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Section 3 Performance Test

3-100.
Section 4 Troubleshooting

4.1 General ..................................................................... 4-2


4.2 Troubleshooting Preliminaries .................................. 4-2
4.3 Selftest ...................................................................... 4-3
4.3.1 Selftest Items ................................................. 4-3
4.3.2 Checking CPU and Peripherals ..................... 4-3
4.3.3 Checking Built-in Printer ................................ 4-4
4.3.4 Checking FDD ............................................... 4-4
4.3.5 Checking LCD ............................................... 4-4
4.3.6 Checking Main Frame ................................... 4-4
4.3.7 Checking Interface Units ............................... 4-4
4.4 Troubleshooting Using Selftest ................................. 4-5
4.4.1 Checking SONET/SDH/PDH Functions ........ 4-6
4.4.2 Checking Jitter Functions .............................. 4-14
4.4.3 Checking ATM Functions .............................. 4-18
4.4.4 Checking Interface Unit Functions ................ 4-23
4.4.5 Checking ADD/DROP Unit Functions ........... 4-24
4.4.6 Checking 2.5 G Jitter Unit Functions ............. 4-26
4.4.7 Checking SDH 2.5 G Unit Functions ............. 4-29
4.4.8 Checking SDH 2.5 G/10 G Unit Functions .... 4-31
4.4.9 Checking 10 G Optical Unit Functions .......... 4-33
4.5 Checking Other Modules .......................................... 4-34
4.5.1 Checking LED, Buzzer, and Clock ................ 4-34
4.5.2 Checking Panel Keys .................................... 4-35
4.5.3 Checking Power Supply Unit ......................... 4-36
4.5.4 Checking Built-in Printer ................................ 4-37
4.5.5 Checking RS-232C Interface (Option 01) ...... 4-37
4.5.6 Checking GPIB Interface (Option 02) ............ 4-38
4.5.7 Checking ETHERNET (Option 03) ................ 4-39
4.5.8 Checking VGA OUTPUT (Option 04) ............ 4-39
4.5.9 Checking Frame Memory/Capture
(2.5 G/10 G) .................................................. 4-40

4-1
Section 4 Troubleshooting

4.1 General
This section describes how to locate the exact module causing faulty operation of the
MP1570A SONET/SDH/PDH/ATM analyzer.
When the faulty module is located, according to SECTION 5 “Replacing Modules” of
this manual, replace the faulty module by a new one.

4.2 Troubleshooting Preliminaries


(1) Check the line fuse has the correct rating and is not blown.

(2) If the internal printer is not operating, ensure that paper is correctly fitted. Refer
to the Operating manual Vol.1 Appendix I for information on this.

(3) Check to ensure the Plug-in units are fitted correctly.

(4) If many problems occur during Selftest, suspect the cabling.

4-2
4.3 Selftest

4.3 Selftest
4.3.1 Selftest Items
The following selftest are built-in to the MP1570A.
(1) Check of CPU and peripherals
This check is performed each time the MP1570A is powered on. The buzzer, ICs
around CPU, backup battery, LED, LCD, etc. are checked.

(2) Check of built-in printer


Test printing by the built-in printer can be performed when MP1570A is powered
on.

(3) Check of main frame functions


This check is performed at the Selftest subscreen of the Setup main screen.
The functions of the MP1570A and units inserted are checked, starting from the
right side slot.
About outward interface, see SECTION 3 interface performance test.

(4) Check of interface unit functions


This check is performed at the Selftest subscreen of the Setup main screen.
The functions of the units inserted are checked, starting from the front slot.

4.3.2 Checking CPU and Peripherals


Upon power-on, the MP1570A performs check in following flow:

Power ON

ROM/RAM check

Buzzer operation

CPU I/O test

FDD interface test

Battery test

All LEDs and LCD lit

Unit ID number verification

END

4-3
Section 4 Troubleshooting

4.3.3 Checking Built-in Printer


If you turn on the power while holding down the “Print Now” key, you can make the
built-in printer perform test printing.
If the printer does not behave correctly, PRT or printer will be faulty. Please exchange
it.

4.3.4 Checking FDD


If the floppy disk drive does not behave correctly, FDD will be faulty. Please exchange
it.

4.3.5 Checking LCD


If it does not display anything or looks so dark, LCD module will be faulty. Please
exchange it.

4.3.6 Checking Main Frame


This check can be performed at the Selftest subscreen of the Setup main screen. As to
the method of selftest, see para. 3.6.1 “Checking mainframe internal functions”. The
way to locate the faulty module is described on para. 4.4.

4.3.7 Checking Interface Units


This check can be performed at the Selftest subscreen of the Setup main screen. As to
the method of selftest, see para. 3.6.2 “Checking interface unit internal functions”. The
way to locate the faulty module is described on para. 4.4.

4-4
4.4 Troubleshooting Using Selftest

4.4 Troubleshooting Using Selftest


This section describes the way to locate the faulty module.
The method of changing the faulty module, see SECTION 5 “Replacing Modules”.
After the faulty module has been replaced, execute the selftest again to check the all
performance.

4-5
Section 4 Troubleshooting

4.4.1 Checking SONET/SDH/PDH Functions

Confirm that cable connections are correct


and these cables are not damaged.

Which type of unit “Others”


structure is it?

“Inserted which type of


MP0121A” structure is it?
Select the other
Select the selftest item, self-test item as
PDH/SDH(MP0121A) only; you need.
“Inserted
then start the selftest.
MP0122A”

Which is the result?


“PASS”
If MP0122A/B is inserted, select the selftest item
“FAIL” PDH/SDH(MP0122A/B) only; then start the
selftest.
See page 4-8.
Which is the group
of error codes?

GROUP A GROUP B GROUP C


0A**** 0C**** 0I****
0B**** | |
0O**** 0H**** 0N****
| 1D**** 0S****
0R**** 1F**** |
1H**** 0Z****
| 1A****
1L**** |
1C****
1E****
1G****
1M****
1N****
1O****
1P****

GROUP A only: See page 4-5.


GROUP B only or GROUP A, B, C mixed: See page 4-7.
GROUP C only: See page 4-6.

Has the trouble


“Yes” shoot be finished?
“No”

Continue the trouble shoot.

4-6
4.4 Troubleshooting Using Selftest

GROUP A only

Exchange MP0121A; then


retry the selftest.

“PASS”
Which is the result?

“FAIL” MP0121A is faulty.

Is the tested
MP1570A inserted
jitter unit?
“NO” “YES”
Exchange MOTHER2 and
Exchange the jitter unit;
return MP0121A; then
then retry the selftest.
retry the selftest.

Which is the result? Which is the result?


“PASS”
“FAIL” “FAIL” “PASS”
MOTHER2 is faulty.
Exchange MOTHER2 and
MOTHER2 and MP0121A Return MP0121A; then
return jitter unit; then retry
are faulty. retry the selftest.
the selftest.

“PASS”
Which is the result? Which is the result?
“PASS”
“FAIL” “FAIL”
Jitter unit is faulty.
Exchange jitter unit and
Return MP0121A; then Jitter unit and MP0121A
return MP0121A; then
retry the selftest. are faulty.
retry the selftest.

“PASS” “PASS”
Which is the result? Which is the result?

“FAIL” “FAIL” MOTHER2, and jitter unit


MOTHER2 is faulty.
are faulty.
MOTHER2, and MOTHER2, MP0121A
MP0121A are faulty. and jitter unit are faulty.

4-7
Section 4 Troubleshooting

GROUP C only

Exchange SDH; then retry


the selftest.

“PASS”
Which is the result?

“FAIL” SDH is faulty.

Is the tested
MP1570A inserted
jitter unit?
“NO” “YES”
Exchange MOTHER2 and
Exchange the jitter unit;
return SDH; then retry the
then retry the selftest.
selftest.

Which is the result? Which is the result?


“PASS”
“FAIL” “FAIL” “PASS”
MOTHER2 is faulty.
Exchange MOTHER2 and
MOTHER2 and SDH are Return SDH; then retry the
return jitter unit; then retry
faulty. selftest.
the selftest.

“PASS”
Which is the result? Which is the result?
“PASS”
“FAIL” “FAIL”
Jitter unit is faulty.
Exchange jitter unit and
Return SDH; then retry the Jitter unit and SDH are
return SDH; then retry the
selftest. faulty.
selftest.

“PASS” “PASS”
Which is the result? Which is the result?

“FAIL” “FAIL” MOTHER2 and jitter unit


MOTHER2 is faulty.
are faulty.
MOTHER2, and SDH are MOTHER2, SDH and
faulty. jitter unit are faulty.

4-8
4.4 Troubleshooting Using Selftest

GROUP B only,
GROUP A, B, C mixed

Exchange SDH and


MP0121A; then retry the
selftest.

“PASS”
Which is the result?

Return MP0121A, then


retry the selftest.

Which is the result?

“PASS” “FAIL”
Exchange MOTHER2 and
SDH is faulty. return the jitter unit; then
retry the selftest.
“FAIL”
Is the tested
“No”
MP1570A inserted Which is the result?
jitter unit? “PASS”
“Yes” “FAIL”
MP0121A is faulty.
Exchange MOTHER2 and
Exchange the jitter unit; MP0121A and SDH are
return SDH; then retry the
then retry the selftest. faulty.
selftest.

Which is the result? Which is the result?

“FAIL” “PASS” “FAIL” “PASS”


Exchange SDH and return Exchange MOTHER2 and Return MP0121A and A10
Return MP0121A; then
MP0121A; then retry the return the jitter unit; then SDH; then retry the
retry the selftest.
selftest. retry the selftest. selftrest.

Which is the result? Which is the result? Which is the result?


“PASS” “PASS” “PASS”
“FAIL” MOTHER2 and SDH are “FAIL” “FAIL”
MOTHER2 is faulty. Jitter unit is faulty.
MOTHER2, faulty.
MOTHER2 and MP0121A Exchange MP0121A; then
SDH and MP0121A are
are faulty. retry the selftest.
faulty.

Which is the result? Which is the result?


“PASS”
“FAIL” “FAIL” MP0121A and jitter unit
Exchange jitter unit and Exchange SDH and return are faulty.
return MP0121A; then MP0121A; then retry the
retry the selftest. self test.
“PASS”

Which is the result? Which is the result?


“PASS”
“FAIL” “PASS” “FAIL” SDH and jitter unit are
Exchange MP0121A and faulty.
Return A10 SDH; then Return MP0121A; then SDH, jitter unit and
return A10 SDH; then
retry the selftest. retry the selftest. MP0121A are faulty.
retry the selftest.

Which is the result? Which is the result? Which is the result?


“PASS” “PASS”
MOTHER2, MP0121A “FAIL” “FAIL” MOTHER2 and jitter unit “FAIL” “PASS”
and jitter unit are faulty. MOTHER2, SDH, are faulty. Exchange MP0121A and
MOTHER2, A10 SDH and Return SDH; then retry
MP0121A and jitter unit return SDH; then retry the
jitter unit are faulty. the selftest.
are faulty. selftest.

Which is the result?


“PASS”
“FAIL”
MOTHER2 is faulty.
MOTHER2 and SDH are
faulty.

Which is the result?


“PASS”
“FAIL” MOTHER2 and SDH are
faulty.
MOTHER2, SDH and
MP0121A are faulty.

4-9
Section 4 Troubleshooting

Select the selftest item,


PDH/SDH (MP0122A/B)
only; then start the selftest.

Which is the result?


“PASS”
PDH/SDH functions are
“FAIL”
O.K.

Which is the group


of error codes?

GROUP D GROUP E GROUP F


2A**** 2C**** 2I****
2B**** | |
2N**** 2H**** 2M****
| 3D**** 2R****
2Q**** 3H**** |
3J**** 2Z****
| 3A****
3P**** |
3C****
3E****
3G****
3Q****
|
3T****

GROUP D only : See page 4-9.


GROUP E only or GROUP D, E, F mixed : See page 4-11.
GROUP F only : See page 4-10.

4-10
4.4 Troubleshooting Using Selftest

GROUP D only

Exchange MP0122A/B;
then retry the selftest.

“PASS”
Which is the result?

“FAIL” MP0122A/B is faulty.

Is the tested
“No” MP1570A inserted
jitter unit?
“Yes”
Has jitter unit
already been exchanged at
previous selftest?
“Yes” “No”
Exchange MOTHER2 and
Exchange the jitter unit;
return MP0122A/B; then
then retry the selftest.
retry the selftest.

Which is the result? Which is the result?


“PASS” “PASS”
“FAIL” “FAIL”
A02 MOTHER2 is faulty.
Exchange MOTHER and
MOTHER2 and Return MP0122A/B; then
return jitter unit; then retry
MP0122A/B are faulty. retry the selftest.
the selftest.

“PASS”
Which is the result? Which is the result?
“PASS”
“FAIL” “FAIL”
Jitter unit is faulty.
Exchange jitter unit and
Jitter unit and
return MP0122A/B; then
MP0122A/B are faulty.
retry the selftest.

Return MP0122A/B; then


retry the selftest.

“PASS” “PASS”
Which is the result? Which is the result?

“FAIL” “FAIL” MOTHER2 and jitter unit


MOTHER2 is faulty.
are faulty.
MOTHER2 and MOTHER2, MP0122A/B
MP0122A/B are faulty. and jitter unit are faulty.

4-11
Section 4 Troubleshooting

GROUP F only

Has SDH already


been exchanged at
previous selftest?
“Yes” “No”
Exchange SDH; then retry
the selftest.

“PASS”
Which is the result?

“FAIL” SDH is faulty.

Is the tested
“No” MP1570A inserted
jitter unit?
“Yes”
Has jitter unit
already been exchanged at
previous selftest?
“Yes” “No”
Exchange MOTHER2 and
Exchange the jitter unit;
return SDH; then retry the
then retry the selftest.
selftest.

Which is the result? Which is the result?


“PASS”
“FAIL” “FAIL” “PASS”
MOTHER2 is faulty.
Exchange MOTHER2 and
MOTHER2 and SDH are Return SDH; then retry the
return jitter unit; then retry
faulty. selftest.
the selftest.

“PASS”
Which is the result? Which is the result?
“PASS”
“FAIL” “FAIL”
Jitter unit is faulty.
Exchange jitter unit and
Jitter unit and SDH are
return SDH; then retry the
faulty.
selftest.

Return SDH; then retry the


selftest.

“PASS” “PASS”
Which is the result? Which is the result?

“FAIL” “FAIL” MOTHER2 and jitter unit


MOTHER2 is faulty.
are faulty.
MOTHER2 and SDH are MOTHER2, SDH and
faulty. jitter unit are faulty.

4-12
4.4 Troubleshooting Using Selftest

GROUP E only,
GROUP D, E, F mixed

Has SDH
already been exchanged at
“Yes” previous selftest?
“No”
Exchange SDH and
Exchange MP0122A/B;
MP0122A/B; then retry
then retry the selftest.
the selftest.

“PASS”
Which is the result?

“FAIL” Return MP0122A/B, then


Is the tested retry the selftest.
“No”
MP1552A/B inserted
jitter unit?
“Yes”
Which is the result?
“Yes” Has jitter unit
already been exchanged at
previous selftest? “PASS” “FAIL”

SDH is faulty.
Exchange MOTHER2 and Exchange MP0122A/B
return SDH; then retry the and return SDH; then retry
selftest. the selftest.

“PASS” “PASS”
Which is the result? Which is the result?

Return MP0122A/B; then “FAIL”


MP0122A/B is faulty.
retry the selftest.
MP0122A/B and SDH are
faulty.

“FAIL”
Which is the result?
Exchange SDH and return “PASS”
MP0122A/B; then retry
the selftest. “FAIL”
MOTHER2 is faulty.
MOTHER2 and “No”
MP0122A/B are faulty.
Exchange the jitter unit
retry the selftest.

Which is the result? Which is the result?


“PASS” “PASS”
“FAIL” MOTHER2 and SDH are “FAIL”
faulty. Exchange MOTHER2 and Return MP0122A/B and
MOTHER2, SDH
return the jitter unit; then SDH; then retry the
MP0122A/B are faulty.
retry the selftest. selftrest.

Which is the result? Which is the result?


“PASS”
“FAIL” “PASS” “FAIL”
Jitter unit is faulty.
Exchange jitter unit and
Return MP0122A/B; then Exchange MP0122A/B;
return MP0122A/B; then
retry the selftest. then retry the selftest.
retry the selftest.

Which is the result? Which is the result? Which is the result?


“PASS”
“FAIL” “PASS” “FAIL” “PASS” “FAIL” MP0122A/B and Jitter
Exchange MP0122A/B Exchange MP0122A/B Exchange SDH and return unit are faulty.
Return SDH; then retry the Return SDH; then retry the
and return SDH; then retry and return SDH; then retry MP0122A/B; then retry
selftest. selftest.
the selftest. the selftest. the selftest.

Which is the result? Which is the result? Which is the result? Which is the result?
“PASS” “PASS” “PASS” “PASS”
MOTHER2, MP0122A/B “FAIL” “FAIL” MOTHER2 and jitter unit “FAIL” “FAIL” SDH and Jitter unit are
MOTHER2 is faulty.
and jitter unit are faulty. MOTHER2, SDH, are faulty. faulty.
MOTHER2, SDH and MOTHER2 and A10 SDH SDH, Jitter unit and
MP0122A/B and jitter unit
jitter unit are faulty. are faulty. MP0122A/B are faulty.
are faulty.

Which is the result?


“PASS”
“FAIL” MOTHER2 and
MP0122A/B are faulty.
MOTHER2, SDH and
MP0122A/B are faulty.

4-13
Section 4 Troubleshooting

4.4.2 Checking Jitter Functions

Confirm that cable connections are correct


and these cables are not damaged.

Has the MP1570A


alread be finished the
PDH/SDH selftest? “No”
“Yes” Please check SONET/
Select the selftest item, SDH/PDH functions first.
Jitter/Wander then start the
selftest.

Which is the result?


“PASS”

“FAIL” Jitter functions are O.K. GROUP G GROUP H GROUP I


4C**** 5C**** 4A**** 5A****
| | 4B**** 5B****
Which is the type of 4H**** 5H**** 4K**** 5K****
“GROUP G only” error code? 4O**** 5O**** | |
6C**** 7C**** 4N**** 5N****
See page 4-13. “Others” | | 6A**** 7A****
6H**** 7H**** 6B**** 7B****
6O**** 7O**** 6K**** 7K****
Which is the type of | |
error code? 6N**** 7N****

GROUP G and GROUP H GROUP G and GROUP I Error code groups


combination or GROUP H combination or GROUP I Others
only. only.

First, take off MP0122A/B and continue trouble


See page 4-14. See page 4-15. shooting in accordance with page.4-14.
Next, insert MP0122A/B and continue trouble
shooting in accordance with page.4-15.

GROUP G GROUP H GROUP I


HC**** IC**** HA**** IA****
| | HB**** IB****
HH**** IH**** HI**** II****
HS**** IO**** | |
JC**** KC**** HR**** IN****
| | JA**** KA****
JH**** KH**** JB**** KB****
JS**** KO**** JI**** KI****
| |
JR**** KN****

Error code groups

4-14
4.4 Troubleshooting Using Selftest

GROUP G only

Has jitter unit already


“YES”
been exchanged at
previous selftest?
“NO”
MOTHER2 is faulty.
Exchange the jitter unit;
then retry the selftest.

“PASS” Which is the result?

“FAIL”
Jitter unit is faulty.
Exchange MOTHER2 and
return jitter unit; then retry
the selftest.

Which is the result?


“PASS”
“FAIL”
MOTHER2 is faulty.
A02 MOTHER2 and jitter
unit are faulty.

4-15
Section 4 Troubleshooting

GROUP H only

Has jitter unit already


“YES”
been exchanged at
previous selftest?
“NO”
Exchange the jitter unit; Exchange MP0121A; then
then retry the selftest. retry the selftest.

“PASS” Which is the result? Which is the result? “FAIL”

“FAIL” “PASS”
Jitter unit is faulty.
Exchange MP0121A and Exchange MOTHER2 and
return the jitter unit; then MP0121A is faulty. return MP0121A; then
retry the selftest. retry the selftest.

Which is the result? Which is the result? “PASS”


“PASS”
“FAIL” “FAIL”
MP0121A is faulty. MOTHER2 is faulty.
Exchange jitter unit; then MOTHER2 and MP0121A
retry the selftest. are faulty.

Which is the result?


“PASS”
“FAIL” MP0121A and jitter unit
Exchange MOTHER2 and return are faulty.
the jitter unit and MP0121A; then
retry the selftest.

“PASS” Which is the result?

“FAIL”
MOTHER2 is faulty.
Exchange jitter unit; then
retry the selftest.

Which is the result?


“PASS”
“FAIL” MOTHER2 and jitter unit
Exchange MP0121A and are faulty.
return the jitter unit; then
retry the selftest.

Which is the result?


“PASS”
“FAIL” MOTHER2 and MP0121A
are faulty.
MOTHER2, MP0121A
and jitter unit are faulty.

4-16
4.4 Troubleshooting Using Selftest

GROUP I only

Has jitter unit already


“YES”
been exchanged at
previous selftest?
“NO”
Exchange the jitter unit; Exchange MP0122A/B;
then retry the selftest. then retry the selftest.

“PASS” Which is the result? Which is the result? “FAIL”

“FAIL” “PASS”
Jitter unit is faulty.
Exchange MP0122A/B Exchange MOTHER2 and
and return the jitter unit; MP0122A/B is faulty. return MP0122A/B; then
then retry the selftest. retry the selftest.

Which is the result? Which is the result? “PASS”


“PASS”
“FAIL” “FAIL”
MP0122A/B is faulty. MOTHER2 is faulty.
Exchange jitter unit; then MOTHER2 and
retry the selftest. MP0122A/B are faulty.

Which is the result?


“PASS”
“FAIL” MP0122A/B and jitter unit
Exchange MOTHER2 and return are faulty.
the jitter unit and MP0121A; then
retry the selftest.

“PASS” Which is the result?

“FAIL”
A02 MOTHER2 is faulty.
Exchange jitter unit; then
retry the selftest.

Which is the result?


“PASS”
“FAIL” MOTHER2 and jitter unit
Exchange MP0122A/B are faulty.
and return the jitter unit;
then retry the selftest.

Which is the result?


“PASS”
“FAIL” MOTHER2 and
MP0122A/B are faulty.
MOTHER2, MP0122A/B
and jitter unit are faulty.

4-17
Section 4 Troubleshooting

4.4.3 Checking ATM Functions


Select the selftest item
ATM only; then Start the
selftest.

“PASS”
Which is the result?

“FAIL” ATM functions are O.K.

Which is the group


of error codes? “Others”

“Included group
J, K, L” GROUP M and GROUP M and GROUP N and GROUP M, N,
GROUP M only GROUP N only GROUP O only
GROUP N GROUP O GROUP O O mixed

Exchange MP0123A, SDH,


See page 4-17. See page 4-17. See page 4-17.
MP0121A and MP0122A/B (if See page 4-19. See page 4-18. See page 20.
GROUP J, M GROUP K, N GROUP L, O
inserted); then retry the selftest.

“PASS” First, take off MP0121A; then check according to page 4-18 flow.
Which is the result?
Next, insert MP0121A and check according to page 4-19 flow.
“FAIL”
Exchange MOTHER2 and return
MP0123A, SDH, MP0121A, GROUP J GROUP K GROUP L
MP122A/B; then retry the selftest.
8A**** 8C**** 8E****
8B**** 8D**** 8F****
“PASS”
Which is the result? GROUP M GROUP N GROUP O
8S**** 8W**** 8G****
Which is the “FAIL” | | 8H****
previous group of error MOTHER2 is faulty.
8V**** 8K****
code? 8I**** 9F****
|
MOTHER2 and other modules are faulty.
8R****
Exchange MOTHER2 and check the following
9Z****
flow.
9A****
“Included |
GROUP J, K, L” Which is the group 9E****
of error codes?
Error code groups
“Others”

GROUP M and GROUP M and GROUP N and GROUP M, N,


GROUP M only GROUP N only GROUP O only
GROUP N GROUP O GROUP O O mixed

See page 4-17. See page 4-17. See page 4-17. First, take off MP0121A; then check according to page 4-18. flow.
See page 4-19. See page 4-18. See page 4-20.
GROUP J, M GROUP K, N GROUP L, O Next, insert MP0121A and check according to page 4-19. flow.

GROUP J, M GROUP J, M GROUP K, N


GROUP J, M GROUP K, N GROUP L, O GROUP J, K, L,
and and and
only only only M, N, O mixed
GROUP K, N GROUP L, O GROUP L, O

First, take off MP0121A; then check according to page 4-18. flow.
See page 4-17. See page 4-17. See page 4-17. See page 4-19. See page 4-18. See page 4-20.
Next, insert MP0121A and check according to page 4-19. flow.

4-18
4.4 Troubleshooting Using Selftest

GROUP J, M GROUP K, N

Exchange MP0123A; then Exchange MP0123A; then


retry the selftest. retry the selftest.

Which is the result? Which is the result?


“PASS” “PASS”
“FAIL” “FAIL”
MP0123A is faulty. MP0123A is faulty.
Return MP0123A and Return MP0123A and
Exchange SDH then retry Exchange MP0121A then
the selftest. retry the selftest.

Which is the result? Which is the result?


“PASS” “PASS”
“FAIL” “FAIL”
SDH is faulty. MP0121A is faulty.
MP0123A and SDH are MP0123A and MP0121A
faulty. are faulty.

GROUP L, O

Exchange MP0123A; then


retry the selftest.

Which is the result?


“PASS”
“FAIL”
MP0123A is faulty.
Return MP0123A and
Exchange MP0122A/B
then retry the selftest.

Which is he result?
“PASS”
“FAIL”
MP0122A/B is faulty.
MP0123A and
MP0122A/B are faulty.

4-19
Section 4 Troubleshooting

GROUP J, M
and
GROUP L, O

Exchange MP0123A and


MP0122A/B; then retry
the selftest.

“PASS”
Which is the result?

Return MP0122A/B; then


“FAIL” retry the selftest.

Exchange SDH and return


MP0122A/B,then retry the Which is the result?
selftest. “PASS”
“FAIL”
MP0123A is faulty.
MP0122A/B and
MP0123A are faulty.

Which is the result?


“PASS”
“FAIL” SDH and MP0123A are
Exchange MP0122A/B faulty.
and return MP0123A, then
retry the selftest.

Which is the result?


“PASS”
“FAIL” SDH and MP0122A/B are
faulty.
SDH, MP0122A/B and
MP0123A are faulty.

4-20
4.4 Troubleshooting Using Selftest

GROUP J, M
and
GROUP K, N

Exchange MP0123A and


MP0121A; then retry the
selftest.

“PASS”
Which is the result?

Return MP0121A; then


“FAIL” retry the selftest.

Exchange SDH and return


MP0121A, then retry the Which is the result?
selftest. “PASS”
“FAIL”
MP0123A is faulty.
MP0121A and MP0123A
Which is the result?
“PASS” are faulty.
“FAIL” SDH and MP0123A are
Exchange MP0121A and faulty.
return MP0123A, then
retry the selftest.
“FAIL”

Which is the result?


“PASS”
SDH and MP0121A are
faulty.
SDH, MP0121A and
MP0123A are faulty.

4-21
Section 4 Troubleshooting

GROUP K, N
and
GROUP L, O

Exchange MP0123A and


take off MP0121A; then
retry the selftest.

“PASS”
Which is the result?

Insert MP0121A; then


“FAIL” retry the selftest.

Return MP0123A and


exchange MP0122A/B; Which is the result?
then retry the selftest. “PASS”
“FAIL”
MP0123A is faulty.
MP0121A and MP0123A
are faulty.

Which is the result?


“PASS”
“FAIL”
Exchange MP0123A and Exchange MP0123A and
insert MP0121A; then insert MP0121A; then
retry the selftest. retry the selftest.

Which is the result? Which is the result?


“PASS” “PASS”
MP0122A/B and “FAIL” “FAIL” MP0122A/B and
MP0123A are faulty. Exchange MP0121A and MP0123A are faulty.
MP0121A, MP0122A/B
return MP0123A; then
and MP0123A are faulty.
retry the selftest.

Which is the result?


“PASS”
MP0122A/B and “FAIL”
MP0123A are faulty.
MP0121A, MP0122A/B
and MP0123A are faulty.

4-22
4.4 Troubleshooting Using Selftest

4.4.4 Checking Interface Unit Functions

Confirm that cable connections


are correct and these cables are
not damaged.

Has the mainframe


“No”
test already been
finished?
“Yes”
Select the selftest type, Please confirm that the
MP01XXX interface test; mainframe behaves
then start the selftest. correctly.

“PASS”
Which is the result?

“FAIL” The unit functions are


O.K.
Exchange the interface
unit; then retry the selftest.

“PASS”
Which is the result?

“FAIL”
The unit is faulty.
Exchange SDH and return
the unit; then retry the
selftest.

“PASS”
Which is the result?

“FAIL”
SDH is faulty.
Exchange the interface
unit again; then retry the
selftest.

“PASS”
Which is the result?

“FAIL” The unit and SDH are


Suspect MOTHER1 or a cable faulty.
assembly W5 (between SDH
and the unit).

4-23
Section 4 Troubleshooting

4.4.5 Checking ADD/DROP Unit Functions

Select the selftest item of


MP0131A only; then start
the selftest.

“PASS(1)”
Which is the result?

“FAIL”
Exchange SDH;
then retry the self test.

“PASS(2)”
Which is the result?

“FAIL”
Connect the units as in Fig. 4-4-5-1, and set
MP0131A is faulty. items of both MP1570A [1] and [2]
depending on the below table 4-4-5-1. Then,
check the Alarm/Errors of both MP1552A/B.

“Alarm/Error occurred”
Which is the result?
(Both MP1570A)
“Bit error or Sync loss” Which type of
Alarm/Errors are “No error”
occurred?
PASS(1): Add/Drop
function is O.K.
MP0131A is faulty. “Others” PASS(2): SDH is
faulty.
Present SDH is faulty.

MP1570A+MP0121A+MP0131A+I/F Unit MP1570A+MP0121A


(or MP1570A+MP0122A/B+MP0131A+I/F Unit) (or MP1570A+MP0122A/B)

• • • • • • • •
• • • • • • • •
• • • • • • • •

[1] [2]

Fig. 4-1 Setup for ADD/DROP unit troubleshooting

4-24
4.4 Troubleshooting Using Selftest

[1] (Tx & Rx) [2] (Tx & Rx)

Bit rate Mapping Add/Drop Other Bit rate Frame Other

1 156 M AU4-139 M (Async.) ON/ON 139 M OFF


2 156 M AU4-45 M (Async.) ON/ON DSX=450 ft 45 M OFF DSX=450 ft
3 156 M AU3-45 M (Async.) ON/ON DSX=450 ft 45 M OFF DSX=450 ft
4 156 M AU4-34 M (Async.) ON/ON 34 M OFF
5 156 M AU4-2 M (Async.) ON/ON Unbalanced 2M OFF Unbalanced
AU4-TU11-1.5 M DSX=655 ft DSX=655 ft
6 156 M ON/ON 1.5 M OFF
(Async.) CODE=B8ZS CODE=B8ZS

4-25
Section 4 Troubleshooting

4.4.6 Checking 2.5 G Jitter Unit Functions

Select the selftest item of


2.5G Jitter; then start the
selftest.

“PASS”
Which is the result? 2.5G Jitter function is O.K.

“FAIL”

Which is the type of


error code?
“Others”

BG**** BB**** Exchange the MOTHER2


BH**** LB**** and return the 2.5G Jiter unit;
LG**** then retry the selftest.
LF**** To next page

To next-to-next page
“PASS”
Which is the result? MOTHER2 is faulty.

“FAIL”
MOTHER2 and 2.5G
Jitter unit are faulty.

4-26
4.4 Troubleshooting Using Selftest

From previous page

BB****
LB****

Exchange the 2.5G Jitter


unit; then retry the selftest.

“PASS”
Which is the result? 2.5G Jitter unit is faulty.

“FAIL”
Exchange the 2.5G
unit and return the 2.5G
Jitter unit; then retry the
selftest.

“PASS”
Which is the result? 2.5G unit is faulty.

“FAIL”
Exchange the
MOTHER2 and return
the 2.5G unit; then
retry the selftest.

“PASS”
Which is the result? MOTHER2is faulty.

“FAIL”
MOTHER2, 2.5G
unit and 2.5G Jitter unit
are faulty.

4-27
Section 4 Troubleshooting

From second previous page

BG****
BH****

Exchange the 2.5G Jitter


unit; then retry the selftest.

“PASS”
Which is the result? 2.5G Jitter unit is faulty.

“FAIL”
Exchange the 622M Jitter
and return the 2.5G Jitter
unit; then retry the
selftest.

“PASS”
Which is the result? 622M Jitter unit is faulty.

“FAIL”

Exchange the A02


MOTHER2 and return
the 622M Jitter then retry
the selftest.

“PASS”
Which is the result? MOTHER2 is faulty.

“FAIL”

MOTHER2, 622M Jitter


and 2.5G Jitter unit are
faulty.

4-28
4.4 Troubleshooting Using Selftest

4.4.7 Checking SDH 2.5 G Unit Functions

Confirm that there is no


warning points in the
SONET/SDH/PDH
function before doing the
2.5G roubleshooting.

Select the selftest item of


the 2.5G unit; then retry
the selftest.

“PASS”
Which is the result? 2.5G unit is O.K.

“FAIL”

Which is the type of


error code?

AE**** AA**** FA****


AK**** | |
F J **** AD**** F I ****
FV**** AF**** FK****
| |
AJ**** FU****
2.5G unit AL**** FW****
is faulty. | |
AP**** FZ****
GA****
|
GC****

To next page

4-29
Section 4 Troubleshooting

From previous page

Exchange the 2.5G unit;


then retry the selftest.

“PASS”
Which is the result? 2.5G unit is faulty.

“FAIL”

Exchange the MOTHER2


and return the 2.5G unit;
then retry the selftest.

“PASS”
Which is the result? MOTHER2 is faulty.

“FAIL”

MOTHER2 and
the 2.5G unit are faulty.

4-30
4.4 Troubleshooting Using Selftest

4.4.8 Checking SDH 2.5 G/10 G Unit Functions

Confirm that there is no warning points in the


MP1570A function before doing the
MU150000A troubleshooting

Select the self-test item of


the STM-64, then retry the
self-test.

Which is the result? MU150000A is O.K.

Select MANUAL sub screen and set items the


measurement conditon occurred the alarm/
errors. (Refer appendix A self-test error code)

Check the version of MX157023A: MU15000A


Which is the result? FPGA DATA and MX157000A: MP1570A
SYSTEM PROGRAM.

Connect the units as in Fig.?, and set items of


both MP1570A [1] and [2] the measurement
condition occurred the alarm/errors. (Refer
appendix A self-test error code.)

Which MP1570A
detect alarm/errors?

Exchange MM100182A: Exchange MM100181A:


10G RX, then retry the 10G TX, then retry the
selftest. selftest.

MM100182A: 10G RX
Which is the result?
was fault.

MM100181A: 10G TX Which is the result?


was fault.

MOTHER2 is fault.

4-31
Section 4 Troubleshooting

MP1570A+MU150000A MP1570A+MU150000A (Trouble-free)

Data output Data output


Clock output Clock output
Data input Data input
[1] Clock input [2] Clock input

Fig. 4-2 Setup for 2.5 G/10 G Unit Troubleshooting

4-32
4.4 Troubleshooting Using Selftest

4.4.9 Checking 10 G Optical Unit Functions

Confirm that there is no warning points in the


10G electrical function before doing the
10G optical function troubleshooting.

Select the self-test item of


the 10G unit; then retry
the self-test.

“PASS”
Which is the result? 10G optical unit is O.K.

“FAIL”
Key switch is “ON”?
“NO” Turn “ON” the key switch and remote interlock
Remote interlock is
is connected to GND, then retry the self-test.
connected to GND?
“YES”

Optical output LED “NO” 10G optical transmitter


is emitted? unit is faulty.

“YES”

10G optical receiver unit


is faulty.

4-33
Section 4 Troubleshooting

4.5 Checking Other Modules


Note:
Y: Yes N: No

4.5.1 Checking LED, Buzzer, and Clock

START

Are the LEDs, buzzer, Y CPU is faulty.


and clock faulty?
N
The LEDs are faulty. The buzzer is faulty. The clock is faulty.

R-F is faulty. CPU is faulty.

Is Remote, Panel Lock, Screen Y


L-F is faulty.
copy or On/Off LED faulty?
N
Are the other LEDs Y
R-F is faulty.
faulty?

Fig. 4-3 LEDs, Buzzer, and Clock Troubleshooting

4-34
4.5 Checking Other Modules

4.5.2 Checking Panel Keys

START

Turn on the power while holding


down the Reset key.

The display will show the key


check screen.

Press a key, then the key


indication in the screen is inverted.

Check all the keys in turn.


*5
N Y
All keys OK? One key only faulty? R-F is faulty.
Y N
Y CPU is faulty.
The key operation is good. All or some keys faulty?

*5: If the faulty key is Local, Panel Lock, On/Off, Print now, Screen Copy or Feed key;
the L-F is faulty.

Fig. 4-4 Key Operation Troubleshooting

4-35
Section 4 Troubleshooting

4.5.3 Checking Power Supply Unit

WARNING
Before replacing the fuse, the AC power cord should be dis-
connected from the power source.

START

Set Power switch to OFF.


*6
Is line fuse blown? Y Replace line fuse.
N
Is the fan on the power N The power supply unit is Set Power switch to ON.
supply unit turning? faulty.
Y Y
Still blowing?
Set Power switch to OFF. N

Remove the W1 and W2


cables.

Set Power switch to ON.

Y
Is line fuse blown?
N

Check the following voltage at


the pin of the 40 pin connecter
on the power supply unit.
PIN VOLTAGE
#3 +12 V
#5 –12 V
#11 –5.2 V
#21 –2 V
#29 +5 V

N
Voltage OK? The power supply unit is faulty.
Y
Power supply unit is good.

*6: When replacing the line fuse, remove the power cord.

Fig. 4-5 Power Supply Unit Troubleshooting

4-36
4.5 Checking Other Modules

4.5.4 Checking Built-in Printer

START

N
Printer paper supplied? Supply printer paper.

Operate the printer by Y


manual operation.? The printer is good.
N
Is the built-in printer Y
test complete? PRT is faulty.
N
PRINTER is faulty.

Fig. 4-6 Built-in Printer Troubleshooting

4.5.5 Checking RS-232C Interface (Option 01)


Connect the cable as shown in Fig. 4-5-5-1.
Set the RS-232C interface on the screen as follows:
RS-232C interface [ Control ]
Speed [ 9600 ]
Character length [ 8 bit ]
Match the interface board
Parity [ Even ]
of the controller.
Stop bit [ 2 bit ]
Flow control [ Ready/Busy ]

Then, issue a command from the controller. Check that the following operation can be
execute.
Send command : *IDN?
Receive data : ANRITSU, MP1570A, 0, 1

MP1570A

• • • •
• • • •
• • • • Controller
RS-232C cable
RS-232C

Fig. 4-7 Connection Diagram

If the receive data is not correct, CPU will be faulty.

4-37
Section 4 Troubleshooting

4.5.6 Checking GPIB Interface (Option 02)


Connect the cable as shown in Fig. 4-5-6-1.
Set the GPIB interface on the screen as follows:
GPIB interface [ Control ]
Address [ 30 ] (Specify the address of the interface
board of the controller.)

Check the operation in the same way as explained in RS232C interface.

MP1570A

• • • •
• • • •
• • • • Controller
GPIB cable
GPIB

Fig. 4-8 Connection Diagram

If the receive data is not correct, CPU will be faulty.

4-38
4.5 Checking Other Modules

4.5.7 Checking ETHERNET (Option 03)


Connect the cable as shown in Fig.4-9.
Check the operation in the same way as explained in RS232C interface.
It the receive data is not correct, CPU will be faulty.

10 Base-T cross cable


Ethernet

Fig. 4-9 Connection Diagram

4.5.8 Checking VGA OUTPUT (Option 04)


Connect the cable as shown in Fig. 4-10.
Check the screen of the external CRT screen is the same as the screen of MP1570A.
It the externl CRT screen is not same as the screen of MP1570A, VGA OUTPUT will
be faulty.

Display cable

Fig. 4-10 Connection Diagram

4-39
Section 4 Troubleshooting

4.5.9 Checking Frame Memory/Capture (2.5 G/10 G)

Confirm that there is no warning points in the


MP1570A function and the MU150000A
function before doing the MU150000A
OPT-01 troubleshooting.

Check no error/alarm detecting on the


condition shown in Table 4-1, and confirm
the frame capture function on manual trigger
mode. Copying captured data to frame
memory area in Set-up:
Frame memory sub screen.
Set the condition shown in Table 4-1, and
confirm the frame memory function.

“No error/alarm” MU150000A OPT-01


Detect error/alarm?
functions are O.K.

“Detect error/alarm”

MU150000A OPT-01 is
faulty.

Table 4-1
Bit rate Mapping Test pattern Pattern
9.953 G STM64-VC4*64c-Bulk Word16 1111000011110000

4-40 .
Section 5 Replacing Modules

5.1 Disassembly ............................................................. 5-2


5.2 MP1570A Disassembly ............................................. 5-2
5.2.1 Outside Disassembly ..................................... 5-2
5.2.2 Front Panel Unit Disassembly ....................... 5-7
5.2.3 Rear Panel Unit Disassembly ........................ 5-9
5.2.4 Printer Unit Disassembly ............................... 5-11
5.2.5 Power Supply Unit Removal .......................... 5-13
5.2.6 FDD Removal ................................................ 5-15
5.2.7 SDH Removal ................................................ 5-17
5.2.8 CPU Removal ................................................ 5-19
5.2.9 MOTHER2 Removal ...................................... 5-21
5.2.10 DC-DC Converter Removal ........................... 5-25
5.2.11 2.5 G/10 G UNIT Disassembly ...................... 5-28

5-1
Section 5 Replacing Modules

5.1 Disassembly
This section describes how to disassemble the MP1570A SONET SDH/PDH/ATM
Analyzer and optical interface units.
Refer to this section and section 1.4 (about wiring) when replacing modules.

5.2 MP1570A Disassembly


5.2.1 Outside Disassembly
Make the figure of 5-2-1 a reference, and work.

5.2.1.1 Removing the Top Cover


1. Remove the two rear foot holders [9].
2. Remove the screw [23] securing the center of the top cover to the rear panel.
3. Remove the six screws [25] securing the top cover to the printer unit.
4. Remove the two screws [24] securing the top cover to the front panel.
5. Gently lift the top cover at the rear panel edge and remove it by sliding it off
towards the rear panel.

5.2.1.2 Removing the Right Side Cover


1. Remove the feet and foot holders [9] [10] [11] [12].
2. Remove the screw [27] securing the center of the right cover to the right frame.
3. Slide the front bezel ahead slightly and remove the right side cover.

5.2.1.3 Removing the Left Side Cover


1. Remove the feet and foot holders in a similar way to the right side cover.
2. Open the rubber covers at each end of the side handle and remove the two screws;
remove the handle.
3. Remove the screw securing the center of the left cover to the left side frame.
4. Slide the front bezel ahead slightly and remove the left side cover.

5.2.1.4 Removing the Bottom Cover


1. Remove the two rear feet of the bottom [10].
2. Remove the screw securing the center of the bottom cover to the rear panel.
3. Gently lift the bottom cover at the rear panel edge and remove it by sliding it off
towards the rear panel.

5-2
5.2 MP1570A Disassembly

5.2.1.5 Removing the Front Panel Unit


1. Unplug an plug-in unit.
2. Remove the top cover. (See section 5.2.1.1)
3. Remove the bottom cover. (See section 5.2.1.4)
4. Remove the front foot and foot holders [11] [12] securing the front bezel.
5. Pull the front bezel in front.
6. Remove the screw [32] securing the front panel unit to the package guide from the
top.
7. Remove the two bottom side screws be caught in the right securing the front panel
unit to the chassis.
8. Remove the two screws securing the front panel to the right side frame.
9. Remove the two screws securing the front panel to the left side frame.
10. Disconnect the cables between the front panel unit and the A01 MOTHER1.
11. Pull the front panel unit in front.

Table 5-1 Parts List for Outside Disassembly


No. Description Drawing No. Remark
1 Top cover B0455
2 Bottom cover B0456
3 Left side cover B0457
4 Right side cover B0458
5 Front bezel B0459
6 Front panel unit –
7 Plug-in unit –
8 Handle B0460B
9 Rear foot holder B0461/B
10 Rear foot B0462/B
11 Front foot holder B0463/B
12 Front foot B0464/B
21 to 32 Screws –
13 Tilt Stand B0330C

5-3
Section 5 Replacing Modules

5-4
5.2 MP1570A Disassembly

Fig. 5-1 Outside Disassembly Diagram


5-5
Section 5 Replacing Modules

5-6
5.2 MP1570A Disassembly

5.2.2 Front Panel Unit Disassembly


Make the figure of 5-2-2 a reference, and work.

5.2.2.1 Removing the LCD


1. Remove the front panel unit. (See section 5.2.1.5)
2. Disconnect the all cables between the inverter and other board.
3. Disconnect the cable between the R-F and the L-F.
4. Remove the two screws [11] [12], then remove the package cover [2] and the in-
verter board.
5. Remove the seven screws (top 4 bottom 3) connecting the LCD cover with the
front panel.
6. Remove the LCD cover.
7. Remove the screws which fix the four corners of H1 LCD.

5.2.2.2 Removing the R-F


1. Remove the LCD cover. (See section 5.2.2.1)
2. Remove the six screws securing A03 R-F to the front panel.

5.2.2.3 Removing the L-F


1. Remove the LCD cover. (See section 5.2.2.2)
2. Remove the three screws securing A04 L-F to the front panel.

Table 5-2 Parts List for Front Panel Unit Disassembly


No. Description Drawing No. Remark
1 Front panel B0465
2 Package cober 44B107511
3 LCD cover 433B46473
11 to 18 Screws –

5-7
5-8
Section 5 Replacing Modules

Fig. 5-2 Front Panel Unit Disassembly Diagram


5.2 MP1570A Disassembly

5.2.3 Rear Panel Unit Disassembly


Make the figure of 5-2-3 a reference, and work.

5.2.3.1 Removing the GPIB/232C


1. Loosen the two screws [11] and pull the GPIB/232C at the back.

5.2.3.2 Removing the Rear Panel Unit


1. Remove the GPIB/232C. (See section 5.2.3.1)
2. Remove the all plug-in units inserted from right side.
3. Remove the top cover. (See section 5.2.1.1)
4. Remove the bottom cover. (See section 5.2.1.4)
5. Remove the left side cover. (See section 5.2.1.3)
6. Remove the right side cover. (See section 5.2.1.2)
7. Remove the four screws [13] [14] securing the rear panel unit to the power supply
unit.
8. Remove the six screws [12].
9. Remove the two screws [16].
10. Remove the three screws [15] securing the rear panel unit to the package guide.
11. Gently pull the rear panel unit at the back, then you’ll see a cable (FAN) connected
to the MOTHER1. Disconnect this connector.

Table 5-3 Parts List for Rear Panel Unit Disassembly


No. Description Drawing No. Remark
1 Rear panel B0466
11 to 17 Screws –
2 Fun guard B0467
3 Nuts –

5-9
5-10
Section 5 Replacing Modules

Fig. 5-3 Rear Panel Unit Disassembly Diagram


5.2 MP1570A Disassembly

5.2.4 Printer Unit Disassembly


Make the figure of 5-2-4 a reference, and work.

5.2.4.1 Removing the Printer Unit


1. Remove the top cover. (See section 5.2.1.1)
2. Remove the left side cover. (See section 5.2.1.3)
3. Remove the bottom cover. (See section 5.2.1.4)
4. Remove the three screws [11] securing the printer unit to the left side frame.
5. Remove the two screws [12] securing it to the chassis.
6. Disconnect the cable (W15) between MOTHER1 and PRT.
7. Gently lift the Printer unit vertically.

5.2.4.2 Removing the P1 Printer


1. Remove the printer unit. (See section 5.2.4.1)
2. Remove the printer cover [2].
3. Remove the role paper [4].
4. Loosen the screws which fix the four corners of the P1 printer.
5. Pick the edge of connector (X1) at PRT and pull up it to remove the lock.
6. Pull out the cable between X1 at PRT and P1 printer.

5.2.4.3 Removing the A05 PRT


1. Remove the printer unit. (See section 5.2.4.1)
2. Remove the four screws [14] securing the PRT to the printer holder [1].
3. Pick the edge of connector (X1) at PRT and pull up it to remove the lock.
4. Pull out the cable between X1 at PRT and printer.

Table 5-4 Parts List for Printer Unit Disassembly


No. Description Drawing No. Remark
1 Printer holder –
2 Printer cover B0468
3 Button B0469
4 Role paper –
11 to 14 Screws –
5 Shaft B0470

5-11
Section 5 Replacing Modules

Fig. 5-4 Printer Unit Disassembly Diagram


5-12
5.2 MP1570A Disassembly

5.2.5 Power Supply Unit Removal


Make the figure of 5-2-5 a reference, and work.

5.2.5.1 Removing the Power Supply Unit


1. Remove the top cover. (See section 5.2.1.1)
2. Remove the bottom cover. (See section 5.2.1.4)
3. Remove the left side cover. (See section 5.2.1.3)
4. Remove the right side cover. (See section 5.2.1.2)
5. Remove the GPIB/232C. (See section 5.2.3.1)
6. Loosen the rear panel unit. (Refer to it from the section 5.2.3.2 process 7 to 10.)
7. Disconnect the cables W1 and W2.
8. Remove the safety cover [1].
9. Disconnect the cables (screw [14]) connected with the terminal base.
10. Remove the two screws [11] securing power supply unit to the left side frame.
11. Remove the five screws [15] securing power supply unit to the chassis.
12. Gently lift the power supply unit with being careful in the rear.

Table 5-5 Parts List for G1 Power Supply Unit Removal


No. Description Remark
1 Safety cover
11 to 14 Screws

5-13
Section 5 Replacing Modules

Fig. 5-5 Power Supply Unit Removal Diagram


5-14
5.2 MP1570A Disassembly

5.2.6 FDD Removal


Make the figure of 5-2-6 a reference, and work.

5.2.6.1 Removing the SDH Cover


1. Remove the top cover. (See section 5.2.1.1)
2. Remove the two upper front foot holders.
3. Pull the front bezel to be seen the front panel. (Refer to the inside of the circle of
the speck chain line.)
4. Remove the seven screws securing the SDH cover [2] to the package guide.
5. Remove the four screws securing the SDH cover [2] to the front panel.
6. Pull up the SDH cover [2] vertically.

5.2.6.2 Removing the FDD


1. Remove the SDH cover [2]. (See section 5.2.6.1)
2. Loosen the two screws [12] the FDD holder [3] to the package guide
3. Remove the two screws [13] to fix the FDD.
4. Pick the edge of the connector (X7) at CPU and pull up it to remove the lock.
5. Disconnect the cable (W3) between CPU and FDD.
6. Gently pull out the FDD with being careful in the W3 cable.

Table 5-6 Parts List for D1 FDD Removal


No. Description Remark
1 Front bezel
2 SDH cover
3 FDD holder
11 to 13 Screws

5-15
Section 5 Replacing Modules

Fig. 5-6 FDD Removal Diagram


5-16
5.2 MP1570A Disassembly

5.2.7 SDH Removal


Make the figure of 5-2-7 a reference, and work.

5.2.7.1 Removing the SDH


1. Remove the SDH cover. (See section 5.2.6.1)
2. Remove the six screws securing the SDH to the package guide.
3. Disconnect all cables connected with the SDH.
4. Take the SDH ejector, and it is pulled in the right direction and removed.

Table 5-7 Parts List for SDH Removal


No. Description Remark
1 Front bezel
2 SDH cover
3 SDH ejector
11, 12 Screws

5-17
Section 5 Replacing Modules

Fig. 5-7 SDH Removal Diagram


5-18
5.2 MP1570A Disassembly

5.2.8 CPU Removal


Make the figure of 5-2-8 a reference, and work.

5.2.8.1 Removing the CPU


1. Remove the top cover. (See section 5.2.1.1)
2. Remove the two screws [11] to take off the CPU package holder [1].
3. Disconnect all cables connected with the CPU.
4. Pull the ejector up and remove it.

Table 5-8 Parts List for A07 CPU Removal


No. Description Remark
1 CPU package holder
11 Screw

5-19
Section 5 Replacing Modules

Fig. 5-8 CPU Removal Diagram


5-20
5.2 MP1570A Disassembly

5.2.9 MOTHER2 Removal


Make the figure of 5-2-9 a reference, and work.

5.2.9.1 Removing the MOTHER2


1. Referring to section 5.2.7, remove the SDH.
2. Eject plug-in units inserted into slot numbers 1 to 5.
3. Remove the twelve screws [11] securing MOTHER2 to the package guide.
4. Gently pull up the MOTHER2 vertically.

Table 5-9 Parts List for MOTHER2 Removal


No. Description Drawing No. Remark
1 to 4 Plug-in units –
11 Screw –
Blank panel
– B0454C
(Slot 1-3)
Blank panel
– B0454D
(Slot 4-5)
Blank panel
– B0453B
(Front)

5-21
Section 5 Replacing Modules

5-22
5.2 MP1570A Disassembly

Fig. 5-9 MOTHER2 Removal Diagram


5-23
Section 5 Replacing Modules

5-24
5.2 MP1570A Disassembly

5.2.10 DC-DC Converter Removal


Make the figure of 5-2-10 a reference, and work.

5.2.10.1 Removing the DC-DC Converter


1. Referring to section 5-2-7, remove the SDH.
2. Eject plug-in units inserted into slot number 1 to 5.
3. Remove the three screws [11] securing DC-DC converter to the MOTHER1.
4. Gently pull up the DC-DC converter vertically.

Table 5-10 Parts List for DC-DC converter


No. Description Remark
11 Screws

5-25
Section 5 Replacing Modules

Fig. 5-10 DC-DC CONVERTER Removal Diagram


5-26
5.2 MP1570A Disassembly

Fig. 5-11 2.5 G/10 G UNIT Removal Diagram


5-27
Section 5 Replacing Modules

5.2.11 2.5 G/10 G UNIT Disassembly


Make the figure of 11 a reference, and work

5.2.11.1 Removing the 10 G TX and 10 G RX


1. Remove the six screws [11] securing the Unit cover [1] to the 10G TX board
2. Remove the screw [12]
3. Remove the four screws [13] securing the plate nut to the 10G TX and 10G
RX board

5.2.11.2 Removing the Framememory/Capture


1. Remove the four screws [16] securing the Framememory/capture to the 10G
RX board
2. Gently lift the Framememory/capture vertically

No. Description Drawing No. Remark


1 Unit cover 43B46491
2 Plate nut 44B108197
3 Stay
4 Stay
5 Stay
6 Stay
7 Stay
8 boss 44B104743B
11 to 16 Screws

5-28 .
Appendix A Self-test Error Code

A.1 About Self-test Error Code ....................................... A-2


A.2 Error Details .............................................................. A-3

A-1
Appendix A

A.1 About Self-test Error Code


If an error is detected in self-test, an error code correspondent to the type of the error is
indicated.
An error code consists of two alphanumerical characters and a 4-digit figure (hexadeci-
mal).

A-2
A.2 Error Details

A.2 Error Details


The tables below list the messages displayed and the details of errors indicated by
individual bits.
– If two messages are showed in a message column, the upper is the message for
SDH, and the lower is the massage for SONET.

Message for SDH

Message for SONET 0E Signal (156M<->VC2) Anerror or alarm was detected under t
Signal (156M<->VT6SPE) b0 BRate = 156M, Mapping = VC2 (Bull
TUG2# = 1, Pattern = PRBS11
b1 BRate = 156M, Mapping = VC2-6M (
TUG2# = 2, Pattern = PRBS15

(1) MP0121A 2/8/34/139M Unit

‘0A - 0B’ Checks on Signals 1


Char. Message Bit Error Details
0A Signal (2/8/34/139M: An error or alarm was detected under the following conditions:
Unbalanced) b0 BRate = 2M, Pattern = PRBS11, Frame = OFF
b1 BRate = 8M, Pattern = PRBS15, Frame = OFF
b2 BRate = 34M, Pattern = PRBS20, Frame = OFF
b3 BRate = 139M, Pattern = PRBS23, Frame = OFF
b4 BRate = 2M, Pattern = PRBS11, Frame = ON
b5 BRate = 8M, Pattern = PRBS15, Frame = ON
b6 BRate = 34M, Pattern = PRBS20, Frame = ON
b7 BRate = 139M, Pattern = PRBS23, Frame = ON
0B Signal (2M:Balanced) An error or alarm was detected under the following conditions:
b0 BRate = 2M, Pattern = “11101001001101001”, Frame = ON

A-3
Appendix A

‘0C - 0E’ Checks on Signals 2 (SDH) #1


Char. Message Bit Error Details
0C Signal (622M<->VC4) b0 An error or alarm was detected under the following conditions:
BRate = 622M, Mapping:VC4 (Bulk), AUG# = 1 to 4
Pattern = PRBS23
0D Signal (156M<->VC4, VC3) An error or alarm was detected under the following conditions:
Signal (156M b0 BRate = 156M, Mapping = VC4 (Bulk), AUG# = 1
<-STS3cSPE, STS1SPE) Pattern = PRBS20
b1 BRate = 156M, Mapping = 139M (Async.), AUG# = 1, Frame = OFF
Pattern = PRBS15
b2 BRate = 156M, Mapping = 139M (Async.), AUG# = 1, Frame = ON
Pattern = “1010101010101010”
b3 BRate = 156M, Mapping = VC3 (Bulk), AUG# = 1, TUG3# = 1
Pattern = PRBS23
b4 BRate = 156M, Mapping = 34M (Async.), AUG# = 1, TUG3# = 2
Pattern = PRBS15
b5 BRate = 156M, Mapping = 34M (Sync.), AUG# = 1, TUG3# = 3
Pattern = PRBS11
0E Signal (156M<->VC2) An error or alarm was detected under the following conditions:
Signal (156M<->VT6SPE) b0 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 1
TUG2# = 1, Pattern = PRBS11
b1 BRate = 156M, Mapping = VC2-6M (Async.), AUG# = 1, TUG3# = 1
TUG2# = 2, Pattern = PRBS15
b2 BRate = 156M, Mapping = VC2-6M (Bitsync.), AUG# = 1, TUG3# = 1
TUG2# = 3, Pattern = PRBS20
b3 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 2
TUG2# = 5, Pattern = “1010101010101010”
b4 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 3
TUG2# = 6, Pattern = “1010101010101010”
b5 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 3
TUG2# = 7, Pattern = “1010101010101010”
b6 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 1, TUG2# = 1
mc# = 7, Pattern = PRBS11
b7 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 1, TUG2# = 2
mc# = 6, Pattern = PRBS15
b8 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 1, TUG2# = 3
mc# = 5, Pattern = PRBS20
b9 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 2, TUG2# = 4
mc# = 4, Pattern = PRBS23
b10 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 2, TUG2# = 5
mc# = 3, Pattern = “1010101010101010”
b11 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 3, TUG2# = 6
mc# = 2, Pattern = “1010101010101010”
b12 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 3, TUG2# = 7
mc# = 1, Pattern = “1010101010101010”
A-4
A.2 Error Details

‘0F - 0I’ Checks on Signals 2 (SDH) #2


Char. Message Bit Error Details
0F Signal (156M<->VC12) An error or alarm was detected under the following conditions:
Signal (156M<->VT2SPE) b0 BRate = 156M, Mapping = VC12 (Bulk), AUG# = 1, TUG3# = 1
TUG2# = 1, TU12# = 1, Pattern = PRBS11
b1 BRate = 156M, Mapping = 2M (Async.), AUG# = 1, TUG3# = 2
TUG2# = 2, TU12# = 1, Pattern = PRBS15
b2 BRate = 156M, Mapping = 2M (Async.), AUG# = 1, TUG3# = 2
TUG2# = 3, TU12# = 1, Pattern = PRBS15
b3 BRate = 156M, Mapping = 2M (BitF), AUG# = 1, TUG3# = 3
TUG2# = 4, TU12# = 2, Pattern = PRBS20
b4 BRate = 156M, Mapping = 2M (BitL), AUG# = 1, AU3# = 1
TUG2# = 5, TU12# = 2, Pattern = PRBS23
b5 BRate = 156M, Mapping = 2M (ByteF), AUG# = 1, AU3# = 2
TUG2# = 6, TU12# = 3, Pattern = “1010101010101010”
b6 BRate = 156M, Mapping = 2M (ByteL), AUG# = 1, AU3# = 3
TUG2# = 7, TU12# = 3, Pattern = PRBS11
0G Signal (156M<->VC11) An error or alarm was detected under the following conditions:
b0 BRate = 156M, Mapping = VC11 (Bulk), AUG# = 1, TUG3# = 1
Signal TUG2# = 1, TU12# = 1, Pattern = PRBS11
(156M<->VT1.5SPE) b1 BRate = 156M, Mapping = 1.5M (Async.), AUG# = 1, TUG3# = 2
TUG2# = 2, TU12# = 1, Pattern = PRBS15
b2 BRate = 156M, Mapping = 1.5M (Async.), AUG# = 1, TUG3# = 2
TUG2# = 3, TU12# = 1, Pattern = PRBS15
b3 BRate = 156M, Mapping = 1.5M (BitF), AUG# = 1, TUG3# = 3
TUG2# = 4, TU12# = 2, Pattern = PRBS20
b4 BRate = 156M, Mapping = 1.5M (BitL), AUG# = 1, AU3# = 1
TUG2# = 5, TU12# = 2, Pattern = PRBS23
b5 BRate = 156M, Mapping = 1.5M (ByteF), AUG# = 1, AU3# = 2
TUG2# = 6, TU12# = 3, Pattern = “1010101010101010”
b6 BRate = 156M, Mapping = 1.5M (ByteL), AUG# = 1, AU3# = 3
TUG2# = 7, TU12# = 3, Pattern = PRBS11
0H Signal An error or alarm was detected under the following conditions:
(156M CMI<->VC4) b0 BRate = 156M CMI, Mapping = VC4 (Bulk), AUG# = 1
Signal Pattern = PRBS23
(156M CMI<->
STS3cSPE)
0I Signal (Concatenation An error or alarm was detected under the following conditions:
Mapping 622M, 156M) b0 BRate = 622M, Concatenation Mapping = STM4C-VC4*4C
Pattern = PRBS23

A-5
Appendix A

‘0J - 0N’ Checks on Signals 2 (SDH) #3


Char. Message Bit Error Details
0J Signal (Dummy 622M) An error or alarm was detected under the following conditions:
b0 BRate = 622M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 2, TUG3# = 1, TUG2# = 1, TU12# = 1,
Pattern = PRBS15
b1 BRate = 622M, Mapping = VC4 (Bulk), Pattern = PRBS15,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 3, TUG3# = 3, TUG2# = 7, TU12# = 3,
Pattern = PRBS15
0K Signal (Mixed) An error or alarm was detected under the following conditions:
b0 BRate = 622M, Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU12 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
b1 BRate = 622M, Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU12 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU12 (Bulk),
Pattern = PRBS23
b2 BRate = 622M, Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU12 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b3 BRate = 622M, Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU12 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU12 (Bulk),
Pattern = PRBS23
b4 BRate = 622M, Main CH Mapping = VC4-TUG3 (#3)-TU12 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b5 BRate = 622M, Main CH Mapping = VC4-TUG3 (#3)-TU12 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk) Mixed CH
Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23

A-6
A.2 Error Details

Char. Message Bit Error Details


0L Signal (CID) An error or alarm was detected under the following conditions:
b0 BRate = 622M
0M Signal (Non frame) An error or alarm was detected under the following conditions:
b0 BRate = 622M, Pattern = PRBS23
b1 BRate = 156M, Pattern = PRBS23
0N Signal (OH test) An error or alarm was detected under the following conditions:
b0 BRate = 622M, Mapping = AU4-VC4 (Bulk), Pattern = PRBS11,

‘0O - 0P’ Checks on Error/Alarm 1 (PDH)


Char. Message Bit Error Details
0O Error/Alarm The following error/alarm detection is outside the specification:
(34M/139M errors) b0 BRate=139M,Code error(Single)
b1 BRate=139M,Code error(Rate)
b2 BRate=139M,Bit139M error(Single)
b3 BRate=139M,Bit139M error(Rate)
b4 BRate=139M,FAS139M error(Count)
b5 BRate=34M,Code error(Single)
b6 BRate=34M,Code error(Rate)
b7 BRate=34M,Bit34M error(Single)
b8 BRate=34M,Bit34M error(Rate)
b9 Brate=34M,FAS34M error(Count)
0P Error/Alarm The following error/alarm detection is outside the specification:
(2M/8M errors) b0 BRate=8M,Code error(Single)
b1 BRate=8M,Code error(Rate)
b2 BRate=8M,Bit8M error(Single)
b3 BRate=8M,Bit8M error(Rate)
b4 BRate=8M,FAS8M error(Count)
b5 BRate=2M,Code error(Single)
b6 BRate=2M,Code error(Rate)
b7 BRate=2M,Bit2M error(Single)
b8 BRate=2M,Bit2M error(Rate)
b9 BRate=2M,EBit error(Rate)
b10 BRate=2M,FAS 2M error(Count)

A-7
Appendix A

‘0Q - 0R’ Checks on Error/Alarm 2 (PDH)


Char. Message Bit Error Details
0Q Error/Alarm The following alarm detection is outside the specification:
(34/139M alarms) b0 AIS 139M
b1 RDI 139M
b2 LOS (139M)
b3 LOF 139M
b4 AIS 34M
b5 RDI 34M
b6 LOS (34M)
b7 LOF 34M
0R Error/Alarm The following alarm detection is outside the specification:
(2/8M alarms) b0 AIS 8M
b1 RDI 8M
b2 LOS (8M)
b3 LOF 8M
b4 AIS 2M
b5 RDI 2M
b6 LOS (2M)
b7 LOF 2M

A-8
A.2 Error Details

‘0S-0X’ Checks on Error/Alarm 3 (SDH)


Char. Message Bit Error Details
0S Error/Alarm The following error/alarm detection is outside the specification:
(SDH errors - bit, section) b2 B1 (Single)
Error/Alarm b3 B1 (Burst 15bit)
(SONET errors - bit, b4 B1 (Rate)
section) b5 B2 (Single)
b6 B2 (Burst 15bit)
b7 B2 (Rate)
b8 MS-REI (Single)
b9 MS-REI (Burst 15bit)
b10 MS-REI (Rate)
0T Error/Alarm The following error detection is outside the specification:
(SDH errors - HP-1) b0 HP-B3 (Single)<-VC4
Error/Alarm b1 HP-B3 (Burst 15bit)<-VC4
(SONET errors - STS-1) b2 HP-B3 (Rate)<-VC4
b3 HP-REI (Single)<-VC4
b4 HP-REI (Burst 15bit)<-VC4
b5 HP-REI (Rate)<-VC4
0U Error/Alarm The following error detection is outside the specification:
(SDH errors - HP-2 b0 HP-IEC (Single) <- VC4
Tandem) b1 HP-IEC (Burst 15bit) <- VC4
Error/Alarm b2 HP-IEC (Rate) <- VC4
(SONET errors - STS-2 b3 HP-TC-REI (Single) <- VC4
Tandem) b4 HP-TC-REI (Burst 15bit) <- VC4
b5 HP-TC-REI (Rate) <- VC4
b6 HP-OEI (Single) <- VC4
b7 HP-OEI (Burst 15bit) <- VC4
b8 HP-OEI (Rate) <- VC4

A-9
Appendix A

Char. Message Bit Error Details


0V Error/Alarm The following error detection is outside the specification:
(SDH errors - LP-1, LP-2 b0 LP-B3(Single)<-VC3
Tandem) b1 LP-B3(Burst 15bit)<-VC3
Error/Alarm b2 LP-B3(Rate)<-VC3
(SONET errors - VT-1, b3 LP-REI(Single)<-VC3
VT-2 Tandem) b4 LP-REI(Burst 15bit)<-VC3
b5 LP-REI(Rate)<-VC3
b9 LP-TC-REI (Single) <- VC3
b10 LP-TC-REI (Rate) <- VC3
b11 LP-TC-REI (Burst 15bit) <- VC3
b12 LP-OEI(Single)<-VC3
b13 LP-OEI(Rate)<-VC3
b14 LP-OEI(Burst 15bit)<-VC3
0W Error/Alarm The following error detection is outside the specification:
(SDH errors - LP-3) b0 BIP-2 (Single)<-VC12
Error/Alarm b1 BIP-2 (Burst 15bit)<-VC12
(SONET errors - VT-3) b2 BIP-2 (Rate)<-VC12
b3 LP-REI (Single)<-VC12
b5 LP-REI (Rate)<-VC12
0X Error/Alarm The following error detection is outside the specification:
(SDH errors - LP-4 b0 N2-BIP2(Single)<-VC12
Tandem) b1 N2-BIP2 (Burst 15bit)<-VC12
Error/Alarm b2 N2-BIP2 (Rate)<-VC12
(SONET errors - VT-4 b3 LP-IEC(Single)<-VC12
Tandem) b4 LP-IEC(Burst 15bit)<-VC12
b5 LP-IEC(Rate)<-VC12
b6 LP-TC-REI (Single) <- VC12
b7 LP-TC-REI (Burst 15bit) <- VC12
b8 LP-TC-REI (Rate) <- VC12
b9 LP-OEI(Single)<-VC12
b10 LP-OEI(Burst 15bit)<-VC12
b11 LP-OEI(Rate)<-VC12

A-10
A.2 Error Details

‘0Y - 1D’ Checks on Error/Alarm 4 (SDH)


Char. Message Bit Error Details
0Y Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-1) b0 LOF
Error/Alarm b1 MS-AIS
(SONET alarms-1) b2 MS-RDI
b3 AU-AIS
b4 AU-LOP
b5 HP-RDI <- VC4
b6 TU-AIS <- VC3
b7 TU-LOP <- VC3
b8 LP-RDI <- VCC3
0Z Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-2 Tandem) b0 HP-VC-AIS <- VC4
(SONET alarms-2 b2 HP-FAS <- VC4
Tandem) b3 HP-IncAIS <- VC4
b4 HP-TC-RDI <- VC4
b5 HP-ODI <- VC4
1A Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-3) b0 TU-LOM
Error/Alarm b1 LP-RDI <- VC12
(SONET alarms-3) b2 TU-RFI <- VC12
b3 TU-LOP <- VC12
b4 TU-AIS <- VC12
1B Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-4 Tandem) b0 LP-VC-AIS <- VC12
(SONET alarms-4 b2 LP-FAS <- VC12
Tandem) b3 LP-IncAIS <- VC12
b4 LP-TC-RDI <- VC12
b5 LP-ODI <- VC12
1C Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-5) b0 OOF
Error/Alarm
(SONET alarms-5)
1D Error/Alarm The following alarm detection is outside the specification:
(SDH alarms: 156M CMI) b0 LOS
Error/Alarm
(SONET alarms: 156M
CMI)

A-11
Appendix A

‘1E’ Checks on Pointer Sequence


Char. Message Bit Error Details
1E Pointer sequence The following abnormality is occurred:
b0 Single of opposite polarity (PTR-AU) is abnormal.
b1 Regular with double (PTR-TU) is abnormal.
b2 Regular with missing (PTR-AU) is abnormal.
b3 Double of opposite polarity (PTR-TU) is abnormal.
b4 87-3/26-1 normal (PTR-AU) is abnormal.
b5 87-3/26-1 add (PTR-TU) is abnormal.
b6 87-3/26-1 cancel(PTR-AU) is abnormal.
b7 Continuous pattern normal (PTR-TU) is abnormal.
b8 Continuous pattern add (PTR-AU) is abnormal.
b9 Continuous pattern cancel(PTR-TU) is abnormal.

‘1F’ Checks on Clock Alarm Detection 1 (PDH)


Char. Message Bit Error Details
1F Clock loss The following abnormality is occurred:
(External clock loss) b0 External clock loss detection is abnormal.

‘1G’ Checks on Clock Alarm Detection 2 (SDH)


Char. Message Bit Error Details
1G Clock loss (Unlock) The following abnormality is occurred:
b0 DCS clock loss detection is abnormal.
b1 Lock detection is abnormal.

A-12
A.2 Error Details

‘1H’ Checks on MUX/DEMUX (PDH)


Char. Message Bit Error Details
1H MUX/DEMUX An error or alarm was detected under the following conditions:
1(2/8/34/139M) b0 BRate=139M,MUX/DEMUX=64K,34M#=1,8M#=1,2M#=1
64K#(1)=1to31,64K#(2)=1,Signalling=OFF,2MCH=31,Pattern=PRBS11
b1 BRate=139M,MUX/DEMUX=2M,34M#=1,8M#=1,
2M#= 1to4,Signalling=OFF,2MCH=31,Pattern=PRBS15
b2 BRate=139M,MUX/DEMUX=8M,34M#=1,8M#=1to4,
Signalling=OFF,2MCH=31,Pattern=PRBS20
b3 BRate=139M,MUX/DEMUX=34M,34M#=1to4,
Signalling=OFF,2MCH=31,Pattern=PRBS23
b4 BRate=34M,MUX/DEMUX=64K,8M#=1,2M#=1,
64K#(1)=1,64K#(2)=1,Signalling=ON,2MCH=30
Pattern=PRBS11
b5 BRate=34M,MUX/DEMUX=2M,8M#=1,2M#=1,
Signalling=ON,2MCH=30,Pattern=PRBS15
b6 BRate=34M,MUX/DEMUX=8M,8M#=1
Signalling=ON,2MCH=30,Pattern=PRBS20
b7 BRate=8M,MUX/DEMUX=64K,2M#=1,64K#(1)=2,
64K#(2)=5,Signalling=ON,2MCH=30 ,Pattern=PRBS23
b8 BRate=8M,MUX/DEMUX=2M,2M#=1,Signalling=ON
2MCH=30,Pattern=PRBS11
b9 BRate=2M,MUX/DEMUX=64K,64K#(1)=10,64K#(2)=18
Signalling=ON,2MCH=30,Pattern=PRBS11

‘1I’ Checks on MUX/DEMUX (SDH)


Char. Message Bit Error Details
1I MUX/DEMUX 2 (SDH) An error or alarm was detected under the following conditions:
b0 BRate=156MCMI,Mapping=139M(Async),AUG#=1
34M#=1,8M#=1,2M#=1,64k#(1)=1,64k#(2)=1
Pattern=PRBS11
b1 BRate=156MCMI,Mapping=34M(Async),AUG#=1
TUG3#=3,8M#=1,2M#=1,64K#(1)=1,64K#(2)=1
Pattern=PRBS11
b2 BRate=156MCMI,Mapping=2M(ByteL),AUG#=1
TUG3#=3,TUG2#=7,TU12#=3,64K#(1)=1
64k#(2)=1,Pattern=PRBS15

A-13
Appendix A

‘1J’ Checks on
Char. Message Bit Error Details
1J Error/Alarm The following error detection is outside the specification:
(MUX/DEMUX errors) b0 Bit139M(139M<->64K)
b1 Bit info(139M<->64K)
b2 Bit34M(34M<->64K)
b3 Bit info(34M<->64K)
b4 Bit8M(8M<->64K)
b5 Bit info(8M<->64K)
b6 Bit2M(2M<->64K)
b7 Bit info(2M<->64K)

‘1K’ Checks on Error/Alarm 6 (PDH)


Char. Message Bit Error Details
1K Error/Alarm The following alarm detection is outside the specification:
(MUX/DEMUX alarms) b0 AIS 34M
b1 LOF 34M
b2 RDI 34M
b3 AIS 8M
b4 LOF 8M
b5 RDI 8M
b6 AIS 2M
b7 LOF 2M
b8 RDI 2M
b9 RDI MF

‘1L’ Checks on Delay Measurement


Char. Message Bit Error Details
1L Delay The following abnormality is occurred:
b0 Delay value is not 0.

‘1M’ Checks on Justification


Char. Message Bit Error Details
1M Justification The following abnormality is occurred:
b0 PTR-AU +PJC count is abnormal.
b1 PTR-AU -PJC count is abnormal.
b2 PTR-TU (TU3) +PJC count is abnormal.
b3 PTR-TU(TU3) -PJC count is abnormal.
b4 PTR-TU(TU2) +PJC count is abnormal.
b5 PTR-TU(TU2) -PJC count is abnormal.
b6 PTR-TU(TU12) +PJC count is abnormal.
b7 PTR-TU(TU12) -PJC count is abnormal.

A-14
A.2 Error Details

‘1N’ Check of NDF, C, C1/C2


Char. Message Bit Error Details
1N NDF, C, C1/C2 The following abnormality is occurred:
b0 PTR-AU NDF count is abnormal.
b1 C count is abnormal.
b2 PTR-TU(TU3) NDF count is abnormal.
b3 PTR-TU(TU2) NDF count is abnormal.
b4 PTR-TU(TU12) NDF count is abnormal.
b5 C1 count is abnormal.
b6 C2 count is abnormal.

‘1O’ Check of OH Pattern


Char. Message Bit Error Details
1O OH pattern The following abnormal is occurred:
b0 K1, K2 is abnormal.
b1 SOH (STM-4), POH(VC4, VC3) is abnormal.
b2 SOH (STM-1), POH(VC4, VC1) is abnormal.

‘1P’ Check of Path Trace


Char. Message Bit Error Details
1P Path trace The following abnormal is occurred:
b0 J0 is abnormal.
b1 J0 CRC detection is abnormal.
b2 J1-HP is abnormal.
b3 J1-HP CRC detection is abnormal.
b4 J1-LP is abnormal.
b5 J1-LP CRC detectino is abnormal.
b6 J2 is abnormal.
b7 J2 CRC detection is abnormal.

A-15
Appendix A

(2) MP0121A/MP0122B 1.5/45/52M Unit

‘2A - 2B’ Checks on Signals


Char. Message Bit Error Details
2A Signal (1.5M) An error or alarm was detected under the following conditions:
b0 Code = AMI, Frame = OFF, DSX = 0ft, Pattern = PRBS11
b1 Code = B8ZS, Frame = OFF, DSX = 655ft, Pattern = PRBS15
b2 Framed (1.5M) = D4, Code = AMI, Frame = ON, DSX = 0ft
Pattern = PRBS20
b3 Framed (1.5M) = ESF, Code = B8ZS, Frame = ON, DSX = 655ft
Pattern = PRBS20z
2B Signal (45M) An error or alarm was detected under the following conditions:
b0 Frame = OFF, DSX = 0ft, Pattern = PRBS20z
b1 Framed (45M) = M13, Frame = ON, DSX = 450ft, Pattern = PRBS23
b2 Framed (45M) = C-bit, Frame = ON, DSX = 900ft
Pattern = “1010101010101010”

A-16
A.2 Error Details

‘2C - 2E’ Checks on Signals 2 (SDH) #1


Char. Message Bit Error Details
2C Signal (622M<->VC3) An error or alarm was detected under the following conditions:
b0 BRate = 622M, Mapping:VC3 (Bulk), AUG# = 1 to 4, TUG3# = 1
Signal (622M<-STS1SPE) Pattern = PRBS23
2D Signal (156M<->VC3) An error or alarm was detected under the following conditions:
b0 BRate = 156M, Mapping = VC3 (Bulk), AUG# = 1, TUG3# = 1 to 3
Signal (156M<-STS1SPE) Pattern = PRBS20
b1 BRate = 156M, Mapping = 45M (Async.), AUG# = 1, AU3# = 1 to 3
Frame = OFF, Pattern = PRBS20z
2E Signal (156M<->VC2) An error or alarm was detected under the following conditions:
b0 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 1
Signal (156M<->VT6SPE) TUG2# = 1, Pattern = PRBS11
b1 BRate = 156M, Mapping = VC2-6M (Async.), AUG# = 1, TUG3# = 1
TUG2# = 2, Pattern = PRBS15
b2 BRate = 156M, Mapping = VC2-6M (Bitsync.), AUG# = 1, TUG3# = 1
TUG2# = 3, Pattern = PRBS20
b3 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 2
TUG2# = 5, Pattern = “1010101010101010”
b4 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 3
TUG2# = 6, Pattern = “1010101010101010”
b5 BRate = 156M, Mapping = VC2 (Bulk), AUG# = 1, TUG3# = 3
TUG2# = 7, Pattern = “1010101010101010”
b6 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 1, TUG2# = 1
mc# = 7, Pattern = PRBS11
b7 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 1, TUG2# = 2
mc# = 6, Pattern = PRBS15
b8 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 1, TUG2# = 3
mc# = 5, Pattern = PRBS20
b9 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 2, TUG2# = 4
mc# = 4, Pattern = PRBS23
b10 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 2, TUG2# = 5
mc# = 3, Pattern = “1010101010101010”
b11 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 3, TUG2# = 6
mc# = 2, Pattern = “1010101010101010”
b12 BRate = 156M, Mapping = VC2 (mc), AUG# = 1, AU3# = 3, TUG2# = 7
mc# = 1, Pattern = “1010101010101010”

A-17
Appendix A

‘2F - 2H’ Checks on Signals 2 (SDH) #2


Char. Message Bit Error Details
2F Signal (156M<->VC11) An error or alarm was detected under the following conditions:
b0 BRate = 156M, Mapping = VC11 (Bulk), AUG# = 1, TUG3# = 1
Signal TUG2# = 1, TU11# = 1, Pattern = PRBS11
(156M<->VT1.5SPE) b1 BRate = 156M, Mapping = 1.5M (Async.), AUG# = 1, TUG3# = 2
TUG2# = 2, TU11# = 1, Pattern = PRBS15
b2 BRate = 156M, Mapping = 1.5M (BitF), AUG# = 1, TUG3# = 3
TUG2# = 3, TU11# = 2, Pattern = PRBS20
b3 BRate = 156M, Mapping = 1.5M (BitL), AUG# = 1, AU3# = 1
TUG2# = 4, TU11# = 2, Pattern = PRBS20z
b4 BRate = 156M, Mapping = 1.5M (ByteF), AUG# = 1, AU3# = 2
TUG2# = 5, TU11# = 3, Pattern = PRBS23
b5 BRate = 156M, Mapping = 1.5M (ByteL), AUG# = 1, AU3# = 3
TUG2# = 6, TU11# = 4, Pattern = “1010101010101010”
b6 BRate = 156M, Mapping = VC11 (Bulk), AUG# = 1, TUG3# = 1
TUG2# = 7, TU12# = 1, Pattern = PRBS11
b7 BRate = 156M, Mapping = 1.5M (Async.), AUG# = 1, TUG3# = 2
TUG2# = 6, TU12# = 1, Pattern = PRBS15
b8 BRate = 156M, Mapping = 1.5M (BitF), AUG# = 1, TUG3# = 3
TUG2# = 5, TU12# = 2, Pattern = PRBS20
b9 BRate = 156M, Mapping = 1.5M (BitL), AUG# = 1, AU3# = 1
TUG2# = 4, TU12# = 2, Pattern = PRBS20z
b10 BRate = 156M, Mapping = 1.5M (ByteF), AUG# = 1, AU3# = 2
TUG2# = 3, TU12# = 3, Pattern = PRBS23
b11 BRate = 156M, Mapping = 1.5M (ByteL), AUG# = 1, AU3# = 3
TUG2# = 2, TU12# = 3, Pattern = “1010101010101010”
2G Signal (156M<->VC11 An error or alarm was detected under the following conditions:
Japan mapping) b0 BRate = 156M, Mapping = 384k (Data), AUG# = 1, TUG3# = 1
TUG2# = 4, TU11# = 1, 384k# = 1, Pattern = PRBS11
Signal b1 BRate = 156M, Mapping = 384k (Data), AUG# = 1, AU3# = 1
(156M<->VT1.5SPE TUG2# = 5, TU12# = 1, 384k# = 2, Pattern = PRBS15
Japan mapping) b2 BRate = 156M, Mapping = 384k (Voice), AUG# = 1, AU3# = 1
TUG2# = 1, TU11# = 1, 384k# = 3, Pattern = PRBS20
b3 BRate = 156M, Mapping = 384k (Voice), AUG# = 1, AU3# = 1
TUG2# = 1, TU12# = 1, 384k# = 4, Pattern = “1010101010101010”
b4 BRate = 156M, Mapping = Byte (Data), AUG# = 1, TUG3# = 1
TUG2# = 4, TU11# = 1, Byte# = 1, Pattern = PRBS11
b5 BRate = 156M, Mapping = Byte (Data), AUG# = 1, AU3# = 1
TUG2# = 5, TU12# = 1, Byte# = 2, Pattern = PRBS15
b6 BRate = 156M, Mapping = Byte (Voice), AUG# = 1, AU3# = 1
TUG2# = 1, TU11# = 1, Byte# = 3, Pattern = PRBS20
b7 BRate = 156M, Mapping = Byte (Voice), AUG# = 1, AU3# = 1
TUG2# = 1, TU12# = 1, Byte# = 4, Pattern = “1010101010101010”

A-18
A.2 Error Details

Char. Message Bit Error Details


2H Signal An error or alarm was detected under the following conditions:
(52M B3ZS<->VC3) b0 BRate = 52M B3ZS, Mapping = VC3 (Bulk), AU3# = 1
Signal Pattern = PRBS23, DSX = 0ft
(52M B3ZS<->STS1SPE) BRate = 52M B3ZS, Mapping = VC3 (Bulk), AU3# = 1
b1 Pattern = PRBS15, DSX = 450ft
b2 BRate = 52M B3ZS, Mapping = VC3 (Bulk), AU3# = 1
Pattern = PRBS11, DSX = 900ft

‘2I - 2M’ Checks on Signals 2 (SDH) #3


Char. Message Bit Error Details
2I Signal (Dummy 622M) An error or alarm was detected under the following conditions:
b0 BRate = 622M,
Dummy ch Mapping (Tx) = AU4-VC11 (Bulk)
(AUG# = 1, TUG3# = 1, TU11# = 1),
Dummy ch Mapping (Rx) = AU4-VC11 (Bulk)
AUG# = 2, TUG3# = 1, TUG2# = 1, TU11# = 1,
Pattern = PRBS15
b1 BRate = 622M, Mapping = VC4 (Bulk), Pattern = PRBS15,
Dummy ch Mapping (Tx) = AU4-VC11 (Bulk)
(AUG# = 1, TUG3# = 1, TU11# = 1),
Dummy ch Mapping (Rx) = AU4-VC11 (Bulk)
AUG# = 3, TUG3# = 3, TUG2# = 7, TU11# = 3,
Pattern = PRBS15

A-19
Appendix A

Char. Message Bit Error Details


2J Signal (Mixed) An error or alarm was detected under the following conditions:
b0 BRate = 622M, Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
b1 BRate = 622M, Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU11 (Bulk),
Pattern = PRBS23
b2 BRate = 622M, Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b3 BRate = 622M, Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU11 (Bulk),
Pattern = PRBS23
b4 BRate = 622M, Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b5 BRate = 622M, Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk) Mixed CH
Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
2K Signal (CID) An error or alarm was detected under the following conditions:
b0 BRate = 622M
2L Signal (Non-frame) An error or alarm was detected under the following conditions:
b0 BRate = 622M, Pattern = PRBS23
b1 BRate = 156M, Pattern = PRBS23
b2 BRate = 52MB3ZS, Pattern = PRBS23
2M Signal (OH test) An error or alarm was detected under the following conditions:
b0 BRate = 622M, Mapping = AU3-VC3 (Bulk), Pattern = PRBS11,

A-20
A.2 Error Details

‘2N - 2O’ Checks on Error/Alarm 1 (1.5/45M)


Char. Message Bit Error Details
2N Error/alarm (45M errors) The following error detection is outside the specification:
b0 Code error (Single)
b1 Code error (Rate)
b2 Bit45M error (Single)
b3 Bit45M error (Rate)
b4 FAS45M error (Count)
b5 Parity error (Single)
b6 Parity error (Rate)
b7 C-bit error (Single)
b8 C-bit error (Rate)
b9 REI45M error (Count)
b10 REI45M error (Rate)
2O Error/alarm (1.5M errors) The following error detection is outside the specification:
b0 Code error (Single)
b1 Code error (Rate)
b2 Bit1.5M error (Single)
b3 Bit1.5M error (Rate)
b4 CRC-6 error (Single)
b5 CRC-6 error (Rate)

‘2P - 2Q’ Checks on Error/Alarm 2 (1.5/45M)


Char. Message Bit Error Details
2P Error/Alarm (45M alarms) The following error detection is outside the specification:
b0 AIS45M
b1 RDI45M
b2 LOS (45M)
b3 LOF45M
2Q Error/Alarm The following error detection is outside the specification:
(1.5M alarms) b0 AIS1.5M
b1 RDI1.5M
b2 LOS (1.5M)
b3 LOF1.5M

A-21
Appendix A

‘2R - 2X’ Checks on Error/Alarm 3 (SDH)


Char. Message Bit Error Details
2R Error/Alarm (SDH errors - The following error detection is outside the specification:
bit, section) b0 B1 (Single)
Error/Alarm (SONET b1 B1 (Burst 15bit)
errors - bit, section) b2 B1 (Rate)
b3 B2 (Single)
b4 B2 (Burst 15bit)
b5 B2 (Rate)
2S Error/Alarm (SDH errors - The following error detection is outside the specification:
bit, section) b0 HP-B3 (Single) <- VC3
Error/Alarm (SONET b1 HP-B3 (Burst 15bit) <- VC3
errors - bit, section) b2 HP-B3 (Rate) <- VC3
b3 HP-REI (Single) <- VC3
b4 HP-REI (Burst 15bit) <- VC3
b5 HP-REI (Rate) <- VC3
2T Error/Alarm (SDH errors - The following error detection is outside the specification:
HP-2 Tandem) b0 HP-IEC (Single) <- VC3
Error/Alarm (SONET b1 HP-IEC (Burst 15bit) <- VC3
errors - STS-2 Tandem) b2 HP-IEC (Rate) <- VC3
b3 HP-TC-REI (Single) <- VC3
b4 HP-TC-REI (Burst 15bit) <- VC3
b5 HP-TC-REI (Rate) <- VC3
b6 HP-OEI (Single) <- VC3
b7 HP-OEI (Burst 15bit) <- VC3
b8 HP-OEI (Rate) <- VC3
2U Error/Alarm (SDH errors - The following error detection is outside the specification:
Error/Alarm (SONET b0 LP-B3 (Single) <- VC3
errors - b1 LP-B3 (Burst 15bit) <- VC3
b2 LP-B3 (Rate) <- VC3
b3 LP-REI (Single) <- VC3
b4 LP-REI (Burst 15bit) <-VC3
b5 LP-REI (Rate) <- VC3
2V Error/Alarm (SDH errors - The following error detection is outside the specification:
LP-2 Tandem) b3 LP-TC-REI (Single) <- VC3
Error/Alarm (SONET b4 LP-TC-REI (Burst 15bit) <-VC3
errors - VT-2 Tandem) b5 LP-TC-REI (Rate) <- VC3
b6 LP-OEI (Single) <- VC3
b7 LP-OEI (Burst 15bit) <- VC3
b8 LP-OEI (Rate) <- VC3

A-22
A.2 Error Details

Char. Message Bit Error Details


2W Error/Alarm The following error detection is outside the specification:
(SDH errors - LP-3) b0 BIP-2 (Single) <- VC11
Error/Alarm b1 BIP-2 (Burst 15bit) <- VC11
(SONET errors - LP-3) b2 BIP-2 (Rate) <- VC11
b3 LP-REI (Single) <- VC11
b5 LP-REI (Rate) <- VC11
2X Error/Alarm (SDH The following error detection is outside the specification:
errors - LP-4 Tandem) b0 N2-BIP2 (Single) <- VC11
Error/Alarm (SONET b1 N2-BIP2 (Burst 15bit) <- VC11
errors - LP-4 Tandem) b2 N2-BIP2 (Rate) <- VC11
b6 LP-OEI (Single) <- VC11
b7 LP-OEI (Burst 15bit) <- VC11
b8 LP-OEI (Rate) <- VC11

‘2Y - 3D’ Checks on Error/Alarm 3 (SDH)


Char. Message Bit Error Details
2Y Error/Alarm The following alrm detection is outside the specification:
(SDH alarms-1) b0 LOS
Error/Alarm b1 LOF
(SONET alarms-1) b2 MS-AIS
b3 MS-RDI
b4 AU-^AIS
b5 AU-LOP
b6 HP-RDI <- VC4
b7 TU-AIS <- VC3
b8 TU-LOP <- VC3
b9 LP-RDI <- VC3
2Z Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-2 Tandem) b0 HP-VC-AIS <- VC4
Error/Alarm (SONET b2 HP-FAS <- VC4
alarms-2 Tandem) b3 HP-IncAIS <- VC4
b4 HP-TC-RDI <- VC4
b5 HP-ODI <- VC4
3A Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-3) b0 TU-LOM
Error/Alarm b1 LP-RDI <- VC11
(SONET alarms-3) b2 TU-RFI <- VC11
b3 TU-LOP <- VC11
b4 TU-AIS <- VC11

A-23
Appendix A

Char. Message Bit Error Details


3B Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-4 Tandem) b0 LP-VC-AIS <- VC11
Error/Alarm (SONET b2 LP-FAS <- VC11
alarms-4 Tandem) b3 LP-IncAIS <- VC11
b4 LP-TC-RDI <- VC11
b5 LP-ODI <- VC11
3C Error/Alarm The following alarm detection is outside the specification:
(SDH alarms-5) b0 OOF
Error/Alarm
(SONET alarms-5)
3D Error/Alarm The following alarm detection is outside the specification:
(SDH alarms: 52M B3ZS) b0 LOS
Error/Alarm (SONET
alarms-52M B3ZS)

‘3E’ Checks on Pointer sequence measurement


Char. Message Bit Error Details
3E Pointer sequence The following abnormality is occurred:
b0 Single of opposite polarity (PTR-AU)
b1 Regular with double (PTR-TU)
b2 Regular with missing (PTR-AU)
b3 Double of opposite polarity (PTR-TU)
b4 87-3/26-1 normal (PTR-AU)
b5 87-3/26-1 add (PTR-TU)
b6 87-3/26-1 cancel (PTR-AU)
b7 Continuous pattern normal (PTR-TU)
b8 Continuous pattern add (PTR-AU)
b9 Continuous pattern cancel (PTR-TU)

‘3F’ Checks on Clock alarm detection 1 (1.5/45 M)


Char. Message Bit Error Details
3F Clock loss The following abnormality is occurred:
(External clock loss) b0 External clock loss detection is abnormal.

‘3G’ Checks on Clock alarm detection 2 (SDH)


Char. Message Bit Error Details
3G Clock loss (Unlock) The following abnormality is occurred:
b0 DCS clock loss detection is abnormal.
b1 Lock detection is abnoarmla.

A-24
A.2 Error Details

‘3H’ Checks on 52M (1.31um) Interface of MP0122B


Char. Message Bit Error Details
3H Signal (1.31 Optical) An error or alarm was detected under the following conditions:
b0 Alarm = OFF
b1 Alarm = LOS

‘3J’ Checks on 52M Optical power (1.31)


Char. Message Bit Error Details
3J Optical Power (1.31) The following abnormality is occurred:
b0 Optical power with BRate: 52M is abnormal.

‘3L’ Checks on MUX/DEMUX 1 (1.5/45 M)


Char. Message Bit Error Details
3L MUX/DEMUX (1.5/45M) An error or alarm was detected under the following conditions:
b0 BRate = 45M, MUX/DeMUX = 64K, Framed (45M) = M=13, 1.5M#=1
64K#(1) = 1 to 24, 64K#(2)=1, Pattern= PRBS11
b2 BRate = 45M, MUX/DEMUX = 1.5M, Framed (45M) = M13
1.5M# = 1 to 28, Pattern = PRBS15
b2 BRate = 1.5M, MUX/DEMUX = 64K, Framed (1.5M) = D4, Code = AMI
64K#(1) = 10, 64K#(2) = 10, Pattern = PRBS11

‘3M’ Checks on MUX/DEMUX 2 (SDH)


Char. Message Bit Error Details
3M MUX/DEMUX 2(SDH) An error or alarm was detected under the following conditions:
b0 BRate = 52M B3ZS, Mapping = 1.5M (Async), Framed (45M) = M13
1.5M# = 1, 64K#(1) = 1, 64K#(2) = 1, Pattern = PRBS11
b2 BRate = 52M B3ZS, Mapping = 1.5M (Async), Framed (1.5M = D4
AU3# = 1, TUG2# = 7, TU11# = 4, 64K#(2) =1, Pattern = PRBS15
b2 BRate = 52M B3ZS, Mapping = 1.5M(Async), Framed (1.5M) = ESF,
AU3# = 1, TUG2# = 7, TU12# = 3, 64K#(1) = 1 64K#(2) = 1, Pattern =
PRBS20

‘3N’ Checks on error/alarm 2 (1.5/45 M)


Char. Message Bit Error Details
3N Error/Alarm The following error detection is outside the specification:
(MUX/DEMUX errors) b0 Bit45M (45M <-> 64K)
b1 Bit info (45M <-> 1.5M)
b2 C-bit (45M <-> 1.5M)
b3 REI45M (45M <-> 1.5M)
b4 CRC-6(45M <-> 64K)
b5 Bit1.5M (1.5M <-> 64K)
b6 Bit info (1.5M <-> 64K)

A-25
Appendix A

‘3O’ Checks on error/alarm 4 (1.5/45 M)


Char. Message Bit Error Details
3O Error/Alarm The following alarms detection is outside the specification:
(MUX/DEMUX alarms) b0 AIS1.5M
b1 LOF1.5M
b2 RDI1.5M

‘3P’ Checks on Delay measurement


Char. Message Bit Error Details
3P Delay The following abnormality is occurred:
b0 Delay value is not 0.

‘3Q’ Checks on Justification


Char. Message Bit Error Details
3Q Justification The following abnormality is occurred:
b0 PTR-AU +PJC count is abnormal
b1 PTR-AU -PJC count is abnormal
b2 PTR-AU (TU3) +PJC count is abnormal
b3 PTR-AU (TU3) -PJC count is abnormal
b4 PTR-AU (TU2) +PJC count is abnormal
b5 PTR-AU (TU2) -PJC count is abnormal
b6 PTR-AU (TU12) +PJC count is abnormal
b7 PTR-AU (TU12) -PJC count is abnormal
b8 PTR-AU (TU11) +PJC count is abnormal
b9 PTR-AU (TU11) -PJC count is abnormal

‘3R’ Checks on NDF, C, C1/C2


Char. Message Bit Error Details
3R NDF, C, C1/C2 The following abnormality is occurred:
b0 PTU-AU NDF count is abnormal.
b1 C count is abnormal.
b2 PTR-TU (TU3) NDF count is abnormal.
b3 PTR-TU (TU2) NDF count is abnormal.
b4 PTR-TU (TU12) NDF count is abnormal.
b5 PTR-TU (TU11) NDF count is abnormal.
b6 C1 count is abnormal.
b7 C2 count is abnormal.

A-26
A.2 Error Details

‘3S’ Checks on OH
Char. Message Bit Error Details
3S OH pattern The following abnormality is occurred:
b0 K1, K2 is abnormal.
b1 SOH (STM-4), POH (VC4, VC3) is abnormal.
b2 SOH (STM-1), POH (VC4, VC2) is abnormal.
b3 SOH (STM-0), POH (VC3, VC1) is abnormal.

‘3T’ Checks on Path trace


Char. Message Bit Error Details
3T Path trace The following abnormality is occurred:
b0 J0 is abnormal.
b1 J0 CRC detection is abnormal.
b2 J1-HP is abnormal.
b3 J1-HP CRC detection is abnormal.
b4 J1-LP is abnormal.
b5 J1-LP CRC detection is abnormal.
b6 J2 is abnormal.
b7 J2 CRC detection is abnormal.

‘3U’ Checks on Jitter tolerance in transmitting side


Char. Message Bit Error Details
3U Jitter (Tolerance) Jitter tolerance is abnormal under the following condition:
b0 BRate = 52M, Mod. freq = 5kH, Ampl. = 2UIpp
b1 BRate = 52M, Mod. freq = 500kH, Ampl. = 0.22UIpp

A-27
Appendix A

‘3V’ Checks on Residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
3V Jitter (Rx Intrinsic:Peak) Receive residual jitter became abnormal under the following conditions:
b0 Brate=52M,Range=2UI,Filter=OFF,Offset range= ±70
(MP0125A or MP0126A)
b1 Brate=52M,Range=20UI,Filter=OFF,Offset range= ±70
(MP0125A or MP0126A)
b2 Brate=52M,Range=2UI,Filter=HP1+LP,
Offset range= ±100,Data(Optical)
(MU150006A or MU150007A)
b3 Brate=52M,Range=20UI,Filter=HP1+LP,
Offset range= ±100,Data(Optical)
(MU150006A or MU150007A)
b4 Brate=52M,Range=2UI,Filter=HP2+LP,
Offset range= ±100,Data(Optical)
(MU150006A or MU150007A)
b5 Brate=52M,Range=20UI,Filter=HP2+LP,
(MU150006A or MU150007A)
b6 Brate=52M,Range=400UI,Filter=LP,
Offset range= ±100,Data(Optical)
(MU150006A or MU150007A)

‘3W’ Checks on Residual jitter in receive side 2 (RMS)


Char. Message Bit Error Details
3W Jitter (Rx Intrinsic:RMS) Receive residual jitter became abnormal under the following conditions:
b0 Brate=52M,Range=2UI,Filter=OFF,Offset range= ±70
(MP0125A or MP0126A)
b1 Brate=52M,Range=20UI,Filter=OFF,Offset range= ±70
(MP0125A or MP0126A)
b2 Brate=52M,Range=2UI,Filter=HP+LP,
Offset range= ±100,Data(Electrical)
(MU150006A or MU150007A)
b3 Brate=52M,Range=20UI,Filter=HP+LP,
Offset range= ±100,Data(Electrical)
(MU150006A or MU150007A)
b4 Brate=52M,Range=2UI,Filter=HP+LP,
Offset range= ±100,Data(Optical)
(MU150006A or MU150007A)
b5 Brate=52M,Range=20UI,Filter=HP+LP,
Offset range= ±100,Data(Optical)
(MU150006A or MU150007A)

A-28
A.2 Error Details

(3) MP0124A 2/8/34/139M 156/622M Jitter Unit

‘4A’ Checks on Jitter tolerance in transmitting side 1 (PDH)


Char. Message Bit Error Details
4A Jitter Jitter tolerance is abnormal under the following condition.
(2/8/34/139M:Tolerance) b0 BRate = 2M, Mod.freq:10kHz, Ampl.:2UIpp
b1 BRate = 2M, Mod.freq = 100kHz, Ampl. = 0.5UIpp
b2 BRate = 8M, Mod.freq = 20kHz, Ampl. = 2UIpp
b3 BRate = 8M, Mod.freq = 400kHz, Ampl. = 0.5UIpp
b4 BRate = 34M, Mod.freq = 20kHz, Ampl. = 2UIpp
b5 BRate = 34M, Mod.freq = 800kHz, Ampl. = 0.5UIpp
b6 BRate = 139M, Mod.freq = 20kHz, Ampl. = 2UIpp
b7 BRate = 139M, Mod.freq = 3.5MHz, Ampl. = 0.5UIpp

‘4B’ Checks on Jitter tolerance in transmitting side 2 (SDH)


Char. Message Bit Error Details
4B Jitter (SDH:Tolerance) Jitter tolerance is abnormal under the following condition.
b0 BRate = 156MCMI, Mod.freq = 20kHz, Ampl. = 2UIpp
Jitter (SONET:Tolerance) b1 BRate = 156MCMI, Mod.freq = 1.5MHz, Ampl. = 0.2UIpp

‘4C’ Checks on Jitter measurement error in receiving side 1 (PDH)


Char. Message Bit Error Details
4C Jitter The measurement error is abnormal under the following conditions:
(2/8/34/139M:RX b0 BRate = 2M, Range:20UI, Mod.freq:1kHz, Ampl.:10UIpp
Measure) b1 BRate = 2M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b2 BRate = 8M, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
b3 BRate = 8M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b4 BRate = 34M, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
b5 BRate = 34M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b6 BRate = 139M, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
b7 BRate = 139M, Range = 2UI, Mod.freq = 10kHz, Ampl. = 1UIpp

‘4D’ Checks on Jitter measurement error in receiving side 2 (SDH)


Char. Message Bit Error Details
4D Jitter The measurement error is abnormal under the following conditions:
(SDH:RX Measure) b0 Brate = 156M CMI, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
b1 BRate = 156M CMI, Range = 2UI, Mod.freq = 10kHz, Ampl. = 1UIpp
Jitter b2 BRate = 156M, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
(SONET:RX Measure) b3 BRate = 156M, Range = 2UI, Mod.freq = 10kHz, Ampl. = 1UIpp
b4 BRate = 622M, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
b5 BRate = 622M, Range = 2UI, Mod.freq = 10kHz, Ampl. = 1UIpp

A-29
Appendix A

‘4E’ Checks on wander measurement error 1 (PDH)


Char. Message Bit Error Details
4E Wander(2M) Wander became abnormal under the following conditions:
b0 BRate=2M,Mod.freq=0.2Hz,Ampl.=20UIp-p,
Tx Range=20UI

‘4F’ Checks on wander measurement error 2 (SDH)


Char. Message Bit Error Details
4F Wander(SDH) Wander became abnormal under the following conditions:
Wander(SONET) b0 BRate=156M CMI,Mod.freq=0.2Hz,Ampl.=50UIp-p,
Tx Range=20UI
b1 BRate=156M,Mod.freq=0.2Hz,Ampl.=50UIp-p,
Tx Range=20UI
b2 BRate=622M,Mod.freq=0.2Hz,Ampl.=200UIp-p
Tx Range=20UI

‘4G’ Checks on frequency measurement error 1 (PDH)


Char. Message Bit Error Details
4G Frequency (2/8/34/139M) The frequency is abnormal under the following conditions:
b0 BRate = 2M
b1 BRate = 8M
b2 BRate = 34M
b3 BRate = 139M

‘4H’ Checks on frequency measurement error 2 (SDH)


Char. Message Bit Error Details
4H Frequency (SDH) The frequency is abnormal under the following conditions:
b0 BRate = 156M CMI
Frequency (SONET) b1 BRate = 156M
b2 BRate = 622M

‘4K’ Checks on residual jitter in receiving side 1 (PDH: Peak)


Char. Message Bit Error Details
4K Jitter (2/8/34/139M) Rx Receive residual jitter became abnormal under the following conditions:
Intrinsic: Peak) b0 BRate=2M,Range=2UI,Unit=Peak
b1 BRate=2M,Range=20UI,Unit=Peak
b2 BRate=8M,Range=2UI,Unit=Peak
b3 BRate=8M,Range=20UI,Unit=Peak
b4 BRate=34M,Range=2UI,Unit=Peak
b5 BRate=34M,Range=20UI,Unit=Peak
b6 BRate=139M,Range=2UI,Unit=Peak
b7 BRate=139M,Range=20UI,Unit=Peak

A-30
A.2 Error Details

‘4L’ Checks on residual jitter in receiving side 2 (PDH: RMS)


Char. Message Bit Error Details
4L Jitter (2/8/34/139M: Receive residual jitter became abnormal under the following conditions:
Intrinsic RMS) b0 BRate=2M,Range=2UI,Unit=RMS
b1 BRate=2M,Range=20UI,Unit=RMS
b2 BRate=8M,Range=2UI,Unit=RMS
b3 BRate=8M,Range=20UI,Unit=RMS
b4 BRate=34M,Range=2UI,Unit=RMS
b5 BRate=34M,Range=20UI,Unit=RMS
b6 BRate=139M,Range=2UI,Unit=RMS
b7 BRate=139M,Range=20UI,Unit=RMS

‘4M’ Checks on residual jitter in receiving side 3 (SDH: Peak)


Char. Message Bit Error Details
4M Jitter Receive residual jitter became abnormal under the following conditions:
(SDH RX Intrinsic:Peak) b0 BRate=156M,Range=2UI,Unit=Peak
Jitter(SONET RX b1 BRate=156M,Range=20UI,Unit=Peak
Intrinsic:Peak)

‘4N’ Checks on residual jitter in receiving side 4 (SDH: RMS)


Char. Message Bit Error Details
4N Jitter Receive residual jitter became abnormal under the following conditions:
(SDH RX Intrinsic:RMS) b0 BRate=156M,Range=2UI,Unit=RMS
Jitter(SONET RX b1 BRate=156M,Range=20UI,Unit=RMS
Intrinsic:RMS)

‘4O’ Checks on hit count in receiving side


Char. Message Bit Error Details
4O Jitter(Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate=2M,Mod.freq=100kHz
b1 BRate=2M,Mod.freq=1MHz

A-31
Appendix A

(4) MP0125A 1.5/45/52M 156/622M Jitter Unit

‘5A’ Checks on Jitter tolerance in transmitting side 1 (1.5/45 M)


Char. Message Bit Error Details
5A Jitter (1.5/45M:Tolerance) Jitter tolerance is abnormal under the following conditions:
b0 BRate = 1.5M, Mod.freq:3kHz, Ampl.:2UIpp
b1 BRate = 1.5M, Mod.freq = 40kHz, Ampl. = 0.5UIpp
b2 BRate = 45M, Mod.freq = 50kHz, Ampl. = 2UIpp
b3 BRate = 45M, Mod.freq = 400kHz, Ampl. = 0.5UIpp

‘5B’ Checks on Jitter tolerance in transmitting side 1 (SDH)


Char. Message Bit Error Details
5B Jitter (SDH:Tolerance) Jitter tolerance is abnormal under the following conditions:
b0 BRate = 52M B3ZS, Mod.freq = 3kHz, Ampl. = 2UIpp
Jitter (SONET:Tolerance) b1 BRate = 52M B3ZS, Mod.freq = 400kHz, Ampl. = 0.2UIpp

‘5C’ Checks on Jitter measurement error in receiving side 1 (1.5/45 M)


Char. Message Bit Error Details
5C Jitter Jitter measurement error is abnormal under the following conditions:
(1.5/45M:RX Measure) b0 BRate = 1.5M, Range:20UI, Mod.freq:0.1kHz, Ampl.:10UIpp
b1 BRate = 1.5M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b2 BRate = 45M, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
b3 BRate = 45M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp

‘5D’ Checks on Jitter measurement error in receiving side 2 (SDH)


Char. Message Bit Error Details
5D Jitter (SDH:RX Measure) Jitter measurement error is abnormal under the following conditions:
Jitter b0 BRate = 52M B3ZS, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
(SONET:RX Measure) b1 BRate = 52M B3ZS, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b2 BRate = 156M, Range = 20UI, Mod.freq = 20kHz, Ampl. = 10UIpp
b3 BRate = 156M, Range = 2UI, Mod.freq = 20kHz, Ampl. = 1UIpp
b4 BRate = 622M, Range = 20UI, Mod.freq = 20kHz, Ampl. = 10UIpp
b5 BRate = 622M, Range = 2UI, Mod.freq = 20kHz, Ampl. = 1UIpp

‘5E’ Checks on wander measurement error 1 (1.5 M)


Char. Message Bit Error Details
5E Wander (1.5M) Wande became abnormal under the following conditions:
b0 Brate = 1.52M, Mod.freq=0.2Hz, Ampl. = 20UIpp

A-32
A.2 Error Details

‘5F’ Checks on wander measurement error 2 (SDH)


Char. Message Bit Error Details
5F Wander (SDH) Wande became abnormal under the following conditions:
Wander (SONET) b0 Brate = 52M B3ZS, Mod,freq = 0.2Hz, ampl.=20UIpp
b1 Brate = 156M Mod.freq = 0.2Hz, Ampl.50Uppp
b2 Brate = 622M, Mod.freq = 0.2Hz, Ampl.=200UIpp

‘5G’ Checks on frequency measurement error 1 (1.5/45 M)


Char. Message Bit Error Details
5G Frequency (1.5/45M) The frequency is abnormal under the following conditions:
b0 BRate = 1.5M
b1 BRate = 45M

‘5H’ Checks on frequency measurement error 2 (SDH)


Char. Message Bit Error Details
5H Frequency (SDH) The frequency is abnormal under the following conditions:
b0 BRate = 52M B3ZS
Frequency (SONET) b1 BRate = 156M
b2 BRate = 622M

‘5K’ Checks on residual jitter in receiving side 1 (1.5/45 M: Peak)


Char. Message Bit Error Details
5K Jitter Receive residual jitter became abnormal under the following conditions:
(1.5/45M RX Intrinsic b0 BRate=1.5M,Range=2UI,Unit=Peak
Peak) b1 BRate=1.5M,Range=20UI,Unit=Peak
b2 BRate=45M,Range=2UI,Unit=Peak
b3 BRate=45M,Range=20UI,Unit=Peak

‘5L’ Checks on residual jitter in receiving side 2 (PDH: RMS)


Char. Message Bit Error Details
5L Jitter Receive residual jitter became abnormal under the following conditions:
(1.5/45M RX Intrinsic b0 BRate=1.5M,Range=2UI,Unit=RMS
RMS) b1 BRate=1.5M,Range=20UI,Unit=RMS
b2 BRate=45M,Range=2UI,Unit=RMS
b3 BRate=45M,Range=20UI,Unit=RMS

‘5M’ Checks on residual jitter in receiving side 3 (SDH: Peak)


Char. Message Bit Error Details
5M Jitter(SDH RX Receive residual jitter became abnormal under the following conditions:
Intrinsic:Peak) b0 BRate=52M B3ZS,Range=2UI,Unit=Peak
Jitter(SONET RX b1 BRate=52M B3ZS,Range=20UI,Unit=Peak
Intrinsic:Peak)

A-33
Appendix A

‘5N’ Checks on residual jitter in receiving side 4 (SDH: RMS)


Char. Message Bit Error Details
5N Jitter(SDH RX Receive residual jitter became abnormal under the following conditions:
Intrinsic:RMS) b0 BRate=52M B3ZS,Range=2UI,Unit=RMS
Jitter(SONET RX b1 BRate=52M B3ZS,Range=20UI,Unit=RMS
Intrinsic:RMS)

‘5O’ Checks on hit count in receiving side


Char. Message Bit Error Details
5O Jitter(Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate=45M,Mod.freq=100kHz
b1 BRate=45M,Mod.freq=250kHz

A-34
A.2 Error Details

(5) MP0126A 2/8/34/139M 1.5/45/52M 156/622M Jitter Unit

‘6A’ Checks on Jitter tolerance in transmitting side 1 (PDH)


Char. Message Bit Error Details
6A Jitter Jitter tolerance is abnormal under the following conditions:
(2/8/34/139M:Tolerance) b0 BRate = 2M, Mod.freq:10kHz, Ampl.:2UIpp
b1 BRate = 2M, Mod.freq = 100kHz, Ampl. = 0.5UIpp
b2 BRate = 8M, Mod.freq = 20kHz, Ampl. = 2UIpp
b3 BRate = 8M, Mod.freq = 400kHz, Ampl. = 0.5UIpp
b4 BRate = 34M, Mod.freq = 20kHz, Ampl. = 2UIpp
b5 BRate = 34M, Mod.freq = 800kHz, Ampl. = 0.5UIpp
b6 BRate = 139M, Mod.freq = 20kHz, Ampl. = 2UIpp
b7 BRate = 139M, Mod.freq = 3.5MHz, Ampl. = 0.5UIpp

‘6B’ Checks on Jitter tolerance in transmitting side 1 (SDH)


Char. Message Bit Error Details
6B Jitter (SDH:Tolerance) Jitter tolerance is abnormal under the following conditions:
b0 BRate = 156MCMI, Mod.freq = 20kHz, Ampl. = 2UIpp
Jitter (SONET:Tolerance) b1 BRate = 156MCMI, Mod.freq = 1.5MHz, Ampl. = 0.2UIpp

‘6C’ Checks on Jitter measurement error in receiving side 1 (PDH)


Char. Message Bit Error Details
6C Jitter Jitter measurement error is abnormal under the following conditions:
(2/8/34/139M:RX b0 BRate = 2M, Range:20UI, Mod.freq:1kHz, Ampl.:10UIpp
Measure) b1 BRate = 2M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b2 BRate = 8M, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
b3 BRate = 8M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b4 BRate = 34M, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
b5 BRate = 34M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b6 BRate = 139M, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
b7 BRate = 139M, Range = 2UI, Mod.freq = 10kHz, Ampl. = 1UIpp

‘6D’ Checks on Jitter measurement error in receiving side 2 (SDH)


Char. Message Bit Error Details
6D Jitter (SDH:RX Measure) Jitter measurement error is abnormal under the following conditions:
Jitter (SONET:RX b0 BRate = 156M CMI, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
Measure) b1 BRate = 156M CMI, Range = 2UI, Mod.freq = 10kHz, Ampl. = 1UIpp
b2 BRate = 156M, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
b3 BRate = 156M, Range = 2UI, Mod.freq = 10kHz, Ampl. = 1UIpp
b4 BRate = 622M, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
b5 BRate = 622M, Range = 2UI, Mod.freq = 10Khz, Ampl. = 1UIpp

A-35
Appendix A

‘6E’ Checks on wander measurement error 1 (PDH)


Char. Message Bit Error Details
6E Wander (2M) Wande became abnormal under the following conditions:
b0 Brate = 2M, Mod.freq=0.2Hz, Ampl. = 20UIpp

‘6F’ Checks on wander measurement error 2 (SDH)


Char. Message Bit Error Details
6F Wander (SDH) Wande became abnormal under the following conditions:
Wander (SONET) b0 Brate = 156M CMI, Mod,freq = 0.2Hz, ampl.=50UIpp
b1 Brate = 156M Mod.freq = 0.2Hz, Ampl.50Uppp
b2 Brate = 622M, Mod.freq = 0.2Hz, Ampl.=200UIpp

‘6G’ Checks on frequency measurement error 1 (PDH)


Char. Message Bit Error Details
6G Frequency (2/8/34/139M) The frequency is abnormal under the following conditions:
b0 BRate = 2M
b1 BRate = 8M
b2 BRate = 34M
b3 BRate = 139M

‘6H’ Checks on frequency measurement error 2 (SDH)


Char. Message Bit Error Details
6H Frequency (SDH) The frequency is abnormal under the following conditions:
b0 BRate = 156M CMI
Frequency (SONET) b1 BRate = 156M
b2 BRate = 622M

‘6K’ Checks on residual jitter in receiving side 1 (PDH: Peak)


Char. Message Bit Error Details
6K Jitter (2/8/34/139M) Rx Receive residual jitter became abnormal under the following conditions:
Intrinsic: Peak) b0 BRate=2M,Range=2UI,Unit=Peak
b1 BRate=2M,Range=20UI,Unit=Peak
b2 BRate=8M,Range=2UI,Unit=Peak
b3 BRate=8M,Range=20UI,Unit=Peak
b4 BRate=34M,Range=2UI,Unit=Peak
b5 BRate=34M,Range=20UI,Unit=Peak
b6 BRate=139M,Range=2UI,Unit=Peak
b7 BRate=139M,Range=20UI,Unit=Peak

A-36
A.2 Error Details

‘6L’ Checks on residual jitter in receiving side 2 (PDH: RMS)


Char. Message Bit Error Details
6L Jitter (2/8/34/139M: Receive residual jitter became abnormal under the following conditions:
Intrinsic RMS) b0 BRate=2M,Range=2UI,Unit=RMS
b1 BRate=2M,Range=20UI,Unit=RMS
b2 BRate=8M,Range=2UI,Unit=RMS
b3 BRate=8M,Range=20UI,Unit=RMS
b4 BRate=34M,Range=2UI,Unit=RMS
b5 BRate=34M,Range=20UI,Unit=RMS
b6 BRate=139M,Range=2UI,Unit=RMS
b7 BRate=139M,Range=20UI,Unit=RMS

‘6M’ Checks on residual jitter in receiving side 3 (SDH: Peak)


Char. Message Bit Error Details
6M Jitter(SDH RX Receive residual jitter became abnormal under the following conditions:
Intrinsic:Peak) b0 BRate=156M,Range=2UI,Unit=Peak
Jitter(SONET RX b1 BRate=156M,Range=20UI,Unit=Peak
Intrinsic:Peak)

‘6N’ Checks on residual jitter in receiving side 4 (SDH: RMS)


Char. Message Bit Error Details
6N Jitter(SONET RX Receive residual jitter became abnormal under the following conditions:
Intrinsic:RMS) b0 BRate=156M,Range=2UI,Unit=RMS
b1 BRate=156M,Range=20UI,Unit=RMS

‘6O’ Checks on hit count in receiving side


Char. Message Bit Error Details
6O Jitter(Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate=2M,Mod.freq=100kHz
b1 BRate=2M,Mod.freq=1MHz

‘7A’ Checks on Jitter tolerance in transmitting side1 (1.5/45 M)


Char. Message Bit Error Details
7A Jitter (1.5/45M:Tolerance) Jitter tolerance is abnormal under the following conditions:
b0 BRate = 1.5M, Mod.freq:3kHz, Ampl.:2UIpp
b1 BRate = 1.5M, Mod.freq = 40kHz, Ampl. = 0.5UIpp
b2 BRate = 45M, Mod.freq = 50kHz, Ampl. = 2UIpp
b3 BRate = 45M, Mod.freq = 400kHz, Ampl. = 0.5UIpp

‘7B’ Checks on Jitter tolerance in transmitting side2 (SDH)


Char. Message Bit Error Details
7B Jitter (SDH:Tolerance) Jitter tolerance is abnormal under the following conditions:
b0 BRate = 52M B3ZS, Mod.freq = 3kHz, Ampl. = 2UIpp
Jitter (SONET:Tolerance) b1 BRate = 52M B3ZS, Mod.freq = 400kHz, Ampl. = 0.2UIpp

A-37
Appendix A

‘7C’ Checks on Jitter measurement error in receiving side1 (1.5/45 M)


Char. Message Bit Error Details
7C Jitter Jitter measurement error is abnormal under the following conditions:
(1.5/45M:RX Measure) b0 BRate = 1.5M, Range:20UI, Mod.freq:0.1kHz, Ampl.:10UIpp
b1 BRate = 1.5M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b2 BRate = 45M, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
b3 BRate = 45M, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp

‘7D’ Checks on Jitter measurement error in receiving side2 (SDH)


Char. Message Bit Error Details
7D Jitter (SDH:RX Measure) Jitter measurement error is abnormal under the following conditions:
Jitter (SONET:RX b0 BRate = 52M B3ZS, Range = 20UI, Mod.freq = 1kHz, Ampl. = 10UIpp
Measure) b1 BRate = 52M B3ZS, Range = 2UI, Mod.freq = 1kHz, Ampl. = 1UIpp
b2 BRate = 156M, Range = 20UI, Mod.freq = 20kHz, Ampl. = 10UIpp
b3 BRate = 156M, Range = 2UI, Mod.freq = 20kHz, Ampl. = 1UIpp
b4 BRate = 622M, Range = 20UI, Mod.freq = 20kHz, Ampl. = 10UIpp
b5 BRate = 622M, Range = 2UI, Mod.freq = 20kHz, Ampl. = 1UIpp

‘7E’ Checks on wander measurement error 1 (PDH)


Char. Message Bit Error Details
7E Wander (1.5M) Wande became abnormal under the following conditions:
b0 Brate = 1.52M, Mod.freq=0.2Hz, Ampl. = 20Uipp

‘7F’ Checks on wander measurement error 2 (SDH)


Char. Message Bit Error Details
7F Wander (SDH) Wande became abnormal under the following conditions:
Wander (SONET) b0 Brate = 52M B3ZS, Mod,freq = 0.2Hz, ampl.=20UIpp
b1 Brate = 156M Mod.freq = 0.2Hz, Ampl.50Uppp
b2 Brate = 622M, Mod.freq = 0.2Hz, Ampl.=200UIpp

‘7G’ Checks on frequency measurement error1 (1.5/45 M)


Char. Message Bit Error Details
7G Frequency (1.5/45M) The frequency is abnormal under the following conditions:
b0 BRate = 1.5M
b1 BRate = 45M

‘7H’ Checks on frequency measurement error2 (SDH)


Char. Message Bit Error Details
7H Frequency (SDH) The frequency is abnormal under the following conditions:
b0 BRate = 52M B3ZS
Frequency (SONET) b1 BRate = 156M
b2 BRate = 622M

A-38
A.2 Error Details

‘7K’ Checks on residual jitter in receiving side 1 (PDH: Peak)


Char. Message Bit Error Details
7K Jitter Receive residual jitter became abnormal under the following conditions:
(1.5/45M RX Intrinsic b0 BRate=1.5M,Range=2UI,Unit=Peak
Peak) b1 BRate=1.5M,Range=20UI,Unit=Peak
b2 BRate=45M,Range=2UI,Unit=Peak
b3 BRate=45M,Range=20UI,Unit=Peak

‘7L’ Checks on residual jitter in receiving side 2 (PDH: RMS)


Char. Message Bit Error Details
7L Jitter Receive residual jitter became abnormal under the following conditions:
(1.5/45M RX Intrinsic b0 BRate=1.5M,Range=2UI,Unit=RMS
RMS) b1 BRate=1.5M,Range=20UI,Unit=RMS
b2 BRate=45M,Range=2UI,Unit=RMS
b3 BRate=45M,Range=20UI,Unit=RMS

‘7M’ Checks on residual jitter in receiving side 3 (SDH: Peak)


Char. Message Bit Error Details
7M Jitter Receive residual jitter became abnormal under the following conditions:
(SDH RX Intrinsic:Peak) b0 BRate=52M B3ZS,Range=2UI,Unit=Peak
Jitter(SONET RX b1 BRate=52M B3ZS,Range=20UI,Unit=Peak
Intrinsic:Peak)

‘7N’ Checks on residual jitter in receiving side 4 (SDH: RMS)


Char. Message Bit Error Details
7N Jitter Receive residual jitter became abnormal under the following conditions:
(SDH RX Intrinsic:RMS) b0 BRate=52M B3ZS,Range=2UI,Unit=RMS
Jitter(SONET RX b1 BRate=52M B3ZS,Range=20UI,Unit=RMS
Intrinsic:RMS)

‘7O’ Checks on hit count in receiving side


Char. Message Bit Error Details
7O Jitter(Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate=45M,Mod.freq=100kHz
b1 BRate=45M,Mod.freq=250kHz

A-39
Appendix A

(6) 2.5G Unit (MP0127A/MP0128A/MP0129A)

‘AA’ Checks on Signals1 (Optical 1.31)


Char. Message Bit Error Details
AA Signal An error or alarm was detected under the following conditions:
(2488M 1.31 Optical) b0 BRate = 2488M, Mapping = VC3 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.31

‘AB’ Checks on error/alarm (1.31) 1


Char. Message Bit Error Details
AB Error/Alarm (errors) The following error detection is outside the specification:
b0 Bit all (Single)
b2 Bit all (Rate)
b3 B1 (Single)
b4 B1 (burst 15bit)
b5 B1 (Rate)

‘AC’ Checks on error/alarm (1.31) 2


Char. Message Bit Error Details
AC Error/Alarm (alarms) The following alarm detection is outside the specification:
b0 LOF
b1 LOS
b2 MS-AIS
b3 MS-RDI
b4 OOF

‘AD’ Checks on clock loss alarm detection (1.31)


Char. Message Bit Error Details
AD Clock loss The following abnormality is occurred::
b0 DCS clock loss detection is abnormal.
b1 Lock detection is abnormal.

‘AE’ Checks on 2488M optical power (1.31)


Char. Message Bit Error Details
AE Optical Power The following abnormality is occurred::
(2488M 1.31) b0 BRate = 2488M, Wave length = 1.31 ?m optical power is abnormal.

‘AF’ Checks on Signals (Electrical 1)


Char. Message Bit Error Details
AF Signal (2488M Electrical) An error or alarm was detected under the following conditions:
b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Electrical

A-40
A.2 Error Details

‘AG’ Checks on Signals (Optical 1.55)


Char. Message Bit Error Details
AG Signal An error or alarm was detected under the following conditions:
(2488M 1.55 Optical) b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.55

‘AH’ Checks on error/alarm (1.55) 1


Char. Message Bit Error Details
AH Error/Alarm (errors) The following error detection is outside the specification:
b0 Bit all (Single)
b2 Bit all (Rate)
b3 B1 (Single)
b4 B1 (burst 15bit)
b5 B1 (Rate)

‘AI’ Checks on error/alarm (1.55) 2


Char. Message Bit Error Details
AI Error/Alarm (alarms) The following alarm detection is outside the specification:
b0 LOF
b1 LOS
b2 MS-AIS
b3 MS-RDI
b4 OOF

‘AJ’ Checks on clock loss alarm detection (1.55)


Char. Message Bit Error Details
AJ Clock loss The following abnormality is occurred::
b0 DCS clock loss detection is abnormal.
b1 Lock detection is abnormal.

‘AK’ Checks on 2488 M optical power (1.55)


Char. Message Bit Error Details
AK Optical Power The following abnormality is occurred::
(2488M 1.55) b0 BRate = 2488M, Wave length = 1.55 µm optical power is abnormal.

‘AL’ Checks on Signals (Electrical 2)


Char. Message Bit Error Details
AL Signal (2488M Electrical) An error or alarm was detected under the following conditions:
b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Electrical

A-41
Appendix A

‘AM’ Checks on OH(k1, K2) (1.31)


Char. Message Bit Error Details
AM OH pattern The following abnormality is occurred::
b0 K1, K2 is abnormal.
b1 SOH (STM-16) is abnormal.

‘AN’ Checks on Path trace (1.31)


Char. Message Bit Error Details
AN Path trace The following abnormality is occurred::
b0 J0 is abnormal.
b1 J0 CRC detection is abnormal.

‘AO’ Checks on OH(k1, K2) (1.55)


Char. Message Bit Error Details
AO OH pattern The following abnormality is occurred::
b0 K1, K2 is abnormal.
b1 SOH (STM-16) is abnormal.

‘AP’ Checks on Path trace (1.55)


Char. Message Bit Error Details
AP Path trace The following abnormality is occurred::
b0 J0 is abnormal.
b1 J0 CRC detection is abnormal.

A-42
A.2 Error Details

(7) 2.5G unit (MU150008A/MU150009A/MU150010A)

‘FA - FB’ Checks on Signals1 (Optical 1.31)


Char. Message Bit Error Details
FA Signal An error or alarm was detected under the following conditions:
(2488M 1.31 Optical) b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.31
FB Signal An error or alarm was detected under the following conditions:
(2488M 1.31 Optical b0 BRate = 2488M, Concatenation Mapping = STM16C-VC4*16C
Concatenation) Pattern = PRBS31, 2.5G Interface = Optical
Wave length = 1.31
b1 BRate = 2488M, Concatenation Mapping = STM16C-VC4*4C 1to4
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.31
b2 BRate = 2488M, Concatenation Mapping = STM16C-VC4C 1to16
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.31

A-43
Appendix A

‘FC - FF’ Checks on Signals 2


Char. Message Bit Error Details
FC Signal (2488M Mixed) An error or alarm was detected under the following conditions:
b0 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
b1 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU11 (Bulk),
Pattern = PRBS23
b2 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b3 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU12 (Bulk),
Pattern = PRBS23
b4 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
BRate = 2488M,
b5 Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
FD Signal (CID) An error or alarm was detected under the following conditions:
b0 BRate = 2488M
FE Signal (Nonframe) An error or alarm was detected under the following conditions:
b0 BRate = 2488M
FF Signal (OH test) An error or alarm was detected under the following conditions:
b0 BRate = 2488M, Mapping = AU4-VC4 (Bulk), Pattern = PRBS11,

A-44
A.2 Error Details

‘FG’ Checks on error/alarm (1.31) 1


Char. Message Bit Error Details
FG Error/Alarm (errors) The following error detection is outside the specification:
b0 Bit all (Single)
b2 Bit all (Rate)
b3 B1 (Single)
b4 B1 (burst 15bit)
b5 B1 (Rate)

‘FH’ Checks on error/alarm (1.31) 2


Char. Message Bit Error Details
FH Error/alarm (alarms) The following error detection is outside the specification:
b0 LOF
b1 LOS
b2 MS-AIS
b3 MS-RDI
b4 OOF

‘FI’ Checks on clock alarm detection (1.31)


Char. Message Bit Error Details
FI Clock loss The following abnormality is occurred::
b0 DCS clock loss detection is abnormal.
b1 Lock detection is abnormal.

‘FJ’ Checks on 2488 M optical power (1.31)


Char. Message Bit Error Details
FJ Optical Power The following abnormality is occurred::
(2488M 1.31) b0 BRate = 2488M, Wave length = 1.31µm optical power is abnormal.

A-45
Appendix A

‘FK - FM’ Checks on Signals (Electrical 1)


Char. Message Bit Error Details
FK Signal (2488M Electrical) An error or alarm was detected under the following conditions:
b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Electrical
FL Signal (2488M Electrical An error or alarm was detected under the following conditions:
Concatenation) b0 BRate = 2488M, Concatenation Mapping = STM16C-VC4*16C
Pattern = PRBS31, 2.5G Interface = Electrical
Wave length = 1.31
b1 BRate = 2488M, Concatenation Mapping = STM16C-VC4*4C 1to4
Pattern = PRBS23, 2.5G Interface = Electrical
Wave length = 1.31
b2 BRate = 2488M, Concatenation Mapping = STM16C-VC4C 1to16
Pattern = PRBS23, 2.5G Interface = Electrical
Wave length = 1.31
FM Signal An error or alarm was detected under the following conditions:
(2488M 1.31 Dummy) b0 BRate = 2488M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 2, TUG3# = 1, TUG2# = 1, TU12# = 1,
Pattern = PRBS15
b1 BRate = 2488M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 16, TUG3# = 3, TUG2# = 7, TU12# = 3,
Pattern = PRBS15

A-46
A.2 Error Details

‘FN - FO’ Checks on Signals (Optical 1.55)


Char. Message Bit Error Details
FN Signal An error or alarm was detected under the following conditions:
(2488M 1.55 Optical) b0 BRate = 2488M, Mapping = VC3 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.55
FO Signal (2488M 1.55 An error or alarm was detected under the following conditions:
Optical Concatenation) b0 BRate = 2488M, Concatenation Mapping = STM16C-VC4*16C
Pattern = PRBS31, 2.5G Interface = Optical
Wave length = 1.55
b1 BRate = 2488M, Concatenation Mapping = STM16C-VC4*4C 1to4
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.55
b2 BRate = 2488M, Concatenation Mapping = STM16C-VC4C 1to16
Pattern = PRBS23, 2.5G Interface = Optical
Wave length = 1.55

‘FP - FR’ Checks on Signals 2


Char. Message Bit Error Details
FP Signal (CID) An error or alarm was detected under the following conditions:
b0 BRate = 2488M
FQ Signal (Nonframe) An error or alarm was detected under the following conditions:
b0 BRate = 2488M
FR Signal (OH test) An error or alarm was detected under the following conditions:
b0 BRate = 2488M, Mapping = AU4-VC4 (Bulk), Pattern = PRBS11,

‘FS’ Checks on error/alarm (1.55) 1


Char. Message Bit Error Details
FS Error/Alarm (errors) The following error detection is outside the specification:
b0 Bit all (Single)
b2 Bit all (Rate)
b3 B1 (Single)
b4 B1 (burst 15bit)
b5 B1 (Rate)

‘FT’ Checks on error/alarm (1.55) 2


Char. Message Bit Error Details
FT Error/alarm (alarms) The following error detection is outside the specification:
b0 LOF
b1 LOS
b2 MS-AIS
b3 MS-RDI
b4 OOF

A-47
Appendix A

‘FU’ Checks on clock alarm detection (1.55)


Char. Message Bit Error Details
FU Clock loss The following abnormality is occurred::
b0 DCS clock loss detection is abnormal.
b1 Lock detection is abnormal.

‘FV’ Checks on 2488M optical power (1.55)


Char. Message Bit Error Details
FV Optical Power The following abnormality is occurred::
(2488M 1.55) b0 BRate = 2488M, Wave length = 1.55µm optical power is abnormal.

‘FV - FY’ Checks on signals (electrical) 2


Char. Message Bit Error Details
FW Signal (2488M Electrical) An error or alarm was detected under the following conditions:
b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, 2.5G Interface = Electrical
FX Signal (2488M Electrical An error or alarm was detected under the following conditions:
Concatenation) b0 BRate = 2488M, Concatenation Mapping = STM16C-VC4*16C
Pattern = PRBS31, 2.5G Interface = Electrical
Wave length = 1.55
b1 BRate = 2488M, Concatenation Mapping = STM16C-VC4*4C 1to4
Pattern = PRBS23, 2.5G Interface = Electrical
Wave length = 1.55
b2 BRate = 2488M, Concatenation Mapping = STM16C-VC4C 1to16
Pattern = PRBS23, 2.5G Interface = Electrical
Wave length = 1.55
FY Signal An error or alarm was detected under the following conditions:
(2488M 1.55 Dummy) b0 BRate = 2488M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 2, TUG3# = 1, TUG2# = 1, TU12# = 1,
Pattern = PRBS15
b1 BRate = 2488M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 16, TUG3# = 3, TUG2# = 7, TU12# = 3,
Pattern = PRBS15

A-48
A.2 Error Details

‘FZ’ Checks on OH (K1, K2) (1.31)


Char. Message Bit Error Details
FZ OH pattern The following abnormality is occurred::
b0 K1, K2 is abnormal.
b1 SOH (STM-16) is abnormal.

GA‘ Checks on path trace (1.31)


Char. Message Bit Error Details
GA Path trace The following abnormality is occurred::
b0 J0 is abnormal.
b1 J0 CRC detection is abnormal.

‘GB’ Checks on OH (K1, K2) (1.55)


Char. Message Bit Error Details
GB OH pattern The following abnormality is occurred::
b0 K1, K2 is abnormal.
b1 SOH (STM-16) is abnormal.

‘GC’ Checks on path trace (1.55)


Char. Message Bit Error Details
GC Path trace The following abnormality is occurred::
b0 J0 is abnormal.
b1 J0 CRC detection is abnormal.

A-49
Appendix A

(8) MP0130A 2.5G Jitter Unit

‘BA’ Checks on Jitter tolerance in transmitting side


Char. Message Bit Error Details
BA Jitter (Tolerance) Jitter tolerance is abnormal under the following conditions:
b0 BRate = 2488M, Mod.freq:20kHz, Ampl.:2UIpp
b1 BRate = 2488M, Mod.freq = 20MHz, Ampl. = 0.2UIpp

‘BB’ Checks on Jitter measurement error in receiving side


Char. Message Bit Error Details
BB Jitter (RX Measure) Measurement error is abnormal under the following conditions:
b0 BRate = 2488M, Range = 20UI, Mod.freq = 10kHz, Ampl. = 10UIpp
b1 BRate = 2488M, Range = 2UI, Mod.freq = 100kHz, Ampl. = 1UIpp

‘BC’ Checks on wander measurement error


Char. Message Bit Error Details
BC Wander The following abnormality is occurred::
b0 BRate=2488M,Mod.freq=0.2Hz,Ampl.=50UIPP

‘BD’ Checks on frequency measurement error


Char. Message Bit Error Details
BD Frequency The frequency is abnormal under the following conditions:
b0 BRate = 2488M

‘BF’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
BF Jitter (Rx Intrinsic:Peak) Receive residual jitter became abnormal under the following conditions:
b0 BRate=2488M,Range=2UI,Unit=Peak
b1 BRate=2488M,Range=32UI,Unit=Peak

‘BG’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
BG Jitter (Rx Intrinsic:RMS) Receive residual jitter became abnormal under the following conditions:
b0 BRate=2488M,Range=2UI,Unit=RMS
b1 BRate=2488M,Range=32UI,Unit=RMS

‘BH’ Checks on hit count in receiving side


Char. Message Bit Error Details
BH Jitter(Hit Count) Hit count was abnormally measured under the following conditions:
b0 BRate=2488M,Mod.freq=100kHz
b1 BRate=2488M,Mod.freq=1MHz

A-50
A.2 Error Details

(9) MP0123A ATM Unit

‘8A - 8B’ Checks on Signals 1 (SDH)


Char. Message Bit Error Details
8A Signal (156/622M:ATM) An error or alarm was detected under the following conditions:
b0 BRate = 156M, Mapping = ATM O.191, Header = UNI
b1 BRate = 156M, Mapping = ATM User PRG, Header = UNI
Pattern = Single PRBS9
b2 BRate = 156M, Mapping = AAL1, Header = UNI
Pattern = Cross PRBS9
b3 BRate = 156M, Mapping = AAL2, Header = UNI
Pattern = Single PRBS7
b4 BRate = 156M, Mapping = AAL3/4, Header = UNI
Pattern = Cross PRBS15
b5 BRate = 156M, Mapping = AAL5, Header = UNI
Pattern = Word16
b6 BRate = 156M, Mapping = ATM O.191, Header = NNI
b7 BRate = 156M, Mapping = ATM User PRG, Header = NNI
Pattern = Edit pattern
b8 BRate = 156M, Mapping = AAL1, Header = NNI
Pattern = Time stamp
b9 BRate = 156M, Mapping = AAL2, Header = NNI
Pattern = Word8
b10 BRate = 156M, Mapping = AAL3/4, Header = NNI
Pattern = Word16
b11 BRate = 156M, Mapping = AAL5, Header = NNI
Pattern = Edit pattern
8B Signal (52M B3ZS:ATM) An error or alarm was detected under the following conditions:
b0 BRate = 52MB3ZS, Mapping = ATM O.191, Header = UNI
b1 BRate = 52MB3ZS, Mapping = ATM User PRG, Header = UNI
Pattern = Cross PRBS9
b2 BRate = 52MB3ZS, Mapping = AAL1, Header = UNI
Pattern = Single PRBS9
b3 BRate = 52MB3ZS, Mapping = AAL2, Header = NNI
Pattern = Time stamp
b4 BRate = 52MB3ZS, Mapping = AAL3/4, Header = NNI
Pattern = Edit pattern
b5 BRate = 52MB3ZS, Mapping = AAL5, Header = NNI
Pattern = Word16

A-51
Appendix A

‘8C - 8D’ Checks on Signals 2 (2/34/139 M)


Char. Message Bit Error Details
8C Signal (34/139M:ATM) An error or alarm was detected under the following conditions:
b0 BRate = 139M, Mapping = ATM O.191, Header = UNI
b1 BRate = 139M, Mapping = ATM User PRG, Header = UNI
Pattern = Time stamp
b2 BRate = 139M, Mapping = AAL1, Header = UNI
Pattern = Word16
b3 BRate = 139M, Mapping = AAL2, Header = UNI
Pattern = Edit pattern
b4 BRate = 139M, Mapping = AAL3/4, Header = UNI
Pattern = Single PRBS9
b5 BRate = 139M, Mapping = AAL5, Header = UNI
Pattern = Cross PRBS9
b6 BRate = 34M, Mapping = ATM O.191, Header = NNI
b7 BRate = 34M, Mapping = ATM User PRG, Header = NNI
Pattern = Cross PRBS15
b8 BRate = 34M, Mapping = AAL1, Header = NNI
Pattern = Edit pattern
b9 BRate = 34M, Mapping = AAL2, Header = NNI
Pattern = Edit pattern
b10 BRate = 34M, Mapping = AAL3/4, Header = NNI
Pattern = Time stamp
b11 BRate = 34M, Mapping = AAL5, Header = NNI
Pattern = Single PRBS9
8D Signal (2M:ATM) An error or alarm was detected under the following conditions:
b0 BRate = 2M, Mapping = ATM O.191, Header = UNI
b1 BRate = 2M, Mapping = ATM User PRG, Header = UNI
Pattern = Cross PRBS9
b2 BRate = 2M, Mapping = AAL1, Header = UNI
Pattern = Cross PRBS15
b3 BRate = 2M, Mapping = AAL2, Header = NNI
Pattern = Word8
b4 BRate = 2M, Mapping = AAL3/4, Header = NNI
Pattern = Cross PRBS9
b5 BRate = 2M, Mapping = AAL5, Header = NNI
Pattern = Cross PRBS15

A-52
A.2 Error Details

‘8E - 8F’ Checks on Signals 3 (1.5/45 M)


Char. Message Bit Error Details
8E Signal An error or alarm was detected under the following conditions:
(45M/45MPLCP:ATM) b0 BRate = 45M, PLCP = OFF, Mapping = ATM O.191, Header = UNI
b1 BRate = 45M, PLCP = OFF, Mapping = ATM User PRG, Header = UNI
Pattern = Single PRBS9
b2 BRate = 45M, PLCP = OFF, Mapping = AAL1, Header = UNI
Pattern = Cross PRBS23
b3 BRate = 45M, PLCP = OFF, Mapping = AAL2, Header = UNI
Pattern = Time stamp
b4 BRate = 45M, PLCP = OFF, Mapping = AAL3/4, Header = UNI
Pattern = Cross PRBS9
b5 BRate = 45M, PLCP = OFF, Mapping = AAL5, Header = UNI
Pattern = Word16
b6 BRate = 45M, PLCP = ON, Mapping = ATM O.191, Header = NNI
b7 BRate = 45M, PLCP = ON, Mapping = ATM User PRG, Header = NNI
Pattern = Edit pattern
b8 BRate = 45M, PLCP = ON, Mapping = AAL1, Header = NNI
Pattern = Cross PRBS9
b9 BRate = 45M, PLCP = ON, Mapping = AAL2, Header = NNI
Pattern = Word8
b10 BRate = 45M, PLCP = ON, Mapping = AAL3/4, Header = NNI
Pattern = Cross PRBS15
b11 BRate = 45M, PLCP = ON, Mapping = AAL5, Header = NNI
Pattern = Cross PRBS23
8F Signal (1.5M:ATM) An error or alarm was detected under the following conditions:
b0 BRate = 1.5M, Mapping = ATM O.191, Header = UNI
b1 BRate = 1.5M, Mapping = ATM User PRG, Header = UNI
Pattern = Cross PRBS9
b2 BRate = 1.5M, Mapping = AAL1, Header = UNI
Pattern = Time stamp
b3 BRate = 1.5M, Mapping = AAL2, Header = NNI
Pattern = Edit pattern
b4 BRate = 1.5M, Mapping = AAL3/4, Header = NNI
Pattern = Word16
b5 BRate = 1.5M, Mapping = AAL5, Header = NNI
Pattern = Single PRBS9

A-53
Appendix A

‘8G’ Checks on error/alarm 1 (45 M PLCP)


Char. Message Bit Error Details
8G Error/Alarm The following error detection is outside the specification:
(45MPLCP errors:ATM) b0 BIP-8(Single)
b1 BIP-8(Rate)
b2 BIP-8(All)
b3 PLCPREI(Single)
b4 PLCPREI(Rate)
b5 PLCPREI(All)
b6 PLCPFAS(Count)
b7 POI(Count)

‘8H’ Checks on error/alarm 2 (45 M PLCP)


Char. Message Bit Error Details
8H Error/Alarm The following alarm detection is outside the specification:
(45MPLCP alarms:ATM) b0 LOFPLCP
b1 RDIPLCP

‘8I - 8L’ Checks on error/alarm 3 (Cell 1)


Char. Message Bit Error Details
8I Error/Alarm The following error detection is outside the specification:
(ATM:0.191 errors) b0 Errored cell(Single)
b1 Errored cell(Rate)
b2 Lost cell(Single)
b3 Lost cell(Rate)
b4 Misinserted cell(Single)
b5 Misinserted cell(Rate)
b6 SECB cell(Single)
b7 SECB cell(Rate)
b8 Corrected cell(Single)
b9 Corrected cell(Count)
b10 Discarded cell(Single)
b11 Discarded cell(Count)
8J Error/Alarm The following error detection is outside the specification:
(ATM:User PRG errors) b0 Bit(Single):PRBS
b1 Bit(Rate) :PRBS
b2 Bit(Single):Word
b3 Bit(Rate) :Word

A-54
A.2 Error Details

Char. Message Bit Error Details


8K Error/Alarm The following error detection is outside the specification:
(AAL1 errors) b0 Lost cell(Single)
b1 Lost cell(Rate)
b2 SNP cell(Single)
b3 SNP cell(Rate)
b4 Bit(Single):PRBS
b5 Bit(Rate) :PRBS
b6 Bit(Single):Word
b7 Bit(Rate) :Word
b8 Corrected cell(Single)
b9 Corrected cell(Count)
b10 Discarded cell(Single)
b11 Discarded cell(Count)
8L Error/Alar (AAL2 errors) The following error detection is outside the specification:
b0 P cell(Single)
b1 P cell(Rate)
b2 SN cell(Single)
b3 SN cell(Rate)
b4 OSF cell(Single)
b5 OSF cell(Rate)
b6 CPS HEC cell(Single)
b7 CPS HEC cell(Rate)
b8 LI cell(Single)
b9 LI cell(Rate)
b10 Bit(Single):PRBS
b11 Bit(Single):Word
b12 Corrected cell(Single)
b13 Corrected cell(Count)
b14 Discarded cell(Single)
b15 Discarded cell(Count)

A-55
Appendix A

‘8M - 8O’ Checks on error/alarm 3 (Cell 2)


Char. Message Bit Error Details
8M Error/Alarm The following error detection is outside the specification:
(AAL3/4 errors) 1/2 b0 SN cell(Single)
b1 SN cell(Rate)
b2 CRC10(Single)
b3 CRC10(Rate)
b4 ST cell(Single)
b5 ST cell(Rate)
b6 LI cell(Single)
b7 LI cell(Rate)
b8 Abort cell(Single)
b9 CPI cell(Single)
b10 CPI cell(Rate)
b11 B/Etag cell(Single)
b12 B/Etag cell(Rate)
b13 BAsize cell(Single)
b14 BAsize cell(Rate)
8N Error/Alarm The following error detection is outside the specification:
(AAL3/4 errors) 2/2 b0 AL cell(Single)
b1 AL cell(Rate)
b2 Length cell(Single)
b3 Length cell(Rate)
b4 Bit(Single)
b5 Bit(Rate)
b6 Corrected cell(Single)
b7 Corrected cell(Count)
b8 Discarded cell(Single)
b9 Discarded cell(Count)
b10 CRC10(Single)
b11 CRC10(Rate)

A-56
A.2 Error Details

Char. Message Bit Error Details


8O Error/Alarm The following error detection is outside the specification:
(AAL5 errors) b0 Frame size cell(Single)
b1 Frame size cell(Rate)
b2 Length cell(Single)
b3 Length cell(Rate)
b4 CRC32(Single)
b5 CRC32(Rate)
b6 Abort cell(Single)
b7 Bit(Single):PRBS
b8 Bit(Rate) :PRBS
b9 Bit(Single):Word
b10 Bit(Rate) :Word
b11 Corrected cell(Single)
b12 Corrected cell(Count)
b13 Discarded cell(Single)
b14 Discarded cell(Count)

‘8P’ Checks on error/alarm 4 (OAM cell)


Char. Message Bit Error Details
8P Error/Alarm (OAM cell) The following alarm detection is outside the specification:
b0 LCD
b1 End-End VP-AIS
b2 End-End VP-RDI
b3 Segment VC-AIS
b4 Segment VC-RDI
b5 VP CC
b6 VC CC
b7 LCD(CC:OFF)
b8 VP Loopback
b9 VC Loopback

A-57
Appendix A

‘8Q’ Checks on error/alarm 5 (PM cell)


Char. Message Bit Error Details
8Q Error/Alarm The following error detection is outside the specification:
(PM:FM errors) b0 Lost cell(Single):VP
b1 Lost cell(Rate):VP
b2 Misinserted cell(Single):VP
b3 Misinserted cell(Rate):VP
b4 BIPV cell(Single):VC
b5 BIPV cell(Rate):VC
b6 SECB cell(Single):VC
b7 SECB cell(Rate):VC
8R Error/Alarm The following error detection is outside the specification:
(PM:BR errors) b0 Lost cell(Single):VP
b1 Lost cell(Rate):VP
b2 Misinserted cell(Single):VP
b3 Misinserted cell(Rate):VP
b4 BIPV cell(Single):VC
b5 BIPV cell(Rate):VC
b6 SECB cell(Single):VC
b7 SECB cell(Rate):VC

‘8S’ Checks on cell monitor


Char. Message Bit Error Details
8S Live monitor The following abnormality is occurred::
b0 Traffic count abnormal
b1 Non-conforming count abnormal
b2 FM Misinserted cell count abnormal
b3 FM Lost cell count abnormal
b4 FM SECB cell count abnormal
b5 BR Misinserted cell count abnormal
b6 BR Lost cell count abnormal
b7 BR SECB cell count abnormal

‘8T’ Checks on 2-point CDV measurement


Char. Message Bit Error Details
8T 2-point CDV The following abnormality is occurred::
b0 cell count abnormal

A-58
A.2 Error Details

‘8U’ Checks on error/alarm 6 (SDH)


Char. Message Bit Error Details
8U Error/Alarm The following error detection is outside the specification:
(SDH errors:ATM) b0 B1(Single)
Error/Alarm b1 B1(Rate)
(SONET errors:ATM) b2 B1(All)
b3 B2(Single)
b4 B2(Rate)
b5 B2(All)
b6 MS-REI(Single)
b7 MS-REI(Rate)
b8 MS-REI(All)
b9 HP-B3(Single)
b10 HP-B3(Rate)
b11 HP-B3(All)
b12 HP-REI(Single)
b13 HP-REI(Rate)
b14 HP-REI(All)

‘8V’ Checks on error/alarm 7 (SDH)


Char. Message Bit Error Details
8V Error/Alarm The following alarm detection is outside the specification:
(SDH alarms: ATM) b0 LOS
Error/Alarm b1 LOF
(SONET alarms: ATM) b2 MS-AIS
b3 MS-RDI
b4 AU-AIS
b5 AU-LOP
b6 HP-RDI
b7 OOF

A-59
Appendix A

‘8W-8X’ Checks on error/alarm 8 (34/139 M)


Char. Message Bit Error Details
8W Error/Alarm The following alarm detection is outside the specification:
(139M errors: ATM) b0 Bit139M (Single)
b1 Bit139M (Rate)
b2 FAS139M (Count)
b3 BIP-8 (Single)
b4 BIP-8 (Rate)
b5 BIP-8 (All)
b6 REI139M (Single)
b7 REI139M (Rate)
b8 REI139M (All)
8X Error/Alarm The following alarm detection is outside the specification:
(34M errors: ATM) b0 Bit34M (Single)
b1 Bit34M (Rate)
b2 FAS34M (Count)
b3 BIP-8 (Single)
b4 BIP-8 (Rate)
b5 BIP-8 (All)
b6 REI34M (Single)
b7 REI34M (Rate)
b8 REI34M (All)

‘8Y’ Checks on error/alarm 9 (34/139 M)


Char. Message Bit Error Details
8Y Error/Alarm The following alarm detection is outside the specification:
(34/139M alarms: ATM) b0 AIS139M
b1 LOF139M
b2 RDI139M
b3 AIS34M
b4 LOF34M
b5 RDI34M

‘8Z’ Checks on cell output


Char. Message Bit Error Details
8Z Cell output timing The following abnormality is occurred::
b0 Distribution=Poisson 0.1% = Cell count abnormal
b1 Distribution=Poisson 50% = Cell count abnormal
b2 Distribution=Poisson 100% = Cell count abnormal
b3 Distribution=CBR 0.1% = Cell count abnormal
b4 Distribution=CBR 50% = Cell count abnormal
b5 Distribution=CBR 100% = Cell count abnormal

A-60
A.2 Error Details

‘9A’ Checks on memorized cell


Char. Message Bit Error Details
9A Memorized cell The following abnormality is occurred::
b0 The sending and receive patterns do no match.

‘9B’ Checks on background cell


Char. Message Bit Error Details
9B Background cell The following abnormality is occurred::
b0 The sending and receive patterns do no match.

‘9C’ Checks on Pointer


Char. Message Bit Error Details
9C Pointer The following abnormality is occurred::
b0 PTR-AU = +PJC count abnormal
b1 PTR-AU = -PJC count abnormal
b2 PTR-AU = NDF count abnormal

‘9D’ Checks on OH
Char. Message Bit Error Details
9D OH pattern The following abnormality is occurred::
b0 K1, K2 is abnormal
b1 SOH(622M),POH(VC4) abnormal
b2 SOH(STM-1),POH(VC4) abnormal
b3 SOH(STM-0),POH(VC3) abnormal

‘9E’ Checks on path trace


Char. Message Bit Error Details
9E Path trace The following abnormality is occurred::
b0 J0 abnormal
b1 J0 CRCdetection abnormal
b2 1-HP abnormal
b3 1-HPCRC abnormal

‘9F’ Checks on trail trace


Char. Message Bit Error Details
9F Trail trace The following abnormality is occurred::
b0 139M Trail trace abnormal
b1 341M Trail trace abnormal

A-61
Appendix A

‘9G’ Checks on 1-point CDV measurement


Char. Message Bit Error Details
9G 1-point CDV The following abnormality is occurred::
b0 CDVT=0cell abnormal
b1 CDVT=10cell abnormal
b2 CDVT=100cell abnormal

A-62
A.2 Error Details

(10) MP0131A Add/Drop Unit

‘CA’
Char. Message Bit Error Details
CA Add/Drop An error is abnormal under the following conditions.
b0 BRate = 156M, Mapping = AU4-139M (Async.)
b1 BRate = 156M, Mapping = AU4-45M (Async.), Drop DSX = 450ft
b2 BRate = 156M, Mapping = AU3-45M (Async.), Drop DSX = 450ft
b3 BRate = 156M, Mapping = AU4-34M (Async.)
b4 BRate = 156M, Mapping = AU4-2M (Async.)
Interface = Unbalanced
b5 BRate = 156M, Mapping = AU4-2M (Async.)
Interface = Balanced
b6 Brate = 156M, Mapping = AU4-1.5M (Async.), Code = AMI
Drop DSX = 655ft
b7 BRate = 156M, Mapping = AU4-1.5M (Async.), Code = b8ZS
Drop DSX = 655ft

A-63
Appendix A

(11) MP150000A 2.5G/10G Unit

‘DA - DB’ Checks on Signals (10 G)


Char. Message Bit Error Details
DA Signal (9953M) An error or alarm was detected under the following conditions:
b0 BRate = 9953M, Mapping = VC4 (Bulk), AUG# = 1 to 64
Pattern = PRBS23
DB Signal An error or alarm was detected under the following conditions:
(9953M Concatenation) b0 BRate = 9953M, Concatenation Mapping = STM16C-VC4*64C
Pattern = PRBS31
b1 BRate = 9953M, Concatenation Mapping = STM16C-VC4*16C 1to4
Pattern = PRBS23
b2 BRate = 9953M, Concatenation Mapping = STM16C-VC4*4C 1to16
Pattern = PRBS23
b3 BRate = 9953M, Concatenation Mapping = STM16C-VC4C 1to64
Pattern = PRBS23

‘DC - DD’ Checks on Signals (2.5 G)


Char. Message Bit Error Details
DC Signal (2488M Electrical) An error or alarm was detected under the following conditions:
b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1to16
Pattern = PRBS23
DD Signal (2488M Electrical An error or alarm was detected under the following conditions:
Concatenation) b0 BRate = 2488M, Concatenation Mapping = STM16C-VC4*16C
Pattern = PRBS31
b1 BRate = 2488M, Concatenation Mapping = STM16C-VC4*4C 1to4
Pattern = PRBS23
b2 BRate = 2488M, Concatenation Mapping = STM16C-VC4C 1to16
Pattern = PRBS23

A-64
A.2 Error Details

‘DE’ Checks on Signals (Dummy Electrical)


Char. Message Bit Error Details
DE Signal An error or alarm was detected under the following conditions:
(9953/2488M Dummy) b0 BRate = 9953M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 2, TUG3# = 1, TUG2# = 1, TU12# = 1,
Pattern = PRBS15
b1 BRate = 9953M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 64, TUG3# = 3, TUG2# = 7, TU12# = 3,
Pattern = PRBS15
b3 BRate = 2488M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 2, TUG3# = 1, TUG2# = 1, TU12# = 1,
Pattern = PRBS15
b4 BRate = 2488M,
Dummy ch Mapping (Tx) = AU4-VC12 (Bulk)
(AUG# = 1, TUG3# = 1, TU12#1),
Dummy ch Mapping (Rx) = AU4-VC12 (Bulk)
AUG# = 16, TUG3# = 3, TUG2# = 7, TU12# = 3,
Pattern = PRBS15

A-65
Appendix A

‘DF - DJ’ Checks on Signals 2


Char. Message Bit Error Details
DF Signal (9953M Mixed) An error or alarm was detected under the following conditions:
b0 BRate = 9953M,
Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
b1 BRate = 9953M,
Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU11 (Bulk),
Pattern = PRBS23
b2 BRate = 9953M,
Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b3 BRate = 9953M,
Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU11 (Bulk),
Pattern = PRBS23
b4 BRate = 9953M,
Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b5 BRate = 9953M,
Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23

A-66
A.2 Error Details

Char. Message Bit Error Details


DG Signal (2488M Mixed) An error or alarm was detected under the following conditions:
b0 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
b1 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#1)-TU3 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU2 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU11 (Bulk),
Pattern = PRBS23
b2 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b3 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#2)-TU2 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU11 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#3)-TU11 (Bulk),
Pattern = PRBS23
b4 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#1)-TU3 (Bulk),
Pattern = PRBS23
b5 BRate = 2488M,
Main CH Mapping = VC4-TUG3 (#3)-TU11 (Bulk),
Mixed CH Mapping (Tx) = VC4-TU3 (Bulk), VC4-TU2 (Bulk)
Mixed CH Mapping (Rx) = VC4-TUG3 (#2)-TU2 (Bulk),
Pattern = PRBS23
DH Signal (CID) An error or alarm was detected under the following conditions:
b0 BRate = 9953M
b1 BRate = 2488M
DI Signal (Nonframe) An error or alarm was detected under the following conditions:
b0 BRate = 9953M, Pattern = PRBS23, Wave Length = 1.31um
b1 BRate = 2488M, Pattern = PRBS23, Wave Length = 1.31um
DJ Signal (OH test) An error or alarm was detected under the following conditions:
b0 BRate = 9953M, Mapping = AU4-VC4 (Bulk), Pattern = PRBS11,
b1 BRate = 2488M, Mapping = AU4-VC4 (Bulk), Pattern = PRBS11,

A-67
Appendix A

‘DL’ Checks on error/alarm 1 (10 G)


Char. Message Bit Error Details
DL Error/Alarm (errors 10G) The following error detection is outside the specification:
At Concatenation Mapping=STM64C-VC4*64C
b0 Bit all (Single)
b1 Bit all (Rate)
At Concatenation Mapping=STM64C-VC4*16C
b2 B1 (Single)
b3 B1 (Burst 15bit)
b4 B1 (Rate)
At Concatenation Mapping=STM64C-VC4*4C
b5 B2 (Single)
b6 B2 (Burst 15bit)
b7 B2 (Rate)
At Concatenation Mapping=STM64C-VC4C
b8 Bit all (Single)
b9 Bit all (Rate)

‘DN’ Checks on error/alarm 1 (2.5 G)


Char. Message Bit Error Details
DN Error/Alarm (errors 2.5G) The following error detection is outside the specification:
At Concatenation Mapping=STM16C-VC4*16C
b0 Bit all (Single)
b1 Bit all (Rate)
At Concatenation Mapping=STM16C-VC4*4C
b2 B1 (Single)
b3 B1 (Burst 15bit)
b4 B1 (Rate)
At Concatenation Mapping=STM16C-VC4
b5 B2 (Single)
b6 B2 (Burst 15bit)
b7 B2 (Rate)

A-68
A.2 Error Details

‘DO’ Checks on error/alarm 2 (10 G)


Char. Message Bit Error Details
DO Error/Alarm (errors 10G) The following error detection is outside the specification:
At Concatenation Mapping=STM64C-VC4*64C
b0 LOF
b1 MS-AIS
b2 MS-RDI
b3 OOF
At Concatenation Mapping=STM64C-VC4*16C
b4 LOF
b5 MS-AIS
b6 MS-RDI
b7 OOF
At Concatenation Mapping=STM64C-VC4*4C
b8 LOF
b9 MS-AIS
b10 MS-RDI
b11 OOF
At Concatenation Mapping=STM64C-VC4C
b12 LOF
b13 MS-AIS
b14 MS-RDI
b15 OOF

‘DP’ Checks on error/alarm 2 (2.5 G)


Char. Message Bit Error Details
DP Error/Alarm (errors 2.5G) The following error detection is outside the specification:
At Concatenation Mapping=STM16C-VC4*16C
b0 LOF
b1 MS-AIS
b2 MS-RDI
b3 OOF
At Concatenation Mapping=STM16C-VC4*4C
b4 LOF
b5 MS-AIS
b6 MS-RDI
b7 OOF
At Concatenation Mapping=STM16C-VC4C
b8 LOF
b9 MS-AIS
b10 MS-RDI
b11 OOF

A-69
Appendix A

‘DQ’ Checks on alarm detection


Char. Message Bit Error Details
DQ Clock loss The following abnormality is occurred:
b0 DCS clock loss detection is abnormal. (10G)
b1 Lock detection is abnormal. (10G)
b2 DCS clock loss detection is abnormal. (2.5G)
b3 Lock detection is abnormal. (2.5G)

‘DR’ Checks on OH (K1, K2)


Char. Message Bit Error Details
DR OH pattern The following abnormality is occurred:
b0 K1, K2 is abnormal (10G)
b1 SOH (STM-64) is abnormal
b2 K1, K2 is abnormal (2.5G)
b3 SOH (STM-16) is abnormal

‘DS’ Checks on path trace


Char. Message Bit Error Details
DS Path trace The following abnormality is occurred:
b0 J0 is abnormal (10G)
b1 J0 CRC detection is abnormal (10G)
b2 J0 is abnormal (2.5G)
b3 J0 CRC detection is abnormal (2.5G)

A-70
A.2 Error Details

(12) MU150001A/MU150002A 10G Unit

‘EA - EB’ Checks on Signals (Optical 10 G/1.55)


Char. Message Bit Error Details
EA Signal An error or alarm was detected under the following conditions:
(9953M 1.55 Optical) b0 BRate = 9953M, Mapping = VC4 (Bulk), AUG# = 1 to 64
Pattern = PRBS23, Wave length = 1.55
EB Signal (9953M 1.55 An error or alarm was detected under the following conditions:
Optical Concatenation) b0 BRate = 9953M, Concatenation Mapping = STM16C-VC4*64C
Pattern = PRBS31, Wave length = 1.55
b1 BRate = 9953M, Concatenation Mapping = STM16C-VC4*16C 1to4
Pattern = PRBS23, Wave length = 1.55
b2 BRate = 9953M, Concatenation Mapping = STM16C-VC4*4C 1to16
Pattern = PRBS23, Wave length = 1.55
b3 BRate = 9953M, Concatenation Mapping = STM16C-VC4C 1to64
Pattern = PRBS23, Wave length = 1.55

‘EC - ED’ Checks on Signals2 (Optical 2.5 G/1.55)


Char. Message Bit Error Details
EC Signal An error or alarm was detected under the following conditions:
(2488M 1.55 Optical) b0 BRate = 2488M, Mapping = VC4 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, Wave length = 1.55
ED Signal (2488M 1.55 An error or alarm was detected under the following conditions:
Optical Concatenation) b0 BRate = 2488M, Concatenation Mapping = STM16C-VC4*16C
Pattern = PRBS31, Wave length = 1.55
b1 BRate = 2488M, Concatenation Mapping = STM16C-VC4*4C 1to4
Pattern = PRBS23, Wave length = 1.55
b2 BRate = 2488M, Concatenation Mapping = STM16C-VC4C 1to16
Pattern = PRBS23, Wave length = 1.55

‘EE’ Checks on error/alarm 1 (1.55)


Char. Message Bit Error Details
EE Error/Alarm (alarms) The following alarm detection is outside the specification:
b0 LOS

‘EF’ Checks on 9953 optical power


Char. Message Bit Error Details
EF Optical Power Optical power is abnormal under the following condition.
(9953M 1.55) b0 Brate = 9953M

A-71
Appendix A

‘EG - EH’ Checks on Signals3 (Optical 2.5 G/ 1.31)


Char. Message Bit Error Details
EG Signal An error or alarm was detected under the following conditions:
(2488M 1.31 Optical) b0 BRate = 2488M, Mapping = VC3 (Bulk), AUG# = 1 to 16
Pattern = PRBS23, Wave length = 1.31
EH Signal (2488M 1.31 An error or alarm was detected under the following conditions:
Optical Concatenation) b0 BRate = 2488M, Concatenation Mapping = STM16C-VC4*16C
Pattern = PRBS31, Wave length = 1.31
b1 BRate = 2488M, Concatenation Mapping = STM16C-VC4*4C 1to4
Pattern = PRBS23, Wave length = 1.31
b2 BRate = 2488M, Concatenation Mapping = STM16C-VC4C 1to16
Pattern = PRBS23, Wave length = 1.31

‘EI’ Checks on error/alarm 3 (1.31)


Char. Message Bit Error Details
EI Error/Alarm (alarms) The following alarm detection is outside the specification:
b0 LOS

‘EJ’ Checks on 2488 M optical power


Char. Message Bit Error Details
EJ Optical Power The following abnormality is occurred:
(2488M 1.31) b0 Optical power is abnormal under the following condition.
Brate = 2488M

A-72
A.2 Error Details

(13) MU150005A 2/8/34/139M 156/622M Jitter Unit

‘HA’ Checks on Jitter tolerance in transmitting side 1 (PDH)


Char Message Bit The following abnormality is occured:
HA Jitter Jitter tolerance became abnormal under the following condtions:
(2/8/34/139M:Tolerance) b0 BRate = 2M,Mod.freq:10kHz,Ampl. = 2UIp-p
b1 BRate = 2M,Mod.freq = 100kHz,Ampl. = 0.5UIp-p
b2 BRate = 8M,Mod.freq = 20kHz,Ampl. = 2UIp-p
b3 BRate = 8M,Mod.freq = 400kHz,Ampl. = 0.5UIp-p
b4 BRate = 34M,Mod.freq = 20kHz,Ampl. = 2UIp-p
b5 BRate = 34M,Mod.freq = 800kHz,Ampl. = 0.5UIp-p
b6 BRate = 139M,Mod.freq = 20kHz,Ampl. = 2UIp-p
b7 BRate = 139M,Mod.freq = 3.5MHz,Ampl. = 0.5UIp-p

‘HB’ Checks on Jitter tolerance in transmitting side 2 (SDH)


Char Message Bit The following abnormality is occured:
HB Jitter (SDH:Tolerance) Jitter tolerance became abnormal under the following condtions:
Jitter (SONET:Tolerance) b0 BRate = 156MCMI,Mod.freq = 20kHz,Ampl. = 2UIp-p
b1 BRate = 156MCMI,Mod.freq = 1.5MHz,Ampl. = 0.2UIp-p

A-73
Appendix A

‘HC’ Checks on Jitter measurement error in receiving side 1 (PDH)


Char Message Bit The following abnormality is occured:
HC Jitter (2/8/34/139M:RX Measurement errors became abnormal under the following conditions:
Measure) b0 BRate = 2M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 2M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 2M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 2M,Tx Range = 2UI,Mod.freq:1kHz,Ampl.:1UIp-p,R
x Range = 2UI,Filter = HP1+LP
b4 BRate = 8M,Tx Range = 400UI,Mod.freq:10Hz,,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 8M,Tx Range = 80UI,Mod.freq:10Hz,,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 8M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 8M,Tx Range = 2UI,Mod.freq:1kHz,Ampl.:1UIp-p,
Rx Range = 2UI,Filter = HP1+LP
b8 BRate = 34M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b9 BRate = 34M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b10 BRate = 34M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b11 BRate = 34M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b12 BRate = 139M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b13 BRate = 139M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b14 BRate = 139M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b15 BRate = 139M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP

A-74
A.2 Error Details

‘HD’ Checks on Jitter measurement error in receiving side 2 (SDH)


Char Message Bit The following abnormality is occured:
HD Jitter (SDH:RX Measure) Measurement errors became abnormal under the following conditions:
Jitter (SONET:RX b0 BRate = 156M CMI,Tx Range = 400UI,Mod.freq = 10Hz,
Measure) Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 156M CMI,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 156M CMI,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 156M CMI,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b4 BRate = 156M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 156M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 156M,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 156M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b8 BRate = 622M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 800UI,Filter = LP
b9 BRate = 622M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b10 BRate = 622M,Tx Range = 16UI,Mod.freq = 1.5kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b11 BRate = 622M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP

‘HE’ Checks on wander measurement error 1 (PDH)


Char Message Bit The following abnormality is occured:
HE Wander (2M) Wander became abnormal under the following conditions:
b0 BRate = 2M,Mod.freq = 20kHz,Ampl. = 20kUIp-p

‘HF’ Checks on wander measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
HF Wander (SDH) Wander became abnormal under the following conditions:
Wander (SONET) b0 BRate = 156M CMI,Mod.freq = 2Hz,Ampl. = 200kUIp-p
b1 BRate = 156M,Mod.freq = 2Hz,Ampl. = 200kUIp-p
b2 BRate = 622M,Mod.freq = 0.4Hz,Ampl. = 200kUIp-p

A-75
Appendix A

‘HG’ Checks on frequency measurement error 1 (PDH)


Char Message Bit The following abnormality is occured:
HG Frequency (2/8/34/139M) The frequency is abnormal under the following conditions:
b0 BRate = 2M
b1 BRate = 8M
b2 BRate = 34M
b3 BRate = 139M

‘HH’ Checks on frequency measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
HH Frequency (SDH) The frequency is abnormal under the following conditions:
Frequency (SONET) b0 BRate = 156M CMI
b1 BRate = 156M
b2 BRate = 622M

A-76
A.2 Error Details

‘HI’ Checks on Residual jitter in receiving side 1 (2 M/8 M PDH:Peak)


Char Message Bit The following abnormality is occured:
HI Jitter Receive residual jitter became abnormal under the following conditions:
(2M:RX Intrinsic:Peak) b0 Brate = 2M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 2M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 2M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 2M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 2M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 2M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Cloc,Unit = Peak
b6 Brate = 2M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 2M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 2M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 2M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock
HJ Jitter Receive residual jitter became abnormal under the following conditions:
(8M:RX Intrinsic:Peak) b0 Brate = 8M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 8M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 8M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 8M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 8M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 8M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 8M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 8M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 8M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 8M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-77
Appendix A

‘HK-HL’ Checks on Residual jitter in receiving side 1 (34 M/139 MPDH:Peak)


Char Message Bit The following abnormality is occured:
HK Jitter Receive residual jitter became abnormal under the following conditions:
(34M:RX Intrinsic:Peak) b0 Brate = 34M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 34M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 34M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 34M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 34M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 34M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 34M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 34M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 34M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 34M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
HL Jitter Receive residual jitter became abnormal under the following conditions:
(139M:RX Intrinsic:Peak) b0 Brate = 139M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 139M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 139M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 139M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 139M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 139M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 139M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 139M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 139M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 139M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-78
A.2 Error Details

‘HM-HP’ Checks on Residual jitter in receiving side 2 (PDH:RMS)


Char Message Bit The following abnormality is occured:
HM Jitter Receive residual jitter became abnormal under the following conditions:
(2M:RX Intrinsic:RMS) b0 Brate = 2M,Range = 2UI,Filter = HP+LP,Offset range = ±10
0,Data,Unit = RMS
b1 Brate = 2M,Range = 20UI,Filter = HP+LP,Offset range = ±10
0,Data,Unit = RMS
b2 Brate = 2M,Range = 2UI,Filter = HP+LP,Offset range = ±10
0,Clock,Unit = RMS
b3 Brate = 2M,Range = 20UI,Filter = HP+LP,Offset range = ±10
0,Clock,Unit = RMS
HN Jitter Receive residual jitter became abnormal under the following conditions:
(8M:RX Intrinsic:RMS) b0 Brate = 8M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 8M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 8M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 8M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
HO Jitter Receive residual jitter became abnormal under the following conditions:
(34M:RX Intrinsic:RMS) b0 Brate = 34M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 34M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 34M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 34M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
HP Jitter Receive residual jitter became abnormal under the following conditions:
(139M:RX Intrinsic:RMS) b0 Brate = 139M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 139M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 139M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 139M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS

A-79
Appendix A

‘HQ’ Checks on Residual jitter in receiving side 3 (SDH:Peak)


Char Message Bit The following abnormality is occured:
HQ Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:Peak) b0 Brate = 156M CMI,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 156M CMI,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 156M CMI,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 156M CMI,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 156M CMI,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 156M CMI,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 156M CMI,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 156M CMI,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 156M CMI,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 156M CMI,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

‘HR’ Checks on Residual jitter in receiving side 4 (SDH:RMS)


Char Message Bit The following abnormality is occured:
HR Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:RMS) b0 Brate = 156M CMI,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 156M CMI,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 156M CMI,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 156M CMI,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS

‘HS’ Checks on hit count in receiving side


Char Message Bit The following abnormality is occured:
HS Jitter (Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate = 2M,Mod.freq = 100kHz
b1 BRate = 2M,Mod.freq = 1MHz

A-80
A.2 Error Details

(14) MU150006A 1.5/45/52M 156/622M Jitter Unit

‘IA’ Checks on Jitter tolerance in transmitting side1 (1.5/45 M)


Char Message Bit The following abnormality is occured:
IA Jitter (1.5/45M:Tolerance) Jitter tolerance became abnormal under the following condtions:
b0 BRate = 1.5M,Mod.freq:3kHz,Ampl.:2UIp-p
b1 BRate = 1.5M,Mod.freq = 40kHz,Ampl. = 0.5UIp-p
b2 BRate = 45M,Mod.freq = 50kHz,Ampl. = 2UIp-p
b3 BRate = 45M,Mod.freq = 400kHz,Ampl. = 0.5UIp-p

‘IB’ Checks on Jitter tolerance in transmitting side2 (SDH)


Char Message Bit The following abnormality is occured:
IB Jitter (SDH:Tolerance) Jitter tolerance became abnormal under the following condtions:
Jitter (SONET:Tolerance) b0 BRate = 52M B3ZS,Mod.freq = 3kHz,Ampl. = 2UIp-p
b1 BRate = 52M B3ZS,Mod.freq = 400kHz,Ampl. = 0.2UIp-p

‘IC’Checks on Jitter measurement error in receiving side 1 (1.5/45 M)


Char Message Bit The following abnormality is occured:
IC Jitter Measurement errors became abnormal under the following conditions:
(1.5/45M:RX Measure) b0 BRate = 1.5M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 1.5M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 1.5M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 1.5M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b4 BRate = 45M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 45M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 45M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 45M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP

A-81
Appendix A

‘ID’ Checks on Jitter measurement error in receiving side 2 (SDH)


Char Message Bit The following abnormality is occured:
ID Jitter (SDH:RX Measure) Measurement errors became abnormal under the following conditions:
Jitter b0 BRate = 52M B3ZS,Tx Range = 400UI,Mod.freq = 10Hz,
(SONET:RX Measure) Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 52M B3ZS,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 52M B3ZS,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 52M B3ZS,Tx Range = 2UI,Mod.freq = 1kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b4 BRate = 156M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 156M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 156M,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 156M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b8 BRate = 622M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 800UI,Filter = LP
b9 BRate = 622M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b10 BRate = 622M,Tx Range = 16UI,Mod.freq = 1.5kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
BRate = 622M,Tx Range = 2UI,Mod.freq = 100kHz,
b11 Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP

‘IE’ Checks on wander measurement error 1 (1.5 M)


Char Message Bit The following abnormality is occured:
IE Wander (1.5M) Wander became abnormal under the following conditions:
b0 BRate = 1.5M,Mod.freq = 0.2Hz,Ampl. = 20kUIp-p

‘IF’ Checks on wander measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
IF Wander (SDH) Wander became abnormal under the following conditions:
Wander (SONET) b0 BRate = 52M B3ZS,Mod.freq = 0.4Hz,Ampl. = 200kUIp-p
b1 BRate = 156M,Mod.freq = 2Hz,Ampl. = 200kUIp-p
BRate = 622M,,Mod.freq = 2Hz,Ampl. = 200kUIp-p
b2

A-82
A.2 Error Details

‘IG’ Checks on frequency measurement error 1 (1.5/45 M)


Char Message Bit The following abnormality is occured:
IG Frequency (1.5/45M) The frequency is abnormal under the following conditions:
b0 BRate = 1.5M
b1 BRate = 45M

‘IH’ Checks on frequency measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
IH Frequency (SDH) The frequency is abnormal under the following conditions:
Frequency (SONET) b0 BRate = 52M B3ZS
b1 BRate = 156M
b2 BRate = 622M

A-83
Appendix A

‘II-IJ’ Checks on Residual jitter in receiving side 1 (1.5/45 M:Peak)


Char Message Bit The following abnormality is occured:
II Jitter Receive residual jitter became abnormal under the following conditions:
(1.5M:RX Intrinsic:Peak) b0 Brate = 1.5M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 1.5M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 1.5M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 1.5M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 1.5M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 1.5M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 1.5M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 1.5M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 1.5M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 1.5M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
IJ Jitter Receive residual jitter became abnormal under the following conditions:
(45M:RX Intrinsic:Peak) b0 Brate = 45M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 45M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 45M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 45M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 45M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 45M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 45M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 45M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 45M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 45M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-84
A.2 Error Details

‘IK-IL’ Checks on Residual jitter in receiving side 2 (1.5/45 M:RMS)


Char Message Bit The following abnormality is occured:
IK Jitter Receive residual jitter became abnormal under the following conditions:
(1.5M:RX Intrinsic:RMS) b0 Brate = 1.5M,Range = 2UI,Filter = HP+LP,Offset range = ±100,Data,
Unit = RMS
b1 Brate = 1.5M,Range = 20UI,Filter = HP+LP,Offset range = ±100,Data,
Unit = RMS
b2 Brate = 1.5M,Range = 2UI,Filter = HP+LP,Offset range = ±100,Clock,
Unit = RMS
b3 Brate = 1.5M,Range = 20UI,Filter = HP+LP,Offset range = ±100,Cloc,
Unit = RMS
IL Jitter Receive residual jitter became abnormal under the following conditions:
(45M:RX Intrinsic:RMS) b0 Brate = 45M,Range = 2UI,Filter = HP+LP,Offset range = ±100,Data,
Unit = RMS
b1 Brate = 45M,Range = 20UI,Filter = HP+LP,Offset range = ±100,Data,
Unit = RMS
b2 Brate = 45M,Range = 2UI,Filter = HP+LP,Offset range = ±100,Clock,
Unit = RMS
b3 Brate = 45M,Range = 20UI,Filter = HP+LP,Offset range = ±100,Cloc,
Unit = RMS

‘IM’ Checks on Residual jitter in receiving side 3(SDH:Peak)


Char Message Bit The following abnormality is occured:
IM Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:Peak) b0 Brate = 52M B3ZS,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data(Electrical),Unit = Peak
b1 Brate = 52M B3ZS,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data(Electrical),Unit = Peak
b2 Brate = 52M B3ZS,Range = 400UI,Filter = LP,
Offset range = ±100,Data(Electrical),Unit = Peak
b3 Brate = 52M B3ZS,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data(Electrical),Unit = Peak
b4 Brate = 52M B3ZS,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data(Electrical),Unit = Peak
b5 Brate = 52M B3ZS,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 52M B3ZS,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 52M B3ZS,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 52M B3ZS,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 52M B3ZS,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-85
Appendix A

‘IN’ Checks on Residual jitter in receiving side 4 (SDH:RMS)


Char Message Bit The following abnormality is occured:
IN Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:RMS) b0 Brate = 52M B3ZS,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data(Electrical),Unit = RMS
b1 Brate = 52M B3ZS,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data(Electrical),Unit = RMS
b2 Brate = 52M B3ZS,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 52M B3ZS,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS

‘IO’ Checks on hit count in receiving side


Char Message Bit The following abnormality is occured:
IO Jitter (Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate = 45M,Mod.freq = 100kHz
b1 BRate = 45M,Mod.freq = 250kHz

A-86
A.2 Error Details

(15) MU150007A 2/8/34/139M 1.5/45/52M 156/622M Jitter Unit

‘JA’ Checks on Jitter tolerance in transmitting side 1(PDH)


Char Message Bit The following abnormality is occured:
JA Jitter Jitter tolerance became abnormal under the following condtions:
(2/8/34/139M:Tolerance) b0 BRate = 2M,Mod.freq:10kHz,Ampl.:2UIp-p
b1 BRate = 2M,Mod.freq = 100kHz,Ampl. = 0.5UIp-p
b2 BRate = 8M,Mod.freq = 20kHz,Ampl. = 2UIp-p
b3 BRate = 8M,Mod.freq = 400kHz,Ampl. = 0.5UIp-p
b4 BRate = 34M,Mod.freq = 20kHz,Ampl. = 2UIp-p
b5 BRate = 34M,Mod.freq = 800kHz,Ampl. = 0.5UIp-p
b6 BRate = 139M,Mod.freq = 20kHz,Ampl. = 2UIp-p
b7 BRate = 139M,Mod.freq = 3.5MHz,Ampl. = 0.5UIp-p

‘JB’ Checks on Jitter tolerance in transmitting side2 (SDH)


Char Message Bit The following abnormality is occured:
JB Jitter (SDH:Tolerance) Jitter tolerance became abnormal under the following condtions:
Jitter (SONET:Tolerance) b0 BRate = 156MCMI,Mod.freq = 20kHz,Ampl. = 2UIp-p
b1 Rate = 156MCMI,Mod.freq = 1.5MHz,Ampl. = 0.2UIp-p

A-87
Appendix A

‘JC’ Checks on Jitter measurement error in receiving side 1 (PDH)


Char Message Bit The following abnormality is occured:
JC Jitter (2/8/34/139M:RX Measurement errors became abnormal under the following conditions:
Measure) b0 BRate = 2M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 2M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 2M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 2M,Tx Range = 2UI,Mod.freq:1kHz,Ampl.:1UIp-p,R
x Range = 2UI,Filter = HP1+LP
b4 BRate = 8M,Tx Range = 400UI,Mod.freq:10Hz,,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 8M,Tx Range = 80UI,Mod.freq:10Hz,,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 8M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 8M,Tx Range = 2UI,Mod.freq:1kHz,Ampl.:1UIp-p,
Rx Range = 2UI,Filter = HP1+LP
b8 BRate = 34M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b9 BRate = 34M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b10 BRate = 34M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b11 BRate = 34M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b12 BRate = 139M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b13 BRate = 139M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b14 BRate = 139M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b15 BRate = 139M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP

A-88
A.2 Error Details

‘JD’ Checks on Jitter measurement error in receiving side 2 (SDH)


Char Message Bit The following abnormality is occured:
JD Jitter (SDH:RX Measure) Measurement errors became abnormal under the following conditions:
Jitter (SONET:RX b0 BRate = 156M CMI,Tx Range = 400UI,Mod.freq = 10Hz,
Measure) Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 156M CMI,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 156M CMI,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 156M CMI,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b4 BRate = 156M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 156M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 156M,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 156M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b8 BRate = 622M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 800UI,Filter = LP
b9 BRate = 622M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b10 BRate = 622M,Tx Range = 16UI,Mod.freq = 1.5kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b11 BRate = 622M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP

‘JE’ Checks on wander measurement error 1 (2 M)


Char Message Bit The following abnormality is occured:
JE Wander (2M) Wander became abnormal under the following conditions:
b0 BRate = 2M,Mod.freq = 20kHz,Ampl. = 20kUIp-p

‘JF’ Checks on wander measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
JF Wander(SDH) Wander became abnormal under the following conditions:
Wander(SONET) b0 BRate = 156M CMI,Mod.freq = 2Hz,Ampl. = 200kUIp-p
b1 BRate = 156M,Mod.freq = 2Hz,Ampl. = 200kUIp-p
b2 BRate = 622M,Mod.freq = 0.4Hz,Ampl. = 200kUIp-p

A-89
Appendix A

‘JG’ Checks on frequency measurement error 1 (PDH)


Char Message Bit The following abnormality is occured:
JG Frequency (2/8/34/139M) The frequency is abnormal under the following conditions:
b0 BRate = 2M
b1 BRate = 8M
b2 BRate = 34M
b3 BRate = 139M

‘JH’ Checks on frequency measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
JH Frequency(SDH) The frequency is abnormal under the following conditions:
Frequency(SONET) b0 BRate = 156M CMI
b1 BRate = 156M
b2 BRate = 622M

A-90
A.2 Error Details

‘JI-JJ’ Checks on Residual jitter in receiving side 1 (2/8 M PDH:Peak)


Char Message Bit The following abnormality is occured:
JI Jitter Receive residual jitter became abnormal under the following conditions:
(2M:RX Intrinsic:Peak) b0 Brate = 2M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 2M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 2M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 2M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 2M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 2M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 2M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 2M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 2M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 2M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
JJ Jitter Receive residual jitter became abnormal under the following conditions:
(8M:RX Intrinsic:Peak) b0 Brate = 8M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 8M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 8M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 8M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 8M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 8M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 8M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 8M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 8M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 8M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-91
Appendix A

‘JK-JL’ Checks on Residual jitter in receiving side 1 (34/139 M PDH:Peak)


Char Message Bit The following abnormality is occured:
JK Jitter Receive residual jitter became abnormal under the following conditions:
(34M:RX Intrinsic:Peak) b0 Brate = 34M,Range = 2UI,Filter = HP1+LP,
b1 Offset range = ±100,Data,Unit = Peak
Brate = 34M,Range = 20UI,Filter = HP1+LP,
b2 Offset range = ±100,Data,Unit = Peak
Brate = 34M,Range = 400UI,Filter = LP,
b3 Offset range = ±100,Data,Unit = Peak
Brate = 34M,Range = 2UI,Filter = HP2+LP,
b4 Offset range = ±100,Data,Unit = Peak
Brate = 34M,Range = 20UI,Filter = HP2+LP,
b5 Offset range = ±100,Data,Unit = Peak
Brate = 34M,Range = 2UI,Filter = HP1+LP,
b6 Offset range = ±100,Clock,Unit = Peak
Brate = 34M,Range = 20UI,Filter = HP1+LP,
b7 Offset range = ±100,Clock,Unit = Peak
Brate = 34M,Range = 400UI,Filter = LP,
b8 Offset range = ±100,Clock,Unit = Peak
Brate = 34M,Range = 2UI,Filter = HP2+LP,
b9 Offset range = ±100,Clock,Unit = Peak
Brate = 34M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
JL Jitter Receive residual jitter became abnormal under the following conditions:
(139M:RX Intrinsic:Peak) b0 Brate = 139M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 139M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 139M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 139M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 139M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 139M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 139M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 139M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 139M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 139M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-92
A.2 Error Details

‘JM-JP’ Checks on Residual jitter in receiving side 2 (PDH:RMS)


Char Message Bit The following abnormality is occured:
JM Jitter Receive residual jitter became abnormal under the following conditions:
(2M:RX Intrinsic:RMS) b0 Brate = 2M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 2M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 2M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 2M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
JN Jitter Receive residual jitter became abnormal under the following conditions:
(8M:RX Intrinsic:RMS) b0 Brate = 8M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 8M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 8M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 8M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
JO Jitter Receive residual jitter became abnormal under the following conditions:
(34M:RX Intrinsic:RMS) b0 Brate = 34M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 34M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 34M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 34M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
JP Jitter Receive residual jitter became abnormal under the following conditions:
(139M:RX Intrinsic:RMS) b0 Brate = 139M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 139M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 139M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 139M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS

A-93
Appendix A

‘JQ’ Checks on Residual jitter in receiving side 3(SDH:Peak)


Char Message Bit The following abnormality is occured:
JQ Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:Peak) b0 Brate = 156M CMI,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 156M CMI,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 156M CMI,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 156M CMI,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 156M CMI,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 156M CMI,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 156M CMI,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 156M CMI,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 156M CMI,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 156M CMI,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

‘JR’ Checks on Residual jitter in receiving side 4 (SDH:RMS)


Char Message Bit The following abnormality is occured:
JR Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:RMS) b0 Brate = 156M CMI,Range = 2UI,Filter = HP+LP,Offset range = ±100,
Data,Unit = RMS
b1 Brate = 156M CMI,Range = 20UI,Filter = HP+LP,Offset range = ±100,
Data,Unit = RMS
b2 Brate = 156M CMI,Range = 2UI,Filter = HP+LP,Offset range = ±100,
Clock,Unit = RMS
b3 Brate = 156M CMI,Range = 20UI,Filter = HP+LP,Offset range = ±100,
Clock,Unit = RMS

‘JS’ Checks on hit count in receiving side


Char Message Bit The following abnormality is occured:
JS Jitter (Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate = 2M,Mod.freq = 100kHz
b1 BRate = 2M,Mod.freq = 1MHz

A-94
A.2 Error Details

‘KA’Checks on Jitter tolerance in transmitting side1 (1.5/45 M)


Char Message Bit The following abnormality is occured:
KA Jitter (1.5/45M:Tolerance) Jitter tolerance became abnormal under the following condtions:
b0 BRate = 1.5M,Mod.freq:3kHz,Ampl.:2UIp-p
b1 Rate = 1.5M,Mod.freq = 40kHz,Ampl. = 0.5UIp-p
b2 BRate = 45M,Mod.freq = 50kHz,Ampl. = 2UIp-p
b3 BRate = 45M,Mod.freq = 400kHz,Ampl. = 0.5UIp-p

‘KB’ Checks on Jitter tolerance in transmitting side2 (SDH)


Char Message Bit The following abnormality is occured:
KB Jitter (SDH:Tolerance) Jitter tolerance became abnormal under the following condtions:
Jitter (SONET:Tolerance) b0 BRate = 52M B3ZS,Mod.freq = 3kHz,Ampl. = 2UIp-p
b1 Rate = 52M B3ZS,Mod.freq = 400kHz,Ampl. = 0.2UIp-p

‘KC’ Checks on Jitter measurement error in receiving side 1(1.5/45 M)


Char Message Bit The following abnormality is occured:
KC Jitter Measurement errors became abnormal under the following conditions:
(1.5/45M:RX Measure) b0 BRate = 1.5M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 1.5M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 1.5M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 1.5M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b4 BRate = 45M,Tx Range = 400UI,Mod.freq:10Hz,
Ampl.:200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 45M,Tx Range = 80UI,Mod.freq:10Hz,
Ampl.:40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 45M,Tx Range = 16UI,Mod.freq:1kHz,
Ampl.:8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 45M,Tx Range = 2UI,Mod.freq:1kHz,
Ampl.:1UIp-p,Rx Range = 2UI,Filter = HP1+LP

A-95
Appendix A

‘KD’ Checks on Jitter measurement error in receiving side 2(SDH)


Char Message Bit The following abnormality is occured:
KD Jitter (SDH:RX Measure) Measurement errors became abnormal under the following conditions:
Jitter b0 BRate = 52M B3ZS,Tx Range = 400UI,Mod.freq = 10Hz,
(SONET:RX Measure) Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b1 BRate = 52M B3ZS,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b2 BRate = 52M B3ZS,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b3 BRate = 52M B3ZS,Tx Range = 2UI,Mod.freq = 1kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b4 BRate = 156M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 400UI,Filter = LP
b5 BRate = 156M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b6 BRate = 156M,Tx Range = 16UI,Mod.freq = 1kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b7 BRate = 156M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP
b8 BRate = 622M,Tx Range = 400UI,Mod.freq = 10Hz,
Ampl. = 200UIp-p,Rx Range = 800UI,Filter = LP
b9 BRate = 622M,Tx Range = 80UI,Mod.freq = 10Hz,
Ampl. = 40UIp-p,Rx Range = 400UI,Filter = LP
b10 BRate = 622M,Tx Range = 16UI,Mod.freq = 1.5kHz,
Ampl. = 8UIp-p,Rx Range = 20UI,Filter = HP1+LP
b11 BRate = 622M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP

‘KE’ Checks on wander measurement error 1 (1.5 M)


Char Message Bit The following abnormality is occured:
KE Wander(1.5M) Wander became abnormal under the following conditions:
b0 BRate = 1.5M,Mod.freq = 0.2Hz,Ampl. = 20kUIp-p

‘KF’ Checks on wander measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
KF Wander(SDH) Wander became abnormal under the following conditions:
Wander(SONET) b0 BRate = 52M B3ZS,Mod.freq = 0.4Hz,Ampl. = 200kUIp-p
b1 BRate = 156M,Mod.freq = 2Hz,Ampl. = 200kUIp-p
b2 BRate = 622M,,Mod.freq = 2Hz,Ampl. = 200kUIp-p

A-96
A.2 Error Details

‘KG’ Checks on frequency measurement error 1 (1.5/45 M)


Char Message Bit The following abnormality is occured:
KG Frequency (1.5/45M) The frequency is abnormal under the following conditions:
b0 BRate = 1.5M
b1 BRate = 45M

‘KH’ Checks on frequency measurement error 2 (SDH)


Char Message Bit The following abnormality is occured:
KH Frequency (SDH) The frequency is abnormal under the following conditions:
Frequency (SONET) b0 BRate = 52M B3ZS
b1 BRate = 156M
b2 BRate = 622M

A-97
Appendix A

‘KI-KJ’ Checks on Residual jitter in receiving side 1 (1.5/45 M:Peak)


Char Message Bit The following abnormality is occured:
KI Jitter Receive residual jitter became abnormal under the following conditions:
(1.5M:RX Intrinsic:Peak) b0 Brate = 1.5M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 1.5M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 1.5M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 1.5M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 1.5M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 1.5M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 1.5M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 1.5M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 1.5M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 1.5M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
KJ Jitter Receive residual jitter became abnormal under the following conditions:
(45M:RX Intrinsic:Peak) b0 Brate = 45M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 45M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 45M,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 45M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 45M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 45M,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 45M,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 45M,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 45M,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 45M,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-98
A.2 Error Details

‘KK-KL’ Checks on Residual jitter in receiving side 2 (1.5/45 M:RMS)


Char Message Bit The following abnormality is occured:
KK Jitter Receive residual jitter became abnormal under the following conditions:
(1.5M:RX Intrinsic:RMS) b0 Brate = 1.5M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 1.5M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 1.5M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 1.5M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
KL Jitter Receive residual jitter became abnormal under the following conditions:
(45M:RX Intrinsic:RMS) b0 Brate = 45M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 45M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 45M,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 45M,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS

‘KM’ Checks on Residual jitter in receiving side 3 (SDH:Peak)


Char Message Bit The following abnormality is occured:
KM Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:Peak) b0 Brate = 52M B3ZS,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b1 Brate = 52M B3ZS,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Data,Unit = Peak
b2 Brate = 52M B3ZS,Range = 400UI,Filter = LP,
Offset range = ±100,Data,Unit = Peak
b3 Brate = 52M B3ZS,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b4 Brate = 52M B3ZS,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Data,Unit = Peak
b5 Brate = 52M B3ZS,Range = 2UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b6 Brate = 52M B3ZS,Range = 20UI,Filter = HP1+LP,
Offset range = ±100,Clock,Unit = Peak
b7 Brate = 52M B3ZS,Range = 400UI,Filter = LP,
Offset range = ±100,Clock,Unit = Peak
b8 Brate = 52M B3ZS,Range = 2UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak
b9 Brate = 52M B3ZS,Range = 20UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

A-99
Appendix A

‘KN’ Checks on Residual jitter in receiving side 4 (SDH:RMS)


Char Message Bit The following abnormality is occured:
KN Jitter Receive residual jitter became abnormal under the following conditions:
(SDH:RX Intrinsic:RMS) b0 Brate = 52M B3ZS,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b1 Brate = 52M B3ZS,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Data,Unit = RMS
b2 Brate = 52M B3ZS,Range = 2UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS
b3 Brate = 52M B3ZS,Range = 20UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS

‘KO’ Checks on hit count in receiving side


Char Message Bit The following abnormality is occured:
KO Jitter(Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate = 45M,Mod.freq = 100kHz
b1 BRate = 45M,Mod.freq = 1MHz

A-100
A.2 Error Details

(16) MU150011A 2.5G Jitter Unit

‘LA’ Checks on Jitter tolerance in transmitting side


Char Message Bit The following abnormality is occured:
LA Jitter (Tolerance) Jitter tolerance became abnormal under the following condtions:
b0 BRate = 2488M,Mod.freq:20kHz,Ampl.:2UIp-p
b1 BRate = 2488M,Mod.freq = 20MHz,Ampl. = 0.2UIp-p

‘LB’ Checks on Jitter measurement error in receiving side


Char Message Bit The following abnormality is occured:
LB Jitter(RX Measure) Measurement errors became abnormal under the following conditions:
b0 BRate = 2488M,Tx Range = 20UI,Mod.freq = 10kHz,
Ampl. = 10UIp-p,Rx Range = 32UI,Filter = HP1+LP
b1 BRate = 2488M,Tx Range = 2UI,Mod.freq = 100kHz,
Ampl. = 1UIp-p,Rx Range = 2UI,Filter = HP1+LP

‘LC’ Checks on wander measurement error


Char Message Bit The following abnormality is occured:
LC Wander Wander became abnormal under the following conditions:
b0 BRate = 2488M,Mod.freq = 0.4Hz,Ampl. = 28800UIp-p

‘LD’ Checks on frequency measurement error


Char Message Bit The following abnormality is occured:
LD Frequency The frequency is abnormal under the following conditions:
b0 BRate = 2488M

A-101
Appendix A

‘LE’ Checks on Residual jitter in receiving side 1 (Peak)


Char Message Bit The following abnormality is occured:
LE Jitter (RX Intrinsic:Peak) Receive residual jitter became abnormal under the following conditions:
b0 Brate = 2488M,Range = 2UI,Filter = HP1+LP,
b1 Offset range = ±100,Data,Unit = Peak
Brate = 2488M,Range = 32UI,Filter = HP1+LP,
b2 Offset range = ±100,Data,Unit = Peak
Brate = 2488M,Range = 2UI,Filter = HP2+LP,
b3 Offset range = ±100,Data,Unit = Peak
Brate = 2488M,Range = 32UI,Filter = HP2+LP,
b4 Offset range = ±100,Data,Unit = Peak
Brate = 2488M,Range = 2UI,Filter = HP1+LP,
b5 Offset range = ±100,Clock,Unit = Peak
Brate = 2488M,Range = 32UI,Filter = HP1+LP,
b6 Offset range = ±100,Clock,Unit = Peak
Brate = 2488M,Range = 2UI,Filter = HP2+LP,
b7 Offset range = ±100,Clock,Unit = Peak
Brate = 2488M,Range = 32UI,Filter = HP2+LP,
Offset range = ±100,Clock,Unit = Peak

‘LF’ Checks on Residual jitter in receiving side 2(RMS)


Char Message Bit The following abnormality is occured:
LF Jitter (RX Intrinsic:RMS) Receive residual jitter became abnormal under the following conditions:
b0 Brate = 2488M,Range = 2UI,Filter = HP+LP,
b1 Offset range = ±100,Data,Unit = RMS
Brate = 2488M,Range = 32UI,Filter = HP+LP,
b2 Offset range = ±100,Data,Unit = RMS
Brate = 2488M,Range = 2UI,Filter = HP+LP,
b3 Offset range = ±100,Clock,Unit = RMS
Brate = 2488M,Range = 32UI,Filter = HP+LP,
Offset range = ±100,Clock,Unit = RMS

‘LG’Checks on hit count in receiving side


Char Message Bit The following abnormality is occured:
LG Jitter (Hit count) Hit count was abnormally measured under the following conditions:
b0 BRate = 2488M,Mod.freq = 100kHz
b1 BRate = 2488M,Mod.freq = 1MHz

A-102
A.2 Error Details

(17) MP0109A Unit

‘YA’ MP0109A 622 M Interface


Char. Message Bit Error Details
YA Interface An error or alarm was detected under the following conditions:
(MP0109A:622M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘YB’ Checks on 622 M jitter tolerance in transmitting side


Char. Message Bit Error Details
YB Jitter (MP0109A: 622M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 622M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 622M, Mod. freq = 1MHz, Ampl. = 0.5UI

‘YC’ MP0109A 156 M Interface


Char. Message Bit Error Details
YC Interface An error or alarm was detected under the following conditions:
(MP0109A:156M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘YD’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
YD Jitter (MP0109A: 156M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘YI’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
YI Jitter (MP0109A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

‘YJ’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
YJ Jitter (MP0109A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

A-103
Appendix A

‘YK’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
YK Jitter (MP0109A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

‘YL’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
YL Jitter (MP0109A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

A-104
A.2 Error Details

(17) MP0110A Unit

‘YE’ MP0110A 622 M Interface


Char. Message Bit Error Details
YE Interface b0 An error or alarm was detected under the following conditions:
(MP0110A:622M) Alarm:OFF
b1 No LOS was detected under the following conditions:
Alarm:LOS

‘YF’ Checks on 622 M jitter tolerance in transmitting side


Char. Message Bit Error Details
YF Jitter (MP0110A: 622M Jitter tolerance is abnormal under the following condition:
Tolerance) b0 Brate = 622M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 622M, Mod. freq = 1MHz, Ampl. = 0.5UI

‘YG’ MP0110A 156 M Interface


Char. Message Bit Error Details
YG Interface An error or alarm was detected under the following conditions:
(MP0110A:156M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘YH’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
YH Jitter (MP0110A: 156M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘YM’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
YM Jitter (MP0110A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

‘YN’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
YN Jitter (MP0110A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

A-105
Appendix A

‘YO’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
YO Jitter (MP0110A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

‘YP’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
YP Jitter (MP0110A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

A-106
A.2 Error Details

(18) MP0104A Unit

‘ZA’ MP0104A 156 M Interface


Char. Message Bit Error Details
ZA Interface An error or alarm was detected under the following conditions:
(MP0104A:156M) b0 Alarm = OFF
No LOS was detected under the following conditions:
b1 Alarm = LOS

‘ZB’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
ZB Jitter (MP0104A:156M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

A-107
Appendix A

(19) MP0104B Unit

‘ZC’ MP0104B 156 M Interface


Char. Message Bit Error Details
ZC Interface An error or alarm was detected under the following conditions:
(MP0104B:156M) b0 Alarm = OFF
No LOS was detected under the following conditions:
b1 Alarm = LOS

‘ZD’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
ZD Jitter (MP0104B: 156M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘ZE’ MP0104B 622 M Interface


Char. Message Bit Error Details
ZE Interface An error or alarm was detected under the following conditions:
(MP0104B:622M) b0 Alarm = OFF
No LOS was detected under the following conditions:
b1 Alarm = LOS

‘ZF’ Checks on 622 M jitter tolerance in transmitting side


Char. Message Bit Error Details
ZF Jitter (MP0104B: 622M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 622M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 622M, Mod. freq = 500kHz, Ampl. = 0.5UI

A-108
A.2 Error Details

(20) MP0105A Unit

‘ZG’ MP0105A 156 M Interface


Char. Message Bit Error Details
ZG Interface An error or alarm was detected under the following conditions:
(MP0105A:156M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘ZH’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
ZH Jitter (MP0105A: 156M Jitter tolerance is abnormal under the following condition:
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘ZO’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
ZO Jitter (MP0105A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

‘ZP’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
ZP Jitter (MP0105A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

A-109
Appendix A

(21) MP0106B Unit

‘ZI’ MP0106B 156 M Interface


Char. Message Bit Error Details
ZI Interface An error or alarm was detected under the following conditions:
(MP0106B:156M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘ZJ’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
ZJ Jitter (MP0106B: 156M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘ZK’ MP0106B 622 M Interface


Char. Message Bit Error Details
ZK Interface An error or alarm was detected under the following conditions:
(MP0106B:622M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘ZL’ Checks on 622 M jitter tolerance in transmitting side


Char. Message Bit Error Details
ZL Jitter (MP0106B: 622M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 622M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 622M, Mod. freq = 500kHz, Ampl. = 0.5UI

A-110
A.2 Error Details

(22) MP0108A Unit

‘ZM’ MP0108A 622 M Interface


Char. Message Bit Error Details
ZM Interface An error or alarm was detected under the following conditions:
(MP0108A:622M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘ZN’ MP0108A 156 M Interface


Char. Message Bit Error Details
ZN Interface An error or alarm was detected under the following conditions:
(MP0108A:156M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

A-111
Appendix A

(23) MP0111A Unit

‘WA’ MP0111A 622 M Interface


Char. Message Bit Error Details
WA Interface An error or alarm was detected under the following conditions:
(MP0111A:622M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘WB’ Checks on 622 M jitter tolerance in transmitting side


Char. Message Bit Error Details
WB Jitter (MP0111A: 622M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘WC’ Optical power of MP0111A 622 M Interface


Char. Message Bit Error Details
WC Jitter Optical power is abnormal under the following condition.
(MP0111A:622M Power) b0 BRate:622M

‘WD’ Optical power of MP0111A 156 M Interface


Char. Message Bit Error Details
WD Interface An error or alarm was detected under the following conditions:
(MP0111A:156M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘WE’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
WE Jitter (MP0111A: 156M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 1.5MHz, Ampl. = 0.2UI

‘WF’ Optical power of MP0111A 156 M Interface


Char. Message Bit Error Details
WF Jitter(MP0111A:156M Optical power is abnormal under the following condition.
Power) b0 BRate:156M

‘WM’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
WM Jitter (MP0111A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

A-112
A.2 Error Details

‘WN’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
WN Jitter (MP0111A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

‘WO’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
WO Jitter (MP0111A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

‘WP’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
WP Jitter (MP0111A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

A-113
Appendix A

(24) MP0112A Unit

‘WG’ MP0112A 622 M Interface


Char. Message Bit Error Details
WG Interface An error or alarm was detected under the following conditions:
(MP0112A:622M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘WH’ Checks on 622 M jitter tolerance in transmitting side


Char. Message Bit Error Details
WH Jitter (MP0112A: 622M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 622M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 622M, Mod. freq = 1MHz, Ampl. = 0.5UI

‘WI’ Optical power of MP0112A 622 M Interface


Char. Message Bit Error Details
WI Jitter(MP0112A:622M Optical power is abnormal under the following condition.
Power) b0 BRate:622M

‘WJ’ MP0112A 156 M Interface


Char. Message Bit Error Details
WJ Interface An error or alarm was detected under the following conditions:
(MP0112A:156M) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘WK’ Checks on 156 M jitter tolerance in transmitting side


Char. Message Bit Error Details
WK Jitter (MP0112A: 156M Jitter tolerance is abnormal under the following condition
Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘WL’ MP0112A 156 M Interface Checks on Optical Power


Char. Message Bit Error Details
WL Jitter(MP0112A:156M Optical power is abnormal under the following condition.
Power) b0 BRate:156M

‘WQ’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
WQ Jitter (MP0112A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

A-114
A.2 Error Details

‘WR’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
WR Jitter (MP0112A: 622M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

‘WS’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
WS Jitter (MP0112A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: Peak) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

‘WT’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
WT Jitter (MP0112A: 156M Receive residual jitter became abnormal under the following conditions:
RX Intrinsic: RMS) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

A-115
Appendix A

(25) MP0113A Unit (1.31)

‘XA’ MP0113A 622 M (1.31) Interface


Char. Message Bit Error Details
XA Interface An error or alarm was detected under the following conditions:
(MP0113A:622M 1.31) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘XB’ Checks on 622 M jitter tolerance in transmitting side (1.31)


Char. Message Bit Error Details
XB Jitter (MP0113A: 622M Jitter tolerance is abnormal under the following condition
1.31 Tolerance) b0 Brate = 622M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 622M, Mod. freq = 1MHz, Ampl. = 0.5UI

‘XC’ Checks on 622 M optical power (1.31)


Char. Message Bit Error Details
XC Jitter (MP0113A: 622M Optical power is abnormal under the following condition.
1.31 Power) b0 BRate:622M

‘XD’ MP0113A 156 M (1.31) Interface


Char. Message Bit Error Details
XD Interface(MP0113A:156M An error or alarm was detected under the following conditions:
1.31) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘XE’ Checks on 156 M jitter tolerance in transmitting side (1.31)


Char. Message Bit Error Details
XE Jitter (MP0113A: 156M Jitter tolerance is abnormal under the following condition
1.31 Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 1.5MHz, Ampl. = 0.2UI

‘XF’ Checks on 156 M optical power (1.31)


Char. Message Bit Error Details
XF Jitter (MP0113A: 156M Optical power is abnormal under the following condition.
1.31 Power) b0 BRate:156M

‘XM’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
XM Jitter (MP0113A: 622M Receive residual jitter became abnormal under the following conditions:
1.31 RX Intrinsic: Peak) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

A-116
A.2 Error Details

‘XN’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
XN Jitter (MP0113A: 622M Receive residual jitter became abnormal under the following conditions:
1.31 RX Intrinsic: RMS) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

‘XO’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
XO Jitter (MP0113A: 156M Receive residual jitter became abnormal under the following conditions:
1.31 RX Intrinsic: Peak) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

‘XP’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
XP Jitter (MP0113A: 156M Receive residual jitter became abnormal under the following conditions:
1.31 RX Intrinsic: RMS) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

A-117
Appendix A

(26) MP0113A Unit (1.55)

‘XG’ MP0113A 622 M (1.55) Interface


Char. Message Bit Error Details
XG Interface b0 An error or alarm was detected under the following conditions:
(MP0113A:622M 1.55) Alarm:OFF
b1 No LOS was detected under the following conditions:
Alarm:LOS

‘XH’ Checks on 622 M jitter tolerance in transmitting side (1.55)


Char. Message Bit Error Details
XH Jitter (MP0113A: 622M Jitter tolerance is abnormal under the following condition
1.55 Tolerance) b0 Brate = 622M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 622M, Mod. freq = 1MHz, Ampl. = 0.5UI

‘XI’ Checks on 622 M optical power (1.55)


Char. Message Bit Error Details
XI Jitter (MP0113A: 622M Optical power is abnormal under the following condition.
1.55 Power) b0 BRate:622M

‘XJ’ MP0113A 156 M (1.55) Interface


Char. Message Bit Error Details
XJ Interface An error or alarm was detected under the following conditions:
(MP0113A:156M 1.55) b0 Alarm:OFF
No LOS was detected under the following conditions:
b1 Alarm:LOS

‘XK’ Checks on 156 M jitter tolerance in transmitting side (1.55)


Char. Message Bit Error Details
XK Jitter (MP0113A: 156M Jitter tolerance is abnormal under the following condition
1.55 Tolerance) b0 Brate = 156M, Mod. freq = 10kHz, Ampl. = 2UI
b1 Brate = 156M, Mod. freq = 500kHz, Ampl. = 0.5UI

‘XL’ Checks on 156 M optical power (1.55)


Char. Message Bit Error Details
XL Jitter (MP0113A: 156M Optical power is abnormal under the following condition.
1.55 Power) b0 BRate:156M

‘XQ’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
XQ Jitter (MP0113A: 622M Receive residual jitter became abnormal under the following conditions:
1.55 RX Intrinsic: Peak) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

A-118
A.2 Error Details

‘XR’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
XR Jitter (MP0113A: 622M Receive residual jitter became abnormal under the following conditions:
1.55 RX Intrinsic: RMS) b0 Brate = 622M, Range = 2UIpp
b1 Brate = 622M, Range = 20UIpp

‘XS’ Checks on residual jitter in receiving side 1 (Peak)


Char. Message Bit Error Details
XS Jitter (MP0113A: 156M Receive residual jitter became abnormal under the following conditions:
1.55 RX Intrinsic: Peak) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

‘XT’ Checks on residual jitter in receiving side 2 (RMS)


Char. Message Bit Error Details
XT Jitter (MP0113A: 156M Receive residual jitter became abnormal under the following conditions:
1.55 RX Intrinsic: RMS) b0 Brate = 156M, Range = 2UIpp
b1 Brate = 156M, Range = 20UIpp

A-119
Appendix A

A-120.
Appendix B Term Conversion Table Between SONET and SDH
Standard Standard
SONET SDH SONET SDH
TOH SOH LOP-V TU-LOP
STS3 POH VC4 POH PLM-V LP-SLM
STS1 POH VC3 POH RDI-V LP-RDI
VT POH VC2/1 POH RFI-V LP-RFI
J0*1 J0 LOM-V TU-LOM
M1*2 M1 REI-L MS-REI
Z3 F3 REI-P HP-REI
Z4 K3 REI-V LP-REI
Z5 N1 STS-path HO-path
Z6 N2 VT-path LO-path
Z7 K4 STS3cSPE*7 AU4
STS Pointer AU Pointer STS1SPE*8 AU3
VT Pointer TU Pointer STS3cSPE AU4-VC4
Sect/Line*3 Section STS1SPE AU3-VC3
STS*4,6 HP(AU) VT6 TU2
VT*5,6 LP(TU) VT2 TU12
Dsn PDH VT1.5 TU11
AIS-L MS-AIS VT6SPE VC2
RDI-L MS-RDI VT2SPE VC12
AIS-P AU-AIS VT1.5SPE VC11
LOP-P AU-LOP STS3 AUG
PLM-P HP-SLM VTG TUG2
RDI-P HP-RDI P*9 AU
AIS-V TU-AIS V*10 TU

*1 or Zo, *2 or M0, *3 or Section/Line Sect, *4 or STS Path, *5 or VT Path,


*6 except HP-B3 and LP-B3, *7 or STS3, *8 or STS1, *9 or STS, *10 or VT

B-1
Appendix B

B-2 .

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