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A B C D E

ZZZ PCB@

PCB 1G7 LA-D822P REV0 M/B UMA


www.facebook.com/casalaptopguide
DA80017E000

1 1

Compal Confidential 2

Dali & Astro


BKA40/BKA50/BKD40/BKD50
MB Schematic Document
3 3

LA-D822P
Rev: 1.0 (A00)
2016.06.06
UC1 KBL_15W _I3@ UC1 KBL_15W _I5@ UC1 KBL_15W _I7@ UC1 KBL_15W _2+1@ UC1 KBL_15W _2+2@

SA0000A382L SA0000A372L SA0000A342L SA00009QM0L SA00009PJ0L


KBL_U_SR2VN KBL_U_SR2VL KBL_U_SR2VM KBL_U_QKKQ KBL_U_QKKS
4
S IC FJ8067702739738 SR2VN H0 2.4G A31! S IC FJ8067702739739 SR2VL H0 2.5G A31! S IC FJ8067702739740 SR2VM H0 2.7G A31! S IC A31 FJ8067702739920 QKKQ G0 1.7G S IC A31 FJ8067702739720 QKKS G0 2.4G 4

UC1 SKL_15W @ DELL CONFIDENTIAL/PROPRIETARY


Compal Electronics, Inc.
Title

SA000092N4L Cover Page


SKL_U_I3-6100U Size Document Number Rev
S IC FJ8066201931104 SR2EU D1 2.3G A31! 1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 1 of 46
A B C D E
A B C D E

DDR4
4GB/8GB
DDR4 1866/2133MHz Channel A
14.0" / 15.6" eDP Wire SODIMM A
(FHD)
Intel CPU
DDR4
1
HDMI V1.4a DDI1 1
4GB/8GB
Skylake - U DDR4 1866/2133MHz Channel B
/ Kabylake - U SODIMM B
Dali Only 42mm X 24mm
BGA1356
VGA Conn. VGA DP to VGA Translator DDI2 Coxial PCIe x 1 NGFF WLAN
28W (UMA only)
RTD2166 15W (UMA&DIS) 802.11b/g/n Dali Only
USB2.0 x 1 802.11ac
Small Board BT 4.0 1x1
TPM2.0
HD Camera USB2.0 x 1 Wire PCH-LP China TPM2.0
SPI/LPC
10 USB 2.0/1.1 ports NationZ Z32H320TC /
D-MIC 6 USB 3.0 ports
Nuvoton NPCT650JBAWX

High Definition Audio LPC BUS LPC debug port


3 SATA ports

2CH SPEAKER
HDA 6 PCIE ports

(2CH 2W/4ohm) CODEC LPC I/F


2
eSPI SMBUS Thermal 2

Realtek HDA I2C x12 EC NCT7718W


ALC3246-CG
SMSC
MIC_IN/GND MEC1404-NU-GP PWM FAN

Universal Jack HP_R/L


SPI
Left side
USB3.0 x 1 PS2
Port 0 (USB3.0) SPI Flash ROM Int.
W25Q128FVSIQ KB
USB PowerShare (16MB)
USB2.0 USB2.0 x 1
TI TPS2544RTER

Left side Precision Touchpad


USB3.0 x 1 I2C
Port 1 (USB3.0)
USB2.0 x 1
3 3
G-Sensor Astro Only
RJ45 LAN 10/100/1000 PCIe x 1 LNG2DMTR
Conn. RealTek RTL8111H SSD
NGFF
SATA(Gen3) x2 M2.Slot
Touch USB2.0 x 1Wire
Dali 15.6"Only Screen
Right side
SATA re-driver 2.5"
Port 0 (USB2.0) USB2.0 x 1 Wire
PS8527 HDD
Small Board CardReader
Right side
USB3.0 x 1 Coxial SD 3.0 SD Card Slot
Port 2 (USB3.0) Wire USB2.0 x 1
Realtek
RTS5170
Port 2 (USB2.0) USB2.0 x 1 Wire
Small Board Small Board
4 Small Board 4
Wire USB2.0 x 1 Finger Printer
Astro Only
Small Board

Security Classification Compal Secret Data


Issued Date 2014/05/19 Deciphered Date 2015/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 2 of 46
A B C D E
5 4 3 2 1

POWER STATES
Signal SLP SLP SLP ALWAYS SUS RUN
S3# S4# S5# PLANE PLANE PLANE CLOCKS
State

S0 (Full ON) / M0 HIGH HIGH HIGH ON ON ON ON

S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON OFF OFF


0 ( )1 0 ( )1
D D
,
S4 (Suspend to DISK) / M3 LOW LOW HIGH ON OFF OFF OFF
* + ,
S5 (SOFT OFF) / M3 LOW LOW LOW ON OFF OFF OFF ( ) &()& ,

G3 OFF OFF OFF OFF OFF OFF OFF


#$% $ &&' ,
,
-.'/& .' & !
, "!
*
PM TABLE
,
+RTC_CELL +1.0V_PRIM +1.0V_VCCST +1.0VS_VCCIO
+RTC_VCC +1.0V_MPHYPLL +1.2V_DDR +1.0V_VCCSTG
,
+3VLP +5VALW +2.5V_MEM +VCC_GT ,
power +19VB +3VALW +3VALW_PCH +VCC_SA
plane
+3.3V_ALW_DSW +VCC_CORE
,
+1.8V_PRIM +GPU_CORE
C C
+5VS
+3VS
State +1.8VS
+0.6V_DDR_VTT

S0 ON ON ON ON

S3 ON ON ON OFF

S4&S5 / AC ON ON OFF OFF

S4&S5 / DC ON OFF OFF OFF

B B

Board ID & Model ID table

&2 #33 ) 4'05 %21 #33 #6 05 %21 7 3 (/& () ,+ )&3


7 08 1
7 08 1
7 08 1
.3 0 1

A A

Compal Electronics, Inc.


Title

Notes List
Size Document Number Rev

LA-D822P 1.0
Date: Monday, June 06, 2016 Sheet 3 of 46
5 4 3 2 1
5 4 3 2 1

PJP200
PJP206 SIO_SLP_S4#
RT8207PGQW
D (PU200) +1.2VP +1.2V_DDR SIO_SLP_S3# D
SIO_SLP_S0# JP15
!"# $% &!' TPS22961
(UZ19) +1.0V_VCCSTG_C +1.0VS_VCCIO
0.6V_DDR_VTT_ON PJP203
+0.6VSP +0.6V_DDR_VTT
JUMP
(JP17) +1.0V_MPHYPLL +1.0V_VCCSTG

PJP901 POK PJP302 SIO_SLP_S4#


ADAPTER SY8286RAC TPS22967
(PU300) +1VALWP +1.0V_PRIM (UZ21) +1.0V_VCCST

0ohm 0805
(R5214) +DCBATOUT_LCD
USB_CHG_EN
TPS2544RTER
(UUS5) +USB30_VCCA
CHARGER 0ohm 0402
ISL95521HRZ +PWR_SRC (R6528) +IR_LED+ USB_EN#
AP22802BW5 0ohm 0603
(PU703) (U3504) +USB30_VCCB (R5232) +TPAN_VDD
(+19VB)
PJP106 EN_5V PJP103 USB_EN#
SY8286CRAC AP22802BW5 0ohm 0805
(PU102) +5VALWP +5VALW (U3505) +USB30_VCCC (R5601) 5V_HDD
JP21
SIO_SLP_S3#
ENLDO_3V5V EM5209VF RB551V-30 FUSE 1.1A_6V
(UZ2) +5VS (D5501) (F6202) 5V_HDMI
BATTERY VL
C C

3D_CAM_EN
TPS22967DSGR FUSE 0.5A_13.2V
(UX1) +5V_CAM (F6201) +5V_KB_BL

PJP501
PJP105 EN_3V PJP102 POK PJP502 +3VS
SY8286BRAC RT8061AZQW LN2306LT1G
(PU100) +3VALWP +3VALW (PU500) +1.8VALWP +1.8V_PRIM (Q6205) +1.8V_AVDD
PJP801
SIO_SLP_S4# PJP802
ENLDO_3V5V RT9059GSP 0ohm 0402
(PU800) +2.5VP +2.5V_MEM (R6529) CPVDD
+3VLP
TP_PW _EN#
UMA 2+3e NTK3139PT1G
(Q6203) +TP_VDD
JP13
SIO_SLP_S3#
EM5209VF
ISL95859HRTZ (UZ2) +3VS
(PU602) BAS40C
(D2501) +RTC_CELL
LCDVDD_EN
0ohm 0603 RT9724GB
(R5229) +3VALW_PCH (U5201) LCDVDD
ISL95808HRZ AOZ5019QI AOZ5019QI
(PU606) (PU603) (PU605)
SY6288C20AAC
(UL3) +3.3V_LAN

IMVP_VR_ON IMVP_VR_ON DRMOS_EN +RTC_VCC


B
0ohm 0805 B

(R5809) +3.3V_WLAN
PJP1201

SIO_SLP_S3# PJP1202 0ohm 0603


NB681GD-Z (R5229) +3.3V_CAM
+VCC_SA +VCC_CORE +VCC_GT (PU1200) +1.0VS_VCCOPCP +1.0VS_VCCOPC
JUMP
(JP1) +3VS_SSD

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

Power Rail
Size Document Number Rev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 4 of 46
5 4 3 2 1
5 4 3 2 1

9 %2 9 %2

( ) 9 %2 *+, - 9 %2 *+,
R7 253
+ !5 + !5 *: + !5 *: + !5 !
R8 ; 254 ++
+ + + *: + *: +
SMBus Address: 000
253
D D
*: + !5 !
R9 9 %2 ++
+! !5 +! : + !5 254
*+, - *: +
W2 9 %2 SMBus Address: 010
+! +! : +
9 %2 30
*: + !5 !
29 7"
9 %2 *+, - *: +
SMBus Address: 0x64/0x65 & 0x68/0x69
W3 %2
+! !5 " : *+: + !5 1
*: + !5 !
V3 %2 --
+! !5 +! " : *+: + 4
*: + ! " +
+!

U6 U7
: :

C C
: !:
9 %2

9 %2 *+,
8
*+: +! : !5 ! %& 2(3
" : *+: + !5 ; 7
+ *+: +! :
" : *+: +
SMBus Address: 1001100xb (x is R/W bit)

12 11

SMB02_CLK SMB02_DATA 9 %2 9 %2

*+, -,
KBC 9 %2 9 %2

MEC 1404
3
: !: : !: :;
; 2
B
: : + : : :;
B
8
9 %2 !5: :
7
-, : :
9 %2

78
GPIO114 !5: :
79
GPIO115 : :

9 %2

9 %2 *+, -

9 %2 4
SMB01_CLK : *": + !5 !5: + !
SMB01_DATA 8 %2 5
: *": + : +
SMBus Address: 0x01
A 3 A
%2
%( /&
%2 4 ! * <
!
SMBus Address: 0001001 (R/W#) DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

SMBus Block Diagram


Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 5 of 46
5 4 3 2 1
5 4 3 2 1

+3VS

RC175 2 1 SDVO_SCLK +3VALW_PCH


2.2K_0402_5%
RC178 2 1 SDVO_SDATA SIO_EXT_SMI# RC239 2 1
2.2K_0402_5% UC1A SKL-U 10K_0402_5%
RE439 2 1 WLAN_RADIO_DIS# L_BKLT_EN_EC RC390 2 1
10K_0402_5% CPU_DP1_N2 E55 C47 EDP_TX0_DN 100K_0402_5%
DDPC_SDATA <26> CPU_DP1_N2 CPU_DP1_P2 DDI1_TXN[0] EDP_TXN[0] EDP_TX0_DP EDP_TX0_DN <25>
RC1122 2 1 F55 C46
<26> CPU_DP1_P2 CPU_DP1_N1 DDI1_TXP[0] EDP_TXP[0] EDP_TX1_DN EDP_TX0_DP <25>
2.2K_0402_5% E58 D46
<26> CPU_DP1_N1 CPU_DP1_P1 DDI1_TXN[1] EDP_TXN[1] EDP_TX1_DP EDP_TX1_DN <25>
F58 C45
<26> CPU_DP1_P1 CPU_DP1_N0 DDI1_TXP[1] EDP_TXP[1] EDP_TX1_DP <25>
D F53 A45 D
<26> CPU_DP1_N0 CPU_DP1_P0 DDI1_TXN[2] EDP_TXN[2]
G53 B45
<26> CPU_DP1_P0 CPU_DP1_N3 DDI1_TXP[2] EDP_TXP[2]
F56 A47
<26> CPU_DP1_N3 CPU_DP1_P3 DDI1_TXN[3] EDP_TXN[3]
G56 B47
<26> CPU_DP1_P3 DDI1_TXP[3] EDP_TXP[3]
SOC_DP2_N0 C50 E45 EDP_AUX_DN
<33> SOC_DP2_N0 SOC_DP2_P0 DDI2_TXN[0] DDI EDP_AUXN EDP_AUX_DP EDP_AUX_DN <25>
D50 EDP F45
<33> SOC_DP2_P0 SOC_DP2_N1 DDI2_TXP[0] EDP_AUXP EDP_AUX_DP <25>
C52
<33> SOC_DP2_N1 SOC_DP2_P1 DDI2_TXN[1]
D52 B52
<33> SOC_DP2_P1 DDI2_TXP[1] EDP_DISP_UTIL
A50
B50 DDI2_TXN[2] G50
D51 DDI2_TXP[2] DDI1_AUXN F50
C51 DDI2_TXN[3] DDI1_AUXP E48 SOC_DP2_AUXN
DDI2_TXP[3] DDI2_AUXN F48 SOC_DP2_AUXP SOC_DP2_AUXN <33>
DDI2_AUXP G46 SOC_DP2_AUXP <33>
DISPLAY SIDEBANDS DDI3_AUXN F46
SDVO_SCLK L13 DDI3_AUXP
<26> SDVO_SCLK SDVO_SDATA GPP_E18/DDPB_CTRLCLK HDMI_HPD
L12 L9
<26> SDVO_SDATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 CRT_HPD HDMI_HPD <26>
L7
GPP_E14/DDPC_HPD1 SIO_EXT_SMI# CRT_HPD <33>
N7 L6
DDPC_SDATA GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 SIO_EXT_SMI# <22>
N8 N9
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 L10 EDP_HPD
GPP_E17/EDP_HPD EDP_HPD <25>
N11
N12 GPP_E22/DDPD_CTRLCLK R12 L_BKLT_EN_EC
GPP_E23/DDPD_CTRLDATA EDP_BKLTEN L_BKLT_CTRL L_BKLT_EN_EC <22>
RC2 R11
EDP_BKLTCTL L_BKLT_CTRL <25>
+1.0VS_VCCIO 1 2 EDP_COMP E52 U13 EDP_VDD_EN
EDP_RCOMP 1 OF 20 EDP_VDDEN EDP_VDD_EN <25>
24.9_0402_1%
SKL-U_BGA1356
@
C C
./ $' 0!1/#234 5!%6 "$'!782395!% ( ) $%%.</ &4 =; > 6?5@.% &; 4
$: % 78/#2;44 5!%6

SKL_ULT
UC1I

CSI-2

A36 C37
B36 CSI2_DN0 CSI2_CLKN0 D37
C38 CSI2_DP0 CSI2_CLKP0 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
A38 CSI2_DP2 CSI2_CLKP2 B26
B B38 CSI2_DN3 CSI2_CLKN3 A26 B
CSI2_DP3 CSI2_CLKP3
C31 E13 CSI2_COMP RC3 1 2 100_0402_1%
D31 CSI2_DN4 CSI2_COMP B7 WLAN_RADIO_DIS#
CSI2_DP4 GPP_D4/FLASHTRIG WLAN_RADIO_DIS# <29>
C33
D33 CSI2_DN5
A31 CSI2_DP5 EMMC
B31 CSI2_DN6 AP2
A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3
A29 GPP_F16/EMMC_DATA3 AN1
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
CSI2_DP11 GPP_F12/EMMC_CMD
AT1 EMMC_RCOMP RC4 1 2 200_0402_1%
EMMC_RCOMP
SKL-U_BGA1356 9 OF 20
@

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(1/14)DDI,EDP,CSI2,EMMC
Size Document Number Rev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 6 of 46
5 4 3 2 1
5 4 3 2 1

B $%%.</ C. 3 7/ % $&

SKL-U
UC1B SKL-U UC1C

AU53 DDR_A_CLK#0
<18> DDR_A_D[0..15] DDR_A_D0 AL71 DDR0_CKN[0] AT53 DDR_A_CLK0 DDR_A_CLK#0 <18> <19> DDR_B_D[0..15] DDR_B_D0 AF65 AN45 DDR_B_CLK#0
DDR_A_D1 AL68 DDR0_DQ[0] DDR0_CKP[0] AU55 DDR_A_CLK#1 DDR_A_CLK0 <18> DDR_B_D1 AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] AN46 DDR_B_CLK#1 DDR_B_CLK#0 <19>
DDR_A_D2 AN68 DDR0_DQ[1] DDR0_CKN[1] AT55 DDR_A_CLK1 DDR_A_CLK#1 <18> DDR_B_D2 AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] AP45 DDR_B_CLK0 DDR_B_CLK#1 <19>
D DDR_A_D3 AN69 DDR0_DQ[2] DDR0_CKP[1] DDR_A_CLK1 <18> DDR_B_D3 AK64 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] AP46 DDR_B_CLK1 DDR_B_CLK0 <19> D
DDR_A_D4 AL70 DDR0_DQ[3] BA56 DDR_A_CKE0 DDR_B_D4 AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] DDR_B_CLK1 <19>
DDR_A_D5 AL69 DDR0_DQ[4] DDR0_CKE[0] BB56 DDR_A_CKE1 DDR_A_CKE0 <18> DDR_B_D5 AF67 DDR1_DQ[4]/DDR0_DQ[20] AN56 DDR_B_CKE0
DDR_A_D6 AN70 DDR0_DQ[5] DDR0_CKE[1] AW56 DDR_A_CKE1 <18> DDR_B_D6 AK67 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] AP55 DDR_B_CKE1 DDR_B_CKE0 <19>
DDR_A_D7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56 DDR_B_D7 AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] AN55 DDR_B_CKE2 DDR_B_CKE1 <19>
DDR_A_D8 DDR0_DQ[7] DDR0_CKE[3] DDR_B_D8 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] DDR_B_CKE3 PAD @ T5
AR70 AF70 AP53 @ T6
DDR_A_D9 AR68 DDR0_DQ[8] AU45 DDR_A_CS#0 DDR_B_D9 AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3] PAD
DDR_A_D10 AU71 DDR0_DQ[9] DDR0_CS#[0] AU43 DDR_A_CS#1 DDR_A_CS#0 <18> DDR_B_D10 AH71 DDR1_DQ[9]/DDR0_DQ[25] BB42 DDR_B_CS#0
DDR_A_D11 AU68 DDR0_DQ[10] DDR0_CS#[1] AT45 DDR_A_ODT0 DDR_A_CS#1 <18> DDR_B_D11 AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] AY42 DDR_B_CS#1 DDR_B_CS#0 <19>
DDR_A_D12 AR71 DDR0_DQ[11] DDR0_ODT[0] AT43 DDR_A_ODT1 DDR_A_ODT0 <18> DDR_B_D12 AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] BA42 DDR_B_ODT0 DDR_B_CS#1 <19>
DDR_A_D13 AR69 DDR0_DQ[12] DDR0_ODT[1] DDR_A_ODT1 <18> DDR_B_D13 AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] AW42 DDR_B_ODT1 DDR_B_ODT0 <19>
DDR_A_D14 AU70 DDR0_DQ[13] BA51 DDR_A_MA5 DDR_B_D14 AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] DDR_B_ODT1 <19>
DDR_A_D15 AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 DDR_A_MA9 DDR_A_MA5 <18> DDR_B_D15 AH69 DDR1_DQ[14]/DDR0_DQ[30] AY48 DDR_B_MA5
<18> DDR_A_D[16..31] DDR_A_D16 BB65 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] BA52 DDR_A_MA6 DDR_A_MA9 <18> <19> DDR_B_D[16..31] DDR_B_D16 AT66 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50 DDR_B_MA9 DDR_B_MA5 <19>
DDR_A_D17 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 DDR_A_MA8 DDR_A_MA6 <18> DDR_B_D17 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 DDR_B_MA6 DDR_B_MA9 <19>
DDR_A_D18 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW52 DDR_A_MA7 DDR_A_MA8 <18> DDR_B_D18 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48 DDR_B_MA8 DDR_B_MA6 <19>
DDR_A_D19 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 DDR_A_BG0 DDR_A_MA7 <18> DDR_B_D19 AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48 DDR_B_MA7 DDR_B_MA8 <19>
DDR_A_D20 BA65 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] AW54 DDR_A_MA12 DDR_A_BG0 <18> DDR_B_D20 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52 DDR_B_BG0 DDR_B_MA7 <19>
DDR_A_D21 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 DDR_A_MA11 DDR_A_MA12 <18> DDR_B_D21 AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50 DDR_B_MA12 DDR_B_BG0 <19>
DDR_A_D22 BA63 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] BA55 DDR_A_ACT# DDR_A_MA11 <18> DDR_B_D22 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48 DDR_B_MA11 DDR_B_MA12 <19>
DDR_A_D23 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 DDR_A_BG1 DDR_A_ACT# <18> DDR_B_D23 AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53 DDR_B_ACT# DDR_B_MA11 <19>
DDR_A_D24 BA61 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_BG1 <18> DDR_B_D24 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52 DDR_B_BG1 DDR_B_ACT# <19>
DDR_A_D25 AW61 DDR0_DQ[24]/DDR0_DQ[40] AU46 DDR_A_MA13 DDR_B_D25 AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR_B_BG1 <19>
DDR_A_D26 BB59 DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU48 DDR_A_CAS# DDR_A_MA13 <18> DDR_B_D26 AP60 DDR1_DQ[25]/DDR0_DQ[57] BA43 DDR_B_MA13
DDR_A_D27 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AT46 DDR_A_WE# DDR_A_CAS# <18> DDR_B_D27 AN60 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AY43 DDR_B_CAS# DDR_B_MA13 <19>
DDR_A_D28 BB61 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AU50 DDR_A_RAS# DDR_A_WE# <18> DDR_B_D28 AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44 DDR_B_WE# DDR_B_CAS# <19>
DDR_A_D29 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU52 DDR_A_BS0 DDR_A_RAS# <18> DDR_B_D29 AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AW44 DDR_B_RAS# DDR_B_WE# <19>
DDR_A_D30 BA59 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] AY51 DDR_A_MA2 DDR_A_BS0 <18> DDR_B_D30 AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44 DDR_B_BS0 DDR_B_RAS# <19>
DDR_A_D31 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 DDR_A_BS1 DDR_A_MA2 <18> DDR_B_D31 AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AY47 DDR_B_MA2 DDR_B_BS0 <19>
<18> DDR_A_D[32..47] DDR_A_D32 AY39 DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] AT50 DDR_A_MA10 DDR_A_BS1 <18> <19> DDR_B_D[32..47] DDR_B_D32 AU40 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44 DDR_B_BS1 DDR_B_MA2 <19>
DDR_A_D33 AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 DDR_A_MA1 DDR_A_MA10 <18> DDR_B_D33 AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AW46 DDR_B_MA10 DDR_B_BS1 <19>
DDR_A_D34 AY37 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AY50 DDR_A_MA0 DDR_A_MA1 <18> DDR_B_D34 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46 DDR_B_MA1 DDR_B_MA10 <19>
C DDR_A_D35 AW37 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] BA50 DDR_A_MA3 DDR_A_MA0 <18> DDR_B_D35 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 DDR_B_MA0 DDR_B_MA1 <19> C
DDR_A_D36 BB39 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] BB52 DDR_A_MA4 DDR_A_MA3 <18> DDR_B_D36 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46 DDR_B_MA3 DDR_B_MA0 <19>
DDR_A_D37 BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR_A_MA4 <18> DDR_B_D37 AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] BA47 DDR_B_MA4 DDR_B_MA3 <19>
DDR_A_D38 BA37 DDR0_DQ[37]/DDR1_DQ[5] AM70 DDR_A_DQS#0 DDR_B_D38 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] DDR_B_MA4 <19>
DDR_A_D39 BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] AM69 DDR_A_DQS0 DDR_A_DQS#0 <18> DDR_B_D39 AR37 DDR1_DQ[38]/DDR1_DQ[22] AH66 DDR_B_DQS#0
DDR_A_D40 AY35 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] AT69 DDR_A_DQS#1 DDR_A_DQS0 <18> DDR_B_D40 AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 DDR_B_DQS0 DDR_B_DQS#0 <19>
DDR_A_D41 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] AT70 DDR_A_DQS1 DDR_A_DQS#1 <18> DDR_B_D41 AU33 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] AG69 DDR_B_DQS#1 DDR_B_DQS0 <19>
DDR_A_D42 AY33 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] BA64 DDR_A_DQS#2 DDR_A_DQS1 <18> DDR_B_D42 AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 DDR_B_DQS1 DDR_B_DQS#1 <19>
DDR_A_D43 AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 DDR_A_DQS2 DDR_A_DQS#2 <18> DDR_B_D43 AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] AR66 DDR_B_DQS#2 DDR_B_DQS1 <19>
DDR_A_D44 BB35 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] AY60 DDR_A_DQS#3 DDR_A_DQS2 <18> DDR_B_D44 AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 DDR_B_DQS2 DDR_B_DQS#2 <19>
DDR_A_D45 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 DDR_A_DQS3 DDR_A_DQS#3 <18> DDR_B_D45 AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 DDR_B_DQS#3 DDR_B_DQS2 <19>
DDR_A_D46 BA33 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] BA38 DDR_A_DQS#4 DDR_A_DQS3 <18> DDR_B_D46 AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 DDR_B_DQS3 DDR_B_DQS#3 <19>
DDR_A_D47 BB33 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 DDR_A_DQS4 DDR_A_DQS#4 <18> DDR_B_D47 AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] AT38 DDR_B_DQS#4 DDR_B_DQS3 <19>
<18> DDR_A_D[48..63] DDR_A_D48 AY31 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 DDR_A_DQS#5 DDR_A_DQS4 <18> <19> DDR_B_D[48..63] DDR_B_D48 AU27 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] AR38 DDR_B_DQS4 DDR_B_DQS#4 <19>
DDR_A_D49 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 DDR_A_DQS5 DDR_A_DQS#5 <18> DDR_B_D49 AT27 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] AT32 DDR_B_DQS#5 DDR_B_DQS4 <19>
DDR_A_D50 AY29 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] BA30 DDR_A_DQS#6 DDR_A_DQS5 <18> DDR_B_D50 AT25 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] AR32 DDR_B_DQS5 DDR_B_DQS#5 <19>
DDR_A_D51 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 DDR_A_DQS6 DDR_A_DQS#6 <18> DDR_B_D51 AU25 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] AR25 DDR_B_DQS#6 DDR_B_DQS5 <19>
DDR_A_D52 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 DDR_A_DQS#7 DDR_A_DQS6 <18> DDR_B_D52 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27 DDR_B_DQS6 DDR_B_DQS#6 <19>
DDR_A_D53 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 DDR_A_DQS7 DDR_A_DQS#7 <18> DDR_B_D53 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 DDR_B_DQS#7 DDR_B_DQS6 <19>
DDR_A_D54 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_A_DQS7 <18> DDR_B_D54 AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21 DDR_B_DQS7 DDR_B_DQS#7 <19>
DDR_A_D55 BB29 DDR0_DQ[54]/DDR1_DQ[38] AW50 DDR_A_ALERT# DDR_B_D55 AP25 DDR1_DQ[54] DDR1_DQSP[7] DDR_B_DQS7 <19>
DDR_A_D56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# DDR_A_PAR DDR_A_ALERT# <18> 4- 4- D C. DDR_B_D56 DDR1_DQ[55] DDR_B_ALERT#
AY27 AT52 B AT22 AN43
DDR_A_D57 AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDR_A_PAR <18> DDR_B_D57 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 DDR_B_PAR DDR_B_ALERT# <19>
DDR_A_D58 AY25 DDR0_DQ[57]/DDR1_DQ[41] AY67 DDR_B_D58 AU21 DDR1_DQ[57] DDR1_PAR AT13 H_DRAMRST# DDR_B_PAR <19>
DDR_A_D59 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA +V_DDR_REFA_R DDR_B_D59 DDR1_DQ[58] DRAM_RESET# SM_RCOMP0 H_DRAMRST# <7,18>
AW25 AY68 AT21 AR18
DDR_A_D60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR CH - A
DDR0_VREF_DQ BA67 DDR_B_D60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP1
DDR_A_D61 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +V_DDR_REFB_R DDR_B_D61 DDR1_DQ[60] DDR CH - B DDR_RCOMP[1] SM_RCOMP2
BA27 AP22 AU18
DDR_A_D62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_VTT_CNTL DDR_B_D62 AP21 DDR1_DQ[61] DDR_RCOMP[2]
DDR_A_D63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL DDR_B_D63 AN21 DDR1_DQ[62]
DDR0_DQ[63]/DDR1_DQ[47] DDR1_DQ[63] ;- ;- D C. B

SKL-U_BGA1356 2 OF 20 SKL-U_BGA1356 3 OF 20
B @ @
H_DRAMRST# B
H_DRAMRST# <7,18>
1
RC1126
ESD@
0.1U_0402_16V7K
2

place cap near DRAM_RESET# PIN

Buffer with Open Drain Output For VTT power control B


+1.2V_DDR +3VS SM_RCOMP0 RC5 1 2 121_0402_1%

CC57 2 1 SM_RCOMP1 RC6 1 2 80.6_0402_1%


1

0.1U_0402_16V7K
UC14 RC123 SM_RCOMP2 RC7 1 2 100_0402_1%
1 5
NC VCC 100K_0402_5%
DDR_VTT_CNTL 2
./
$' 0!1/#2;3A;9 5!% "$'!78234 5!%6
2

A A 4 0.6V_DDR_VTT_ON A
Y 0.6V_DDR_VTT_ON <39>
3
GND
$: / $' % 78/#2 944 5!%
74AUP1G07GW_TSSOP5

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(2/14)DDR4
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 7 of 46
5 4 3 2 1
5 4 3 2 1

+3VS
- 2 - 4 PCH_SMBDATA 2 1
RN19
+3V_SPI - 2 - ; 2.2K_0402_5%
4 = " 3+9A3+E SKL-U
PCH_SMBCLK RN20 2 1
RC30 1 2 PCH_SPI_D2 UC1E 2.2K_0402_5%
1K_0402_5%
RC53 1 2 PCH_SPI_CS#0 SPI - FLASH
SMBUS, SMLINK CLKRUN# RC27 1 2
4.7K_0402_5% PCH_SPI_CLK AV2 8.2K_0402_5%
PCH_SPI_D1 AW3 SPI0_CLK R7 SMBCLK
PCH_SPI_D0 AV3 SPI0_MISO GPP_C0/SMBCLK R8 SMBDATA
PCH_SPI_CS2# PCH_SPI_D2 AW2 SPI0_MOSI GPP_C1/SMBDATA R10 PCH_SMB_ALERT#
<32> PCH_SPI_CS2# EC_SPICLK_R PCH_SPI_D3 AU4 SPI0_IO2 GPP_C2/SMBALERT# +3VALW_PCH
To SPI TPM PCH_SPI_D1 PCH_SPI_CS#0 AU3 SPI0_IO3 R9 SML0_SMBCLK
D <32> PCH_SPI_D1 PCH_SPI_D0 AU2 SPI0_CS0# GPP_C3/SML0CLK W2 SML0_SMBDATA 1 2 D
SMBCLK RC12
<32> PCH_SPI_D0 PCH_SPI_CS2# AU1 SPI0_CS1# GPP_C4/SML0DATA W1 GPP_C5 1K_0402_5%
SPI0_CS2# GPP_C5/SML0ALERT# SMBDATA RC14 1 2
W3 SML1CLK 1K_0402_5%
SPI - TOUCH GPP_C6/SML1CLK V3 SML1DATA SML1CLK RC15 1 2
M2 GPP_C7/SML1DATA AM7 GPP_B23 1K_0402_5%
M3 GPP_D1/SPI1_CLK GPP_B23/SML1ALERT#/PCHHOT# SML1DATA RC17 1 2
FFS_INT2 J4 GPP_D2/SPI1_MISO 1K_0402_5%
<27> FFS_INT2 V1 GPP_D3/SPI1_MOSI SML0_SMBCLK 1 2
RC19
V2 GPP_D21/SPI1_IO2 1K_0402_5%
M1 GPP_D22/SPI1_IO3 SML0_SMBDATA RC20 1 2
LPC
+3VS GPP_D0/SPI1_CS# AY13 LPC_LAD0 1K_0402_5%
GPP_A1/LAD0/ESPI_IO0 BA13 LPC_LAD1 LPC_LAD0 <22,32> SUS_STAT#/LPCPD# RC1127 1 @ 2
C LINK GPP_A2/LAD1/ESPI_IO1 BB13 LPC_LAD2 LPC_LAD1 <22,32> 8.2K_0402_5%
GPP_A3/LAD2/ESPI_IO2 LPC_LAD2 <22,32> 1

1
G3 AY12 LPC_LAD3 CC1802
RC13 G2 CL_CLK GPP_A4/LAD3/ESPI_IO3 BA12 LPC_LFRAME# LPC_LAD3 <22,32> @EMI@
G1 CL_DATA GPP_A5/LFRAME#/ESPI_CS# BA11 SUS_STAT#/LPCPD# LPC_LFRAME# <22,32>
22P_0402_50V8J
10K_0402_5% CL_RST# GPP_A14/SUS_STAT#/ESPI_RESET# RC18 1 EMI@ 2 2 CLK_PCI_LPC_MEC
CLK_PCI_LPC_MEC <22,32>
22_0402_5%

2
SIO_RCIN# AW13 AW9 RC22 1 EMI@ 2 CLK_PCI_LPDEBUG
<22> SIO_RCIN# GPP_A0/RCIN# GPP_A9/CLKOUT_LPC0/ESPI_CLK AY9 PCI_CLK_LPC1 CLK_PCI_LPDEBUG <22>
22_0402_5% 2
SERIRQ AY11 GPP_A10/CLKOUT_LPC1 AW11 CLKRUN# CC1803
<22,32> SERIRQ GPP_A6/SERIRQ GPP_A8/CLKRUN# CLKRUN# <22>
@EMI@
RC21 1 2 22P_0201_50V8J
+3VS 5 OF 20 1
10K_0402_5% SKL-U_BGA1356
@

XDP_SPI_SI RC355 1 CMC@ 2 PCH_SPI_D0 SML1CLK RC399 1 @ 2 GPU_THM_SMBCLK


C <14> XDP_SPI_SI GPU_THM_SMBCLK <22,34> C
1K_0402_1% 0_0402_5% SML1 -> EC,DGPU,THM
XDP_SPI_IO2 RC354 1 CMC@ 2 PCH_SPI_D2 SML1DATA RC397 1 @ 2 GPU_THM_SMBDAT
<14> XDP_SPI_IO2 GPU_THM_SMBDAT <22,34>
1K_0402_1% 0_0402_5%
RC355/354 place to within 1100 mil of SPIO_MOSI/SPI0_IO2 pin for XDP

+3VS

QC2A

2
DMN66D0LDW-7_SOT363-6

SMBCLK 6 1 PCH_SMBCLK
PCH_SMBCLK <18,19,27,33>

5
QC2B SMB -> DDR,CRT,FFS
DMN66D0LDW-7_SOT363-6
SMBDATA 3 4 PCH_SMBDATA
PCH_SMBDATA <18,19,27,33>

'
+3VALW_PCH

+3VALW +3V_SPI PCH_SMB_ALERT# RC23 1 @ 2


RC1124 8.2K_0402_5%
1 @ 2

0_0402_5%
! - ! =
* "* !
B ! 0 - ! 1 ! B
Single SPI ROM_CS0# 16M SPI ROM (Confirmed by BIOS RD)
L1 Routing L2 Routing +3V_SPI
UC2
PCH_SPI_CS#0 RC1125 1 @ 2 0_0402_5% PCH_SPI_CS#0_R 1 8 CC9 1 2
RC61 PCH_SPI_D1_R 2 /CS VCC 7 0.1U_0402_16V7K
'
PCH_SPI_D2 RC1120 1 2 33_0402_5% 1 2 PCH_SPI_D2_R 3 IO1 IO3 6
15_0402_1% 4 IO2 CLK 5 +3VALW_PCH
To SPI ROM GND IO0
RPC5 W25Q128FVSIQ_SO8 GPP_C5 RC25 1 @ 2
PCH_SPI_D1 RC1119 1 2 33_0402_5% 8 1 10K_0402_5%
PCH_SPI_D0 RC58 1 2 33_0402_5% 7 2 PCH_SPI_D0_R
PCH_SPI_CLK RC59 1 EMI@ 2 33_0402_5% 6 3 PCH_SPI_CLK_R
PCH_SPI_D3 RC60 1 2 33_0402_5% 5 4 PCH_SPI_D3_R .' & >($&
CC1823
2
15_0804_8P4R_5%
* "*
RC59 & CC1823 close to CPU @EMI@ ! 0 - ! 1 !
22P_0201_50V8J
1
L3 Routing

EC_MISO_R + ).>? 7(3#& 9> +


<22> EC_MISO_R EC_MOSI_R , , @(A '
From EC <22> EC_MOSI_R EC_SPICLK_R +3VALW_PCH
(For share ROM) <22,32> EC_SPICLK_R EC_SPICS#_R
<22> EC_SPICS#_R GPP_B23 1 CMC@ 2
RC365
Layout need meet L1 = L2 = L3 150K_0402_5%

8 !! =
* "* !
A ! 0 - ! 1 ! A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(3/14)SPI,SMB,LPC
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 8 of 46
5 4 3 2 1
5 4 3 2 1

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+3VS

RC293 1 2 IR_CAM_DET#
10K_0402_5% +3VALW_PCH
RC292 1 2 BLUETOOTH_EN
10K_0402_5% KB_DET# RC288 1 2
D RC62 2 1 UART_2_CRXD_DTXD 10K_0402_5% D
49.9K_0402_1% UC1F SKL-U RTC_DET# RC384 1 2
RC63 2 1 UART_2_CTXD_DRXD 10K_0402_5%
49.9K_0402_1% LPSS ISH SIO_EXT_WAKE# RC387 1 2
RC382 2 @ 1 LPSS_UART2_CTS# 10K_0402_5%
49.9K_0402_1% AN8
AP7 GPP_B15/GSPI0_CS# P2
VRAM_ID1 AP8 GPP_B16/GSPI0_CLK GPP_D9 P3
NRB_BIT AR7 GPP_B17/GSPI0_MISO GPP_D10 P4 IR_CAM_DET#
GPP_B18/GSPI0_MOSI GPP_D11 P1 RTC_DET# IR_CAM_DET# <25>
DBC_EN AM5 GPP_D12 RTC_DET# <20>
<25> DBC_EN AN7 GPP_B19/GSPI1_CS# M4
AP5 GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA N3
AN5 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL
GPP_B22/GSPI1_MOSI N1
AB1 GPP_D7/ISH_I2C1_SDA N2
BLUETOOTH_EN AB2 GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL
<29> BLUETOOTH_EN W4 GPP_C9/UART0_TXD AD11
RESERVE_ID1 AB3 GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12
GPP_C11/UART0_CTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
UART_2_CRXD_DTXD AD1
UART_2_CTXD_DRXD AD2 GPP_C20/UART2_RXD U1
SIO_EXT_WAKE# AD3 GPP_C21/UART2_TXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA U2
<22> SIO_EXT_WAKE# LPSS_UART2_CTS# AD4 GPP_C22/UART2_RTS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U3
GPP_C23/UART2_CTS# GPP_D15/ISH_UART0_RTS# U4
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
I2C_SDA_TP U7 AC1 RESERVE_ID2
<34> I2C_SDA_TP I2C_SCL_TP U6 GPP_C16/I2C0_SDA GPP_C12/UART1_RXD/ISH_UART1_RXD AC2 TPM_ID
<34> I2C_SCL_TP GPP_C17/I2C0_SCL GPP_C13/UART1_TXD/ISH_UART1_TXD AC3
U8 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
U9 GPP_C18/I2C1_SDA GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_C19/I2C1_SCL AY8 PHASE_ID2
C AH9 GPP_A18/ISH_GP0 BA8 PHASE_ID1 C
AH10 GPP_F4/I2C2_SDA GPP_A19/ISH_GP1 BB7 KB_DET#
GPP_F5/I2C2_SCL GPP_A20/ISH_GP2 BA7 PROJECT_ID KB_DET# <34>
AH11 GPP_A21/ISH_GP3 AY7
AH12 GPP_F6/I2C3_SDA GPP_A22/ISH_GP4 AW7 VRAM_ID2
GPP_F7/I2C3_SCL GPP_A23/ISH_GP5 AP13
AF11 GPP_A12/BM_BUSY#/ISH_GP6
AF12 GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL

SKL-U_BGA1356 6 OF 20
@

+3VS

+3VS +3VS
+3VS

1
RC374 RC1129 RC1130
1

1
1
@ @ HWTPM@
RC372 RC370 RC376 RC1104 RC1106 10K_0402_5% 10K_0402_5% 10K_0402_5%
ASTRO@ @ @

2
2

2
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% RESERVE_ID1
RESERVE_ID2
2

2
2
PHASE_ID2 PROJECT_ID VRAM_ID1 TPM_ID
PHASE_ID1 VRAM_ID2

1
1

1
1

1
RC377 RC375 RC1128 RC1131
RC373 RC371 DALI@ RC1105 RC1107 @ @ SWTPM@
B @ @ 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% B
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

2
2

2
PHASE ID PHASE_ID1 PHASE_ID2 PROJECT ID PROJECT_ID VRAM ID VRAM_ID2 VRAM_ID1 PROJECT ID TPM_ID
+3VALW_PCH (GPP_A19) (GPP_A18) (GPP_A21) (PCBA VRAM Size Config.) (GPP_A23) (GPP_B17) (GPP_C13)
EVT 0 0 Dali 0 UMA 0 0 SW_TPM 0
RC186 1 @ 2 NRB_BIT
4.7K_0402_5% DVT1 0 1 Astro 1 2G 0 1 HW_TPM 1
DVT2 1 0 4G 1 0
Pilot 1 1 Reserved 1 1 RESERVE_ID1 RESERVE_ID2
* "*
RESERVE ID (GPP_C11) (GPP_C12)
! 0 - ! 1 !
&(9

Win7 Debug solution


Option 2 : For Open Chassis Platforms
A +5VALW A
JWDB1
6
5 GND
GND

UART_2_CTXD_DRXD
4
3 4
DELL CONFIDENTIAL/PROPRIETARY
UART_2_CRXD_DTXD 2 3
1 2 Compal Electronics, Inc.
1 Title
CVILU_CI1804M1VRA-NH
CONN@ MCP(4/14)GSPI,I2C,UART,ISH
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 9 of 46
5 4 3 2 1
5 4 3 2 1

+3VALW_PCH
RPC3
USB_OC#3 4 5
USB_OC#0 3 6
USB_OC#1 2 7
USB_OC#2 1 8

10K_8P4R_5%

+3VS
RC248
SATA_LED# 1 2
10K_0402_5%
D UC1H SKL-U RC237 D
SIO_EXT_SCI# 1 2
10K_0402_5%
SSIC / USB3
PCIE/USB3/SATA
H8 USB3_CRX_DTX_N1
USB3_1_RXN G8 USB3_CRX_DTX_P1 USB3_CRX_DTX_N1 <23>
H13 USB3_1_RXP C13 USB3_CTX_DRX_N1 USB3_CRX_DTX_P1 <23>
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13 USB3_CTX_DRX_P1 USB3_CTX_DRX_N1 <23> + ./4
B17 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_CTX_DRX_P1 <23>
A17 PCIE1_TXN/USB3_5_TXN J6 USB3_CRX_DTX_N2
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN H6 USB3_CRX_DTX_P2 USB3_CRX_DTX_N2 <23>
G11 USB3_2_RXP/SSIC_1_RXP B13 USB3_CTX_DRX_N2 USB3_CRX_DTX_P2 <23>
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13 USB3_CTX_DRX_P2 USB3_CTX_DRX_N2 <23> + ./;
D16 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB3_CTX_DRX_P2 <23>
C16 PCIE2_TXN/USB3_6_TXN J10 USB3_CRX_DTX_N3
PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN H10 USB3_CRX_DTX_P3 USB3_CRX_DTX_N3 <33>
H16 USB3_3_RXP/SSIC_2_RXP B15 USB3_CTX_DRX_N3 USB3_CRX_DTX_P3 <33>
G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15 USB3_CTX_DRX_P3 USB3_CTX_DRX_N3 <33> + ./3
D17 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB3_CTX_DRX_P3 <33>
C17 PCIE3_TXN E10
PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15
F15 PCIE4_RXN USB3_4_TXN D15
B19 PCIE4_RXP USB3_4_TXP
A19 PCIE4_TXN AB9 USB_PN1
PCIE4_TXP USB2N_1 AB10 USB_PP1 USB_PN1 <24> + ./4
PCIE_PRX_WLANTX_N5 F16 USB2P_1 USB_PP1 <24>
<29> PCIE_PRX_WLANTX_N5 PCIE_PRX_WLANTX_P5 E16 PCIE5_RXN AD6 USB_PN2
<29> PCIE_PRX_WLANTX_P5 PCIE_PTX_C_WLANRX_N5 CC1815 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_N5 C19 PCIE5_RXP USB2N_2 AD7 USB_PP2 USB_PN2 <23> + ./;
<29> PCIE_PTX_C_WLANRX_N5 PCIE_PTX_C_WLANRX_P5 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_P5 D19 PCIE5_TXN USB2P_2 USB_PP2 <23>
CC1816
<29> PCIE_PTX_C_WLANRX_P5 PCIE5_TXP AH3 USB_PN3
PCIE_PRX_LANTX_N6 G18 USB2N_3 AJ3 USB_PP3 USB_PN3 <33> + ./3
C <30> PCIE_PRX_LANTX_N6 PCIE_PRX_LANTX_P6 F18 PCIE6_RXN USB2P_3 USB_PP3 <33> C
<30> PCIE_PRX_LANTX_P6 PCIE_PTX_C_LANRX_N6 1 2 0.1U_0402_10V7K PCIE_PTX_LANRX_N6 D20 PCIE6_RXP AD9 USB_PN4
CC135
<30> PCIE_PTX_C_LANRX_N6 PCIE_PTX_C_LANRX_P6 CC136 1 2 0.1U_0402_10V7K PCIE_PTX_LANRX_P6 C20 PCIE6_TXN USB2N_4 AD10 USB_PP4 USB_PN4 <33> 3 ./4
<30> PCIE_PTX_C_LANRX_P6 PCIE6_TXP USB2P_4 USB_PP4 <33>
SATA3_PRX_HDDTX_N0 F20 AJ1 USB_PN5
<27> SATA3_PRX_HDDTX_N0 SATA3_PRX_HDDTX_P0 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2 USB_PP5 USB_PN5 <25>
<27> SATA3_PRX_HDDTX_P0 SATA3_PTX_HDDRX_N0 B21 PCIE7_RXP/SATA0_RXP USB2P_5 USB_PP5 <25>
USB2
<27> SATA3_PTX_HDDRX_N0 SATA3_PTX_HDDRX_P0 A21 PCIE7_TXN/SATA0_TXN AF6 USB_PN6
<27> SATA3_PTX_HDDRX_P0 PCIE7_TXP/SATA0_TXP USB2N_6 AF7 USB_PP6 USB_PN6 <33> $1 $1
G21 USB2P_6 USB_PP6 <33>
F21 PCIE8_RXN/SATA1A_RXN AH1 USB_PN7
D21 PCIE8_RXP/SATA1A_RXP USB2N_7 AH2 USB_PP7 USB_PN7 <25> .<'# ' 7
C21 PCIE8_TXN/SATA1A_TXN USB2P_7 USB_PP7 <25>
PCIE8_TXP/SATA1A_TXP AF8 USB_PN8
E22 USB2N_8 AF9 USB_PP8 USB_PN8 <29>
E23 PCIE9_RXN USB2P_8 USB_PP8 <29>
B23 PCIE9_RXP AG1 USB_PN9
A23 PCIE9_TXN USB2N_9 AG2 USB_PP9 USB_PN9 <33> !78 !7/
PCIE9_TXP USB2P_9 USB_PP9 <33>
F25 AH7
E25 PCIE10_RXN USB2N_10 AH8
D23 PCIE10_RXP USB2P_10
C23 PCIE10_TXN AB6 USBCOMP RC44 1 2 113_0402_1%
PCIE10_TXP USB2_COMP AG3 USB2_ID RC366 1 2 1K_0402_5%
PCIE_RCOMPN F5 USB2_ID AG4 USB2_VBUSSENSE RC393 1 2 1K_0402_5%
RC45 1 2 PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE
100_0402_1% PCIE_RCOMPP A9 USB_OC#0
XDP_PRDY# D56 GPP_E9/USB2_OC0# C9 USB_OC#1 USB_OC#0 <24>
<14> XDP_PRDY# XDP_PREQ# D61 PROC_PRDY# GPP_E10/USB2_OC1# D9 USB_OC#2 USB_OC#1 <24>
<14> XDP_PREQ# FFS_INT1 BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9 USB_OC#3
<27> FFS_INT1 GPP_A7/PIRQA# GPP_E12/USB2_OC3#
RC1123 1 2 E28 J1 HDD_DEVSLP
B +3VS PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 SIO_EXT_SCI# HDD_DEVSLP <27> B
10K_0402_5% E27 J2
D24 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 J3 SSD_DEVSLP SIO_EXT_SCI# <22>
C24 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SSD_DEVSLP <28>
SATA3_PRX_SSDTX_N2 E30 PCIE11_TXP/SATA1B_TXP H2
<28> SATA3_PRX_SSDTX_N2 SATA3_PRX_SSDTX_P2 F30 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 H3
<28> SATA3_PRX_SSDTX_P2 SATA3_PTX_SSDRX_N2 A25 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 G4
<28> SATA3_PTX_SSDRX_N2 SATA3_PTX_SSDRX_P2 B25 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2
<28> SATA3_PTX_SSDRX_P2 PCIE12_TXP/SATA2_TXP H1 SATA_LED#
GPP_E8/SATALED# SATA_LED# <22,25>

SKL-U_BGA1356 8 OF 20
@

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(5/14)PCIE,USB,SATA
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 10 of 46
5 4 3 2 1
5 4 3 2 1

CC21 1 2

UC1J SKL_ULT 15P_0402_50V8J

3
4
CLOCK SIGNALS RC48 RC46 YC1
SUSCLK 1 2 24MHZ_12PF_X3G024000DC1H
D42 1K_0402_5% 1M_0402_1%

1
2
C42 CLKOUT_PCIE_N0

1
AR10 CLKOUT_PCIE_P0 XTAL24_IN
GPP_B5/SRCCLKREQ0# XTAL24_OUT XTAL24_OUT_R CC22 1 2
CLK_PCIE_WLAN_N1 RC1114 2 @ 1 0_0402_5% CLK_PCIE_WLAN_N1_R B42
<29> CLK_PCIE_WLAN_N1 CLK_PCIE_WLAN_P1 2 1 0_0402_5% CLK_PCIE_WLAN_P1_R A42 CLKOUT_PCIE_N1 F43 CLK_ITPXDP_N
RC1115 @ @ T4943 15P_0402_50V8J
<29> CLK_PCIE_WLAN_P1 CLK_PCIE_WLAN_REQ# AT7 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N E43 CLK_ITPXDP_P PAD
@ T4944
<29> CLK_PCIE_WLAN_REQ# 1 2 10K_0402_5% GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P PAD
+3VS RC47
CLK_PCIE_LAN_N2 RC1116 2 @ 1 0_0402_5% CLK_PCIE_LAN_N2_R D41 BA17 SUSCLK PCH_RTCX1 CC23 1 2
D <30> CLK_PCIE_LAN_N2 CLK_PCIE_LAN_P2 2 1 0_0402_5% CLK_PCIE_LAN_P2_R C41 CLKOUT_PCIE_N2 GPD8/SUSCLK SUSCLK <22,29> PCH_RTCX2 D
RC1117 @
<30> CLK_PCIE_LAN_P2 CLK_PCIE_LAN_REQ# AT8 CLKOUT_PCIE_P2 E37 XTAL24_IN 5.6P_0402_50V8C
<30> CLK_PCIE_LAN_REQ# GPP_B7/SRCCLKREQ2# XTAL24_IN

1
RC50 1 2 10K_0402_5% E35 XTAL24_OUT YC2
+3VS XTAL24_OUT
D40 RC52 RC54 32.768KHZ_9PF_9H03280012
C40 CLKOUT_PCIE_N3 E42 XCLK_BIASREF 1 2 20ppm / 9pF
CLKOUT_PCIE_P3 XCLK_BIASREF +1.0V_CLK5
AT10 2.7K_0402_1% 10M_0402_5% ESR <50kohm (MAX)

2
GPP_B8/SRCCLKREQ3# AM18 PCH_RTCX1

1
B40 RTCX1 AM20 PCH_RTCX2
A40 CLKOUT_PCIE_N4 RTCX2 PCH_RTCX2_R CC26 1 2
AU8 CLKOUT_PCIE_P4 AN18 SRTCRST# RC56 1 2 20K_0402_5%
GPP_B9/SRCCLKREQ4# SRTCRST# +RTC_CELL
AM16 CC24 1 2 1U_0402_6.3V6K 5.6P_0402_50V8C
E40 RTCRST#
E38 CLKOUT_PCIE_N5 PCH_RTCRST# RC57 1 2 20K_0402_5%
AU7 CLKOUT_PCIE_P5 CC25 1 2 1U_0402_6.3V6K
+3VS GPP_B10/SRCCLKREQ5#
CLRP1 2 1
RC1109 1 2
0.1U_0402_10V7K SHORT PADS
SKL-U_BGA1356 10 OF 20
5

UC7 PLT_RST# @
PCH_PLTRST# 1 PLT_RST# <22,25,29,30,32> RTCRST_ON
+ 2#A (9& $( & A%
P

IN1 4 PCH_PLTRST#_EC <22> RTCRST_ON


2 O PCH_PLTRST#_EC <22,25,29,30,32> B #$% .A9 ' 3(? # 63($&2&'
IN2
G

1
1

Q1901

2
SN74AHC1G08DCKR_SC70-5 RC65 R1902
;
3

G
100K_0402_5% 10K_0402_5%
3 1
%0$?6 " 7
> ./ .%1

2
2

D
+3VS 2N7002K_SOT23-3
+RTC_CELL
C C

2
INTRUDER# RC69 2 1
1M_0402_1%
RC388
1K_0402_5% +3VALW

1
ALL_SYS_PWRGD VRALERT# RC73 1 2
ALL_SYS_PWRGD <22,38>
RC392 RC1135 10K_0402_5%
+3.3V_ALW_DSW 1.2V_VTT_PWRGD 1 @ 2 1 @ 2 IMVP_VR_ON SIO_SLP_LAN# RC68 1 @ 2
<39> 1.2V_VTT_PWRGD IMVP_VR_ON <42>
1 10K_0402_5%
RC70 1 2 LAN_WAKE# CC1822 0_0402_5% 0_0402_5%
10K_0402_5% @
RC72 2 1 PCH_BATLOW# 0.1U_0402_10V7K
8.2K_0402_5% 2
RC243 2 1 AC_PRESENT
300K_0402_5%
RC1102 1 @ 2 SIO_PWRBTN#
100K_0402_5% +3VALW Buffer with Open Drain Output For VTT power control
DZ1702
1 2 CC1821 2 1 +3VALW +1.0V_VCCST
+3VS 0.1U_0402_10V7K
RB751S40T1G_SOD523-2 UC13 CC1820 2 1

1
RC291 1 2 SYS_RESET# 1 5 0.1U_0402_10V7K
10K_0402_5% RC130 NC VCC RC1118
SIO_SLP_S3# 1 2 2 UC12 ALL_SYS_PWRGD RC1136 1 @ 2 ALL_SYS_PWRGD_R
+3VALW_PCH 10K_0402_5% A 4 ALL_SYS_PWRGD 1 5 1K_0402_5% 0_0402_5%
Y NC VCC
2

CC93 3 SIO_SLP_SUS# RC1137 1 @ 2

2
RC74 1 @ 2 ME_SUS_PWR_ACK GND ALL_SYS_PWRGD_R 2 0_0402_5%
10K_0402_5% 2.2U_0402_6.3V6M 74AUP1G07GW_TSSOP5 A 4 H_VCCST_PWRGD
1

3 Y
GND
For S3 timing issue 74AUP1G07GW_TSSOP5
B CC1806 2 1 PCH_PLTRST# B
@ESD@ 100P_0402_50V8J

CC1807 2 1 SYS_RESET#
@ESD@ 100P_0201_50V8J UC1K SKL-U

CC1808 2 1 VCCST_PWRGD SYSTEM POWER MANAGEMENT


@ESD@ 100P_0402_50V8J AT11 SIO_SLP_S0#
GPP_B12/SLP_S0# AP15 SIO_SLP_S3# SIO_SLP_S0# <16,32>
PCH_PLTRST# AN10 GPD4/SLP_S3# BA16 SIO_SLP_S4# SIO_SLP_S3# <16,22,35,44>
Close to CPU side SYS_RESET# B5 GPP_B13/PLTRST# GPD5/SLP_S4# AY16 SIO_SLP_S5# SIO_SLP_S4# <16,22,39,41>
1 2 10K_0402_5% PCH_RSMRST#_Q AY17 SYS_RESET# GPD10/SLP_S5# SIO_SLP_S5# <37>
RC75
RSMRST# AN15 SIO_SLP_SUS#_R RC76 1 @ 2 0_0402_5% SIO_SLP_SUS#
H_CPUPWRGD A68 SLP_SUS# AW15 SIO_SLP_LAN# SIO_SLP_SUS# <22>
RC1139 T9 @ @ T4938
1 2 PCH_DPWROK PAD H_VCCST_PWRGD 1 2 60.4_0402_1% VCCST_PWRGD B65 PROCPWRGD SLP_LAN# BB17 SIO_SLP_WLAN# PAD
POK @ RC78 @ T4945
VCCST_PWRGD GPD9/SLP_WLAN# AN16 SIO_SLP_A# PAD
0_0402_5% @ T4975
SYS_PWROK B6 GPD6/SLP_A# PAD
<22> SYS_PWROK RESET_OUT# BA20 SYS_PWROK BA15 SIO_PWRBTN#
<22> RESET_OUT# PCH_RSMRST#_Q 1 2 0_0402_5% PCH_DPWROK BB20 PCH_PWROK GPD3/PWRBTN# AY15 AC_PRESENT 2 1 ACAV_IN SIO_PWRBTN# <22>
RC216 @ DZ4
DSW_PWROK GPD1/ACPRESENT AU13 PCH_BATLOW# ACAV_IN <22,36,37>
RB751S40T1G_SOD523-2
ME_SUS_PWR_ACK AR13 GPD0/BATLOW#
<22> ME_SUS_PWR_ACK AP11 GPP_A13/SUSWARN#/SUSPWRDNACK
GPP_A15/SUSACK# AU11 PME# @
PCIE_WAKE# PCH_PCIE_WAKE# GPP_A11/PME# PAD T115
RC395 1 @ 2 0_0402_5% BB15 AP16 INTRUDER#
<22,30> PCIE_WAKE# EC_WAKE# 1 2 LAN_WAKE# AM15 WAKE# INTRUDER#
RC391 @ 0_0402_5%
<22> EC_WAKE# AW17 GPD2/LAN_WAKE# AM10 MPHYP_PWR_EN @ T4974
AT15 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# AM11 PAD
VRALERT#
GPD7/RSVD GPP_B2/VRALERT#

SKL-U_BGA1356 11 OF 20

A
+ $. $#. <22> PCH_RSMRST#
<36,38,40,41> POK
PCH_RSMRST#
POK
@

+3VALW
POK
DELL CONFIDENTIAL/PROPRIETARY
5
1

UZ6
1

PCH_RSMRST# 1
CC266 RC220
Compal Electronics, Inc.
P

IN1 4 PCH_RSMRST#_Q
2 O PCH_RSMRST#_Q <14> Title
1U_0402_6.3V6K 1M_0402_5% POK
2

IN2
G

MCP(6/14)CLK,PM,RTC
2

SN74AHC1G08DCKR_SC70-5
3

Size Document Number R ev


1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 11 of 46
5 4 3 2 1
5 4 3 2 1

+1.0V_VCCST

RC79 1 @ 2 H_CATERR#
49.9_0402_1%
RC80 1 2 H_THERMTRIP#
1K_0402_5% UC1D SKL-U

H_CATERR# D63
+1.0V_VCCSTG PECI_EC A54 CATERR#
<22> PECI_EC H_PROCHOT# RC84 1 2 H_PROCHOT#_R C65 PECI
<22,36,37,42> H_PROCHOT# PROCHOT# JTA G
RC83 1 2 H_PROCHOT# 499_0402_1% H_THERMTRIP# C63
D 1K_0402_5% A65 THERMTRIP# B61 CPU_XDP_TCK0 D
SKTOCC# PROC_TCK D60 SOC_XDP_TDI CPU_XDP_TCK0 <14>
CPU MISC PROC_TDI SOC_XDP_TDI <14>
@ XDP_OBS0_R C55 A61 SOC_XDP_TDO
+3VS T4942 PAD XDP_OBS1_R BPM#[0] PROC_TDO SOC_XDP_TMS SOC_XDP_TDO <14>
@ D55 C60
T4941 PAD XDP_OBS2_R BPM#[1] PROC_TMS SOC_XDP_TRST# SOC_XDP_TMS <14>
@ B54 B59
TOUCHPAD_INTR#_D T10 PAD XDP_OBS3_R BPM#[2] PROC_TRST# SOC_XDP_TRST# <14>
RC272 1 2 @ C56
T11 PAD BPM#[3] PCH_JTAG_TCK1
10K_0402_5% B56
1 2 TOUCH_SCREEN_PD# A6 PCH_JTAG_TCK D59 SOC_XDP_TDI PCH_JTAG_TCK1 <14>
RC277
10K_0402_5% TOUCH_SCREEN_PD# RC394 1 @ 2 TOUCH_SCREEN_PD#_R A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI A56 SOC_XDP_TDO
<25> TOUCH_SCREEN_PD# TOUCHPAD_INTR#_D BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 SOC_XDP_TMS
0_0402_5%
AY5 GPP_B3/CPU_GP2 PCH_JTAG_TMS C61 SOC_XDP_TRST#
GPP_B4/CPU_GP3 PCH_TRST# A59 CPU_XDP_TCK0
CPU_POPIRCOMP AT16 JTAGX
PCH_POPIRCOMP AU16 PROC_POPIRCOMP
CC1809 2 1 H_PROCHOT#_R EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
@ESD@ 100P_0402_50V8J EOPIO_RCOMP H65 OPCE_RCOMP
OPC_RCOMP

1
Close to CPU side 4 OF 20
RC88 RC89 RC90 RC91 SKL-U_BGA1356
@
49.9_0402_1% 49.9_0402_1% 49.9_0402_1% 49.9_0402_1%

2
DZ3
TOUCHPAD_INTR# 1 2 TOUCHPAD_INTR#_D
C <22,34> TOUCHPAD_INTR# C
RB751S40T1G_SOD523-2

HDA_CODEC_SYNC RC92 1 2 33_0402_5% HDA_SYNC


<21> HDA_CODEC_SYNC HDA_SDIN0
<21> HDA_SDIN0 HDA_CODEC_RST# 1 @ 2 33_0402_5% HDA_RST# SKL-U
RC95 UC1G
<21> HDA_CODEC_RST# HDA_CODEC_SDOUT 1 2 33_0402_5% HDA_SDOUT
RC94
<21> HDA_CODEC_SDOUT
AUDIO
ME_FWP_EC RC223 1 2 1K_0402_5%
<22> ME_FWP_EC HDA_SYNC BA22
HDA_BIT_CLK AY22 HDA_SYNC/I2S0_SFRM
+ :- :
!" #$%$ &'()!&$** + ,&$- ./01$/2345$ 678259$ ,&
HDA_SDOUT BB22 HDA_BLK/I2S0_SCLK
SDIO/SDXC
HDA_SDIN0 BA21 HDA_SDO/I2S0_TXD

:; <:$ %$ =; >()!&$** + ,&$ 63*- ./01$/23$ 678259$ ,& HDA_RST#


AY21
AW22
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
AB11
AB13
J5 AB12
AY20 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 W12
HDA_CODEC_BITCLK RC93 1 EMI@ 2 33_0402_5% HDA_BIT_CLK AW20 I2S1_SFRM GPP_G3/SD_DATA2 W11
<21> HDA_CODEC_BITCLK I2S1_TXD GPP_G4/SD_DATA3 W10
RC93 near UC1E, the R/C need between CPU ball out and VIA AK7 GPP_G5/SD_CD# W8 KB_LED_BL_DET
1 GPP_F1/I2S2_SFRM GPP_G6/SD_CLK KB_LED_BL_DET <34>
CC27 AK6 W7
@EMI@ AK9 GPP_F0/I2S2_SCLK GPP_G7/SD_WP
22P_0402_50V8J AK10 GPP_F2/I2S2_TXD BA9
B 2 GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9 B
Close to RC93 GPP_A16/SD_1P8_SEL
H5 AB7 SD_RCOMP RC96 1 2
D7 GPP_D19/DMIC_CLK0 SD_RCOMP 200_0402_1%
GPP_D20/DMIC_DATA0
D8 AF13
C8 GPP_D17/DMIC_CLK1 GPP_F23
+3VALW_PCH +3VALW_PCH GPP_D18/DMIC_DATA1
SPKR AW5
1 2 1 2 HDA_SDOUT <21> SPKR GPP_B14/SPKR
RC183 @ SPKR RC187 @
8.2K_0402_5% 4.7K_0402_5%

SKL-U_BGA1356 7 OF 20
-3(A% &A$ .6 &$# . ? C& .)&
@
* "* ! * "* !
! 0 - ! 1 ! ! 0 - ! 1 !

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(7/14)MISC,JTAG,HDA,SDIO
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 12 of 46
5 4 3 2 1
5 4 3 2 1

D D

F3GF9GFEGF=G C. ( ( ) 6/ $" "!7


UC1S SKL-U
UC1T SKL-U
RESERVED SIGNALS-1
SPARE
CFG0 E68 BB68 @
<14> CFG0 CFG[0] RSVD_TP_BB68 PAD T12
RC113 1 @ 2 CFG0 CFG1 B67 BB69 @ AW69 F6
<14> CFG1 CFG[1] RSVD_TP_BB69 PAD T13 RSVD_AW69 RSVD_F6
10K_0402_5% CFG2 D65 AW68 E3
<14> CFG2 D67 CFG[2] AK13 AU56 RSVD_AW68 RSVD_E3 C11
CFG3 @ T14
<14> CFG3 E70 CFG[3] RSVD_TP_AK13 AK12 PAD +1.8V_PRIM AW48 RSVD_AU56 RSVD_C11 B11
CFG4 @ T15
<14> CFG4 C68 CFG[4] RSVD_TP_AK12 PAD C7 RSVD_AW48 RSVD_B11 A11
CFG5
(33 &A& A&D#&'$& <14> CFG5 CFG6 D68 CFG[5] BB2 RC361 1 @ 2 U12 RSVD_C7 RSVD_A11 D12
<14> CFG6 CFG7 C67 CFG[6] RSVD_BB2 BA3 U11 RSVD_U12 RSVD_D12 C12
* "*0 - ! 1 A (330 2(3 6& ( . '1 0_0402_5%
<14> CFG7 F71 CFG[7] RSVD_BA3 H11 RSVD_U11 RSVD_C12 F52
CFG8
! A (33 <14> CFG8
CFG9 G69 CFG[8] RSVD_H11 RSVD_F52
<14> CFG9 F70 CFG[9] AU5
CFG10 @ T128
<14> CFG10 CFG11 G68 CFG[10] TP5 AT5 PAD
@ T129
1 2 CFG1 <14> CFG11 CFG12 H70 CFG[11] TP6 PAD 20 OF 20
RC112 @ SKL-U_BGA1356
<14> CFG12 G71 CFG[12]
10K_0402_5% CFG13 @
1 2 <14> CFG13 H69 CFG[13] D5
RC110 @ CFG3 CFG14
<14> CFG14 G70 CFG[14] RSVD_D5 D4
10K_0402_5% CFG15
<14> CFG15 CFG[15] RSVD_D4 B2
CFG16 E63 RSVD_B2 C2
<14> CFG16 F63 CFG[16] RSVD_C2
CFG17
<14> CFG17 CFG[17] B3
CFG18 E66 RSVD_B3 A3
<14> CFG18 CFG19 F66 CFG[18] RSVD_A3
C 1 2 CFG4 <14> CFG19 CFG[19] AW1 C
RC109
10K_0402_5% RC114 2 1 CFG_RCOMP E60 RSVD_AW1
49.9_0402_1% CFG_RCOMP E1
RC115 2 CMC@ 1 XDP_ITP_PMODE E8 RSVD_E1 E2
+1.0V_XDP ITP_PMODE RSVD_E2
& &'(E3& 1.5K_0402_5%
AY2 BA4
<14> XDP_ITP_PMODE AY1 RSVD_AY2 RSVD_BA4 BB4
* "* .A(E3&) RSVD_AY1 RSVD_BB4
! 0 - ! 1 '(E3&) D1 A4
D3 RSVD_D1 RSVD_A4 C4
RSVD_D3 RSVD_C4
K46 BB5 @
RSVD_K46 TP4 PAD T130
K45
RSVD_K45 A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3
C71 RSVD_AY3
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54
@ BA70 AY4 @
. 3*+ .%</ ! .7
T16 PAD RSVD_TP_BA70 TP1 PAD T126
@ BA68 BB3 @
T17 PAD RSVD_TP_BA68 TP2 PAD T127
J71 AY71
- , D
J68 RSVD_J71
RSVD_J68
VSS_AY71
ZVM#
AR56 PM_ZVM#
PM_ZVM# <44>
. ,.%/$8 .1 .7/ .% !87$% /.
F65 AW71 @
, 0# 7 %.0 , .</"</ !6 4,
VSS_F65 RSVD_TP_AW71 PAD T113
G65 AW70 @
B VSS_G65 RSVD_TP_AW70 PAD T114
F61 AP56 PM_MSM# - D B
@
E61 RSVD_F61 MSM# C64 RC120 1 @ 2 PAD
+1.0V_VCCST
T4949 !7!5<5 " 1 .1 .7/ .% 6!87$% /.
RSVD_E61 PROC_SELECT# 100K_0402_5% ,'' , '.77 '/ 1 .7%? !7 3 ,
Follow 546765_2014WW48_Skylake_MOW_Rev_1_0 6.%</ ! .7 C .
SKL-U_BGA1356 19 OF 20
@ Stuff 100k(RC184) for Cannonlake.
Un-stuff 100k(RC184) for Skylake

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(8/14)CFG,RSVD
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 13 of 46
5 4 3 2 1
5 4 3 2 1

UC1P SKL-U UC1Q SKL-U


UC1R SKL-U
GND 1 OF 3 GND 2 OF 3
GND 3 OF 3
PRIMARY CMC CONN A5
A67 VSS VSS
AL65
AL66
AT63
AT68 VSS VSS
BA49
BA53
F8
G10 VSS VSS
L18
L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
+1.0V_PRIM +1.0V_XDP AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4
RC352 AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8
1 @ 2 AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
0_0603_5% AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
D AB18 VSS VSS AM55 AV68 VSS VSS BB30 G58 VSS VSS N6 D
AB21 VSS VSS AM60 AV69 VSS VSS BB34 G6 VSS VSS N65
CFG0 @ T89 AB8 VSS VSS AM61 AV70 VSS VSS BB38 G60 VSS VSS N68
<13> CFG0 AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
CFG1 @ T90
<13> CFG1 AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
CFG2 @ T91
<13> CFG2 SOC_XDP_TRST# AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
CFG3 @ T92 T110 @
<13> CFG3 CFG4 SOC_XDP_TDI SOC_XDP_TRST# <12> AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
@ T93 T111 @
<13> CFG4 CFG5 SOC_XDP_TMS SOC_XDP_TDI <12> AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
@ T94 T112 @
<13> CFG5 CPU_XDP_TCK0 SOC_XDP_TMS <12> AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
CFG6 @ T95 T116 @
<13> CFG6 PCH_JTAG_TCK1 CPU_XDP_TCK0 <12> AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
CFG7 @ T96 T117 @
<13> CFG7 SOC_XDP_TDO PCH_JTAG_TCK1 <12> AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
T118 @
CFG17 SOC_XDP_TDO <12> AE65 VSS VSS AN33 AW26 VSS VSS C25 J28 VSS VSS T18
@ T97
<13> CFG17 CFG16 XDP_PREQ# AE66 VSS VSS AN35 AW28 VSS VSS C5 J32 VSS VSS T2
@ T98 T119 @
<13> CFG16 XDP_PRDY# XDP_PREQ# <10> AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
T120 @
XDP_PRDY# <10> AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
CFG8 @ T99
<13> CFG8 XDP_HOOK0 AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10
CFG9 @ T100 T121 @
<13> CFG9 CFG10 XDP_SPI_SI AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
@ T101 T124 @
<13> CFG10 CFG11 XDP_ITP_PMODE XDP_SPI_SI <8> AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
@ T102 T125 @
<13> CFG11 XDP_ITP_PMODE <13> AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
CFG12 @ T103
<13> CFG12 XDP_SPI_IO2 AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
CFG13 @ T104 T131 @
<13> CFG13 XDP_SPI_IO2 <8> AF2 VSS VSS AP18 AW45 VSS VSS D30 K61 VSS VSS U69
CFG14 @ T105
<13> CFG14 CFG15 AF4 VSS VSS AP20 AW47 VSS VSS D34 K63 VSS VSS U70
@ T106
<13> CFG15 AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
CFG19 @ T107 AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
<13> CFG19 AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
CFG18 @ T108
<13> CFG18 AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG19 VSS VSS AP38 AW57 VSS VSS D48 K68 VSS VSS W6
AG20 VSS VSS AP42 AW6 VSS VSS D53 K70 VSS VSS W9
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
RC158 AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
PCH_RSMRST#_Q 1 CMC@ 2 XDP_HOOK0 AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
<11> PCH_RSMRST#_Q AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
1K_0402_5%
C AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS C
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15
AJ15 VSS VSS AR20 B14 VSS VSS E18
AJ18 VSS VSS AR23 B18 VSS VSS E21 SKL-U_BGA1356 18 OF 20
AJ20 VSS VSS AR28 B22 VSS VSS E46 @
+3V_SPI AJ4 VSS VSS AR35 B30 VSS VSS E50
RC9 AK11 VSS VSS AR42 B34 VSS VSS E53
1 CMC@ 2 XDP_SPI_SI AK16 VSS VSS AR43 B39 VSS VSS E56
1K_0402_5% AK18 VSS VSS AR45 B44 VSS VSS E6
AK21 VSS VSS AR46 B48 VSS VSS E65
AK22 VSS VSS AR48 B53 VSS VSS E71
+1.0V_VCCSTG AK27 VSS VSS AR5 B58 VSS VSS F1
AK63 VSS VSS AR50 B62 VSS VSS F13
RPC1 AK68 VSS VSS AR52 B66 VSS VSS F2
1 8 SOC_XDP_TMS AK69 VSS VSS AR53 B71 VSS VSS F22
2 7 SOC_XDP_TDI AK8 VSS VSS AR55 BA1 VSS VSS F23
3 6 SOC_XDP_TDO AL2 VSS VSS AR58 BA10 VSS VSS F27
4 5 CPU_XDP_TCK0 AL28 VSS VSS AR63 BA14 VSS VSS F28
Place to CPU side VSS VSS VSS VSS
AL32 AR8 BA18 F32
51_0804_8P4R_5% AL35 VSS VSS AT2 BA2 VSS VSS F33
CMC@ AL38 VSS VSS AT20 BA23 VSS VSS F35
AL4 VSS VSS AT23 BA28 VSS VSS F37
AL45 VSS VSS AT28 BA32 VSS VSS F38
AL48 VSS VSS AT35 BA36 VSS VSS F4
+1.0V_XDP AL52 VSS VSS AT4 F68 VSS VSS F40
RC353 AL55 VSS VSS AT42 BA45 VSS VSS F42
1 CMC@ 2 XDP_ITP_PMODE AL58 VSS VSS AT56 VSS VSS BA41
1K_0402_5% AL64 VSS VSS AT58 VSS
VSS VSS

RC43
B 2 @ 1 CFG3 16 OF 20 17 OF 20 B
CFG3 = XDP_PRSENT_CPU SKL-U_BGA1356 SKL-U_BGA1356
0_0402_5% @ @

RC347
2 @ 1 XDP_SPI_IO2
XDP_SPI_IO2 = XDP_PRSENT_PCH
0_0402_5%

RC348
2 1 PCH_JTAG_TCK1
Place to CPU side @
51_0402_5%

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(9,14/14)XDP/VSS
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 14 of 46
5 4 3 2 1
5 4 3 2 1

!5$ ? 6!1 '$" %$' $6 '%.6 /. /# "$'H$8 $6 ".66!@%


$'H6!1 '$" %$' .7 6 '.71$ ? 6!1 <71 7 $/# /# "$'H$8

.5".7 7/ "%$' 5 7/ . 1
$'H$8 18 I 4B43 '$"6 I 4J49 '$"6 I <%H '$"6 I .0 6.< '

*, 4 +A; +9,
*, - 4 +A; +9, *, 4 +A; +9,
+VCC_CORE +VCC_CORE
D UC1L SKL-U D

CPU POWER 1 OF 4

A30 G32
A34 VCC_A30 VCC_G32 G33
A39 VCC_A34 VCC_G33 G35 +VCC_GT +VCC_GT
A44 VCC_A39 VCC_G35 G37 UC1M SKL-U
AK33 VCC_A44 VCC_G37 G38
AK35 VCC_AK33 VCC_G38 G40 CPU POWER 2 OF 4
AK37 VCC_AK35 VCC_G40 G42 N70
AK38 VCC_AK37 VCC_G42 J30 A48 VCCGT N71
AK40 VCC_AK38 VCC_J30 J33 A53 VCCGT VCCGT R63
AL33 VCC_AK40 VCC_J33 J37 A58 VCCGT VCCGT R64
AL37 VCC_AL33 VCC_J37 J40 A62 VCCGT VCCGT R65
AL40 VCC_AL37 VCC_J40 K33 +VCC_CORE A66 VCCGT VCCGT R66
AM32 VCC_AL40 VCC_K33 K35 AA63 VCCGT VCCGT R67
AM33 VCC_AM32 VCC_K35 K37 AA64 VCCGT VCCGT R68
VCC_AM33 VCC_K37 VCCGT VCCGT

1
AM35 K38 AA66 R69
AM37 VCC_AM35 VCC_K38 K40 RC140 AA67 VCCGT VCCGT R70
AM38 VCC_AM37 VCC_K40 K42 AA69 VCCGT VCCGT R71
G30 VCC_AM38 VCC_K42 K43 100_0402_1% AA70 VCCGT VCCGT T62
VCC_G30 VCC_K43 AA71 VCCGT VCCGT U65

2
@ +VCC_CORE_G0 K32 E32 VCCSENSE AC64 VCCGT VCCGT U68
T122 PAD RSVD_K32 VCC_SENSE VCCSENSE <42> VCCGT VCCGT
E33 VSSSENSE AC65 U71
+VCC_CORE_G1 AK32 VSS_SENSE VSSSENSE <42> AC66 VCCGT VCCGT W63
T123 @
PAD RSVD_AK32 VCCGT VCCGT

1
B63 H_CPU_SVIDALRT# AC67 W64
AB62 VIDALERT# A63 VIDSCLK RC141 AC68 VCCGT VCCGT W65
+1.0VS_VCCOPC VCCOPC_AB62 VIDSCK VCCGT VCCGT
P62 D64 VIDSOUT AC69 W66
V62 VCCOPC_P62 VIDSOUT 100_0402_1% AC70 VCCGT VCCGT W67
VCCOPC_V62 G20 AC71 VCCGT VCCGT W68
+1.0V_VCCSTG

2
H63 VCCSTG_G20 J43 VCCGT VCCGT W69
+1.8V_PRIM VCC_OPC_1P8_H63 VCCGT VCCGT
RC1134 J45 W70
C 1 @ 2 G61 J46 VCCGT VCCGT W71 C
0_0603_5% VCC_OPC_1P8_G61 J48 VCCGT VCCGT Y62
@ VCC_EDRAM_SENSE AC63 J50 VCCGT VCCGT +VCC_GT
T134 PAD VSS_EDRAM_SENSE VCCOPC_SENSE VCCGT
@ AE63 J52
T135 PAD VSSOPC_SENSE VCCGT
J53 AK42
AE62 J55 VCCGT VCCGTX_AK42 AK43
+1.0VS_VCCOPC VCCEOPIO VCCGT VCCGTX_AK43
AG62 J56 AK45
VCCEOPIO J58 VCCGT VCCGTX_AK45 AK46
@ VCCEOPIO_SENSE AL63 J60 VCCGT VCCGTX_AK46 AK48
T136 PAD VSSEOPIO_SENSE VCCEOPIO_SENSE VCCGT VCCGTX_AK48
@ AJ62 VIDSCLK K48 AK50
T137 PAD VSSEOPIO_SENSE VIDSCLK <42> VCCGT VCCGTX_AK50
K50 AK52
K52 VCCGT VCCGTX_AK52 AK53
SKL-U_BGA1356 12 OF 20 K53 VCCGT VCCGTX_AK53 AK55
, , -; J , C. ( ( ) 3*+ K55 VCCGT VCCGTX_AK55 AK56
@
0K .7 "$'H$8 '$'# K56 VCCGT VCCGTX_AK56 AK58
K58 VCCGT VCCGTX_AK58 AK60
K60 VCCGT VCCGTX_AK60 AK70
L62 VCCGT VCCGTX_AK70 AL43
, C. ( ( ) 3*+ .7%?
L63 VCCGT VCCGTX_AL43 AL46
L64 VCCGT VCCGTX_AL46 AL50
L65 VCCGT VCCGTX_AL50 AL53
L66 VCCGT VCCGTX_AL53 AL56
+1.0VS_VCCOPC L67 VCCGT VCCGTX_AL56 AL60
L68 VCCGT VCCGTX_AL60 AM48
L69 VCCGT VCCGTX_AM48 AM50
CC1832 CC1831 CC1830 CC1824 CC1825 CC1826 CC1827 CC1828 CC1829 L70 VCCGT VCCGTX_AM50 AM52
28W@ 28W@ 28W@ 28W@ 28W@ 28W@ 28W@ 28W@ 28W@ +VCC_GT L71 VCCGT VCCGTX_AM52 AM53 +VCC_GT
1 1 1 1 1 1 1 1 1 VCCGT VCCGTX_AM53
M62 AM56
VCCGT VCCGTX_AM56
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1U_0402_6.3V6K

1U_0402_6.3V6K
10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0402_6.3V6K

N63 AM58
VCCGT VCCGTX_AM58

1
N64 AU58
2 2 2 2 2 2 2 2 2 RC161 N66 VCCGT VCCGTX_AU58 AU63 RC340
N67 VCCGT VCCGTX_AU63 BB57 28W@
B 100_0402_1% N69 VCCGT VCCGTX_BB57 BB66 100_0402_1% B
VCCGT VCCGTX_BB66

2
VCC_GT_SENSE J70 AK62 VCCSENSE_VCCGTUS
<42> VCC_GT_SENSE VSS_GT_SENSE J69 VCCGT_SENSE VCCGTX_SENSE AL61 VSSSENSE_VCCGTUS
<42> VSS_GT_SENSE VSSGT_SENSE VSSGTX_SENSE

1
RC163 SKL-U_BGA1356 13 OF 20 RC341
@ 28W@
100_0402_1% 100_0402_1%

2
+1.0V_VCCST
,
&F 3($& %& &A.A A $3 A&
1

RC152 $3 A& 2.3A


56_0402_1%
2

VIDALERT_N RC153 2 1 H_CPU_SVIDALRT#


<42> VIDALERT_N
220_0402_5%

+1.0V_VCCST
,
&F 3($& %& &A.A A $3 A&
1

RC157 $3 A& 2.3A


100_0402_1%
A A
2

VIDSOUT
<42> VIDSOUT

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(10,11/14)PWR-VCCCORE,GT
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 15 of 46
5 4 3 2 1
5 4 3 2 1

+1.2V_DDR

CC174 CC175 CC176 CC177 CC178 CC179


@ @
1 1 1 1 1 1
+1.0VS_VCCIO

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
2 2 2 2 2 2
D D
CC181 CC182 CC185 CC186 CC248 CC249
1 1 1 1 1 1

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0402_6.3V6M

10U_0402_6.3V6M
2 2 2 2 2 2
+1.0VS_VCCIO
UC1N SKL-U
CC256 CC257 CC258 CC255 CC293 CC294 CC295 CPU POWER 3 OF 4
@ @ @ @
1 1 1 1 1 1 1
AU23 AK28
VDDQ_AU23 VCCIO
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
AU28 AK30
AU35 VDDQ_AU28 VCCIO AL30
2 2 2 2 2 2 2 AU42 VDDQ_AU35 VCCIO AL42
BB23 VDDQ_AU42 VCCIO AM28
BB32 VDDQ_BB23 VCCIO AM30 CC252 CC253 CC250 CC251
BB41 VDDQ_BB32 VCCIO AM42 +VCC_SA
VDDQ_BB41 VCCIO 1 1 1 1
BB47
VDDQ_BB47

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
BB51 AK23
VDDQ_BB51 VCCSA AK25
VCCSA G23 2 2 2 2
AM40 VCCSA G25
VDDQC VCCSA G27
CC296 CC194 A18 VCCSA G28
VCCST VCCSA J22
1 1 VCCSA
A22 J23
VCCSTG_A22 VCCSA
10U_0402_6.3V6M

1U_0402_6.3V6K

J27
AL23 VCCSA K23
2 2 VCCPLL_OC VCCSA K25
K20 VCCSA K27
K21 VCCPLL_K20 VCCSA K28
C VCCPLL_K21 VCCSA K30 C
+1.0V_VCCST VCCSA
AM23 VCCIO_SENSE @
VCCIO_SENSE VSSIO_SENSE PAD T4947
AM22 @
VSSIO_SENSE PAD T4948
H21 VSA_SEN-
CC195 +1.0V_VCCSTG VSSSA_SENSE H20 VSA_SEN+
VCCSA_SENSE

1
1
RC166
1U_0402_6.3V6K

SKL-U_BGA1356 14 OF 20
@ RC168 100_0402_1%
2 CC199 1 2
+VCC_SA

2
+1.2V_DDR +1.0V_VCCST 100_0402_1%
1
1U_0402_6.3V6K

2 VSA_SEN- <42>
CC297 CC202
VSA_SEN+ <42>
1 1 L ;9
%0$?6 #. /
1U_0402_6.3V6K

1U_0402_6.3V6K

2 2
+1.0V_VCCSTG_C Imax : 3 A +1.0VS_VCCIO
JP15 @
1 2
1 2
JUMP_43X79

POP option with Volume

B B

*; 4,-, 6.< ' SIO_SLP_S4# *; 4,-, 6.< ' +1.0V_VCCSTG


<11,22,39,41> SIO_SLP_S4#

<11,22,35,44> SIO_SLP_S3#
SIO_SLP_S3# !!"#$%&'()*%+,-./

2
DZ1703
1 2 SIO_SLP_S0# +1.0V_PRIM RZ1703
<11,32> SIO_SLP_S0#
UZ19 @
RB751S40T1G_SOD523-2 1 0_0402_5%
UZ21 CZ87 2 VIN1

1
RZ1701 VIN2
SIO_SLP_S4# EN_1.0V_VCCST_ON 1 +1.0V_VCCSTG_C
1 2 3 7 6
ON VIN thermal VOUT

1U_0402_6.3V6K
22.1K_0402_1% RZ1704
1 7 +1.0V_VCCST_C 2 @ 1 3
1 VIN VOUT +1.0V_VCCST 2 +5VALW VBIAS
CZ1705
2 8 0_0402_5% 4 5
+1.0V_PRIM VIN VOUT +3VALW ON GND
0.1U_0402_10V7K
2
UC15 TPS22961DNYR_WSON8

5
4
+5VALW VBIAS 5 SIO_SLP_S3# 1 RZ1702
B B5.#5KE

P
6 GND 9 IN1 4 VCCSTG_EN 1 2 VCCSTG_EN_R 2;3 9<6M,!72; 49,
CT GND SIO_SLP_S0# 2 O 49.9K_0402_1%
IN2 1

G
1

CZ70
TPS22967DSGR_SON8_2X2 SN74AHC1G08DCKR_SC70-5 DZ1701 CZ1702
470P_0402_50V7K 3 1 2 0.1U_0402_10V7K
2

2
RB751S40T1G_SOD523-2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(12/14)PWR-VCCIO,MEM
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 16 of 46
5 4 3 2 1
5 4 3 2 1

+1.0V_PRIM +3VALW_PCH
+1.0V_PRIM +3VALW_PCH

CC203 +1.0V_PRIM CC265 +3VALW_PCH


1 CC206 @ 1 CC207
@ 1 @ 1

1U_0402_6.3V6K

1U_0402_6.3V6K
CC205

1U_0402_6.3V6K

1U_0402_6.3V6K
@ 1
2 2
2 2

1U_0402_6.3V6K
UC1O SKL-U

2 CPU POWER 4 OF 4
CC204
D AB19 D
1 VCCPRIM_1P0
AB20 AK15
VCCPRIM_1P0 VCCPGPPA +3VALW_PCH

1U_0402_6.3V6K
$3 A& 5 (') G 2.3 P18 AG15 $3 A& " (') G 2.3
VCCPRIM_1P0 VCCPGPPB Y16
2
$3 A& (') G 2.3 VCCPGPPC $3 A& = (') G 2.3
AF18 Y15
VCCPRIM_CORE VCCPGPPD +3VALW_PCH
$3 A& - (') G 2.3 AF19 T16
V20 VCCPRIM_CORE VCCPGPPE AF16
VCCPRIM_CORE VCCPGPPF +1.8V_PRIM +3VALW_PCH
V21 AD15
VCCPRIM_CORE VCCPGPPG +3VALW_PCH
AL1 V19
DCPDSW_1P0 VCCPRIM_3P3_V19
$3 A& ! (') G 2.3
K17 T1 +1.8V_PRIM
+1.0V_MPHYPLL VCCMPHYAON_1P0 VCCPRIM_1P0_T1 +1.0V_PRIM
L1
VCCMPHYAON_1P0 AA1
N15 VCCATS_1P8 CC212
CC210 CC211 N16 VCCMPHYGT_1P0_N15 AK17 +RTC_CELL
VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3 +3VALW_PCH 1
@ 1 1 N17
VCCMPHYGT_1P0_N17

1U_0402_6.3V6K
P15 AK19
47U_0805_6.3V6M VCCMPHYGT_1P0_P15 VCCRTC_AK19

1U_0402_6.3V6K
P16 BB14 CC270 CC213
VCCHDA VCCMPHYGT_1P0_P16 VCCRTC_BB14 2
2 2 1 1
K15 BB10
VCCAMPHYPLL_1P0 DCPRTC

0.1U_0402_10V7K

1U_0402_6.3V6K
L15 CC214
CC215 VCCAMPHYPLL_1P0 A14
VCCCLK1 +1.0V_PRIM 1 2 2
RF@ 1 V15
+1.0V_APLL VCCAPLL_1P0

0.1U_0402_10V7K
K19
VCCCLK2 +1.0V_CLK2

0.5P_0402_50V8
AB17 $3 A& (') G 2.3
+1.0V_PRIM VCCPRIM_1P0_AB17 2
$3 A& (') G 2.3H G 2.3 Y18 L21
2 VCCPRIM_1P0_Y18 VCCCLK3
AD17 N20
VCCDSW_3P3_AD17 VCCCLK4 +1.0V_CLK4
AD18 $3 A& 5 (') G 2.3
AJ17 VCCDSW_3P3_AD18 L19 +1.0V_PRIM
+3.3V_ALW_DSW VCCDSW_3P3_AJ17 VCCCLK5 +1.0V_CLK5
C AJ19 A10 C
VCCHDA VCCCLK6 $3 A& (') G 2.3
$3 A& @ (') G 2.3 CC216
+1.0V_MPHYPLL AJ16 AN11 CORE_VID0 @ T4950 @
+3V_SPI VCCSPI GPP_B0/CORE_VID0 CORE_VID1 PAD 1
AN13 @ T4951
GPP_B1/CORE_VID1 PAD

1U_0402_6.3V6K
AF20
CC217 AF21 VCCSRAM_1P0
@ T19 VCCSRAM_1P0 2
1 VCCSRAM_1P0
+3VALW_PCH T20
VCCSRAM_1P0
1U_0402_6.3V6K

+1.0V_PRIM AJ21
2 VCCPRIM_3P3_AJ21
+1.0V_MPHYPLL AK20
VCCPRIM_1P0_AK20
$3 A& (') G 2.3
N18
CC218 VCCAPLLEBB
1
SKL-U_BGA1356 15 OF 20
$3 A& - (') G 2.3
1U_0402_6.3V6K

$3 A& (') G 2.3 +3VALW +3VALW +3.3V_ALW_DSW +3VALW_PCH +1.8V_PRIM +1.0V_PRIM


+3VALW_PCH VCCHDA
RC1138 RC214 2 @ 1
2 @ 1
0_0402_5% CC272 CC273
0_0402_5% CC271 CC279 CC280 CC223 CC224 1 1
1 @ 1 @ 1 1 1

1U_0402_6.3V6K

1U_0402_6.3V6K
B B

1U_0402_6.3V6K

22U_0603_6.3V6M

22U_0603_6.3V6M

1U_0402_6.3V6K
0.1U_0402_10V7K
2 2
2 2 2 2 2

$3 A& 5 (') G 2.3

+1.0V_PRIM TO +1.0V_MPHYPLL
+1.0V_PRIM For Volume +1.0V_MPHYPLL +1.0V_PRIM +1.0V_APLL +1.0V_PRIM +1.0V_CLK4 +1.0V_PRIM +1.0V_CLK2 +1.0V_PRIM +1.0V_CLK5
JP17 @
1 2 Imax : 2.766A RC172 2 @ 1 RC173 2 @ 1 RC170 2 @ 1 RC171 2 @ 1
1 2
JUMP_43X79 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5%
CC59 CC58 CC1801 CC225 CC226 CC220 CC221
@
1 @ 1 $3 A& 7 (') G 2.3 RF@ 1 @ 1 $3 A& (') G 2.3 @ 1 $3 A& 5 (') G 2.3 @ 1 $3 A& ! (') G 2.3 1
1U_0402_6.3V6K

0.5P_0402_50V8

0.1U_0603_25V7K

22U_0603_6.3V6M

10U_0402_6.3V6M
0.1U_0402_16V7K

22U_0603_6.3V6M

2 2 2 2 2 2 2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MCP(13/14)PCH PWR
Size Document Number R ev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 17 of 46
5 4 3 2 1
5 4 3 2 1

+1.2V_DDR JDIMM1
+1.2V_DDR
JP? <7> DDR_A_D[0..15]
<7> DDR_A_D[16..31]
1 2 <7> DDR_A_D[32..47]
DDR_A_D1 3 VSS1 VSS2 4 DDR_A_D0 <7> DDR_A_D[48..63]
5 DQ5 DQ4 6
DDR_A_D5 7 VSS3 VSS4 8 DDR_A_D4
9 DQ1 DQ0 10
DDR_A_DQS#0 11 VSS5 VSS6 12
<7> DDR_A_DQS#0 DDR_A_DQS0 13 DQS0_c DM0_n/DBI0_n 14
<7> DDR_A_DQS0 15 DQS0_t VSS7 16 DDR_A_D6
DDR_A_D7 17 VSS8 DQ6 18
19 DQ7 VSS9 20 DDR_A_D2
DDR_A_D3 21 VSS10 DQ2 22
23 DQ3 VSS11 24 DDR_A_D12
D D
DDR_A_D9 25 VSS12 DQ12 26
DQ13 VSS13 DDR_A_D13 Layout Note: Layout Note: Layout Note:
27 28
DDR_A_D8 29 VSS14 DQ8 30 Place near JDIMM1.258 Place near JDIMM1.257,259 Place near JDIMM1.255
31 DQ9 VSS15 32 DDR_A_DQS#1
33 VSS16 DQS1_c 34 DDR_A_DQS1 DDR_A_DQS#1 <7>
35 DM1_n/DBI_n DQS1_t 36 DDR_A_DQS1 <7>
DDR_A_D10 37 VSS17 VSS18 38 DDR_A_D15
39 DQ15 DQ14 40
DDR_A_D11 41 VSS19 VSS20 42 DDR_A_D14
43 DQ10 DQ11 44 +0.6V_DDR_VTT +2.5V_MEM +3VS
DDR_A_D16 45 VSS21 VSS22 46 DDR_A_D21
47 DQ21 DQ20 48
DDR_A_D17 49 VSS23 VSS24 50 DDR_A_D20
51 DQ17 DQ16 52 CD12 CD13 CD14 CD15 CD9 CD10 CD3 CD4 CD16 CD17
DDR_A_DQS#2 53 VSS25 VSS26 54
<7> DDR_A_DQS#2 DDR_A_DQS2 DQS2_c DM2_n/DBI2_n 1 1 1 1 1 1 1 1 1 1
55 56
<7> DDR_A_DQS2 DQS2_t VSS27 DDR_A_D19

10U_0603_6.3V6M

10U_0603_6.3V6M

2.2U_0603_6.3V6K
1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K
57 58
DDR_A_D22 59 VSS28 DQ22 60
61 DQ23 VSS29 62 DDR_A_D23 2 2 2 2 2 2 2 2 2 2
DDR_A_D18 63 VSS30 DQ18 64
65 DQ19 VSS31 66 DDR_A_D28
DDR_A_D24 67 VSS32 DQ28 68
69 DQ29 VSS33 70 DDR_A_D25
DDR_A_D29 71 VSS34 DQ24 72
DQ25 VSS35

73 74 DDR_A_DQS#3
75 VSS36 DQS3_c 76 DDR_A_DQS3 DDR_A_DQS#3 <7>
77 DM3_n/DBI3_n DQS3_t 78 DDR_A_DQS3 <7>
DDR_A_D26 79 VSS37 VSS38 80 DDR_A_D31
81 DQ30 DQ31 82
DDR_A_D30 VSS39 VSS40 DDR_A_D27 Layout Note:
83 84
85 DQ26 DQ27 86 Place near JDIMM1
87 VSS41 VSS42 88
89 CB5/NC CB4/NC 90
91 VSS43 VSS44 92
93 CB1/NC CB0/NC 94
95 VSS45 VSS46 96
C
97 DQS8_c DM8_n/DBI_n/NC 98 C
99 DQS8_t VSS47 100 +1.2V_DDR
101 VSS48 CB6/NC 102
103 CB2/NC VSS49 104
VSS50 CB7/NC
place cap near DIMM RESET PIN
105 106
107 CB3/NC VSS51 108 DDR4_DRAMRST# DDR4_DRAMRST# CD1 CD2 CD75 CD74 CD77 CD76 CD79 CD78
DDR_A_CKE0 109 VSS52 RESET_n 110 DDR_A_CKE1
<7> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 <7> 1 1 1 1 1 1 1 1
111 112
DDR_A_BG1 VDD1 VDD2 DDR_A_ACT#

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
113 114 CD91
<7> DDR_A_BG1 DDR_A_BG0 115 BG1 ACT_n 116 DDR_A_ALERT# DDR_A_ACT# <7>
@ESD@ 1
<7> DDR_A_BG0 117 BG0 ALERT_n 118 DDR_A_ALERT# <7> 2 2 2 2 2 2 2 2
DDR_A_MA12 VDD3 VDD4 DDR_A_MA11

0.1U_0402_16V7K
119 120
<7> DDR_A_MA12 DDR_A_MA9 121 A12 A11 122 DDR_A_MA7 DDR_A_MA11 <7>
<7> DDR_A_MA9 123 A9 A7 124 DDR_A_MA7 <7> 2
DDR_A_MA8 125 VDD5 VDD6 126 DDR_A_MA5
<7> DDR_A_MA8 DDR_A_MA6 127 A8 A5 128 DDR_A_MA4 DDR_A_MA5 <7>
<7> DDR_A_MA6 129 A6 A4 130 DDR_A_MA4 <7>
DDR_A_MA3 131 VDD7 VDD8 132 DDR_A_MA2
<7> DDR_A_MA3 DDR_A_MA1 133 A3 A2 134 DDR_A_MA2 <7>
<7> DDR_A_MA1 135 A1 EVENT_n/NF 136
DDR_A_CLK0 137 VDD9 VDD10 138 DDR_A_CLK1 +1.2V_DDR
<7> DDR_A_CLK0 DDR_A_CLK#0 139 CK0_t CK1_t/NF 140 DDR_A_CLK#1 DDR_A_CLK1 <7>
<7> DDR_A_CLK#0 CK0_c CK1_c/NF DDR_A_CLK#1 <7> All VREF traces should
141 142 have 10 mil trace width
DDR_A_PAR 143 VDD11 VDD12 144 DDR_A_MA0
<7> DDR_A_PAR DDR_A_BS1 145 PARITY A0 146 DDR_A_MA10 DDR_A_MA0 <7>
CD5 CD6 CD7 CD8 CD70 CD71 CD72 CD73 CD11 1
<7> DDR_A_BS1 147 BA1 A10/AP 148 DDR_A_MA10 <7> @
DDR_A_CS#0 VDD13 VDD14 DDR_A_BS0 1 1 1 1 1 1 1 1
149 150 +
<7> DDR_A_CS#0 DDR_A_WE# CS0_n BA0 DDR_A_RAS# DDR_A_BS0 <7>

10U_0603_6.3V6M

10U_0603_6.3V6M

330U_D3_2.5VY_R6M
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
151 152
<7> DDR_A_WE# 153 WE_n/A14 RAS_n/A16 154 DDR_A_RAS# <7>
DDR_A_ODT0 155 VDD15 VDD16 156 DDR_A_CAS# 2 2 2 2 2 2 2 2 2
<7> DDR_A_ODT0 DDR_A_CS#1 157 ODT0 CAS_n/A15 158 DDR_A_MA13 DDR_A_CAS# <7>
<7> DDR_A_CS#1 159 CS1_n A13 160 DDR_A_MA13 <7>
DDR_A_ODT1 161 VDD17 VDD18 162
<7> DDR_A_ODT1 163 ODT1 C0/CS2_n/NC 164 +V_DDR_REFA
165 VDD19 VREFCA 166 DIMM_CHA_SA2
167 C1, CS3_n,NC SA2 168 CD18
DDR_A_D36 169 VSS53 VSS54 170 DDR_A_D33
DQ37 DQ36 1
171 172
DDR_A_D37 VSS55 VSS56 DDR_A_D32
0.1U_0402_16V7K

B 173 174 B
175 DQ33 DQ32 176
DDR_A_DQS#4 177 VSS57 VSS58 178 2 +3VS +3VS +3VS
<7> DDR_A_DQS#4 DDR_A_DQS4 179 DQS4_c DM4_n/DBI4_n 180 +1.2V_DDR
<7> DDR_A_DQS4 181 DQS4_t VSS59 182 DDR_A_D38
VSS60 DQ39

1
1
DDR_A_D39 183 184
185 DQ38 VSS61 186 DDR_A_D35 RD1 RD2 RD3
DDR_A_D34 187 VSS62 DQ35 188 @ @ @
189 DQ34 VSS63 190 DDR_A_D45 0_0402_5% 0_0402_5% 0_0402_5%
DDR_A_D41 191 VSS64 DQ45 192

2
2
193 DQ44 VSS65 194 DDR_A_D44 DIMM_CHA_SA0 DIMM_CHA_SA1 DIMM_CHA_SA2
DDR_A_D40 195 VSS66 DQ41 196
DQ40 VSS67

1
1

1
197 198 DDR_A_DQS#5
199 VSS68 DQS5_c 200 DDR_A_DQS5 DDR_A_DQS#5 <7>
RD28 RD29 RD30
+1.2V_DDR 201 DM5_n/DBI5_n DQS5_t 202 DDR_A_DQS5 <7>
@ @ @
DDR_A_D43 203 VSS69 VSS70 204 DDR_A_D47 0_0402_5% 0_0402_5% 0_0402_5%
205 DQ46 DQ47 206

2
2

2
DDR_A_D42 207 VSS71 VSS72 208 DDR_A_D46
209 DQ42 DQ43 210
DDR_A_D48 211 VSS73 VSS74 212 DDR_A_D53
213 DQ52 DQ53 214
DDR_A_D52 215 VSS75 VSS76 216 DDR_A_D49
217 DQ49 DQ48 218
DDR_A_DQS#6 219 VSS77 VSS78 220 +V_DDR_REFA_R +1.2V_DDR +1.2V_DDR
<7> DDR_A_DQS#6 DDR_A_DQS6 221 DQS6_c DM6_n/DBI6_n 222 +1.2V_DDR
<7> DDR_A_DQS6 223 DQS6_t VSS79 224 DDR_A_D54
VSS80 DQ54 20mil

1
DDR_A_D55 225 226
227 DQ55 VSS81 228 DDR_A_D51 RH206 RD35
DDR_A_D50 229 VSS82 DQ50 230
231 DQ51 VSS83 232 DDR_A_D59 1K_0402_1% 470_0402_1%
DDR_A_D57 233 VSS84 DQ60 234 RH484 RD31

2
235 DQ61 VSS85 236 DDR_A_D58 1 2 +V_DDR_REFA DDR4_DRAMRST# 1 @ 2 H_DRAMRST#
DDR_A_D56 237 VSS86 DQ57 238 <19> DDR4_DRAMRST# H_DRAMRST# <7>
1 2_0402_1% 1
DQ56 VSS87

1
239 240 DDR_A_DQS#7 CH101 CD69 0_0402_5%
241 VSS88 DQS7_c 242 DDR_A_DQS7 DDR_A_DQS#7 <7> @
RH209
+1.2V_DDR 243 DM7_n/DBI7_n DQS7_t 244 DDR_A_DQS7 <7>
0.022U_0402_25V7K 0.1U_0402_16V7K
DDR_A_D60 245 VSS89 VSS90 246 DDR_A_D62 2 1K_0402_1% 2
247 DQ62 DQ63 248 1

2
DDR_A_D61 249 VSS91 VSS92 250 DDR_A_D63 RH211
A
251 DQ58 DQ59 252 A
PCH_SMBCLK 253 VSS93 VSS94 254 PCH_SMBDATA 24.9_0402_1%
<8,19,27,33> PCH_SMBCLK 255 SCL SDA 256 DIMM_CHA_SA0 PCH_SMBDATA <8,19,27,33>
+3VS
2

257 VDDSPD SA0 258


+2.5V_MEM VPP1 VTT DIMM_CHA_SA1 +0.6V_DDR_VTT
259 260
261 VPP2 SA1 262
GND1 GND2

DEREN_40-42271-26001RHF
CONN@ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/01/30 Deciphered Date 2016/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIV DIMMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 18 of 46
5 4 3 2 1
5 4 3 2 1

+1.2V_DDR JDIMM2 +1.2V_DDR


JP? <7> DDR_B_D[0..15]
<7> DDR_B_D[16..31]
1 2 <7> DDR_B_D[32..47]
DDR_B_D13 3 VSS1 VSS2 4 DDR_B_D9 <7> DDR_B_D[48..63]
5 DQ5 DQ4 6
DDR_B_D12 7 VSS3 VSS4 8 DDR_B_D8
9 DQ1 DQ0 10
DDR_B_DQS#1 11 VSS5 VSS6 12
<7> DDR_B_DQS#1 DDR_B_DQS1 13 DQS0_c DM0_n/DBI0_n 14
<7> DDR_B_DQS1 15 DQS0_t VSS7 16 DDR_B_D14
DDR_B_D15 17 VSS8 DQ6 18
19 DQ7 VSS9 20 DDR_B_D11
DDR_B_D10 21 VSS10 DQ2 22
23 DQ3 VSS11 24 DDR_B_D4
D D
DDR_B_D1 25 VSS12 DQ12 26
DQ13 VSS13 DDR_B_D0 Layout Note: Layout Note: Layout Note:
27 28
DDR_B_D5 29 VSS14 DQ8 30 Place near JDIMM2.258 Place near JDIMM2.257,259 Place near JDIMM2.255
31 DQ9 VSS15 32 DDR_B_DQS#0
33 VSS16 DQS1_c 34 DDR_B_DQS0 DDR_B_DQS#0 <7>
35 DM1_n/DBI_n DQS1_t 36 DDR_B_DQS0 <7>
DDR_B_D7 37 VSS17 VSS18 38 DDR_B_D3
39 DQ15 DQ14 40
DDR_B_D6 41 VSS19 VSS20 42 DDR_B_D2
43 DQ10 DQ11 44 +0.6V_DDR_VTT +2.5V_MEM +3VS
DDR_B_D16 45 VSS21 VSS22 46 DDR_B_D21
47 DQ21 DQ20 48
DDR_B_D17 49 VSS23 VSS24 50 DDR_B_D20
51 DQ17 DQ16 52 CD32 CD90 CD89 CD88 CD30 CD31 CD27 CD28 CD34 CD35
DDR_B_DQS#2 53 VSS25 VSS26 54
<7> DDR_B_DQS#2 DDR_B_DQS2 DQS2_c DM2_n/DBI2_n 1 1 1 1 1 1 1 1 1 1
55 56
<7> DDR_B_DQS2 DQS2_t VSS27 DDR_B_D23

2.2U_0603_6.3V6K
1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V7K
57 58
DDR_B_D19 59 VSS28 DQ22 60
61 DQ23 VSS29 62 DDR_B_D18 2 2 2 2 2 2 2 2 2 2
DDR_B_D22 63 VSS30 DQ18 64
65 DQ19 VSS31 66 DDR_B_D25
DDR_B_D29 67 VSS32 DQ28 68
69 DQ29 VSS33 70 DDR_B_D28
DDR_B_D24 71 VSS34 DQ24 72
73 DQ25 VSS35 74 DDR_B_DQS#3
75 VSS36 DQS3_c 76 DDR_B_DQS3 DDR_B_DQS#3 <7>
77 DM3_n/DBI3_n DQS3_t 78 DDR_B_DQS3 <7>
DDR_B_D26 79 VSS37 VSS38 80 DDR_B_D31
81 DQ30 DQ31 82
DDR_B_D30 83 VSS39 VSS40 84 DDR_B_D27
85 DQ26 DQ27 86
VSS41 VSS42 Layout Note:
87 88
89 CB5/NC CB4/NC 90 Place near JDIMM2
91 VSS43 VSS44 92
93 CB1/NC CB0/NC 94
95 VSS45 VSS46 96
97 DQS8_c DM8_n/DBI_n/NC 98
99 DQS8_t VSS47 100
C
101 VSS48 CB6/NC 102 C
103 CB2/NC VSS49 104 +1.2V_DDR
VSS50 CB7/NC
place cap near DIMM RESET PIN
105 106
107 CB3/NC VSS51 108 DDR4_DRAMRST# DDR4_DRAMRST#
DDR_B_CKE0 109 VSS52 RESET_n 110 DDR_B_CKE1 DDR4_DRAMRST# <18>
<7> DDR_B_CKE0 111 CKE0 CKE1 112 DDR_B_CKE1 <7>
CD92 CD19 CD20 CD21 CD22 CD83 CD81 CD80 CD82
DDR_B_BG1 113 VDD1 VDD2 114 DDR_B_ACT# @ESD@ 1
<7> DDR_B_BG1 DDR_B_BG0 BG1 ACT_n DDR_B_ALERT# DDR_B_ACT# <7> 1 1 1 1 1 1 1 1
115 116
<7> DDR_B_BG0 BG0 ALERT_n DDR_B_ALERT# <7>

0.1U_0402_16V7K

1U_0402_6.3V6K
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
117 118
DDR_B_MA12 119 VDD3 VDD4 120 DDR_B_MA11
<7> DDR_B_MA12 DDR_B_MA9 121 A12 A11 122 DDR_B_MA7 DDR_B_MA11 <7> 2 2 2 2 2 2 2 2 2
<7> DDR_B_MA9 123 A9 A7 124 DDR_B_MA7 <7>
DDR_B_MA8 125 VDD5 VDD6 126 DDR_B_MA5
<7> DDR_B_MA8 DDR_B_MA6 127 A8 A5 128 DDR_B_MA4 DDR_B_MA5 <7>
<7> DDR_B_MA6 129 A6 A4 130 DDR_B_MA4 <7>
DDR_B_MA3 131 VDD7 VDD8 132 DDR_B_MA2
<7> DDR_B_MA3 DDR_B_MA1 133 A3 A2 134 DDR_B_MA2 <7>
<7> DDR_B_MA1 135 A1 EVENT_n/NF 136
DDR_B_CLK0 137 VDD9 VDD10 138 DDR_B_CLK1
<7> DDR_B_CLK0 DDR_B_CLK#0 139 CK0_t CK1_t/NF 140 DDR_B_CLK#1 DDR_B_CLK1 <7>
<7> DDR_B_CLK#0 CK0_c CK1_c/NF DDR_B_CLK#1 <7> All VREF traces should
141 142 have 10 mil trace width +1.2V_DDR
DDR_B_PAR 143 VDD11 VDD12 144 DDR_B_MA0
<7> DDR_B_PAR DDR_B_BS1 145 PARITY A0 146 DDR_B_MA10 DDR_B_MA0 <7>
<7> DDR_B_BS1 147 BA1 A10/AP 148 DDR_B_MA10 <7>
DDR_B_CS#0 149 VDD13 VDD14 150 DDR_B_BS0 CD23 CD24 CD25 CD26 CD87 CD85 CD84 CD86 CD33
<7> DDR_B_CS#0 DDR_B_WE# CS0_n BA0 DDR_B_RAS# DDR_B_BS0 <7> 1
151 152 1 1 1 1 1 1 1 1
<7> DDR_B_WE# 153 WE_n/A14 RAS_n/A16 154 DDR_B_RAS# <7> +
DDR_B_ODT0 VDD15 VDD16 DDR_B_CAS#

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

330U_D3_2.5VY_R6M
155 156
<7> DDR_B_ODT0 DDR_B_CS#1 157 ODT0 CAS_n/A15 158 DDR_B_MA13 DDR_B_CAS# <7>
<7> DDR_B_CS#1 159 CS1_n A13 160 DDR_B_MA13 <7> 2 2 2 2 2 2 2 2 2
DDR_B_ODT1 161 VDD17 VDD18 162
<7> DDR_B_ODT1 163 ODT1 C0/CS2_n/NC 164 +V_DDR_REFB
165 VDD19 VREFCA 166 DIMM_CHB_SA2
167 C1, CS3_n,NC SA2 168 CD29
DDR_B_D32 169 VSS53 VSS54 170 DDR_B_D36
DQ37 DQ36 1
171 172
DDR_B_D33 VSS55 VSS56 DDR_B_D37
0.1U_0402_16V7K

173 174
175 DQ33 DQ32 176
DDR_B_DQS#4 177 VSS57 VSS58 178 2
B B
<7> DDR_B_DQS#4 DDR_B_DQS4 179 DQS4_c DM4_n/DBI4_n 180 +1.2V_DDR
<7> DDR_B_DQS4 181 DQS4_t VSS59 182 DDR_B_D39 +3VS +3VS +3VS
DDR_B_D34 183 VSS60 DQ39 184
185 DQ38 VSS61 186 DDR_B_D38
VSS62 DQ35

1
DDR_B_D35 187 188
189 DQ34 VSS63 190 DDR_B_D40 RD4 RD5 RD6
DDR_B_D44 191 VSS64 DQ45 192 @ @ @
193 DQ44 VSS65 194 DDR_B_D41 0_0402_5% 0_0402_5% 0_0402_5%
DDR_B_D45 195 VSS66 DQ41 196

2
197 DQ40 VSS67 198 DDR_B_DQS#5 DIMM_CHB_SA0 DIMM_CHB_SA1 DIMM_CHB_SA2
199 VSS68 DQS5_c 200 DDR_B_DQS5 DDR_B_DQS#5 <7>
+1.2V_DDR DM5_n/DBI5_n DQS5_t DDR_B_DQS5 <7>

1
201 202
DDR_B_D43 203 VSS69 VSS70 204 DDR_B_D46 RD38 RD39 RD40
205 DQ46 DQ47 206 @ @ @
DDR_B_D42 207 VSS71 VSS72 208 DDR_B_D47 0_0402_5% 0_0402_5% 0_0402_5%
209 DQ42 DQ43 210

2
DDR_B_D52 211 VSS73 VSS74 212 DDR_B_D49
213 DQ52 DQ53 214
DDR_B_D53 215 VSS75 VSS76 216 DDR_B_D48
217 DQ49 DQ48 218
DDR_B_DQS#6 219 VSS77 VSS78 220
<7> DDR_B_DQS#6 DDR_B_DQS6 221 DQS6_c DM6_n/DBI6_n 222 +1.2V_DDR
<7> DDR_B_DQS6 223 DQS6_t VSS79 224 DDR_B_D55 +V_DDR_REFB_R +1.2V_DDR
DDR_B_D50 225 VSS80 DQ54 226
227 DQ55 VSS81 228 DDR_B_D54
VSS82 DQ50 20mil

1
DDR_B_D51 229 230
231 DQ51 VSS83 232 DDR_B_D56 RH207
DDR_B_D61 233 VSS84 DQ60 234
235 DQ61 VSS85 236 DDR_B_D57 1K_0402_1%
DDR_B_D60 237 VSS86 DQ57 238 RH485

2
239 DQ56 VSS87 240 DDR_B_DQS#7 1 2 +V_DDR_REFB
241 VSS88 DQS7_c 242 DDR_B_DQS7 DDR_B_DQS#7 <7>
1 2_0402_1%
+1.2V_DDR DM7_n/DBI7_n DQS7_t DDR_B_DQS7 <7>

1
243 244 CH100
DDR_B_D59 245 VSS89 VSS90 246 DDR_B_D63 RH210
247 DQ62 DQ63 248 0.022U_0402_25V7K
DDR_B_D58 249 VSS91 VSS92 250 DDR_B_D62 2 1K_0402_1%
251 DQ58 DQ59 252 1

2
PCH_SMBCLK 253 VSS93 VSS94 254 PCH_SMBDATA RH212
A <8,18,27,33> PCH_SMBCLK 255 SCL SDA 256 DIMM_CHB_SA0 PCH_SMBDATA <8,18,27,33> A
+3VS VDDSPD SA0
257 258 24.9_0402_1%
VPP1 VTT DIMM_CHB_SA1 +0.6V_DDR_VTT
259 260
+2.5V_MEM
2

261 VPP2 SA1 262


GND1 GND2

DEREN_40-42261-26001RHF
CONN@ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/01/30 Deciphered Date 2016/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIV DIMMB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 19 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = Other


' 0 #.% K K 6/."
H1 H3 H4 H5 H6 H7 H8 H9 H10
H_2P8 H_2P8 H_2P8 H_2P5 H_4P0 H_2P5 H_3P6 H_3P4X2P8N H_2P8N

D @ @ @ @ @ @ @ @ @ +19VB 6 & C. D
1

1
EC9701 1 EC9702 1 EC9703 1 EC9708 1 EC9706 1 EC9707 1 EC9709 1 EC9710 1
EMI@ EMI@ EMI@ EMI@ EMI@ EMI@ EMI@ EMI@
HNGFF

1U_0402_25V6K

1000P_0402_50V7K

1U_0402_25V6K

1000P_0402_50V7K

1U_0402_25V6K

1U_0402_25V6K

1000P_0402_50V7K

1000P_0402_50V7K
HCPU1 HCPU2 HCPU3 HCPU4
H_4P2X4P8 H_3P7 H_3P7 H_4P3X3P6 H_3P3 2 2 2 2 2 2 2 2

@
@ @ @ @
1

1
EC9711 1 EC9712 1 EC9749 1 EC9716 1 EC9750 1 EC9751 EC9752 1 EC9753

1
EMI@ EMI@ EMI@ EMI@ EMI@ EMI@ EMI@ EMI@
!"#$% &''

1000P_0402_50V7K

1U_0402_25V6K

1U_0402_25V6K

1000P_0402_50V7K

1000P_0402_50V7K

1U_0402_25V6K

1000P_0402_50V7K

1U_0402_25V6K
2

2
2 2 2 2 2 2

FD1 FD2 FD3 FD4


@ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL

C C
1

Main Func = RTC Main Func = LID Switch

B B

+RTC_VCC +3VLP +RTC_CELL


+3VALW UE7
D2501 3 LID_CLOSE#
W=20mils OUT LID_CLOSE# <22,25>
2 W=20mils 2
R2502 anode 1 VDD 1
W=20mils RTC_PWR cathode 1 GND 1
1 2 3 1 CE1 CE2
1K_0402_5% anode C2503 TCS40DLR_TSOT-23-3
BAS40C_SOT23-3 @ 0.1U_0402_16V7K 0.1U_0402_16V7K
0.47U_0402_6.3V6K 2 2
2
1

Q2505
G

R2504

10M_0402_5% 3 1 RTC_DET#
RTC_DET# <9>
S

D
2

2N7002K_SOT23-3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTC/LID SW/Screw hole/EMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 20 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = Audio +5VS +5VA +1.8V_AVDD


+1.8V_PRIM
moat +1.8V_AVDD

+3VS RA1111 Q6205


2 @ 1
CA51 1 CA71 CA61 1 3 R6511 2 @ 1 0_0402_5%

S
1

1
CA58 1 CA57 1 0_0603_5%

4.7U_0402_6.3V6M
Reserve for HDA issue C2715

1
0.1U_0402_16V7K

4.7U_0603_6.3V6K
LN2306LT1G_SOT23-3

G
2

2
2 2 +5V_PVDD +5VS

0.1U_0402_16V7K

4.7U_0603_6.3V6K

4.7U_0402_6.3V6M
2 2 RA1110 +3VS

2
1 @ 2
CA54 CA53
1 CA56 CA55
1

1
0_0805_5%
D D

0.1U_0402_16V7K

4.7U_0402_6.3V6M

0.1U_0402_16V7K

4.7U_0402_6.3V6M
R6529

2
2 2 2 @ 1 CPVDD
For Pin26
For Pin1 0_0402_5% CA59 CA60 1 Close pin40

1
UA1 @
1 26
DVDD AVDD1

4.7U_0402_6.3V6M

0.1U_0402_16V7K
40

2
9 AVDD2 2
+3VS DVDD-IO
36 CPVDD For Pin41 For Pin46
CPVDD 41
HDA_CODEC_BITCLK 6 PVDD1 46
<12> HDA_CODEC_BITCLK BCLK PVDD2 +3VS
HDA_CODEC_SDOUT 5
<12> HDA_CODEC_SDOUT SDATA-OUT JACK_SENSE#
13 RA13 1 2 100K_0402_5%
HDA_CODEC_SYNC 10 HP/LINE1 JD(JD1) 14
<12> HDA_CODEC_SYNC SYNC MIC2/LINE2 JD(JD2) JACK_PLUG#
For Pin36
RA130 15 RA4 2 1 200K_0402_5%
HDA_SDIN0 1 2 HDA_CODEC_SDIN0 8 SPDIFO/FRONT JD(JD3)/GPIO3
<12> HDA_SDIN0
33_0402_5%
HDA_CODEC_RST#
SDATA-IN Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-
11
<12> HDA_CODEC_RST# RESETB
HPOUT-L(PORT-I-L)
32 HPOUT-L Speaker 4 ohm : 40mil
33 HPOUT-R JSPK
LINE1-R 21 HPOUT-R(PORT-I-R) INT-SPK-R- LA3 1 EMI@ 2 BLM15PD800SN1D SPK_R1-_CONN 1
LINE1-L 22 LINE1-R(PORT-C-R) INT-SPK-R+ LA4 1 EMI@ 2 BLM15PD800SN1D SPK_R2+_CONN 2 1
Line1-VREFO-R 30 LINE1-L(PORT-C-L) INT-SPK-L- LA5 1 EMI@ 2 BLM15PD800SN1D SPK_L1-_CONN 3 2
Line1-VREFO-L 31 LINE1-VREFO-R 42 INT-SPK-L+ INT-SPK-L+ LA6 1 EMI@ 2 BLM15PD800SN1D SPK_L2+_CONN 4 3
23 LINE1-VREFO-L SPK-OUT-L+ 43 INT-SPK-L- CA29 CA30 CA31 CA32 5 4
24 LINE2-R(PORT-E-R) SPK-OUT-L- 45 INT-SPK-R+ EMI@ 1 EMI@ 1 EMI@ 1 EMI@ 1 DA13 DA14 6 G1
LINE2-L(PORT-E-L) SPK-OUT-R+ Close to UA1 G2

3
C 44 INT-SPK-R- @ESD@ @ESD@ C
SPK-OUT-R-
Pin11,13,14,16

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K
RA1114 ACES_50278-00401-001
AUD_PC_BEEP MONO_PC_BEEP_R

AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3
1 @ 2 16 CONN@
+RTC_CELL +MIC2-VREFO MONO-OUT 2 2 2 2 SP02000RR00
0_0402_5% 2 DMIC_DATA
GPIO0/DMIC-DATA DMIC_CLK_C DMIC_CLK DMIC_DATA <25>
29 3 LA1 1 2
MIC2-VREFO GPIO1/DMIC-CLK DMIC_CLK <25>
1

AGND was requested RING2 17 48 EMI@ BLM15PX221SN1D_2P


RA10 by Realtek SLEEVE 18 MIC2-L(PORT-F-L)/RING SPDIF-OUT/GPIO2
MIC2-R(PORT-F-R)/SLEEVE 1
@ CA74 2 1 MIC1-L 19 C6223

1
0_0402_5% +A_VCC 10U_0603_6.3V6M MIC_CAP 37 CBP @RF@
CBP 35 CBN CA24 2 1 10P_0402_50V8J
2

20 CBN 1U_0402_6.3V6K 2
RA14 1 @ 2 100K_0402_5% NC
+3VS EC_MUTE# 47
<22> EC_MUTE# PDB 28 CA23 2 1
RA12 1 2 100K_0402_5% VREF 12 2.2U_0603_6.3V6K
CA62 1 2 10U_0402_6.3V6M LDO1_CAP 27 PCBEEP 34 CPVEE CA25 2 1
CA63 1 2 10U_0402_6.3V6M LDO2_CAP 39 LDO1-CAP CPVEE 1U_0402_6.3V6K
CA64 1 2 10U_0402_6.3V6M LDO3_CAP 7 LDO2-CAP
LDO3-CAP

4 25
DVSS AVSS1 38
49 AVSS2
GND DA8
ALC3234-CG_MQFN48_6X6 2 BEEP
CA65 RA79
BEEP <22> EC Beep
AUD_PC_BEEP 1 2 1 2 PC_BEEP 1
1K_0402_1%
B 0.1U_0402_16V7K 3 SPKR B
SPKR <12> MCU Beep

1
+MIC2-VREFO
1
RA81 CA69 RA19 BAT54C-7-F_SOT23-3
@ @
1K_0402_1% 100P_0402_50V8J 10K_0402_5%
2
2

2
Line1-VREFO-R RA166 1 2 4.7K_0402_5% RA1109 RA53
Line1-VREFO-L RA165 1 2 4.7K_0402_5%
2.2K_0402_5% 2.2K_0402_5%
LINE1-L CA67 1 2 RA80 1 2 1K_0402_1% iPhone and Nokia type Combo Jack
1
1

10U_0603_6.3V6M ESD@
LINE1-R CA68 1 2 RA82 1 2 1K_0402_1% SLEEVE LA7 2 1 BLM15PX330SN1D 0402 B45!% MIC_IN_R JHP
10U_0603_6.3V6M ESD@ MIC_IN_R 3 M/G
RING2 LA10 2 1 BLM15PX330SN1D 0402 B45!% RING2_R AUD_HP_OUT_L_CN 1 L

HPOUT-L RA55 1 2 10_0402_1% Line-IN-L LA8 2 @ 1 0_0402_5% AUD_HP_OUT_L_CN JACK_PLUG# 5


6 RA29 1 @ 2 0_0402_5%
HPOUT-R RA56 1 2 10_0402_1% Line-IN-R LA9 2 @ 1 0_0402_5% AUD_HP_OUT_R_CN AUD_HP_OUT_R_CN 2 R
RING2_R 4 G/M RA30 1 @ 2 0_0402_5%
1

CA33 CA39 CA75 CA38 CA76 CA40 DA10 DA12 7


MS/GND
3

RA84 RA83 EMI@ 1 EMI@ 1 @EMI@1 ESD@ 1 @EMI@1 ESD@ 1 ESD@ ESD@ RA31 1 @ 2 0_0402_5%
@ @ SINGA_2SJ3095-085111F
33P_0402_50V8J

680P_0402_50V7K
33P_0402_50V8J

680P_0402_50V7K

AZ5125-02S.R7G_SOT23-3
33P_0402_50V8J

AZ5123-02S.R7G_SOT23-3
33P_0402_50V8J

10K_0402_5% 10K_0402_5% CONN@ RA32 1 @ 2 0_0402_5%


DC021512080
2

UA1 2 2 2 2 2 2 RA1115 1 @EMI@ 2 0.1U_0402_16V7K

SA00008GJ00 RA1116 1 @EMI@ 2 0.1U_0402_16V7K


1

A A

S IC ALC3246-CG MQFN 48P AUDIO CODEC


GNDA GND
!""#$%&'( Place on the moat between GND & GNDA.
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/04/01 Deciphered Date 2015/04/30 Title
! 7 + 7 0 71 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Audio Codec ALC3246
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
! : : : ! 7 7 0 71 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 21 of 46
5 4 3 2 1
5 4 3 2 1

+3VALW +3VALW +3VALW_EC


RPE2 RE343 UE1 EC@
5 4 KSI0 2 @ 1 +1.0V_PRIM Model ID Board ID
6 3 KSI1 +3VALW_EC +3VALW_EC +3VALW_EC
7 2 KSI2 0_0402_5%
CE89 1 CE62 1 CE63 2 CE64 2 CE65 CE66 CE67 CE68 CE69 RE349 VREF_CPU EC Chip CPN

1
8 1 KSI3 2 @ 1 +RTC_CELL_VBAT
+RTC_CELL

1
10U_0603_6.3V6M

0.1U_0402_10V7K

1000P_0402_50V7K

1000P_0402_50V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
1 CE77

1
10K_8P4R_5% 0_0402_5% MEC1404-NU-D0_VTQFP128_14X14 R2446 RE345

2
2 2 1 1

0.1U_0402_16V7K
RPE3 CE73 SA000084410 DIS @ Ra @
5 4 KSI4 0.1U_0402_10V7K 100K_0402_1% 100K_0402_1%

2
6 3 KSI5 2

2
122

103
7 2 KSI6 MODEL_ID BOARD_ID

43
82

19
65
5
8 1 KSI7 UE1 CE71

2
54 1 2 C2403 1 CE70 1

VTR
VTR
VTR
VTR
VTR
VTR
VBAT
10K_8P4R_5% VTR_33_18 R2407 RE347

0.1U_0402_10V7K

0.1U_0402_10V7K
RPE4 0.1U_0402_16V7K UMA Rb
D
1 8 KSO0 KSO0 2 100K_0402_1% 100K_0402_1% D
2 7 KSO1 KSO1 14 GPIO027/KSO00/PVT_IO1 8 PBAT_CHG_SMBDAT 2 2

1
3 6 KSO2 KSO2 15 GPIO015/KSO01/PVT_nCS GPIO007/SMB01_DATA/SMB01_DATA18 9 PBAT_CHG_SMBCLK PBAT_CHG_SMBDAT <36,37>
4 5 <34> KSI[0..7] 16 GPIO016/KSO02/PVT_SCLK GPIO010/SMB01_CLK/SMB01_CLK18 11 GPU_THM_SMBDAT PBAT_CHG_SMBCLK <36,37>
KSO3 KSO3
<34> KSO[0..16] 37 GPIO017/KSO03/PVT_IO0 GPIO012/SMB02_DATA/SMB02_DATA18 12 GPU_THM_SMBCLK GPU_THM_SMBDAT <8,34>
KSO4
100K_8P4R_5% SATA_LED_EN KSO5 38 GPIO045/BCM_nINT1/KSO04 GPIO013/SMB02_CLK/SMB02_CLK18 89 SYS_PWROK GPU_THM_SMBCLK <8,34> EC_AGND EC_AGND
<25> SATA_LED_EN 39 GPIO046/BCM_DAT1/KSO05 GPIO130/SMB03_DATA/SMB03_DATA18 91 L_BKLT_EN_EC SYS_PWROK <11>
RPE5 KSO6
1 8 PECI_EC 50 GPIO047/BCM_CLK1/KSO06 GPIO131/SMB03_CLK/SMB03_CLK18 96 SIO_SLP_SUS# L_BKLT_EN_EC <6>
KSO4 KSO7
2 7 <12> PECI_EC 46 GPIO025/KSO07/PVT_IO2 GPIO141/SMB04_DATA/SMB04_DATA18 97 PBAT_PRES# SIO_SLP_SUS# <11>
KSO5 KSO8 RE345 EC@ SD034100280 10K_0402_1%
3 6 KSO6 USB_PWR_SHR_EN_L# KSO9 68 GPIO055/PWM2/KSO08/PVT_IO3 GPIO142/SMB04_CLK/SMB04_CLK18 RE441 1 2 10K_0402_5% PBAT_PRES# <36,37> SD034137280 13.7K_0402_1%
<24> USB_PWR_SHR_EN_L# GPIO102/KSO09/CR_STRAP FAN1_TACH +3VS 1
4 5 KSO7 KSO10 72 40 CE76 SD034178280 17.8K_0402_1%
USBCHG_DET# 74 GPIO106/KSO10 GPIO050/TACH0 41 LID_CLOSE# FAN1_TACH <34>
KSO11 SD034221280 22.1K_0402_1%
<23> USBCHG_DET# 75 GPIO110/KSO11 GPIO051/TACH1
100K_8P4R_5% KSO12 100P_0402_50V8J SD034270280 27K_0402_1%
RPE6 USB_POWERSHARE_VBUS_EN KSO13 76 GPIO111/KSO12 44 KB_LED_PWM 2 SD034324280 32.4K_0402_1%
1 8 KSO10
<24> USB_POWERSHARE_VBUS_EN
KSO14 77 GPIO112/PS2_CLK1A/KSO13 MEC1404 GPIO053/PWM0 45 BEEP
KB_LED_PWM <34>
22.1K_0402_1% SD034374280 37.4K_0402_1%
GPIO113/PS2_DAT1A/KSO14 GPIO054/PWM1 BEEP <21>
2 7 KSO11 KSO15 86 SD034499280 49.9K_0402_1%
3 6 KSO12 KSO16 92 GPIO125/KSO15 47 FAN1_PWM
4 5 KSO13 CAP_LED# 93 GPIO132/KSO16 GPIO056/PWM3 34 SUSACK#
FAN1_PWM <34> SD034221280 SD034576280 57.6K_0402_1%
SD034649280 64.9K_0402_1%
<34> CAP_LED# GPIO140/KSO17 GPIO030/BCM_nINT0/PWM4 35 EC_WAKE#
RE345 For SD00000B180 73.2K_0402_1%
98 GPIO031/BCM_DAT0/PWM5 36 PS_ID EC_WAKE# <11>
100K_8P4R_5% RE448 KSI0 Board ID Select SD000002780 82.5K_0402_1%
USB_POWERSHARE_VBUS_EN PCH_ALW_ON GPIO143/KSI0/nDTR GPIO032/BCM_CLK0/PWM6 PCIE_WAKE# PS_ID <36>
RPE7 1 @ 2 KSI1 99 4 SD034931280 93.1K_0402_1%
1 8 6 GPIO144/KSI1/nDCD GPIO002/PWM7 PCIE_WAKE# <11,30>
KSO8 KSI2 SD034107380 107K_0402_1%
2 7 KSO15 0_0402_5% KSI3 7 GPIO005/SMB00_DATA/SMB00_DATA18/KSI2 1 BAT1_LED# SD034120380 120K_0402_1%
3 6 104 GPIO006/SMB00_CLK/SMB00_CLK18/KSI3 GPIO157/LED0/TST_CLK_OUT 106 BAT2_LED# BAT1_LED# <25>
KSO14 KSI4 EVT 10K SD034137380 137K_0402_1%
4 5 105 GPIO147/KSI4/nDSR GPIO156/LED1 70 BREATH_LED# BAT2_LED# <25>
KSO16 RE449 KSI5 DVT1.0 13.7K SD034154380 154K_0402_1%
USB_PWR_SHR_EN_L# GPIO150/KSI5/nRI GPIO104/LED2 BREATH_LED# <33>
SUSACK# 2 @ 1 KSI6 107 DVT2.0 17.8K SD034200380 200K_0402_1%
100K_8P4R_5% KSI7 108 GPIO151/KSI6/nRTS 80 ME_FWP_EC Pilot 22.1K SD034232380 232K_0402_1%
GPIO152/KSI7/nCTS GPIO116/TFDP_DATA/UART_RX 81 HOST_DEBUG_TX ME_FWP_EC <12>
0_0402_5%
CLK_TP_SIO 78 GPIO117/TFDP_CLK/UART_TX HOST_DEBUG_TX <29>
RE389 SD034100380 100K_0402_1%
2 1 <34> CLK_TP_SIO DAT_TP_SIO 79 GPIO114/PS2_CLK0 90 PTP_DIS#_R 2 1 0_0402_5% PTP_DIS#
KSO9 RE434 @
<34> DAT_TP_SIO SIO_PWRBTN# GPIO115/PS2_DAT0 GPIO035/SB-TSI_CLK PECI_MEC1404 PECI_EC PTP_DIS# <34>
100K_0402_5% 52 94 RE353 1 2 43_0402_1%
<11> SIO_PWRBTN# PCH_RSMRST# 88 GPIO026/PS2_CLK1B GPIO033/PECI_DAT/SB_TSI_DAT
RE388
2 1 USB_EN# <11> PCH_RSMRST# GPIO127/PS2_DAT1B 95 VREF_CPU
100K_0402_5% LPC_LAD0 59 VREF_CPU
RE408 <8,32> LPC_LAD0 LPC_LAD1 60 GPIO040/LAD0 101 ICSP_CLK RE435 2 @ 1 0_0402_5% EC_MUTE#
2 1 BAT1_LED# <8,32> LPC_LAD1 LPC_LAD2 61 GPIO041/LAD1 GPIO145/ICSP_CLOCK 102 ICSP_DAT RE436 2 @ 1 0_0402_5% PTP_DIS#
C
100K_0402_5% <8,32> LPC_LAD2 LPC_LAD3 62 GPIO042/LAD2 GPIO146/ICSP_DATA 87 ICSP_CLR C
RE409 <8,32> LPC_LAD3 LPC_LFRAME# 58 GPIO043/LAD3 ICSP_MCLR
2 1 BAT2_LED# <8,32> LPC_LFRAME# PCH_PLTRST#_EC 56 GPIO044/nLFRAME 119 EC_MUTE#_R 2 1 0_0402_5% EC_MUTE#
RE433 @ RE356
<11,25,29,30,32> PCH_PLTRST#_EC CLK_PCI_LPC_MEC 57 GPIO064/nLRESET BGPO/GPIO004 120 EC_MUTE# <21> 1 2
100K_0402_5% +3VLP
<8,32> CLK_PCI_LPC_MEC GPIO034/PCI_CLK SYSPWR_PRES/GPIO003
RE446 CLKRUN# 63 121 ALWON 1K_0402_5%
<8> CLKRUN# GPIO067/nCLKRUN VCI_OUT/GPIO036 ALWON <38>

1
2 @ 1 PCH_ALW_ON SERIRQ 55 126 USBCHG_DET# RE437 1 2 100K_0402_5%
<8,32> SERIRQ SIO_EXT_SMI# GPIO063/SER_IRQ nVCI_IN1/GPIO162 POWER_SW_IN# +RTC_CELL +3VALW_EC
100K_0402_5% 10 127 RE358
<6> SIO_EXT_SMI# TP_PW_EN# 49 GPIO011/nSMI/nEMI_INT nVCI_IN0/GPIO163 128 ACAV_IN
1 PCH_RSMRST# <34> TP_PW_EN# SIO_RCIN# 53 GPIO060/KBRST VCI_OVRD_IN/GPIO164 ACAV_IN <11,36,37> PBAT_CHG_SMBDAT
CC1810 2 RE413 near UC1E, the R/C need between EC ball out and VIA 100K_0402_5% RE424 1 2
<8> SIO_RCIN# SIO_EXT_SCI# GPIO061/nLPCPD SIO_SLP_S3# +3VALW_EC
@ESD@ 100P_0402_50V8J CC1805 1 2 22P_0402_50V8J 66 23 4.7K_0402_5%

2
<10> SIO_EXT_SCI# GPIO100/nEC_SCI GPIO160/DAC_0 24 GC6_THM_DIS# SIO_SLP_S3# <11,16,35,44> PBAT_CHG_SMBCLK 1 2
@EMI@ RE425
EC_SPICLK_R RE413 1 EMI@ 2 15_0402_1% EC_SPI_CLK 32 GPIO161/DAC_1 22 4.7K_0402_5%
Close to EC side <8,32> EC_SPICLK_R EC_MOSI_R RE414 1 2 15_0402_1% EC_SPI_MOSI 28 GPIO126/SHD_SCLK DAC_VREF
<8> EC_MOSI_R GPIO133/SHD_IO0

1
EC_MISO_R RE416 1 2 15_0402_1% EC_SPI_MISO 29 85 CMP_VOUT0 CE79
<8> EC_MISO_R SATA_LED# SATA_LED_EN GPIO134/SHD_IO1 GPIO124/CMP_VOUT0 CMP_VIN0 VCIN0_PH CMP_VOUT0 <38>
R2405 1 @ 2 0_0402_5% 30 20 RE394 2 @ 1
<10,25> SATA_LED# RTCRST_ON 31 GPIO135/SHD_IO2 GPIO020/CMP_VIN0 25 VCIN0_PH <34>
VCREF0 0_0402_5% 0.1U_0402_16V7K
<11> RTCRST_ON

2
EC_SPICS#_R RE410 2 @ 1 0_0402_5% EC_SPI_CS0# 27 GPIO136/SHD_IO3 GPIO165/CMP_VREF0 PCIE_WAKE# RE354 2 1
<8> EC_SPICS#_R GPIO123/SHD_nCS 83 H_PROCHOT_EC 10K_0402_5%
SIO_SLP_S4# 67 GPIO120/CMP_VOUT1 21 GPU_PWR_LEVEL TOUCHPAD_INTR# RE440 1 2
<11,16,39,41> SIO_SLP_S4# AC_DIS GPIO101/SPI_CLK GPIO021/CMP_VIN1 LCD_TST
69 26 100K_0402_5%
<37> AC_DIS PCH_ALW_ON 71 GPIO103/SPI_IO0 GPIO166/CMP_VREF1/UART_CLK LCD_TST <25>
ME_SUS_PWR_ACK 42 GPIO105/SPI_IO1 118 CMP_STRAP0 RE385 1 2 10K_0402_5% RESET_OUT# RE367 1 2
<11> ME_SUS_PWR_ACK TOUCHPAD_INTR# GPIO052/SPI_IO2 GPIO024/CMP_STRAP0 PANEL_BKEN_EC +3VALW
33 117 10K_0402_5%
<12,34> TOUCHPAD_INTR# LAN_EN 3 GPIO062/SPI_IO3 GPIO023/ADC6/A20M 116 SIO_EXT_WAKE# PANEL_BKEN_EC <25> ME_FWP_EC 1 2
RE357 @
<30> LAN_EN GPIO001/SPI_nCS/32KHZ_OUT GPIO022/ADC5 MODEL_ID SIO_EXT_WAKE# <9>
109 1K_0402_5%
USB_EN# 13 GPIO153/ADC4 110 I_ADP_R PCH_RSMRST# RE355 1 2
<24> USB_EN# ALL_SYS_PWRGD 2 1 0_0402_5% 48 nRESET_IN/GPIO014 GPIO154/ADC3 111 BOARD_ID
RE438 @ RUNPWROK RE442 10K_0402_5%
<11,38> ALL_SYS_PWRGD GPIO057/VCC_PWRGD GPIO155/ADC2

VSS_VBAT
RESET_OUT# 73 113 LCD_VCC_TEST_EN 2 @ 1 LCD_VCC_TEST_EN_R GC6_THM_DIS# RE450 1 2
<11> RESET_OUT# GPIO107/nRESET_OUT GPIO122/ADC1 I_BATT_R LCD_VCC_TEST_EN_R <25>

VR_CAP
114 10K_0402_5%
MEC_XTAL2 GPIO121/ADC0 GPU_PWR_LEVEL

AVSS
SUSCLK RE368 2 @ 1 0_0402_5% 125 115 0_0402_5% RE451 1 2

VSS

VSS
VSS
VSS
VSS
<11,29> SUSCLK MEC_XTAL1 2 @ 1 0_0402_5% MEC_XTAL1_R 123 XTAL2 ADC_VREF
RE366 10K_0402_5%
XTAL1
@ MEC1404-NU-TR_VTQFP128_14X14 SW1 @

84

64
100
124

51
17

112

18
SMT1-05-A_4P
1 3 POWER_SW#_MB
B 5*I 3 $9 @ T4931 +RTC_CELL B

EC_AGND
+3VALW_EC 2 4
+3VS Y1

1
MEC_XTAL1 1 2 MEC_XTAL2

0.1U_0402_16V7K

6
5
@ RE398 VR_CAP 1 2 RE31

1
1 CE85 32.768KHZ_9PF_X1A000141000200 2 @ 1

CE81
1 20ppm / 9pF 1 C5224 1U_0603_16V7 100K_0402_5%
C5225 ESR <50kohm (MAX) C5226 0_0603_5% G 2 %2A

2
0.1U_0402_10V7K @ @ RE428
UE6 2 10P_0402_50V8J 10P_0402_50V8J
3 A& 3 A& POWER_SW_IN# 1 2 POWER_SW#_MB
POWER_SW#_MB <33>
5

SN74LVC1G06DCKR_SC70-5 2 2 EC_AGND EC_AGND 100_0402_5%


2
P

H_PROCHOT# 4 2 H_PROCHOT_EC C6218


<12,36,37,42> H_PROCHOT# Y A +3VALW
NC

2
G

1U_0603_16V7 +3VALW
1 1
CE86 RE380
1

1
47P_0402_50V8J 100K_0402_5% RE25
2 RE404
1

10K_0402_5%
100K_0402_5%
2

LID_CLOSE# RE399 RE392


LID_CLOSE# <20,25>

2
I_ADP_R 1 2 I_ADP CMP_VIN0 1 @ 2 CMP_VOUT0
I_ADP <37>
1

CE8 +3VALW 300_0402_5% 100K_0402_5%


@ 1
0.047U_0402_16V4Z CE87
2

+3VALW 1 RE396 2200P_0402_25V7K


2
10K_0402_1% PCH_PLTRST#_EC CE72 1 2
+3VALW EC_AGND @ 0.047U_0402_16V4Z
2

RE71 RE72 RE73 RE74 RE75 VCREF0 FAN1_TACH CE75 1 2


1
1

100K_0402_5%
10K_0402_5%

10K_0402_5%

10K_0402_5%

JDEG1 49.9_0402_1% RE400 220P_0402_50V8J


1

JDB1 +3VS 1 2 1 CE91 I_BATT_R 1 2 I_BATT SIO_SLP_S3# CE74 1 2


1 I_BATT <37>
1

2 JTAG_TDI RE420 2 @ 1 0_0402_5% ICSP_CLK @ @ RE397 300_0402_5% @ 0.1U_0402_10V7K


12 10 2 3 JTAG_TMS RE421 2 @ 1 0_0402_5% ICSP_CLR RESET_OUT# CE82 1 2
A
GND 10 3 JTAG_CLK 1 A
11 9 4 RE422 2 @ 1 0_0402_5% @ T4932 0.1U_0402_16V7K 10K_0402_1% CE88 @ 1000P_0402_50V7K
2

2
2

GND 9 8 LPC_LAD0 4 5 JTAG_TDO RE423 2 @ 1 0_0402_5% ICSP_DAT ACAV_IN CE84 2 1


2

8 7 LPC_LAD1 5 6 MSCLK 2200P_0402_25V7K 100P_0402_50V8J


7 6 LPC_LAD2 6 7 MSDATA 2
6 5 LPC_LAD3 7 8 HOST_DEBUG_TX
5 4 LPC_LFRAME# 8 9 EC_AGND
Close to UE1 each pin
4 3 PCH_PLTRST#_EC 9 10
3 2 10
2 1 CLK_PCI_LPDEBUG Pin8 5085_TXD for EC Debug
1
ACES_51522-01001-001
CLK_PCI_LPDEBUG <8>
GND1
11
12
pin9 5048_TXD for SBIOS
debug
Security Classification Compal Secret Data Compal Electronics, Inc.
GND2 Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title
CONN@
4;44;N 44 EC MEC1404
4;44; 44 ACES_50521-01041-P01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number R ev
CONN@ !7H ( AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-D822P 1.0
!7H ( SP01001QL00 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 22 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = USB3.0 Port1/Port2 USB3.0 90ohm


Main SM070003V00(S COM FI_ INPAQ HCM1012GH900BP)
2nd SM070004000(S COM FI_ TAIYO MCF12102G900-T)
3rd SM070004300(S COM FI_ PANASONIC EXC24CH900U)

R3408 2 @ 1 0_0402_5%
USB3_CTX_DRX_P1 C3404 1 2 USB3_CTX_DRX_P1_R USB3_CTX_DRX_P1_C +USB30_VCCA
<10> USB3_CTX_DRX_P1
0.1U_0402_16V7K JUSB1
1
USB3_CTX_DRX_N1 C3403 1 2 USB3_CTX_DRX_N1_R USB3_CTX_DRX_N1_C USB_PP1_CHR_C 3 VBUS
<10> USB3_CTX_DRX_N1 USB_PN1_CHR_C D+
0.1U_0402_16V7K R3409 2 @ 1 0_0402_5% 2
USB3_CRX_DTX_P1_C 6 D-
D D
USB3_CRX_DTX_N1_C 5 SSRX+
USB3_CTX_DRX_P1_C 9 SSRX-
USB3_CTX_DRX_N1_C 8 SSTX+ 11
USBCHG_DET# R6531 1 @ESD@ 2 10 SSTX- GND 12
<22> USBCHG_DET# DET# GND
USB3.0 90ohm 0_0402_5% 4 13
7 GND GND 14
Main SM070003V00(S COM FI_ INPAQ HCM1012GH900BP) 2 GND GND
C6220
2nd SM070004000(S COM FI_ TAIYO MCF12102G900-T) ESD@ TAIWI_USB034-107CRL-TWD
3rd SM070004300(S COM FI_ PANASONIC EXC24CH900U) 0.1U_0402_16V7K CONN@
1

R3410 2 @ 1 0_0402_5%
USB3_CRX_DTX_P1 USB3_CRX_DTX_P1_C
<10> USB3_CRX_DTX_P1

USB3_CRX_DTX_N1 USB3_CRX_DTX_N1_C U3402


<10> USB3_CRX_DTX_N1 USB3_CRX_DTX_N1_C USB3_CRX_DTX_N1_C USB_PP1_CHR_C
R3411 2 @ 1 0_0402_5% 1 9
USB_PN1_CHR_C
USB3_CRX_DTX_P1_C 2 8 USB3_CRX_DTX_P1_C

3
EU3403
USB3_CTX_DRX_N1_C 4 7 USB3_CTX_DRX_N1_C ESD@

3
USB2.0 90ohm AZC199-02SPR7G_SOT23-3
USB3_CTX_DRX_P1_C 5 6 USB3_CTX_DRX_P1_C
Main SM070003Z00(S COM FI_ INPAQ MCM1012B900F06BP)

1
2nd SM070004U00(S COM FI_ MURATA DLM11SN900HY2L) 3

1
3rd SM070004400(S COM FI_ PANASONIC EXC24CQ900U)
8

C TR3404 EMI@ L05ESDL5V0NA-4_SLP2510P8-10-9 C


USB_PN1_CHR 2 1 USB_PN1_CHR_C ESD@
<24> USB_PN1_CHR

USB_PP1_CHR 3 4 USB_PP1_CHR_C
<24> USB_PP1_CHR
EXC24CQ900U_4P

R3416 2 @ 1 0_0402_5%
USB3_CTX_DRX_P2 C3405 1 2 USB3_CTX_DRX_P2_R USB3_CTX_DRX_P2_C
<10> USB3_CTX_DRX_P2
0.1U_0402_16V7K

USB3_CTX_DRX_N2 C3406 1 2 USB3_CTX_DRX_N2_R USB3_CTX_DRX_N2_C +USB30_VCCB


<10> USB3_CTX_DRX_N2
0.1U_0402_16V7K R3419 2 @ 1 0_0402_5% JUSB2
1
USB_PN2_C 2 VBUS
USB_PP2_C 3 D-
4 D+
USB3_CRX_DTX_N2_C 5 GND
USB3_CRX_DTX_P2_C 6 StdA-SSRX- 10
B 7 StdA-SSRX+ GND 11 B
R3418 2 @ 1 0_0402_5% USB3_CTX_DRX_N2_C 8 GND-DRAIN GND 12
USB3_CRX_DTX_P2 USB3_CRX_DTX_P2_C USB3_CTX_DRX_P2_C 9 StdA-SSTX- GND 13
<10> USB3_CRX_DTX_P2 StdA-SSTX+ GND
TAITW_PUBAUN-09FLBS1NN4H0
USB3_CRX_DTX_N2 USB3_CRX_DTX_N2_C CONN@
<10> USB3_CRX_DTX_N2
R3417 2 @ 1 0_0402_5%

U3403
USB3_CRX_DTX_N2_C 1 9 USB3_CRX_DTX_N2_C USB_PN2_C
USB_PP2_C
USB3_CRX_DTX_P2_C 2 8 USB3_CRX_DTX_P2_C

3
EU3404
USB3_CTX_DRX_N2_C 4 7 USB3_CTX_DRX_N2_C ESD@

3
TR3405 EMI@ AZC199-02SPR7G_SOT23-3
USB_PN2 2 1 USB_PN2_C USB3_CTX_DRX_P2_C 5 6 USB3_CTX_DRX_P2_C
<10> USB_PN2

1
3

1
USB_PP2 3 4 USB_PP2_C
<10> USB_PP2 8
EXC24CQ900U_4P
L05ESDL5V0NA-4_SLP2510P8-10-9
ESD@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0 CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 23 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = USB3.0 Port2


USB_EN#
<22> USB_EN#
+USB30_VCCB

+5VALW +USB30_VCCB
U3504 C3507 C3513 TC3501
5 1 1 @
IN OUT

1
0.1U_0402_16V7K

22U_0805_6.3V6M

SC100U6D3V6MX-GP
D C3510 2 D
GND

2
USB_EN# USB_OC#0 2

1U_0402_10V6K
4 3
EN FLG USB_OC#0 <10>

2
EM5203J-20_SOT25-5

Main Func = USB3.0 Port3 / USB2.0 Port

+5VALW +USB30_VCCC
U3505
5 1
IN OUT
C3504 2
GND
1
USB_EN# 4 3 USB_OC#1
EN FLG USB_OC#1 <10>
0.1U_0402_16V7K

C C
EM5203J-20_SOT25-5
2

Main Func = USB Chager

+5VALW

CUS20 1 2 +USB30_VCCA
CHG@ 0.1U_0402_16V7K +USB30_VCCA

B
W=80mils UUS5 W=80mils B
1 12 C3508 C3512 TC3502
IN OUT @

1
USB_OC#0 13 9
FAULT# STATUS#

1U_0402_10V6K

22U_0805_6.3V6M

SC100U6D3V6MX-GP
USB_PN1 2 11 USB_PN1_CHR

2
<10> USB_PN1 USB_PP1 3 DM_OUT DM_IN 10 USB_PP1_CHR USB_PN1_CHR <23>
<10> USB_PP1 DP_OUT DP_IN USB_PP1_CHR <23>
4 15 UUS5_ILIM_L RUS26 1 CHG@ 2 80.6K_0402_1%
+5VALW USB_POWERSHARE_VBUS_EN ILIM_SEL ILIM_LO UUS5_ILIM_H
5 16 RUS27 1 CHG@ 2 30K_0402_1%
<22> USB_POWERSHARE_VBUS_EN EN ILIM_HI
UUS5_CTL1 6
7 CTL1 14
8 CTL2 GND 17
+5VALW CTL3 GPAD
TPS2546RTER_QFN16_3X3
@

RUS29
USB_PWR_SHR_EN_L# 1 @ 2 UUS5_CTL1
<22> USB_PWR_SHR_EN_L#
0_0402_5%

USB_POWERSHARE_VBUS_EN 1
R6532
2
!""#$%&'(
1M_0402_5%
UUS5

SA000070N00
A Charger CT CTL1 CTL2 CTL3 ILIM_SEL A
EC GPIO GPXIOA07(pin104) GPIO22(pin41) GPXIOA11(pin108) GPIO21(pin40) CHG@
S0/S3(CDP) 1 1 1 1
S4/S5(DCP) 0 1 1 1 S IC TPS2544RTER WQFN 16P PWR SW

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Power SW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 24 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = LCD Main Func = CAM


+3VS +3VS +3.3V_CAM
LCDVDD 1
R5229
@ 2
+LCDVDD +LCDVDD +LCDVDD_LCD
1 U5201
C5204 R5211 0_0603_5% EC5210 C5207
4 3 2 @ 1 @
4.7U_0603_6.3V6K 5 VIN VOUT Layout Note: 1 1
2 VIN

33P_0402_50V8J

4.7U_0603_6.3V6K
D5201 Trace width = 80mil 0_0805_5%
EDP_VDD_EN 2
<6> EDP_VDD_EN 2 2
1 LCDVDD_EN 1 2
EN GND

2
LCD_VCC_TEST_EN_R 3 RT9724GB_SOT23-5
<22> LCD_VCC_TEST_EN_R
R5202
D
BAT54C-7-F_SOT23-3 D
JEDP 100K_0402_5%
1 EDP_TX1_DN_C TR5209 EMI@

1
41 1 2 EDP_TX1_DP_C USB_PN5_C 1 2 USB_PN5
42 G1 2 3 USB_PN5 <10>
G2 3 4 EDP_TX0_DN_C
4 5 EDP_TX0_DP_C USB_PP5_C 4 3 USB_PP5
5 6 USB_PP5 <10>
6 7 EDP_AUX_DN_C EXC24CQ900U_4P
7 8 EDP_AUX_DP_C
8 9 +19VB +DCBATOUT_LCD
9 10 DBC_EN_R +LCDVDD_LCD F5201
10 11 1 2 ;9 +19VB +IR_LED+
11 12
12
Trace width = 80mil @ C5205 C5202 R6528
13 SMD1812P150TF/24 1.5A UL/CSA/TUV @ 2 1 2 @ 1
13 14 LCD_TST_C C5201 C5206 DMIC_CLK_EDP 1 2 33_0402_5% DMIC_CLK
14 1 C6219 R5207
DMIC_CLK <21>

2
EDP_HPD DMIC_DATA_EDP DMIC_DATA

0.1U_0603_50V6K

1000P_0402_50V7K
15 0_0402_5% R5215 1 2 33_0402_5%
15 BLON_OUT_C EDP_HPD <6> DMIC_DATA <21>

1U_0402_10V6K

1U_0402_10V6K

10P_0402_50V8J
16 R5214
16 17 LCD_BRIGHTNESS 1 @ 2 1 2 EC5205 EC5206

1
17 18 2 R6530 @
18 IR_LED- 1 @ 1
19 0_0805_5% CO-LAY 1 @ 2
19

6.8P_0402_50V8D

6.8P_0402_50V8D
20
20 21 USB_PP7_C 0_0402_5%
21
22
22
23
USB_PN7_C INVERTER POWER 2 2

23 TP_RS +TPAN_VDD
24
24 25 TP_RESET
25 26
26 27 DMIC_CLK_EDP
27 28 DMIC_DATA_EDP
28 29
29
30
31
30
31 USB_PN5_C
USB_PP5_C
+3.3V_CAM
Main Func = TS
32
32 33 DZ1704
33 34 IR_CAM_DET#_D 1 2 IR_CAM_DET# EDP_TX0_DN C5203 1 2 0.1U_0402_16V7K EDP_TX0_DN_C .<'# $7 % +5VS +TPAN_VDD
C 34 35 IR_LED- ASTRO@ IR_CAM_DET# <9> <6> EDP_TX0_DN EDP_TX0_DP 1 2 0.1U_0402_16V7K EDP_TX0_DP_C C
RB751S40T1G_SOD523-2 C5210 F5203
35 36 <6> EDP_TX0_DP 1 2
36 37 EDP_TX1_DN C5211 1 2 0.1U_0402_16V7K EDP_TX1_DN_C @
37 38 <6> EDP_TX1_DN EDP_TX1_DP 1 2 0.1U_0402_16V7K EDP_TX1_DP_C
38
Trace width = 80mil +DCBATOUT_LCD <6> EDP_TX1_DP
C5213 1.1A_24V_SMD1812P110TF-24
39
39 40 EDP_AUX_DN C5209 1 2 0.1U_0402_16V7K EDP_AUX_DN_C R5232
40 +IR_LED+ <6> EDP_AUX_DN EDP_AUX_DP EDP_AUX_DP_C
C5212 1 2 0.1U_0402_16V7K 2 @ 1
ACES_51540-04001-P01 <6> EDP_AUX_DP
CONN@ 0_0603_5% CO-LAY
SP010029F00
Brightness R5206
L_BKLT_CTRL 1 @ 2 eDP_BKLT_CTRL
<6> L_BKLT_CTRL
0_0402_5%
R5205
TP_RS 1 2 TOUCH_SCREEN_PD#
TOUCH_SCREEN_PD# <12>
33_0402_5%

R5212
PANEL_BKEN_EC <22> TP_RESET 1 2 PLT_RST#
@
PLT_RST# <11,22,29,30,32>
D5202 0_0402_5%
RN5201 2 eDP_BKLT_CTRL
BLON_OUT_C 1 8 PANEL_BKEN_EC
LCD_BRIGHTNESS 2 7 BKLT_CTRL 1 D5203
LCD_TST_C 3 6 LCD_TST LID_CLOSE# 1 2 TOUCH_SCREEN_PD#
LCD_TST <20,22> LID_CLOSE#
4 5 3
LCD_TST <22>
EU3405 RB551V-30_SOD323-2
DMIC_CLK_EDP 1 9 DMIC_CLK_EDP 100_8P4R_5% BAT54C-7-F_SOT23-3
EC (BIST MODE) USB2.0 90ohm
DMIC_DATA_EDP 2 8 DMIC_DATA_EDP
Main SM070003Z00(S COM FI_ INPAQ MCM1012B900F06BP)
USB_PN5_C 4 7 USB_PN5_C +3VS 2nd SM070004U00(S COM FI_ MURATA DLM11SN900HY2L)
3rd SM070004400(S COM FI_ PANASONIC EXC24CQ900U)
USB_PP5_C 5 6 USB_PP5_C

1
3 RN5203 R6507
B 1 8 BKLT_CTRL TR5201 EMI@ B
8 2 7 BLON_OUT_C 10K_0402_5% USB_PN7_C 1 2 USB_PN7
3 6 EDP_HPD USB_PN7 <10>
L05ESDL5V0NA-4_SLP2510P8-10-9 4 5 2 R5213
@ESD@ DBC_EN_R 1 @ 2 DBC_EN USB_PP7_C 4 3 USB_PP7
DBC_EN <9> USB_PP7 <10>
100K_8P4R_5%
0_0402_5% EXC24CQ900U_4P

Main Func = LED +3VALW


2

QC6A
BAT1_LED# 1 6 BAT1_LED#_R
Amber <22> BAT1_LED#
DMN66D0LDW-7_SOT363-6
5

QC6B +5VALW
JLED
BAT2_LED# 4 3 BAT2_LED#_R 1
White <22> BAT2_LED# 2 1
DMN66D0LDW-7_SOT363-6 BAT1_LED#_R 3 2
BAT2_LED#_R 4 3
5 4 7
6 5 GND 8
6 GND

ACES_50521-00641-001
SATA_LED_EN
A
<22> SATA_LED_EN CONN@ A
SP01001G600
2

+3VS
G

R6110
1 2 SATA_LED_EN SATA_LED# 3 1 BAT2_LED#_R
<10,22> SATA_LED#
10K_0402_5%
S

Q6105
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title
2N7002K_SOT23-3
LCD/Cam/MIC/T.Panel/LED
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 25 of 46
5 4 3 2 1
A B C D E

Main Func = HDMI


2014.12.25
1. LHO1 LHO2 LHO
3 LH O4 chan ge ro ot p in (SI ZE : 050 4) a nd unpo.
p
2. RHO1,RHO3,RHO5,RHO7,RHO2,RHO4,RHO6,RHO8,RHO13,RHO14,RHO15,RHO16, change to pop.

1 1

+5VS

2
D5204
1 2
F6202
1
+5VS_HDMI
HDMI-OUT Connector
RB551V-30_SOD323-2 0.75A_13.2V_1812L075PR-8
+5VS_HDMI

JHDMI
HDMIOUT_R_D2+ 1
2 D2+
HDMIOUT_R_D2- 3 D2_shield
HDMIOUT_R_D1+ 4 D2-
HDMIOUT_CLK- RHO1 1 EMI@ 2 14_0402_1% HDMIOUT_R_CK- HDMIOUT_TX0- RHO2 1 EMI@ 2 14_0402_1% HDMIOUT_R_D0- 5 D1+
HDMIOUT_R_D1- 6 D1_shield
RHO9 1 EMI@ 2 68_0402_5% RHO10 1 EMI@ 2 68_0402_5% HDMIOUT_R_D0+ 7 D1-
8 D0+
CHO8 1 2 0.5P_0402_50V8 CHO9 1 2 0.5P_0402_50V8 HDMIOUT_R_D0- 9 D0_shield 23
EMI@ EMI@ HDMIOUT_R_CK+ 10 D0- GND 22
11 CK+ GND 21
HDMIOUT_CLK+ RHO3 1 EMI@ 2 14_0402_1% HDMIOUT_R_CK+ HDMIOUT_TX0+ RHO4 1 EMI@ 2 14_0402_1% HDMIOUT_R_D0+ HDMIOUT_R_CK- 12 CK_shield GND 20
13 CK- GND
14 CEC
HDMIOUT_SCLK 15 Reserved
HDMIOUT_TX1- RHO5 1 EMI@ 2 14_0402_1% HDMIOUT_R_D1- HDMIOUT_TX2- RHO6 1 EMI@ 2 14_0402_1% HDMIOUT_R_D2- HDMIOUT_SDATA 16 SCL
17 SDA
RHO11 1 EMI@ 2 68_0402_5% RHO12 1 EMI@ 2 68_0402_5% 18 DDC/CEC_GND
HDMIOUT_HPD 19 +5V
2 CHO10 1 2 0.5P_0402_50V8 CHO11 1 2 0.5P_0402_50V8 HP_DET 2
EMI@ EMI@ ACON_HMRA4-AK120C
DC232003J00
HDMIOUT_TX1+ RHO7 1 EMI@ 2 14_0402_1% HDMIOUT_R_D1+ HDMIOUT_TX2+ RHO8 1 EMI@ 2 14_0402_1% HDMIOUT_R_D2+ CONN@

+5VS_HDMI

1
DX4

BAW56W_SOT323-3

+3VS

2 3

2 2
RHR11 RHR8

2.2K_0402_5% 2.2K_0402_5%

2
CPU_DP1_P2 CHR7 1 2 0.1U_0402_16V7K HDMIOUT_TX2+ QX4B
<6> CPU_DP1_P2

1
CPU_DP1_N2 CHR8 1 2 0.1U_0402_16V7K HDMIOUT_TX2-

G
<6> CPU_DP1_N2 SDVO_SCLK HDMIOUT_SCLK
1 6
3 CPU_DP1_P1 HDMIOUT_TX1+ <6> SDVO_SCLK 3
1 2 0.1U_0402_16V7K

D
CHR9
<6> CPU_DP1_P1

5
CPU_DP1_N1 CHR10 1 2 0.1U_0402_16V7K HDMIOUT_TX1- QX4A DMN66D0LDW-7_SOT363-6
<6> CPU_DP1_N1

G
CPU_DP1_P0 CHR11 1 2 0.1U_0402_16V7K HDMIOUT_TX0+ SDVO_SDATA 4 3 HDMIOUT_SDATA
<6> CPU_DP1_P0 CPU_DP1_N0 HDMIOUT_TX0- <6> SDVO_SDATA
1 2 0.1U_0402_16V7K

D
CHR12
<6> CPU_DP1_N0
DMN66D0LDW-7_SOT363-6
CPU_DP1_P3 CHR13 1 2 0.1U_0402_16V7K HDMIOUT_CLK+
<6> CPU_DP1_P3 CPU_DP1_N3 HDMIOUT_CLK-
CHR14 1 2 0.1U_0402_16V7K
<6> CPU_DP1_N3
1
2
3
4

4
3
2
1

RP59 RP58

470_8P4R_5% 470_8P4R_5%
8
7
6
5

5
6
7
8

+3VS
1

+3VS

1
D QX6 QX5 C RX15
2 2 1 2 HDMIOUT_HPD
G 2N7002K_SOT23-3 MMBT3904_NL_SOT23-3 B 150K_0402_5%
1

S E

3
RX13 HDMI_HPD
<6> HDMI_HPD
3

1
100K_0402_5%
RX14 RX34
2

@ 20K_0402_5%
4
100K_0402_5% 4

2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/04/02 Deciphered Date 2015/10/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 26 of 46
A B C D E
Main Func = HDD
SATA HDD Connector
+5VS 5V_HDD HDD1
14
R5601 13 GND
J4 5!%6 2 @ 1 J4 5!%6 GND
12
0_0805_5% SATA_ATX_RC_DRX_P0_C 11 12 +3VS
C6215 C6217 C6216 SATA_ATX_RC_DRX_N0_C 10 11
9 10
1 1 1 9
SATA_ARX_RC_DTX_N0_C 8
SATA_ARX_RC_DTX_P0_C 8
1000P_0402_50V7K

0.1U_0402_16V7K

10U_0805_10V6K
7 CN19 CN20
6 7 FFS@ @
2 2 2 6 1 1
HDD_DEVSLP_R 5
FFS_INT2_Q 5

0.1U_0402_16V7K

10U_0603_6.3V6M
4
3
2
4
3
2
2 2 $%% 76.
5V_HDD 1
1 U5603
ACES_51625-01201-001 LNG2DM
CONN@
SP010028W00 10 5
9 VDD_IO RES
VDD 12 FFS_INT1
3 INT 1 11 FFS_INT2
PCH_SMBDATA 4 SDO/SA0 INT 2
<8,18,19,33> PCH_SMBDATA PCH_SMBCLK 1 SDA/SDI/SDO 6
<8,18,19,33> PCH_SMBCLK SCL/SPC GND 7
HDD_DEVSLP R5605 2 @ 1 0_0402_5% HDD_DEVSLP_R 2 GND 8
<10> HDD_DEVSLP CS GND

FFS_INT1
Reserve, refer to M15 EE Implementation Requirements <10> FFS_INT1 FFS_INT2
LNG2DMTR_LGA12_2X2
FFS@
<8> FFS_INT2

5V_HDD

1
RS1
+3VS FFS@
100K_0402_5%

2
1
FFS_INT2_Q
RS39

6
FFS@
100K_0402_5% QC5A
+3VS FFS@

2
2 DMN66D0LDW -7_SOT363-6

1
RS33 RS34 CS42 CS27 RS25 RS26 RS27 RS28 QC5B
@ @ 1 1 TI@ FFS@

1
2

1
FFS_INT2

4.7K_0402_5%

0_0402_5%
4.7K_0402_5%

0_0402_5%

0_0402_5%
5 DMN66D0LDW -7_SOT363-6

0_0402_5%
0.01U_0402_16V7K

0.1U_0402_16V7K
@ @ @

4
2 2
+3VS

2
1

2
US2
RS19 1 @ 2 0_0402_5% 7 6 DEW2
EN VDD 16 DEW1
SATA3_PTX_HDDRX_P0 CS37 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P0 1 VDD
<10> SATA3_PTX_HDDRX_P0 SATA3_PTX_HDDRX_N0 SATA_CTX_C_DRX_N0 2 A_INp
CS36 1 2 0.01U_0402_16V7K 10
<10> SATA3_PTX_HDDRX_N0 A_INn NC HDD_REXT_SATA0
20
SATA3_PRX_HDDTX_P0 CS35 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_P0 5 REXT
<10> SATA3_PRX_HDDTX_P0 SATA3_PRX_HDDTX_N0 SATA_CRX_C_DTX_N0 4 B_OUTp HDD_A0_PRE0
CS33 1 2 0.01U_0402_16V7K 9
<10> SATA3_PRX_HDDTX_N0 B_OUTn A_PRE0 HDD_B0_PRE0
8
RS29 1 @ 2 0_0402_5% HDD_B0_PRE1 17 B_PRE0
+3VS HDD_A0_PRE1 B_PRE1 SATA_ATX_RC_DRX_P0 SATA_ATX_RC_DRX_P0_C
RS30 1 @ 2 0_0402_5% 19 15 CS30 1 2 0.01U_0402_16V7K
RS20 1 @ 2 0_0402_5% A_PRE1 A_OUTp 14 SATA_ATX_RC_DRX_N0 CS32 1 2 0.01U_0402_16V7K SATA_ATX_RC_DRX_N0_C
RS22 1 @ 2 0_0402_5% 18 A_OUTn
3 TEST 11 SATA_ARX_RC_DTX_P0 CS34 1 2 0.01U_0402_16V7K SATA_ARX_RC_DTX_P0_C
HDD_B0_EQ 13 GND B_INp 12 SATA_ARX_RC_DTX_N0 CS31 1 2 0.01U_0402_16V7K SATA_ARX_RC_DTX_N0_C
21 GND B_INn
EPAD
SN75LVCP601RTJR_QFN20_4X4
@
+3VS

RS38 1 @ 2
0_0402_5%
HDD_B0_EQ RS37 1 @ 2
US2 TI@ US2 PARADE@
0_0402_5%
DEW2 RS35 1 TI@ 2
4.7K_0402_5%
DEW1 RS36 1 TI@ 2
4.7K_0402_5%
HDD_B0_PRE0 RS21 1 @ 2 SN75LVCP601RTJR PS8527CTQFN20GTR2-A2
0_0402_5%
HDD_B0_PRE1 RS18 1 @ 2 SA00007JU10
0_0402_5%
SA00003ZX00
HDD_A0_PRE1 RS23 1 @ 2
0_0402_5%
HDD_A0_PRE0 RS24 1 @ 2
2K_0402_5%
HDD_REXT_SATA0 RS31 1
Security Classification Compal Secret Data Compal Electronics, Inc.
2 2015/07/09 2016/07/31 Title
Issued Date Deciphered Date
5.1K_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD+Sensor
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 27 of 46
Main Func = SSD

JP1 @
+3VS_SSD 1 2 +3VS
1 2
JUMP_43X79

For Thermal measure


consumption
+3VS_SSD

C5529 C5530 C5531 C5532 C5533


NGFF Slot_2 Key M
SSD@ 1 SSD@ 1 SSD@ 1 SSD@ 1 SSD@ 1
+3VS_SSD

0.047U_0402_16V4Z

0.047U_0402_16V4Z

33P_0402_50V8J

22U_0603_6.3V6M

33P_0402_50V8J
JSSD1
2 2 2 2 2 1 2
3 GND 3P3VAUX 4
5 GND 3P3VAUX 6
7 PERn3 NC 8
9 PERp3 NC 10
11 GND DAS/DSS# 12
13 PETn3 3P3VAUX 14
15 PETp3 3P3VAUX 16
17 GND 3P3VAUX 18
19 PERn2 3P3VAUX 20
21 PERp2 NC 22 +3VS_SSD
23 GND NC 24
25 PETn2 NC 26
PETp2 NC

1
27 28
29 GND NC 30 RB1
2/6 TX Cap change P/N, 31
33
PERn1
PERp1
NC
NC
32
34
SSD@
10K_0402_5%
Now It's 0402 0ohm resistor. 35 GND NC 36

2
37 PETn1 NC 38 HDD_DEVSLP_C R6526 1 @ 2 0_0402_5% SSD_DEVSLP
PETp1 DEVSLP SSD_DEVSLP <10>
39 40
SATA3_PRX_SSDTX_P2 CHD1 SSD@ 1 2 0.01U_0402_16V7K SATA3_PRX_C_SSDTX_P2 41 GND NC 42
<10> SATA3_PRX_SSDTX_P2 SATA3_PRX_SSDTX_N2 SATA3_PRX_C_SSDTX_N2 PERn0/SATA-B+ NC
CHD2 SSD@ 1 2 0.01U_0402_16V7K 43 44
<10> SATA3_PRX_SSDTX_N2 PERp0/SATA-B- NC
45 46
SATA3_PTX_SSDRX_N2 CHD3 SSD@ 1 2 0.01U_0402_16V7K SATA3_PTX_C_SSDRX_N2 47 GND NC 48
<10> SATA3_PTX_SSDRX_N2 SATA3_PTX_SSDRX_P2 SATA3_PTX_C_SSDRX_P2 PETn0/SATA-A- NC
CHD4 SSD@ 1 2 0.01U_0402_16V7K 49 50
<10> SATA3_PTX_SSDRX_P2 PETp0/SATA-A+ PERST#
51 52
53 GND CLKREQ# 54
55 REFCLKN PEWake# 56
57 REFCLKP NC 58
GND NC

59 60
T4973 @ 61 NC SUSCLK(32kHz) 62
63 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 64
65 GND 3P3VAUX 66
67 GND 3P3VAUX
GND 68
GND1 69
GND2
BELLW_80159-3221
CONN@
SP070018L00

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SSD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 28 of 46
5 4 3 2 1

Main Func = WLAN

+3VALW +3.3V_W LAN


R5810
D 1 @ 2 D
0_0402_5%

+3VS 1.1A +3.3V_W LAN


R5809
2 @ 1

1 1 1 0_0805_5% 1 1 1 1
C5801 C5805 C5802 C5806 C5804 C5803 C6221
@ @ @
0.1U_0402_16V7K 10U_0603_6.3V6M 0.1U_0402_16V7K 10U_0603_6.3V6M 0.1U_0402_16V7K 0.1U_0402_16V7K 10P_0402_50V8J
2 2 2 2 2 2 2

+3.3V_W LAN
WLAN1
C C
68 69
MTG76 MTG77

67
66 GND 65
64 3.3VAUX RESERVED 63
62 3.3VAUX RESERVED 61
60 RESERVED GND 59
E51_TX1 58 RESERVED RSRVD/PERN1 57
56 RESERVED RSRVD/PERP1 55
54 RESERVED GND 53
52 ALERT RSRVD/PETN1 51
50 I2C_CLK RSRVD/PETP1 49
WLAN_RADIO_DIS# 48 I2C_DATA GND 47
<6> WLAN_RADIO_DIS# BLUETOOTH_EN W_DISABLE1# PEWAKE0# CLK_PCIE_WLAN_REQ#_R CLK_PCIE_WLAN_REQ#
46 45 R5803 2 @ 1 0_0402_5%
<9> BLUETOOTH_EN PLT_RST# W_DISABLE2# CLKEQ0# CLK_PCIE_WLAN_REQ# <11>
R5807 2 @ 1 0_0402_5% PLT_RST_NGFF# 44 43
<11,22,25,30,32> PLT_RST# PERST0# GND
SUSCLK R6518 2 @ 1 0_0402_5% SUSCLK_R 42 41 CLK_PCIE_WLAN_N1
<11,22> SUSCLK SUSCLK REFCLKN0 CLK_PCIE_WLAN_P1 CLK_PCIE_WLAN_N1 <11>
40 39
E51_RX1 COEX1 REFCLKP0 CLK_PCIE_WLAN_P1 <11>
T4969 @ 38 37
PAD E51_TX1 COEX2 GND PCIE_PRX_WLANTX_N5
36 35
COEX3 PERN0 PCIE_PRX_WLANTX_P5 PCIE_PRX_WLANTX_N5 <10>
34 33
RESERVED PERP0 PCIE_PRX_WLANTX_P5 <10>
32 31
E51_TX2 30 RESERVED GND 29 PCIE_PTX_C_WLANRX_N5
RESERVED PETN0 PCIE_PTX_C_WLANRX_P5 PCIE_PTX_C_WLANRX_N5 <10>
28 27
UART_RTS PETP0 PCIE_PTX_C_WLANRX_P5 <10>
26 25
24 UART_CTS GND
UART_TX

B B
23
22 SDIO_RESET# 21
Reserved for NGFF Debug Card 20
18
UART_RX
UART_WAKE#
SDIO_WAKE#
SDO_DAT3
19
17
16 GND SDO_DAT2 15
R6527 14 LED2# SDO_DAT1 13
2 @ 1 E51_TX1 12 PCM_OUT SDO_DAT0 11
0_0402_5% 10 PCM_IN SDIO_CMD 9
8 PCM_SYNC SIDO_CLK 7
6 PCM_CLK GND 5 USB_PN8
R5812 4 LED1# USB_D- 3 USB_PP8 USB_PN8 <10>
HOST_DEBUG_TX 2 @ 1 E51_TX2 2 3.3VAUX USB_D+ 1 USB_PP8 <10>
<22> HOST_DEBUG_TX 3.3VAUX GND
1

0_0402_5% DAN05-67406-0100
R6517 CONN@
@ SP070017R00
100K_0402_5%

Support: Intel Dual Band Wireless-AC 3160


2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 29 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = LAN


Power ( Decoupling Cap. )
40 mils 60 mils
+3.3V_LAN +LAN_VDDREG

CL2 1 2 0.1U_0402_16V7K
+3.3V_LAN rising time (10%~90%) need > 0.5ms and <100ms. CL1 1 2 0.1U_0402_16V7K 1000@
1000@ Close to pin 3
CL3 1 2 0.1U_0402_16V7K
D CL4 1 2 0.1U_0402_16V7K D
+3VALW +3.3V_LAN CL5 1 2 4.7U_0603_6.3V6K
W=40mils W=40mils 1000@
1.5A CL8 1 2 4.7U_0603_6.3V6K
Close to pin 8
1 1 1 1000@ CL6 1 2 0.1U_0402_16V7K
C3013 C3015 C3017 Close to Pin 11,32 CL7 1 2 1U_0402_6.3V6K
1U_0402_6.3V6K UL3 0.1U_0402_10V7K 0.1U_0402_10V7K 1000@
2 5 1 2 2
IN OUT CL11 1 2 0.1U_0402_16V7K
Close to pin 22
2 CL9 1 2 0.1U_0402_16V7K
GND R3022 1000@
LAN_EN 4 3 2 1
Close to Pin 23 CL12 1 2 0.1U_0402_16V7K
<22> LAN_EN EN OC +3VALW
10K_0402_5% @

2
SY6288C20AAC_SOT23-5 Close to pin 30
R3023

100K_0402_5%

1
+3.3V_LAN

+LAN_VDDREG
+LAN_VDDREG

C C

30

11
32

22
3
8
Close to Pin 17,18 UL1

AVDD10
AVDD10
AVDD10

AVDD33
AVDD33

DVDD10
PCIE_PRX_LANTX_P6 CL13 2 1 0.1U_0402_16V7K PCIE_PRX_C_LANTX_P6 17 1 LAN_MIDI0+
<10> PCIE_PRX_LANTX_P6 PCIE_PRX_LANTX_N6 PCIE_PRX_C_LANTX_N6 HSOP MDIP0 LAN_MIDI0- LAN_MIDI0+ <31>
CL14 2 1 0.1U_0402_16V7K 18 2
<10> PCIE_PRX_LANTX_N6 HSON MDIN0 LAN_MIDI1+ LAN_MIDI0- <31>
4
PCIE_PTX_C_LANRX_P6 13 MDIP1 5 LAN_MIDI1- LAN_MIDI1+ <31>
<10> PCIE_PTX_C_LANRX_P6 PCIE_PTX_C_LANRX_N6 HSIP MDIN1 LAN_MIDI2+ LAN_MIDI1- <31>
14 6
<10> PCIE_PTX_C_LANRX_N6 HSIN MDIP2 LAN_MIDI2- LAN_MIDI2+ <31>
7
CLK_PCIE_LAN_P2 15 MDIN2 9 LAN_MIDI3+ LAN_MIDI2- <31>
<11> CLK_PCIE_LAN_P2 CLK_PCIE_LAN_N2 REFCLK_P MDIP3 LAN_MIDI3- LAN_MIDI3+ <31>
16 10
<11> CLK_PCIE_LAN_N2 REFCLK_N MDIN3 LAN_MIDI3- <31>
LAN_CLKREQ#_R 12
CLKREQB
PCIE_WAKE# RL1 2 @ 1 0_0402_5% LANWAKEB 21 25 @
<11,22> PCIE_WAKE# LANWAKEB LED2 PAD T4976
26 @ T4977
LED1/GPIO PAD
+3VS RL2 1 2 1K_0402_5% ISOLATE# 20 27 @ T4978
ISOLATEB LED0 PAD
PLT_RST# 19
<11,22,25,29,32> PLT_RST# PERSTB +LAN_VDDREG
RL4
+3.3V_LAN 23 RL23
15K_0402_5% UL1_RSET_P31 31 VDDREG 24 2 @ 1
RSET REGOUT
0_0603_5%

LAN_X2 29
LAN_X1 28 CKXTAL2 33
B CKXTAL1 GND B

RL5 1 2 UL1_RSET_P31 RTL8111H-CG_QFN32_4X4


2.49K_0402_1% 1000@
SA000080P00

+3.3V_LAN
RL8
LAN_X1 LAN_X2
1

+3VS 1M_0603_5%
RL7
YL1
2
G

QL1 10K_0402_5% 1 2
OSC NC
2

CLK_PCIE_LAN_REQ# 3 1 LAN_CLKREQ#_R 4 3
<11> CLK_PCIE_LAN_REQ# NC OSC
S

1 1
CL16 25MHZ_10PF_X3G025000DA1H-X CL17
2N7002K_SOT23-3
RL10 10P_0402_50V8J 10P_0402_50V8J
1 @ 2 2 2
0_0402_5%
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/12/15 Deciphered Date 2016/12/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8111H
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 30 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = LAN

D D

TL1
JRJ45
1 24 MCT1
TCT1 MCT1 12
LAN_MIDI0+ 2 23 RJ45_MIDI0+ RJ45_MIDI3- 8 GND
<30> LAN_MIDI0+ TD1+ MX1+ PR4- 11
RJ45_MIDI3+ 7 GND
PR4+
RJ45_MIDI1- 6
LAN_MIDI0- 3 22 RJ45_MIDI0- PR2-
<30> LAN_MIDI0- TD1- MX1- RJ45_MIDI2- 5
PR3-
RJ45_MIDI2+ 4
4 21 MCT2 PR3+
TCT2 MCT2 RJ45_MIDI1+ 3
LAN_MIDI1+ 5 20 RJ45_MIDI1+ PR2+
<30> LAN_MIDI1+ TD2+ MX2+ RJ45_MIDI0- 2
PR1- 10
C RJ45_MIDI0+ 1 GND C
PR1+ 9
LAN_MIDI1- 6 19 RJ45_MIDI1- GND
<30> LAN_MIDI1- TD2- MX2-
SANTA_130460-3
CONN@ LAN_GND
DC234007K00
7 18 MCT3
TCT3 MCT3
LAN_MIDI2+ 8 17 RJ45_MIDI2+
<30> LAN_MIDI2+ TD3+ MX3+

LAN_MIDI2- 9 16 RJ45_MIDI2- MCT1


<30> LAN_MIDI2- TD3- MX3- MCT2

MCT3
10 15 MCT4 MCT4
TCT4 MCT4

1
LAN_MIDI3+ 11 14 RJ45_MIDI3+
<30> LAN_MIDI3+ TD4+ MX4+ RL21 RL22 RL20 RL19
1000@ 1000@
75_0603_5% 75_0603_5% 75_0603_5% 75_0603_5%

2
LAN_MIDI3- 12 13 RJ45_MIDI3-
<30> LAN_MIDI3- TD4- MX4-
1
CL43
BOTH_GST5009-E-LF EMI@
B SP050006B10 100P_1206_2KV8J B
2
2 2
C229 CL46
@EMI@ LAN_GND
0.01U_0402_16V7K 0.1U_0402_16V7K
1 1

CL44 1 2 0.1U_0402_16V7K
EMI@

CL45 1 2 0.1U_0402_16V7K
EMI@

LAN_GND

A A

Security Classification Compal Secret Data


Issued Date 2012/04/27 Deciphered Date 2013/04/27 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RJ45
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 31 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = TPM2.0

D D

+3V_SPI

CZ93 CZ94 CZ92


1 1 1
HWTPM@ HWTPM@ HWTPM@

10U_0603_25V6M

0.1U_0402_16V7K

0.1U_0402_16V7K
+3VS
2 2 2

CZ97 CZ98
1 1
HWTPM@ HWTPM@

10U_0603_25V6M

0.1U_0201_10V6K
2 2

UZ13

24 1 RZ116 2 TPM@ 1 0_0402_5% SIO_SLP_S0#


< , < , < , < '&( < 10 3V NC 2
SIO_SLP_S0# <11,16>
19 3V NC 3
3V NC 7 RZ1709 1 NZ@ 2 0_0402_5%
LPC_LFRAME# RZ123 1 NZ@ 2 0_0402_5% PCH_SPI_CS2#_R 22 PP
<8,22> LPC_LFRAME# LFRAME# TPM_LPM#
+3V_SPI RZ1707 1 NZ@ 2 0_0402_5% 28 6
LPCPD# NC 9
C CLK_PCI_LPC_MEC RZ127 1 NZ@ 2 33_0402_5% PCH_SPI1_CLK_R 21 NC C
<8,22> CLK_PCI_LPC_MEC LCLK
SERIRQ RZ126 1 NZ@ 2 0_0402_5% 27 4
<8,22> SERIRQ SIRQ GND 11
LPC_LAD0 RZ124 1 NZ@ 2 0_0402_5% PCH_SPI_MISO 26 GND 18
<8,22> LPC_LAD0 LPC_LAD1 RZ125 1 NZ@ 2 0_0402_5% PCH_SPI_MOSI 23 LAD0 GND 25 +3VALW
<8,22> LPC_LAD1 LPC_LAD2 RZ121 1 NZ@ 2 0_0402_5% 20 LAD1 GND RZ117
<8,22> LPC_LAD2 LPC_LAD3 RZ122 1 NZ@ 2 0_0402_5% 17 LAD2 5 1 TPM@ 2
<8,22> LPC_LAD3 LAD3 NC 8 0_0402_5%
15 NC 12
CLKRUN# NC 1 1
PLT_RST# 16 13 CZ95 CZ96
<11,22,25,29,30> PLT_RST# LRESET# NC 14 TPM@ TPM@
NC

2
0.1U_0402_16V7K 10U_0603_25V6M
RZ65 RZ1708 TPM@ 2 2
TPM@ NZ@ NPCT650JAAWX_TSSOP28
10K_0402_5% 0_0402_5% SA00009DS10

1
"%$' =; =3 $6 '%.6 $6 ;+ 9

PCH_SPI_CS2# RZ115 1 TPM@ 2 0_0402_5% PCH_SPI_CS2#_R


<8> PCH_SPI_CS2# EC_SPICLK_R PCH_SPI1_CLK_R
RZ66 1 TPM@ 2 33_0402_5% UZ13
<8,22> EC_SPICLK_R PCH_SPI_D1 RZ62 1 TPM@ 2 33_0402_5% PCH_SPI_MISO
B <8> PCH_SPI_D1 PCH_SPI_D0 PCH_SPI_MOSI B
RZ64 1 TPM@ 2 33_0402_5%
<8> PCH_SPI_D0

S IC Z32H320TC-LPC-T28-233 TSSOP 28P TPM


NZ@
+3V_SPI SA00007YP20
3

S
QZ11
PCH_SPI_CS2#_R RZ120 1 TPM@ 2 100_0402_5% 2
G
TPM@
ME2301DC-G_SOT23-3
D
1

TPM_LPM#
1

RZ119
TPM@
10K_0402_5%
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date Deciphered Date 2015/07/21 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TPM2.0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Sheet 32 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = IO Connector

D D

K .$ 1 .77 '/.
JIO1
SOC_DP2_AUXP 1
<6> SOC_DP2_AUXP SOC_DP2_AUXN 2 1
<6> SOC_DP2_AUXN 3 2
SOC_DP2_P0 4 3
<6> SOC_DP2_P0 SOC_DP2_N0 4
5
<6> SOC_DP2_N0 5
TR3406 EMI@ 6
USB_PN3 2 1 USB_PN3_C SOC_DP2_P1 7 6
<10> USB_PN3 <6> SOC_DP2_P1 SOC_DP2_N1 7
8
<6> SOC_DP2_N1 8
9
USB_PP3 3 4 USB_PP3_C USB3_CRX_DTX_N3 10 9
<10> USB_PP3 <10> USB3_CRX_DTX_N3 USB3_CRX_DTX_P3 10
11
<10> USB3_CRX_DTX_P3 11
EXC24CQ900U_4P 12
USB3_CTX_DRX_N3 13 12
<10> USB3_CTX_DRX_N3 USB3_CTX_DRX_P3 13
14
<10> USB3_CTX_DRX_P3 14
15
CRT_HPD 16 15
<6> CRT_HPD PCH_SMBCLK 16
17
C <8,18,19,27> PCH_SMBCLK PCH_SMBDATA 18 17 C
TR5803 EMI@ <8,18,19,27> PCH_SMBDATA BREATH_LED# 19 18
USB_PN6 USB_PN6_C <22> BREATH_LED# 19
2 1 +RTC_VCC 20
<10> USB_PN6 21 20
+5VS 21
+3VS 22
USB_PP6 3 4 USB_PP6_C 23 22
<10> USB_PP6 24 23
+3VALW 24
EXC24CQ900U_4P +USB30_VCCC 25
26 25
27 26
28 27
29 28
POWER_SW#_MB 30 29
<22> POWER_SW#_MB 30
31
TR5804 EMI@ USB_PN3_C 32 31
USB_PN9 2 1 USB_PN9_C USB_PP3_C 33 32
<10> USB_PN9 34 33
USB_PN6_C 35 34
USB_PP9 3 4 USB_PP9_C USB_PP6_C 36 35 41
<10> USB_PP9 37 36 G1 42
EXC24CQ900U_4P USB_PN9_C 38 37 G2 43
USB_PP9_C 39 38 G3 44
40 39 G4 45
40 G5
STARC_111H40-100000-G4-R
CONN@
SP01001EB00
TR5802 EMI@
USB_PN4 2 1 USB_PN4_C
B <10> USB_PN4 B

USB_PP4 3 4 USB_PP4_C
<10> USB_PP4
EXC24CQ900U_4P

+USB30_VCCC
JIO2
1
USB_PN4_C 2 1
USB_PP4_C 3 2
4 3
R6533 5 4
CRT_HPD 1 2 6 G1
100K_0402_5% G2
ACES_50278-00401-001
CONN@
SP02000RR00

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IO Board Conn.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 33 of 46
5 4 3 2 1
5 4 3 2 1

Main Func = KB Main Func = TPAD


+3VALW +TP_VDD
Q6203
! " # $ % NTK3139PT1G_SOT723-3 TP_VDD Discharge
3 +TP_VDD

D
1
KB Backlight Power Consumption: 285mA max. 1 R6211
C6204 2 1
+5VS +5V_KB_BL 100_0603_1%

G
2
F6201 0.1U_0402_16V7K
<22> KSI[0..7] 2 1 2
<22> KSO[0..16]

1
1 Q2405
KBBL@ C6202 R6214 D
0.5A_13.2V_NANOSMDC050F-13.2-2 KBBL@ TP_PW_EN# 1 2 TP_ON#_GATE 2
<22> TP_PW_EN#
D
0.1U_0402_16V7K 20K_0402_5% G D
2 S
2N7002K_SOT23-3

3
JKB JKBBL
KB_DET# 30 32 R6206 1
<9> KB_DET# 29 30 GND 31 KB_LED_BL_DET 1 KBBL@ 2 KB_LED_DET_C 2 1
KSI7
28 29 GND <12> KB_LED_BL_DET 3 2 5
KSI6 51K_0402_5%
28 3 G1

1
KSI4 27 KB_BL_CTRL# 4 6 +TP_VDD +3VS
KSI2 26 27 R6207 4 G2
KSI5 25 26 KBBL@ ACES_51575-00401-001
KSI1 24 25 100K_0402_5% CONN@
KSI3 23 24 SP011503261 RZ18 RZ19 RZ20 RZ21

2
23

1
4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%
KSI0 22
KSO5 21 22
21

1
KSO4 20 D Q6202
KSO7 19 20 KB_LED_PWM 2 KBBL@ +TP_VDD
18 19 <22> KB_LED_PWM
KSO6 G

2
KSO8 17 18
S

3
KSO3 16 17 LN2306LT1G_SOT23-3 DAT_TP_SIO
16 <22> DAT_TP_SIO

2
KSO1 15
KSO2 14 15
14
( <22> CLK_TP_SIO
CLK_TP_SIO R6203
KSO0 13
13

2
KSO12 12 I2C_SDA_TP Q6204 10K_0402_5%

G
KSO16 11 12 <9> I2C_SDA_TP
)

1
KSO15 10 11 I2C_SCL_TP TOUCHPAD_INTR# 1 3 INT_TP#
9 10 <9> I2C_SCL_TP <12,22> TOUCHPAD_INTR#
KSO13

S
KSO14 8 9
KSO9 7 8 +TP_VDD LN2306LT1G_SOT23-3
KSO11 6 7
KSO10 5 6
CAP_LED 4 5 +3VS
4 & '(

1
3
2 3 R6508 R6506
1 2 LOW actived from KBC GPIO
1

2
1.5K_0402_5% 1.5K_0402_5%
C +3VS +5VS C
ACES_50699-03041-P01 Q6501A

2
CONN@ I2C_SCL_TP 1 6 I2C_SCL_TP_Q
SP01001LM00 +TP_VDD +TP_VDD

5
DMN66D0LDW-7_SOT363-6
1

Q6501B
R6202 I2C_SDA_TP 4 3 I2C_SDA_TP_Q TPAD1

1
3
10
GND
2

+TP_VDD
G

100K_0402_5% Q6206 Q6201 DMN66D0LDW-7_SOT363-6 1 1 R6505 9


R2
C6225 C6226 8 GND
2

CAP_LED# 3 1 CAP_LED_R# 2 100K_0402_5% I2C_SDA_TP_Q 7 8


<22> CAP_LED# I2C_SCL_TP_Q 7 1
180P_0402_50V8J 180P_0402_50V8J 6 C6201
S

2
R1 2 2 5 6
LN2306LT1G_SOT23-3 DDTA144VCA-7-F_SOT23-3 D3801 INT_TP# 4 5 0.1U_0402_16V7K
PTP_DIS# 1 2 TP_LOCK# 3 4 2
<22> PTP_DIS# DAT_TP_SIO 3
2
1

RB551V-30_SOD323-2 CLK_TP_SIO 1 2
R6201 1
CAP_LED_Q 1 2 CAP_LED ACES_51524-0080N-001
1K_0402_5% CONN@
SP01001A900

Main Func = Thermal


+3VS

+3VS

1
RE432 RE32 +3VS +3VS
2

2.2K_0402_5% 2.2K_0402_5%

1
B Q2601A B
2

2
GPU_THM_SMBDAT 6 1 THM_SML1_DATA R6534
<8,22> GPU_THM_SMBDAT @
5

2
G
DMN66D0LDW-7_SOT363-6 10K_0402_5% Q6502
Q2601B

2
GPU_THM_SMBCLK 3 4 THM_SML1_CLK FAN1_PWM 3 1 FAN1_PWM_R
<8,22> GPU_THM_SMBCLK <22> FAN1_PWM

D
DMN66D0LDW-7_SOT363-6
+3VS 2N7002K_SOT23-3
R6535
1 @ 2
0_0402_5%
1 1
C2601 C2602
@
10U_0603_6.3V6M 0.1U_0402_16V7K +5VS
2 2 R2606
2 @ 1 Close to Thermal sensor Close to KBC
1 1 1
C6214 0_0603_5% C2603 C6213
THM26
NCT7718_DXP 1 8 THM_SML1_CLK 10U_0603_6.3V6M 1000P_0402_50V7K 10U_0603_6.3V6M +3VLP +3VALW
1
VDD SCL 2 2 2 VD_IN1 for
1

Q2603 C C2606 C2607 2


D+ SDA
7 THM_SML1_DATA system thermal sensor

1
2 @ 1 1
MMBT3904_NL_SOT23-3 B 470P_0603_50V8J 2200P_0402_50V7K 3 6 ALERT# C2608 C2609 R2609 R2608
2

E 2 D- ALERT# @ @ JFAN1 @
3

NCT7718_DXN T_CRIT# 4 5 0.1U_0402_16V7K 0.1U_0402_16V7K 6 24.9K_0402_1% 5.9K_0402_1%


T_CRIT# GND 2 2 5 GND2

2
GND1 VCIN0_PH
DIMM CPU +VCC_FAN1 VCIN0_PH <22>
NCT7718W_MSOP8 4
Address: X100_1100(4C), 1001_100X(98) <22> FAN1_TACH
FAN1_TACH 3 4
3

1
FAN1_PWM_R 2
Layout Note: 1 2 R2610
1
C2612
1
C2613
Layout Note: C2607 close THM26 C2604
2 1
A DXN and DXP routing width and spacing is 10 mil / 10 mil. ACES_50271-0040N-001 100K_0402_1%_ERTJ0ER104F 0.1U_0402_16V7K 100P_0402_50V8J A
1000P_0402_50V7K CONN@ 2 2

2
1 SP02000TS00 R2611
+3VS VD_IN1_C 1 @ 2

R2603 1 2 ALERT# 0_0402_5%


18.7K_0402_1%

R2604 1 2 T_CRIT#
2K_0402_1%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/07/09 Deciphered Date 2016/07/31 Title
KB/TP/Thermal/FAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D822P
Date: Monday, June 06, 2016 Sheet 34 of 46
5 4 3 2 1
5 4 3 2 1

L 3;
D
*9, K*+, C. ?6/ 5 %0$?6 #. /
JP21
D

+5V_RUN_UZ2 2 1 +5VS
PAD-OPEN1x3m
+5VALW @
UZ2
1 14 +5V_RUN_UZ2 CZ44 1 2
2 VIN1 VOUT1 13 0.1U_0402_10V7K
VIN1 VOUT1
3 12 CZ45 1 2 470P_0402_50V7K
ON1 CT1
4 11
VBIAS GND
SIO_SLP_S3# 5 10 CZ23 1 2 470P_0402_50V7K
<11,16,22,44> SIO_SLP_S3# ON2 CT2
6 9
7 VIN2 VOUT2 8 +3.3V_RUN_UZ2 CZ50 1 2
+3VALW VIN2 VOUT2 0.1U_0402_10V7K
15
GPAD
EM5209VF_SON14_2X3
JP13
+3.3V_RUN_UZ2 1 2 +3VS
PAD-OPEN1x3m
@

C L ;+ C
%0$?6 #. /

*+, - C. ?6/ 5 +3VALW +3VALW _PCH

RZ1705
1 @ 2
B B
0_0603_5%

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

DC to DC
Size Document Number Rev
1.0
LA-D822P
Date: Monday, June 06, 2016 Sheet 35 of 46
5 4 3 2 1
A B C D

PL1
+19V_VIN PR4 PSID@
5A Z150 20M 1210_2P 33_0402_5%
@ PJPDC1 +19V_ADPIN 1 2 1 3 PSID-3 1 2 PS_ID <22>

S
8 PQ6 PSID@
GND 7 FDV301N_G 1N SOT23-3
GND

PC2 EMI@

PC4 EMI@
1000P_0402_50V7K

1000P_0402_50V7K
100P_0402_50V8J

100P_0402_50V8J

G
2

1
6

100K_0402_1%
6 PR8

2
5 PSID@ PR3 PSID@
5 4 2 1

EMI@ PC1

EMI@ PC3

PR6
PSID@
PSID-2 +5VALW 2.2K_0402_5%
4

3
3

2
3 2 @ PD4

2
2 1 1 2 10K_0402_1%
TVNST52302AB0_SOT523-3 +3VALW

1
1

1
1 PL4 C 1

5A Z150 20M 1210_2P PSID-1 2


ACES_50458-00601-001 B

15K_0402_1%
1

MMST3904-7-F_SOT323
E

3
PR9
3

PSID@

PSID@
@ PR11 +5VALW
1 2 1
PL2 2
BLM15AG102SN1D_2P

1
100K_0402_1%

PQ5
PSID 2 1 @ PD5
EMI@
BAV99W_SC70-3

1
@ PD6
BAV99W_SC70-3
+17.4V_BATT+
+17.4V_BATT++
+17.4V_BATT+

3
@ PJP3
2 1 +17.4V_BATT++
2 1 +5VALW
1

JUMP_43X79
1000P_0402_50V7K
0.01U_0402_25V7K
1

PC8

1
EMI@ PC7

PD2 PD3
2

TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3
EMI@

ESD@ ESD@

3
ACES_50458-01001-P01_10P-T
PBAT_PRES# <22,37>
12
GND 11
2
GND 10 PR15 PR16
2

10 9 PR20 200_0402_5% 10K_0402_1%


9 8 100_0402_5% 1 2 1 2
8 7 CLK_SMB 1 2 +3VALW
7 6 DAT_SMB 1 2
6 5
5 4 SYS_PRES PR18
4 3 100_0402_5%
3
! 2
2
PBAT_CHG_SMBCLK <22,37>
1
1

PBATT1 @
PBAT_CHG_SMBDAT <22,37>

Other component (37.1)

3 3

!"#$%%&'()*
1$"/ " ./ '/ ! .7 $/ / ? " ./ ' / ! .7 " %./E ! '<!/ +,-./'0123$%%#'()23 !"2#$%%
+19V_VIN
if battery removed, adaptor only, asserts H_PROCHOT# when adaptor is +4/.560235'123782
then trigger the H_PROCHOT#, unplugged, keep low for 10ms

3.3K_1206_5%
keep @ in BOM since battery can not till SW PROCHOT# is issued by EC
!"#$%%&'()*

1
be removed by end user <11,22,37> ACAV_IN @ PR12 0_0402_5%
1 2
+,-./01234$%%#'()34 !"3#$%%

PR5
H_PROCHOT#
<12,22,37,42> H_PROCHOT# +19V_VIN +3VALW PR7 +5/.6713460234893
2
10K_0402_1%

3 2
1

1M_0402_1%
<11,38,40,41> POK
PR28

@ PR13 0_0402_5%
%:"#$%-;
6

PR31 PC16 1 2

L2N7002DW1T1G_SC88-6
2

PQ1B
+,-./01234$%-34%:"3
.1U_0402_16V7K
L2N7002DW1T1G_SC88-6

1
PQ2A

1M_0402_1% 5
3 2

PC14 1 2 2
+5/.6713460234893
6

.1U_0402_16V7K
L2N7002WT1G_SC70-3

L2N7002DW1T1G_SC88-6

4
1

D
PQ2B

100K_0402_1%
L2N7002DW1T1G_SC88-6
1

1
1

PBAT_PRES#
PQ3

PQ1A

1 2 2 PR10
5 2
!"#$%-;&$<=>;?*
PR29

G
1M_0402_1%

PR33 1M_0402_1%
100K_0402_1%

S
+,-./01234$%-34 !"3#$%%4 !"3#$%-
1
3
1

PR2 1
4

1
PR32

1M_0402_1%
+5/.6713460234893
2

4 4
2

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/03/23 Deciphered Date 2014/12/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_DCIN/BATT CONN/OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS X01(0.2)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 36 of 46
A B C D
A B C D

Iada=0~3.33A(65W)
Iada=0~2.30A(45W)

PQ709A

6
ADP_I = 32*Iadapter*Rsense

L2N7002DW1T1G_SC88-6
2 1 2

PR738

1
1M_0402_1%
2 1
1 1

PR737 +19VB
PQ741 3M_0402_5%

MDU1512RH_POWERDFN56-8-5
1
2
5 3

4
PQ718
ASGATE_R PR703
@ PQ740 MDU1512RH_POWERDFN56-8-5 0.01_1206_1%
AON7426_DFN3X3EP8-5 @EMI@ PL704
1 1 1 4 1 2
2 2
5 3 3 5 2 3 1UH_PCMB053T-1R0MS_7A_20%

2200P_0402_25V7K
0.1U_0402_25V7K
+19V_VIN

EMI@

EMI@
10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M
0.1U_0402_25V6
5600P_0402_25V7K

2
@ PJP701

1 4

1
2

1
1 2

PC744

PC760

PC762

PC763

PC764
1 2

PC765

PC705
0_0402_5%
ASGATE_R

1
PC742

0_0402_5%

2_0402_5%
JUMP_43X118

2
1

2
PR778

PR740
@

PR772
@ @
@

2
PC747
0.1U_0402_25V6
2 1

4.02K_0402_1%

4.02K_0402_1%
2 2
1

MDU1512RH_POWERDFN56-8-5
PR745
100_0402_1%
392K_0402_1%

2
1

5
PR762

PR763
1 2 +17.4V_BATT+
PR729

PC750 0.22U_0603_25V7K
PR773 0_0603_5%
2

1 2 4
0.01UF_0402_25V7K

PQ709B
3

L2N7002DW1T1G_SC88-6
53.6K_0402_1%

1
PR732

0.1U_0402_25V7K

3
2
1
PC711

PQ717
5

PC779
CMSRC
<22> AC_DIS
1

2
1 VDD_CHG
2

ASGATE
4

1
5
@

AON7408L_DFN8-5
100K_0402_1%

32

31

30

29

28

27

26

25
PU703 ISL88739HRZ-T_QFN32_4X4
For Learn Mode

PQ704
PR741

3S1P: CV = 13.05V CC: 1.9A

VBAT
CSIP

ASGATE

QPCP

BGATE
CSIN

CMSRC

OPCN
PC721 4
PR771
0_0603_5% 0.22U_0402_16V7K
ACIN_CHG 1 24 1 2 1 2
2

ACIN BOOT PR761 0_0603_5% PR765


PL700
ACIN 2 23 UGATE_CHG 1 2 0.01_1206_1%

3
2
1
<11,22,36> ACAV_IN PR769 @ 0_0402_5% ACOK UGATE 4.7UH_5.5A_20%_7X7X3_M +17.4V_BATT+
1

1 2 3 22 PHASE_CHG 1 2 1 4
158K_0402_1%

<22,36> PBAT_CHG_SMBDAT SDA PHASE


PR731

PR770 @ 0_0402_5%
1 2 4 21 LGATE_CHG 2 3
<22,36> PBAT_CHG_SMBCLK PR777 @ 0_0402_5% SCL LGATE

10U_0805_25V6K
10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V7K
5
3 H_PROCHOT#
1 2 5 20 VDDP_CHG 3

AON7506_DFN33-8-5
2

<12,22,36,42> H_PROCHOT# PROH PR774 1K_0402_1% PROCHOT# VDOP

1
1

1
1 2 6 19 VDD_CHG 1 2

PC776
PC778

PC775

PC777

PC761

PC766
<22> I_ADP PR775 @ 0_0402_5% AMON VDO

PQ708
1 2 7 18 PR760 4.7_0402_5%

2
2

2
<22> I_BATT BMON DCIN 4 @

1U_0402_16V6K
1U_0402_16V6K

2
2
BATGONE
8 17 @
<42> I_SYS PSYS NTC

100K_0402_1%
CCLIM

ACLIM
COMP
PROG
AGND

CSON

CSOP

PC769
PC768
FSET
2200P_0402_25V7K
0.1U_0402_25V7K

1
1
2
10.5K_0402_1%

3
2
1
1

PR727 @

PR757
2
1

PC749
PC748

%$? $1$"/. - D
33

10

11

12

13

14

15

16

3
PQ710
356 0#!% #?@ !1 ".0
1
2

0_0603_5%
LMUN5113T1G_SOT323-3
/ $76!/ ! .7
2

PR780
+3VALW PD704

1U_0603_25V6
2
VDD_CHG 2

0_0402_5%
PR743 10_1206_5%
+19V_VIN

1
H_PROCHOT#

PR779 @
1 2 1 @

1
1

2
3

PC757
BA
PR791

1
10K_0402_5% @ PR790
200K_0402_1%

200K_0402_1%

1
160K_0402_1% LRB715FT1G_SOT323-3 <11> SIO_SLP_S5# 2
1

D CCLIM
2

1 2 2
PR749

PR750

PQ721
G PQ711
0.01U_0402_16V7K

RUM002N02GT2L_VMT3

BA
10K_0402_1%
RUM002N02GT2L_VMT3

ACLIM

3
1

1 2
PC790

D S PROG LTC015EUBFS8TL_UMT3F
3
PQ720

PROH 2
1

G COMP PR742 2_0402_5%


2

2
PC708
100_0402_1%

0.1U_0402_25V6
182K_0402_1%

102K_0402_1%

S
3

1
PR764
560P_0402_50V7K

1
2

1 2
PR754
PR753

PR755
2
75K_0402_1%

66.5K_0402_1%

PC751

@ PR756 PR776 0_0402_5%


1

4 10K_0402_1% 4
1
2

1 2
PR751

PR752

0.015U_0402_25V7K

+3VALW
1

2
2

10P_0402_50V8J
PC753
PC752

1
1

1
1

PBAT_PRES# <22,36>
DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/03/23 Deciphered Date 2014/12/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS X01(0.2)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 37 of 46
A B C D
A B C D E

1 1

@EMI@ PL102
5A Z150 20M 1210_2P PR102
1 2 499K_0402_1%
ENLDO_3V5V 1 2
PR100 +19VB
@ PJP105 0_0603_5% PC102

1
3V_VIN BST_3V1

150K_0402_1%
1 2 2 1 2
+19VB 1 2

PR103
JUMP_43X79 0.1U_0402_10V7K

2200P_0402_50V7K

1
PU100

2
10U_0805_25V6K

10U_0805_25V6K
@EMI@ PC100

EMI@ PC103
0.1U_0402_25V6

BS
IN

IN

IN

IN
1

1
1

1
LX_3V 6

PC105

@ PC104
20 PL100
LX LX 1.5UH_9A_20%_7X7X3_M

2
2

2
7 19 LX_3V 1 2
GND LX +3VALWP

RF@ PR106
8 SY8286BRAC_QFN20_3X3 18
GND GND

4.7_1206_5%

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
22U_0805_6.3V6M

22U_0805_6.3V6M
9 17
PG LDO +3VLP

1
1

1
1

PC108

PC109

@ PC110
PC106

PC107
10 16
NC NC
+,

OUT

2
2

2
EN2

EN1

1
21

NC
FF
GND PC111 B3

1 3V_SN 2
PR107 4.7U_0603_6.3V6M
$H < 7/ 9 39

11

12

13

14

15

680P_0603_50V7K
10K_0402_1%

RF@ PC112
1 2
+3VALWP 3.3V LDO 150mA~300mA < 7/ O C ! : @?

ENLDO_3V5V
2 2
Vout is 3.234V~3.366V
POK <11,36,40,41>

2
POK

@ PJP102

150K_0402_1%
PC113 PR108 +3VALWP 1 2 +3VALW
1 2

1
@ PR109
1000P_0402_25V8J 1K_0402_5%
EN_3V 3V_FB 1 2 1 2 JUMP_43X118

@EMI@ PL103

2
5A Z150 20M 1210_2P
1 2

1
150K_0402_1%
@ PJP103

@ PR110
PR111 +5VALWP 1 2 +5VALW
@ PJP106 0_0603_5% PC114 1 2
1 2 5V_VIN BST_5V 1 2 1 2 JUMP_43X118
+19VB 1 2

2
JUMP_43X79 0.1U_0402_10V7K
2200P_0402_50V7K

1
10U_0805_25V6K

10U_0805_25V6K
EMI@ PC116
@EMI@ PC115
0.1U_0402_25V6

PU102
1
1

BS
IN

IN

IN

IN
PC117

PC118

LX_5V 6 20 PL101
2
2

LX LX 2.2UH_7.8A_20%_7X7X3_M
7 19 LX_5V 1 2
GND LX +5VALWP
8 SY8286CRAC_QFN20_3X3 18
GND GND

22U_0805_6.3V6M
22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
PR112

680P_0603_50V7K 4.7_1206_5%
3 PC119 3

1
1

1
RF@
9 17 1 2

PC123
PC120

PC121

PC122

PC124
PG VCC
10 16

2
2

2
NC NC 4.7U_0603_6.3V6M

15V_SN
PR121 @
OUT

LDO

2
EN2

EN1

0_0402_5% 21
FF

EN_3V 1 2 GND
11

12

13

14

15

PC125
PR120 @ @ PR113
+3VALWP VL

RF@
0_0402_5% 10K_0402_1%

2
EN_5V 1 2 1 2
ENLDO_3V5V

5V LDO 150mA~300mA
1
EN_5V

PC126
4.7U_0603_6.3V6M

POK
PR114
2.2K_0402_5%
9,
2

150K_0402_1%
1 2
<22> ALWON
E

1
@ PR115
PR116 @ PD102 $H < 7/ = 9
0_0402_5%
1 2
SDMK0340L-7-F_SOD323-2
1 2
< 7/ O C ! : @?

2
<22> CMP_VOUT0
4.7U_0402_6.3V6M

1
150K_0402_1%
PC127 PR117
1

PC128

@ PR118
PQ102 @ PR122 1000P_0402_25V8J 1K_0402_5%
L2N7002WT1G_SC70-3 5V_FB 1 2 1 2
1M_0402_5%
2

3 1
S

2
G
2

4 4
EN1 and EN2 dont't floating
<11,22> ALL_SYS_PWRGD

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PWR_3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS X01(0.2)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 38 of 46
A B C D E
5 4 3 2 1

PR200
0_0603_5%
BST_1.2V_R 1 2 BST_1.2V 0.6Volt +/- 5%
+1.2VP TDC 1.2A
Peak Current 1.5A

1
PC200
D 0.1U_0402_10V7K D

2
@ PJP206
+19VB 2 1 +19VB_1.2V UG_1.2V
2 1
+0.6VSP

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
PC208 RF@
JUMP_43X79

10P_0402_25V8J
1

1
LX_1.2V

10U_0805_6.3V6K

10U_0805_6.3V6K
EMI@ PC201

PC206

PC212

1
PC205

PC211
2

16

17

18

19

20
@ PU200

2
VLDOIN
PHASE

UGATE

BOOT

VTT
21
PAD
LG_1.2V 15 1
LGATE VTTGND

14 2
PGND VTTSNS

1
PR205
PQ201 11K_0402_1%

D1

D1

D1

G1
AON7934_DFN3X3A8-10 1 2 CS_1.2V 13 3
*; 3,- PC204 CS RT8207PGQW_WQFN20_3X3 GND
EB 10
D1 D2/S1
9 1U_0603_10V6K
1 2 12 4 VTTREF_1.2V
$H < 7/ J PR206 VDDP VTTREF

< 7/ O E 5.1_0603_5%

G2
S2

S2

S2
1 2 VDD_1.2V 11 5
VDD VDDQ
+1.2VP

1
PGOOD
5

1
PC210

TON
+5VALW

1
C PR210 0.033U_0402_16V7K C

FB
S5

S3

2
PC209 2.2_0603_5%
1U_0603_10V6K @ PC214

10

6
220P_0402_25V8J

2
1 2
+5VALW

FB_1.2V
TON_1.2V
PR207

EN_1.2V

EN_0.6VSP
60.4K_0402_1%
<11> 1.2V_VTT_PWRGD 1 2 +1.2VP
PR208
@ PR209 +19VB_1.2V 1 2
10K_0402_1%
453K_0402_1%

1
1 2
+3VALW

1
@ PC213
- PR201 @ PR204
.1U_0402_16V7K
0_0402_5% 100K_0402_1%

2
1 2
<11,16,22,41> SIO_SLP_S4#

2
PL200
1UH_11A_20%_7X7X3_M
+1.2VP

1
1 2 @ PC202
0.1U_0402_10V7K

2
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

PR202 @
0_0402_5%
1 2
<7> 0.6V_DDR_VTT_ON
1
1

1
PC220

PC218

PC217

PC216

PC215

PC219

1
B RF@ PR203 B
4.7_1206_5% @ PC203
2

2
2

@ 0.1U_0402_10V7K
2

2
1

RF@ PC207
680P_0402_50V7K
2

@ PJP200
+1.2VP 1 2 +1.2V_DDR
1 2
JUMP_43X118
.1 + 9 *; 3,- *,- - *4 E,-
9 .C C .CC . C
+ .7 .7 .C C
4 .7 .7 .7 2
@ PJP203
1
+0.6VSP 2 1 +0.6V_DDR_VTT
JUMP_43X79

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data
Issued Date 2015/03/23 Deciphered Date 2014/12/15 Title
PWR_+1.2V_MEN/+0.6V_DDR_VTT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom X01(0.2)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 39 of 46
5 4 3 2 1
5 4 3 2 1

D D

RF@ PR307 RF@ PC308 @ PJP302


4.7_1206_5% 680P_0603_50V7K +1VALWP 1
1 2
2 +1.0V_PRIM
1 2 SNUB_+1VALW 1 2
@ PJP301 JUMP_43X118
PU300
+19VB_+1VALW
*;O, 1 2 2
IN PG
9 PR306 PC307

10U_0805_25V6K
0_0603_5% 0.1U_0402_10V7K

0.1U_0402_25V6
3 1 BST_+1VALW 1 2BST_+1VALW_R 1 2
2200P_0402_50V7K

PAD-OPEN1x1m IN BS
1

1
EMI@ PC301

PC302

PC303
PL301
4
IN LX
6 LX_+1VALW 1 2 +1VALWP

330P_0402_50V7K
2

2
5 19

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1UH_6.6A_20%_5X5X3_M
IN LX

2
@EMI@

1
PC309

PC310

PC311

PC312

PC313
7 20 PR308
GND LX 10_0402_5%
8 14 FB_+1VALW

2
GND FB
R1

1
18 17 LDO_+1VALW
PR301 @ GND VCC 1 2

1
1 2 EN_+1VALW 11 10
<11,36,38,41> POK EN NC PC306 PR309
0_0402_5% ILMT_+1VALW 13 12 2.2U_0402_6.3V6M

2
ILMT NC 21.5K_0402_1%
1

@ PC304
+3VALW1 PR303 @2

1
PR302 0.1U_0402_25V6 15 16 FB=0.6V
1M_0402_1% BYP NC
2

0_0402_5% 21 PR310
+3VALW PAD Vout=0.6V* (1+R1/R2) R2 30.9K_0402_1%
2

SY8286RAC_QFN20_3X3 =0.6*(1+(21.5/31.6))

2
1

C C
PC305
Vout=1.0V
2

1U_0402_6.3V6K
2

PR304 @
0_0402_5%
1
1

@ PR305
0_0402_5%
2

*; 4,-
E
$H < 7/ J E
< 7/ ;3 !: @?
The current limit is set to 6A, 9A or 12A when this pin
is pull low, floating or pull high
#.H ;; 45.#5 ;3 45.#5

!"# $%&&'() /01234'(56


*+ "788# 89:
DELL CONFIDENTIAL/PROPRIETARY
B ,+ ;89<&'() B

-.+ "788# =')=

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/03/23 Deciphered Date 2014/12/15 Title
PWR_+1VALWP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C X01(0.2)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 40 of 46
5 4 3 2 1
5 4 3 2 1

@ PJP502
JUMP_43X79
1 2
+1.8VALWP 1 2 +1.8V_PRIM

PU500 RT8061AZQW_WDFN10_3X3 PL501


PJP501

4
@ 1UH_6.6A_20%_5X5X3_M
1 2 10 2 LX_1.8VALW 1 2
+3VALW

PG
1 2 PVIN LX +1.8VALWP
D D
9 3

22P_0402_50V8J
JUMP_43X79
PVIN LX

2
4.7_1206_5%
1

1
PC503
8

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
PC501 PR503
SVIN

1
RF@ PR506
22U_0603_6.3V6M 10_0402_5%
FB_1.8VALW

PC505

PC506

PC507
6

2
EN_1.8VALW 5 FB

2
EN

NC

NC
TP
1 2
FB=0.6Volt

11

1
PR501 @ PR504
1 2
<11,36,38,40> POK

680P_0402_50V7K
20K_0402_1%

RF@ PC504
0_0402_5%

0.1U_0402_10V7K
*; J,-

PC502

2
1
PR502
1M_0402_5%
;
@ $H < 7/ ; +

2
< 7/ + 9 C ! : @?

1
PR505
10K_0402_1%

2
PJP802 @

1 2
C
+5VALW +2.5VP 1 2 +2.5V_MEM C

JUMP_43X79

1
PC801
1U_0402_6.3V6K

9
4 5

GND
PJP801 VDD NC
@
1 2 2.5V_VIN 3 6
+3VALW 1 2 VIN VOUT +2.5VP

10U_0805_6.3V6K

21.5K_0402_1%
JUMP_43X79 2 7
EN ADJ

1
PC802

10U_0805_6.3V6K
PR801
1 8 @ PC803
PGOOD GND

PC804
0.01U_0402_25V7K

2
2
PU800
*3 9,

2
RT9059GSP_SO8 ADJ_2.5V
49
$H < 7/ 4 E39

1
PR803 @
1 2 EN_2.5V
<11,16,22,39> SIO_SLP_S4#
PR802
0_0402_5% 10K_0402_1%

2
1

0.1U_0402_10V6K
PC805
2

B B

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/12/15 Title
2015/03/23 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+1.8V_PRIM and +2.5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C X01(0.2)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 41 of 46
5 4 3 2 1
5 4 3 2 1

VCC_SA
+1.0V_VCCST Loadline : 10.3m-ohm
@ PJP603

PR602 @
TDC 5A 1 2
0_0402_5% Peak Current 5A VCCSA_B+ CPU_B+

0.1U_0402_25V6
1

1
45.3_0402_1%

100_0402_1%
75_0402_1%
1 2 OCP current 7A

PC602
+5VALW PAD-OPEN1x1m

PR605
PR601

PR604
Local sense put on HW site PR603 @ Choke DCR 12 +-5%m ohm

2
0_0402_5%
@ 1 2 CPU_B+

0.22U_0603_25V7K
2

1U_0603_10V6K
D PR606 1 @ 2 0_0402_5% 1 2 VR_SCLK D
<15> VIDSCLK

1
49.9_0402_1% PR618

PC603

PC604
<15> VIDALERT_N PR607 1 @ 2 0_0402_5% 1 2 VR_ALERT#
0_0402_5% PR625

2
<15> VIDSOUT PR609 1 @ 2 0_0402_5% 1 2 VR_SDA
10_0402_1% PR626
<12,22,36,37> H_PROCHOT# PR678 VCCSA_B+
100_0402_1%
1 2 1 2
1 2
PC605 47P_0402_50V8J
U22@ PR608
PH601 PR610 78.7K_0402_1%

10U_0805_25V6K

10U_0805_25V6K
470K_0402_5%_ TSM0B474J4702RE 10K_0402_1% 1 2
1 2 1 2 PR613 1.91K_0402_1% PR612

1
1 2

PC612

PC608
86.6K_0402_1% PR611
1 2 1 2 +3VS 48.7K_0402_1%
PR631 PC613

2
27.4K_0402_1% 330P_0402_50V8J PR616 @
1 2 1 2
<11> IMVP_VR_ON
U22@ PC614 PR617
2200P_0402_50V7K 4.42K_0402_1% 0_0402_5%
1 2 1 2

40
39
38
37
36
35
34
33
32
31
PU602
PC616 PR619

VR_ENABLE
VR_READY

SCLK

SDA
VCC
VIN
VR_HOT#

ALERT#

PROG1
PROG2
33P_0402_50V8J 1 2
1 2 U22@ PC617 U22@ PR621 PR620 @ 0_0402_5%
220P_0402_50V7K 1K_0402_1% 1 2 1 30 PWM_VSA 0_0603_5% PU606 AON7934_DFN3X3A-8-10
<37> I_SYS PSYS PWM_C

1
1 2 1 2 2 29 FCCM_VSA ISL95808HRZ-TS2378_DFN8_2X2 PQ601
<15> VCC_GT_SENSE IMON_B FCCM_C
PR622 3 28 PL601

D1

D1

D1

G1
@ PC618 U22@ 1.96K_0402_1% 4 NTC_B ISUMN_C 27 1 8 0.68UH +-20% 7.9A
1 2 1 2 5 COMP_B ISUMP_C 26 PC611 UGATE PHASE
0.082U_0402_16V7K

6 FB_B RTN_C 25 FB_VSA 1 2 2 7 10 9 SA_SW 4 1


PC620

RTN_B FB_C BOOT FCCM D1 D2/S1


+VCC_SA
1

7 24 COMP_VSA

RF@
330P_0402_50V7K 0.22U_0402_16V7K
U22@ PC621 PR623 8 ISUMP_B COMP_C 23 IMON_VSA PWM_VSA 3 6 3 2
C
PC619 1000P_0402_50V7K2K_0402_1% 9 ISUMN_B IMON_C 22 PWM VCC C

4.7_1206_5%
G2
S2

S2

S2
2

ISEN1_B PWM_A PWM_IA <43>

1
1 2 @ 1 2 1 2 10 21 4 5
ISEN2_B FCCM_A FCCM_IA <43> GND LGATE

1
PR627
TP
ISUMN_A
ISUMP_A
PR624

PWM1_B
PWM2_B

COMP_A

8
FCCM_B

IMON_A
0.01U_0402_50V7K 41

NTC_A

RTN_A
AGND 3.65K_0603_1%

0_0402_5%
FB_A
<15> VSS_GT_SENSE

PR679

ISUMP_VSA 2

ISUMN_VSA
11
12
13
14
15
16
17
18
19
20

SA_SNUB
ISL95859HRTZ-T_TQFN40_5X5
+5VALW

1
1
1U_0402_10V6K
<43> ISUMP_GT @

IMON_IA

FCCM_VSA
FB_IA
<43> FCCM_GT

NTC_IA
COMP_IA

PC685
4.42K_0402_1%

<43> PWM1_GT

2
1

@ PR637 <43> PWM2_GT

1
PR628

PC625

680P_0603_50V7K
20M_0402_5% 330P_0402_50V7K
10K_0402_5%_ERTJ0ER103J

1
1 2

RF@ PC622
PR629 U22@SKL@ @ PR654
0.047U_0402_25V7K
2

2
0.047U_0402_25V7K

84.5K_0402_1%

2
2
1

1
1

1 2
U22@ PC626
PC624

20M_0402_5%

4.02K_0402_1%
10P_0402_50V8J
PC627 PH603

PR630
1

1
PR632 470K_0402_5%_ TSM0B474J4702RE
11K_0402_1%

2200P_0402_50V7K

1200P_0402_50V7K
2
2
1

2200P_0402_50V7K
PH602

1 2 1 2
PR633

PC628
1K_0402_1%
1 2 1 2 ISUMP_VSA

PR640 U22@SKL@

2
2
PR647 27.4K_0402_1% PR635 1 2

255_0402_1%
1
U22@ PR638 1 2 10K_0402_1%

2.61K_0402_1%
2

1
PC630
294_0402_1% PR636 1.24K_0402_1%
2

1 2 PC629

PC631
PR639

PR642
<43> ISUMN_GT 2200P_0402_50V7K 3K_0402_1% 1 2 1 2

2
1 2 1 2

10KB_0402_5%_ERTJ0ER103J
2
PR638 U23@ U23@ PC635 PC632 PR641

0.033U_0402_16V7K

2
2
0.022U_0402_16V7K PC636 2200P_0402_25V7K 1K_0402_1%

1K_0402_1%

11K_0402_1%
1 2 ISEN1_GT 33P_0402_50V8J

6800P_0402_25V7K

PR643
1

1
1 2

PR644

PC633
PC637
U23@ PC638

1
B 0.022U_0402_16V7K PC639 PR645 PR646 PC640 B

1
2

2
1 2 ISEN2_GT 2200P_0402_25V7K 316_0402_1% 1 2 1 2 @
357_0402_1%
1 2 1 2

330P_0402_50V7K
.1U_0402_16V7K

2
1

PH604
PR622 U23@ 316_0402_1% 2200P_0402_25V7K
+5VALW
PC641

PR648 U22@SKL@

2
1 2 PR649
2

1
1 2

U22@ PR651
140K_0402_1%
1
PR615 U22@ 1.37K_0402_1% PC642 ISUMN_VSA
<43> ISEN1_GT

PC643
0_0402_5% 0.047U_0402_25V7K 1.69K_0402_1% PC644
680P_0402_50V7K 2K_0402_1%
1

1
2.55K_0402_1% 1 2 1 2 .1U_0402_16V7K

2K_0402_1%
<43> ISEN2_GT

2
1 2

PR652
.1U_0402_16V7K

2
1
PR650

U22@ U23@ PR634 U22@ PC645


0_0402_5%
2

1 2
1 2 PC646

680P_0402_50V7K
0.047U_0402_25V7K
PR622 1.96k 2.55K
2

1 2 VSA_SEN- <16>
PC647

PC601
PR629 U23@ PR640 U23@ PR648 U23@

2
PR648 1.37K 1.69k
1

PC649
0.01U_0402_50V7K

0.082U_0402_16V7K
1 2
PR629 84.5K 97.6K 97.6K_0402_1% 301_0402_1% 1.69K_0402_1% PR656
11K_0402_1% PR640 U22@KBL@
<15> VCCSENSE

2
1 2

PC650
PR629 U22@KBL@
PR651 140K 80.6K PR651 U23@ PC626 U23@ PR608 U23@ @ PC652
PR657

1
@ PC651 PH605 @ 330P_0402_50V7K
PR608 78.7K 100K 1 2 4.42K_0402_1% 10KB_0402_5%_ERTJ0ER103J 1 2
1 2 1 2 294_0402_1%
0.082U_0402_16V7K

330P_0402_50V7K
PC653

PR638 274 357 93.1K_0402_1%


1

80.6K_0402_1% .1U_0402_16V7K 100K_0402_1%


VSA_SEN+ <16>
PC621 U23@ PR621 U23@ PC617 U23@ PR648 U22@KBL@
PR640 255 301 ISUMN_IA <43>
2

PC654 @
A A
1 2
PC626 0.047U 0.1U 0.01U_0402_50V7K
ISUMP_IA <43>
1

470P_0402_50V7K 316_0402_1% 390P_0402_50V7K @ PR653 1.5K_0402_1%


PC621 680P 470P
PC614 U23@
<15> VSSSENSE
20M_0402_5% DELL CONFIDENTIAL/PROPRIETARY
PR621 1K 316 Local sense put on HW site
2

Security Classification Compal Secret Data Compal Electronics, Inc.


PC617 220P 390P 2015/12/07 2017/01/31 Title
Issued Date Deciphered Date PWR_+VCC_SA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
6800P_0402_25V7K Size Document Number Rev
PC614 2200P 6800P AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS X00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 42 of 46
5 4 3 2 1
5 4 3 2 1

VCC_core VCC_GT
U22 - 15W U22 - 15W
Loadline : 2.4m-ohm Loadline : 3.1m-ohm
U23e - 15W/28W U23e - 15W/28W
Loadline : 2.4m-ohm Loadline : 2m-ohm

15W-U22/U23e U22-15W
TDC 21A TDC 18A
Peak Current 29A Peak Current 31A
D D
OCP current 34A OCP current 37A
Choke DCR 0.66 +-7%m ohm Choke DCR 0.66 +-7%m ohm

28W-U23e U23e-15W
+19VB TDC 23A TDC 43A
@ PJP601
1 2 Peak Current 32A Peak Current 64A
CPU_B+ PAD-OPEN 4x4m
OCP current 38A OCP current 77A
Choke DCR 0.66 +-7%m ohm Choke DCR 0.66 +-7%m ohm
1
U23e-28W

@EMI@

@EMI@

33U_25V_M
+

PC606
TDC 53A

1000P_0402_50V7K

2200P_0402_50V7K
10P_0402_25V8J

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6
2
@ PJP602 Peak Current 64A
1 2
+5VALW OCP current 77A

1
1

1
PC686

PC680

PC656

PC658
PC657

PC659

PC660
PAD-OPEN 4x4m Choke DCR 0.66 +-7%m ohm
1

<42> PWM_IA
5.11K_0402_1%

PR655 @

2
2

2
1 2
PR662

@EMI@ PL606
1U_0402_10V6K
1

1 2
GPU_B+ +19VB
PC661

0_0402_5%
5A Z150 20M 1210_2P
2
2

@
PU603 1

33U_25V_M
13 6 +

PC690
14 VCC VIN 12
PR659 @ 1 VCC VIN PL603
1 2 0_0603_5% 2 PWM .15UH +-20% 29A 7X7X4 MOLDING 2 GPU_B+
<42> FCCM_IA 1 PR660 2 3 FCCM 10
C
0_0402_5% 4 BOOT GL 9 C
GH GL 8 CORE_SW 4 1
0.22U_0402_16V7K
1 2 5
VSWH
VSWH RF@ +VCC_CORE

@EMI@

PC674 @EMI@
11 3 2
PC655 PGND 7
4.7_1206_5%

U23@ 1000P_0402_50V7K

2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6
PGND
1

10P_0402_25V8J
1
PR663

AOZ5029QI_QFN24_5X3P5 PR661

1
PC687

PC681

PC664

U23@ PC665

PC668
3.65K_0603_1%

2
2

2
<42> PWM2_GT
2

1
5.11K_0402_1%

1U_0402_10V6K
CORE_SNUB

1
<42>

<42>
ISUMP_IA

ISUMN_IA

PR681

U23@
U23@ PC669

VCC_GT_5V
2
@

2
680P_0603_50V7K

PU604
1

RF@ PC662

13 6
U23@ PR664 14 VCC VIN 12
2

0_0402_5% 1 VCC VIN U23@ PL604


2 1 0_0603_5% 2 PWM .15UH +-20% 29A 7X7X4 MOLDING
<42,43> FCCM_GT FCCM
U23@ 1 PR665 2 3 10
4 BOOT GL 9
GH GL 8 GT_SW2 4 1
0.22U_0402_16V7K VSWH +VCC_GT

PR669 @EMI@
1 2 5
VSWH 11 3 2
GPU_B+ U23@ PC663 PGND 7

4.7_1206_5%

GT2P
PGND

1
GT2N

1
AOZ5029QI_QFN24_5X3P5 U23@ PR667 U23@ PR668 U23@ PR666
15W@_U23 3.65K_0603_1% 100K_0402_1% 10_0402_1%
EMI@

B 1 2 1 2 B

<42,43> 2
PC672 U23@

PC666 RF@
1000P_0402_50V7K

2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

2
ISUMP_GT
10P_0402_25V8J

<42> ISEN2_GT
+5VALW

<42,43>
ISUMN_GT
10P_0402_25V8J
1

1
1

1
PC688

PC679

PC667
PC673

@ PR670
GT1N 1 2
PR658 @ 100K_0402_1%

1 GT_SNUB2
2

2
2

<42> PWM1_GT 1 2
1
5.11K_0402_1%

1U_0402_10V6K
1
PR680

0_0402_5%
VCC_GT_5V
PC677

680P_0603_50V7K
2

@EMI@ PC670
2

2
PU605
13 6
14 VCC VIN 12
PR671 @ 1 VCC VIN PL605
1 2 0_0603_5% 2 PWM .15UH +-20% 29A 7X7X4 MOLDING
<42,43> FCCM_GT FCCM
1 PR672 2 3 10
0_0402_5% 4 BOOT GL 9
GH GL 8 GT_SW1 4 1
0.22U_0402_16V7K
1 2 5 VSWH
+VCC_GT
RF@

VSWH 11 3 2
PC671 PGND 7
4.7_1206_5%

GT1P

PGND
1

GT1N PU604 28W@ PU605 28W@


1
PR676

AOZ5029QI_QFN24_5X3P5 PR674 U23@ PR675 PR673


15W@_U22 3.65K_0603_1% 100K_0402_1% 10_0402_1%
1 2 1 2
2

<42> ISEN1_GT AOZ5049QI_QFN24_5X3P5 AOZ5049QI_QFN24_5X3P5


<42,43>
ISUMN_GT

A A
@ PR677
GT_SNUB1

GT2N 2 1
100K_0402_1%
<42,43>
ISUMP_GT

DELL CONFIDENTIAL/PROPRIETARY
PC678 RF@

680P_0603_50V7K
1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/12/07 Deciphered Date 2017/01/31 Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+VCC_core and +VCC_GT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS X00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 43 of 46
5 4 3 2 1
5 4 3 2 1

PR1202 U23@
U23@ U23@

1
100K_0402_1%
PR1203 PC1201
2 1 LP#_+VCCEOPIO 0_0603_5% 0.1U_0402_10V7K
<13> PM_ZVM# BST_+VCCEOPIO 1 2 BST_R_+VCCEOPIO 1 2
IOCP=7A~8A(typ)
U23@ PR1201 Continus=6A
0_0402_5%

2
U23@ U23@

9
@ PJP1201 PU1200 PL1201
JUMP_43X79 0.68UH_7.9A_20%_5X5X3_M

MODE
LP#

BST
VIN_+VCCEOPIO SW_VCCEOPIO
*;O, 1
1 2
2 1
EN_+VCCEOPIO5
VIN SW
8 1 2
*; 4, -,

10U_0603_25V6M
12

0.1U_0402_25V6
EN VOUT

1
EMI@U23@ PC1202

U23@ PC1203
U23@ U23@ U23@

1
D C1_1.0VS_VCCOPCP3 2 D

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
C1 PGND SW_VCCEOPIO

1
C0_1.0VS_VCCOPCP4

PC1206

PC1207

PC1208
11

2
C0 AGND

3V3
@EMI@

PG
PR1208

2
NB681GD-Z_QFN13_2X3 4.7_1206_5%

13

10

2
1
@EMI@
PC1209
U23@ PR1204 680P_0402_50V7K

2
<11,16,22,35> SIO_SLP_S3# 2 1
*+, @ PJP1202

1
0_0402_5% JUMP_43X79

0.1U_0402_25V6
1
@ PC1204
@ PR1205 1 2
+1.0VS_VCCOPCP 1 2 +1.0VS_VCCOPC

1
100K_0402_1% U23@
PC1205

2
1U_0402_6.3V6K

2
*+,
C0_1.0VS_VCCOPCP
*; 4, -,

1
100K_0402_1%
5 8

PR1206
U23@
B ;E

1
100K_0402_1%
$H < 7/ 9 3

PR1207
U23@

2
< 7/ =AJ !: @?

2
C1_1.0VS_VCCOPCP
#.H BJ 45.#5
C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/12/07 Deciphered Date 2017/01/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+VCCEDRAM / +VCCEPOIO
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS X00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 44 of 46
5 4 3 2 1
4
3
2
1
+VCC_CORE

A
A

2
1
+
220U_D2_2V_Y 2 1 2 1
2
1

PC1127
PC1099 PC1083 PC1076

+VCC_GT
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M

2
1
+
2 1 2 1

2
1
2
1

220U_D2_2V_Y
PC1062 PC1095 PC1030 PC1081 PC1078

2
1
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1221 2 1 2 1 2 1
Back Side.

2
1

2
1
22U_0603_6.3V6M
PC1170 PC1094 PC1031 PC1080 PC1077

2
1
22U_0603_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
Primary Side.

PC1222 @ 2 1 2 1 2 1
2
1

2
22U_0603_6.3V6M 1
PC1171 PC1096 PC1032 PC1082 @ PC1079

2
1
22U_0603_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1223 @ 2 1 2 1 2 1
2
1

2
1

22U_0603_6.3V6M
PC1172 PC1090 PC1033 PC1067 PC1001

2
1
22U_0603_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
VCC_CORE Place on CPU

PC1224 @ 2 1 2 1 2 1
2
1
2
1

22U_0603_6.3V6M
@ PC1173 PC1093 PC1034 PC1072 @ PC1002 @

2
1
22U_0603_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1158 U23@ 2 1 2 1 2 1
2
1

2
1

22U_0603_6.3V6M
@ PC1174 PC1091 PC1035 PC1069 PC1003

2
1
22U_0603_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1162 2 1 2 1
2
1
2
1

22U_0603_6.3V6M
22U_0603 * 20 pcs+220u_D2*2 pcs

PC1097 PC1036 PC1074 PC1004 @

2
1
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
22U_0603 * 13 pcs +1U_0201*35 pcs

PC1159 2 1 2 1

B
B

2
1
2
1

22U_0603_6.3V6M
PC1092 PC1037 PC1070 PC1005 @

2
1
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1154 U23@ 2 1 2 1
2
1
2
1

22U_0603_6.3V6M
PC1098 PC1038 PC1061 @ PC1006 @

2
1
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1161 U23@ 2 1 2 1
2
1
2
1

22U_0603_6.3V6M
PC1050 PC1039 PC1071 PC1007 @

2
1
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

PC1161,PC1158,PC1155,PC1182,PC1134,PC1181,PC1023,PC1132,PC1154
PC1163 @ 2 1 2 1
2
1
2
1

22U_0603_6.3V6M
PC1051 PC1084 PC1066 PC1008

2
1
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1155 U23@ 2 1 2 1

U23@
2
1
2
1

22U_0603_6.3V6M

-
PC1052 PC1086 PC1073 PC1009

2
1
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1156 2 1 2 1
2
1
2
1

22U_0603_6.3V6M

" 8
PC1053 PC1085 PC1068 PC1010
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
2
1

PC1054 PC1088 PC1075 PC1011 @


1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
2
1

Back Side.
PC1126 PC1087 PC1064 PC1012 @
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1

2
1

Primary Side.

Issued Date
PC1164 PC1089 PC1065 PC1013 @

C
C

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


22U_0603 * 8 pcs 2 1

Security Classification
PC1125
1U_0201_6.3V6M
VCC_SA Place on CPU

2014/11/05
22U_0603 * 4 pcs + 1U_0201*7 pcs
+VCC_GT

2
1
+

330U_D2_2V_Y
PC1128 @
2 1
2
1
2
1

2
1
+

PC1040 PC1133 PC1014


220U_D2_2V_Y 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
PC1063 2 1
2
1

2
1

+VCC_SA

Compal Secret Data


PC1041 PC1137 PC1015

Deciphered Date
2
1
+

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


220U_D2_2V_Y 2 1
2
1
2
1

PC1101
2 1 PC1042 PC1129 PC1016
2
1

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

D
D

2 1 2 1
Back Side.

PC1153 PC1057
2
1
2
1

1U_0201_6.3V6M 22U_0603_6.3V6M
2 1 PC1181 U23@ PC1043 PC1132 U23@ PC1017
2
1
Primary Side.

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC1147 PC1058 2 1 2 1
2
1

2
1

1U_0201_6.3V6M 22U_0603_6.3V6M
2014/12/15

2 1 PC1180 PC1044 PC1136 PC1018


2
1

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1148 PC1059 2 1 2 1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2
1
2
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

1U_0201_6.3V6M 22U_0603_6.3V6M
VCC_GT Place on CPU

2 1 PC1177 PC1045 PC1134 U23@ PC1019


2
1

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1149 PC1060 2 1 2 1
2
1
2
1

1U_0201_6.3V6M 22U_0603_6.3V6M
2 1 PC1179 PC1046 PC1135 PC1020
2
1

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1150 PC1139 2 1 2 1
2
1

2
1

1U_0201_6.3V6M 22U_0603_6.3V6M
Size
Title

Date:

2 1 PC1176 PC1047 PC1138 PC1021


2
1

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1151 PC1140 2 1 2 1
2
1

2
1

1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
22U_0603 * 13 pcs +220u_D2*2 pcs

PC1178 PC1048 PC1027 @ PC1022 @


2
1
22U_0603 * 13 pcs +1U_0201*12 pcs

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1152 PC1141 2 1 2 1
2
1

2
1

1U_0201_6.3V6M 22U_0603_6.3V6M
PC1175 PC1049 PC1028 @ PC1023 U23@
Document Number
2
1

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1142 2 1 2 1
2
1

2
1

22U_0603_6.3V6M
Monday, June 06, 2016

PC1182 U23@ PC1055 PC1130 PC1024 @


2
1

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1143 2 1 2 1
2
1
2
1

22U_0603_6.3V6M
PC1184 PC1056 PC1029 PC1025 @
E
E

2
1

22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1144 2 1
2
1

2
1

22U_0603_6.3V6M
Sheet

PC1183 PC1131 PC1026 @


2
1

22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


PC1145
45

22U_0603_6.3V6M
2
1

Compal Electronics, Inc.

of

PC1146
22U_0603_6.3V6M
DELL CONFIDENTIAL/PROPRIETARY

46
PWR_CPU&VGA bulk and MLCC
R ev
4
3
2
1

X00(0.1)
5 4 3 2 1

www.facebook.com/casalaptopguide
Version Change List ( P. I. R. List )
Request Issue Solution
Item Page# Title Date Owner Description Description Rev.
D 1 P37 PWR 20160303 COMPAL to change charger IC change charger IC(PU703) to ISL88739 D
0.2(X01)
P39 add PC208
P43 add PC666,PR676,PC678
2 P45 PWR 20160303 COMPAL to prevent RF issue add PC1116,PR1122,PC1109,
P46 add PC1402,PR1408,PC1408
3 P42 PWR 20160303 COMPAL to adjust +VCC_CORE and +VCC_GT load line change PR622 to 1.91K,PR638 to 287 ohm,PC626 to 0.1uF,PC642 to 0.1uF

4 P36,P42 PWR 20160303 COMPAL to save layout space delete PL3,PL602(reserve location)

5 P36 PWR 20160303 COMPAL to fix battery connector ME issue to change battery connector

6 P37 PWR 20160304 COMPAL to fix Temp/Voltage 19.5V DC-IN issue change PR732 to 53.6K
7 P44 PWR 20160304 COMPAL to fix DFB solder open problem change PC1127,PC1062,PC1128 footprint
8 P38 PWR 20160308 COMPAL to prevent OTP functions abnormal issue to reserve PQ102 and connect to ALL_SYS_PWRGD
C 9 P37 PWR 20160316 COMPAL to save layout space by EMI request change PC760,PC762,PC763,PC764 to 0603 size and delete PR766,PC767 C

10 PWR 20160328 COMPAL according to test result to adjust VCC_CORE to unmount PC624 and PC646
P43 and GT_CORE's load line

according to test result to adjust VCC_CORE unmount:PC1021,PC1135,PC1133,PC1131,PC1022,PC1025,PC1027,


and GT_CORE's output MLCC's location(only PC1028,PC1063,
COMPAL change BOM) and bulk cap PC1008,PC1003,PC1011,PC1072,PC1076,PC1071,PC1081,PC1082,PC1004,
11 P45 PWR 20160328
PC1007,PC1012
to mount:PC1176,PC1175,PC1177,PC1179,PC1178,PC1180,PC1183,PC1184,
PC1170,PC1173,PC1174
to change PC1127,PC1062 to 220uF/9m ohm
COMPAL To improve EMI and reduce inrush current to unmount:PL1,PL4
12 P36 PWR 20160429 mount filter’ s bead and change cap change:PC2,PC4 to 100pF
ISL88739 doesn't support PSYS function unmount:PR727
13 PWR 20160429 COMPAL change PR774 to 1K ohm
P37
change PC748 0.1uF
B B
14 P39 PWR 20160429 COMPAL to adjust 1.2V OCP to 10.2A change PR205 to 11K
0.3(X02)
15 P37 PWR 20160429 COMPAL to aviod inrush to damage MOS to reserve PQ741

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/07/15 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_Change list
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0(A00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, June 06, 2016 Sheet 46 of 46
5 4 3 2 1

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