Assignments for Low Power VLSI Design

1. What is GDI? Design Full Adder using GDI. What are the shortcomings of the
method? 3+5+2

2. How the concept of multi-voltage and multi-threshold is useful to reduce power

consumption of a system. What are the challenges involved in multi-voltage and
multi-threshold designs? 6+4

3. How changes in behavior of clock (e.g.: decrease in clock swing, increase in rise/
fall time) can help in power reduction? 5

4. Explain the process of reducing the leakage power by transistor and logic gate
sizing. 5+5

5. Write short notes on: 5x5

a) Level Shifters
b) Power Gating (or) Clock gating
c) Adiabatic Logic
d) DVFS
e) Subthreshold Channel Leakage.