Anda di halaman 1dari 6

Laboratory Experiment No: 2

Half/Full Adder And


Half/Full Subtractor

Objective:
 To realize half/full adder and half/full subtractor.

 Using X-OR and basic gates

Instruments and Components:


ICs
 7486  7408
 7432  7404
Breadboard with power supply (5V, 350 mA)
Digital Multimeter
Long nose pliers

Procedure:
1. Verify the gates.

2. Make the connections as per the circuit diagram.

3. Switch on VCC and apply various combinations of input according to the truth table.

4. Note down the output readings for half/full adder and half/full subtractor sum/difference
and the carry/borrow bit for different combinations of input.

Page 1 of 6
Circuit Diagram:

Half Adder using Basic Gates:

Full Adder using Basic Gates:

Full-Adder
A B Cn-1 S C S(V) C(V)
0 0 0 0 0 0.12 0.14
Half-Adder
0 0 1 1 0 2.28 0.14
A B S C S(V) C(V)
0 1 0 1 0 2.32 0.14
0 0 0 0 0.11 0.15
0 1 1 0 1 0.15 2.27
0 1 1 0 2.27 0.15
1 0 0 1 0 2.30 0.14
1 0 1 0 2.29 0.15
1 0 1 0 1 0.15 2.28
1 1 0 1 0.13 2.25
1 1 0 0 1 0.12 2.24
1 1 1 1 1 2.27 2.24

Page 2 of 6
(a) Half Subtractor:

(b) Full Subtractor:

Full-Subtractor
Half-Subtractor A B Cn-1 D B D(V) B(V)
A B D B D(V) B(V) 0 0 0 0 0 0.12 0.14
0 0 0 0 0.11 0.15 0 0 1 1 1 2.30 2.24
0 1 1 1 2.29 2.24 0 1 0 1 1 2.29 2.22
1 0 1 0 2.29 0.15 0 1 1 0 1 0.15 2.24
1 1 0 0 0.13 0.15 1 0 0 1 0 2.29 0.14
1 0 1 0 0 0.15 0.14
1 1 0 0 0 0.11 0.14
1 1 1 1 1 2.30 2.24

Page 3 of 6
Breadboard Layout:

Half Adder

Full Adder

Page 4 of 6
Half Subtractor

Full Subtractor

Page 5 of 6
Conclusion:
three inputs (A, B, Cn-1) and two outputs (S, C). The third input, Cn-1, represents the carry from
the previous lower significant position. Two outputs are necessary because the arithmetic sum
of three binary digits ranges in value from 0 to 3, and binary 2 or 3 needs two digits. The two
outputs are designated by the symbols S for sum and C for carry. The binary variable S gives
the value of the least significant bit of the sum. The binary variable C gives the output carry. The
full-adder is simply two half-adders joined by an OR gate. The C output is 1 only when two or
more inputs are 1.

A half-subtractor is a combinational circuit which is used to perform subtraction of two


bits. It has two inputs, A (minuend) and B (subtrahend) and two outputs D (difference) and B
(borrow). It is made of X-OR gate, NOT gate (Inverter), and AND gate. The B output is 1 only
when the subtrahend (B) is greater than the minuend (A).

As in the case of the addition using logic gates, a full subtractoris made by combining
two half-subtractors and an additional OR-gate. A full subtractor has the borrow in capability and
so allows cascading which results in the possibility of multi-bit subtraction.

Digital computers perform variety of information tasks. Among the functions


encountered are the various arithmetic operations. The most basic arithmetic operation is the
addition or subtraction of two binary digits. A binary adder-subtractor is a combinational circuit
that performs the arithmetic operations of addition and subtraction with binary numbers.

A half-adder is composed of one X-OR gate and one AND gate that produces two binary
outputs from two binary inputs. It adds two one-bit binary numbers (A, B). The output is the sum
of the two bits (S) and the carry (C). The C output is 1 only when both inputs are 1. The S output
represents the least significant bit of the sum.

A full-adder is a combinational circuit that forms the arithmetic sum of three bits. It
consists of

Page 6 of 6