in
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Now from the above figure it is clear that BJT has three regions of Operation
1. Cut-Off Region
2. Saturation Region
3. Active Region
In linear electronics, we operate the transistor in its active region which can also be
called ohmic region in which there is a relation-ship between current and the
voltage with some gain value. This region is used in amplifiers circuits where we
want to vary the current from collector to the emitter according to our need. In
active region, the transistor itself also draws some power and hence causes power
loss in it, which in return decrease the efficiency of the device.
Power Electronics
In power electronics, we deal with the cut-off and the saturation region of the
transistor. Hence the transistor becomes a switch. When it is in cut off region, no
current flows from collector to emitter ideally and it acts as an Off Switch. When it
is in saturation region, rated current can flow from collector to emitter, hence act
as an On Switch.
This the key difference between the mode of operation of transistor which gives
rise to a complete new field in electronics called power electronics. The main
feature of power electronics is high efficiency power conversion because in either
On state or Off state the power drawn by the transistor is zero (ideally), and hence
high efficient devices can be built with efficiency as high as 96%.
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The switching converters which are the core of the power electronics actually use
high speed switching transistors like MOSFETs and IGBTs which are also capable
of sustaining voltages upto 1200 V and high currents. So these power devices help
in the manufacturing of high speed devices
The trade-offs between voltage, current, and frequency ratings also exist for a
switch. In fact, any power semiconductor relies on a PIN diode structure in order to
sustain voltage; this can be seen in figure 2. The power MOSFET has the
advantages of a majority carrier device, so it can achieve a very high operating
frequency, but it cannot be used with high voltages; as it is a physical limit, no
improvement is expected in the design of a silicon MOSFET concerning its
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maximum voltage ratings. However, its excellent performance in low voltage
applications make it the device of choice (actually the only choice, currently) for
applications with voltages below 200 V. By placing several devices in parallel, it is
possible to increase the current rating of a switch. The MOSFET is particularly
suited to this configuration, because its positive thermal coefficient of resistance
tends to result in a balance of current between the individual devices.
The IGBT is a recent component, so its performance improves regularly as
technology evolves. It has already completely replaced the bipolar transistor in
power applications; a power module is available in which several IGBT devices are
connected in parallel, making it attractive for power levels up to several megawatts,
which pushes further the limit at which thyristors and GTOs become the only
option. Basically, an IGBT is a bipolar transistor driven by a power MOSFET; it
has the advantages of being a minority carrier device (good performance in the on-
state, even for high voltage devices), with the high input impedance of a MOSFET
(it can be driven on or off with a very low amount of power).
The major limitation of the IGBT for low voltage applications is the high voltage
drop it exhibits in the on-state (2-to-4 V). Compared to the MOSFET, the operating
frequency of the IGBT is relatively low (usually not higher than 50 kHz), mainly
because of a problem during turn-off known as current-tail: The slow decay of the
conduction current during turn-off results from a slow recombination of a large
number of carriers that flood the thick 'drift' region of the IGBT during conduction.
The net result is that the turn-off switching loss of an IGBT is considerably higher
than its turn-on loss. Generally, in datasheets, turn-off energy is mentioned as a
measured parameter; that number has to be multiplied with the switching frequency
of the intended application in order to estimate the turn-off loss.
At very high power levels, a thyristor-based device (e.g., a SCR, a GTO, a MCT,
etc.) is still the only choice. This device can be turned on by a pulse provided by a
driving circuit, but cannot be turned off by removing the pulse. A thyristor turns
off as soon as no more current flows through it; this happens automatically in an
alternating current system on each cycle, or requires a circuit with the means to
divert current around the device. Both MCTs and GTOs have been developed to
overcome this limitation, and are widely used in power distribution applications.
A few applications of power semiconductors in switch mode include lamp
dimmers, switch mode power supplies, induction cookers, automotive ignition
systems, and AC and DC electric motor drives of all sizes.
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Power Diode is the two terminal(namely anode and cathode) two layer(PN)
device which is used in most of the power electronics circuits. The power
semiconductor diode is similar to low power PN junction diode (signal diode). In fact,
power diode is more complex in structure and in operation than their low power
counterparts. This complexity happens because low power device must be modified to
make them suitable for high power applications.
When the anode terminal is positive with respect to cathode, it is known as
forward biased. When the anode terminal is negative with respect to the cathode, it is
known as reverse biased.
The power diode plays the vital role in the power electronics circuits. The
major and most important applications of power diode in converter circuits are
working as a rectifier ( remember that the rectification operation is uncontrollable),
freewheeling diode or flyback diode, reverse voltage protection, voltage regulation
circuits etc.
When the anode is positive with respect to the cathode terminal the diode
starts conducting. Then it act as an uncontrolled switch. ie we no need to provide any
gate/base voltage to make it conduct the current. It operation as switch cannot be
controlled by applying controlling voltage/current.
The structure of the power diode is little different from the small signal
diodes. In this post we will discuss about the power diode structure in detail. The
fundamentals of power diode is discussed separately. Please click here to know about
basics of Power Diode.
As shown in the figure, there is heavily doped n+ substrate with doping level of
1019/cm3. This substrate forms a cathode of the power diode.
On n+ substrate, lightly doped n- epitaxial layer is grown. This layer is also known
as drift region. The doping level of n- layer is about 1014/cm3.
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The the PN junction is formed by diffusing a heavily doped p+ region. This p+
region forms anode of the diode. The doping level of p+ region is about 1019/cm3.
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Cut-in voltage is the value of the minimum voltage for VA (anode voltage) to make the diode works
in forward conducting mode. Cut-in voltage of signal diode is 0.7 V while in power diode it is 1 V. So,
its typical forward conduction drop is larger. Under forwardbias condition, signal diode current
increases exponentially and then increases linearly. In the case of the power diode, it almost
increases linearly with the applied voltage as all the layers of P-I-N remain saturated with minority
carriers under forward bias. Thus, a high value of current produces results in voltage drop which
mask the exponential part of the curve. In reverse-bias condition, small leakage current flows due to
minority carriers until the avalanche breakdown appears as shown in Fig. 3.
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After the forward diode comes to null, the diode continues to conduct in the opposite direction
because of the presence of stored charges in the depletion layer and the p or n-layer. The diode
current flows for a reverse-recovery time trr. It is the time between the instant forward diode
current becomes zero and the instant reverse-recovery current decays to 25 % of its reverse
maximum value.
Time Ta : Charges stored in the depletion layer removed.
Time Tb : Charges from the semiconductor layer is removed.
Shaded area in Fig 4.a represents stored charges QR which must be removed during reverse-
recovery time trr.
Power loss across diode = vf * if (shown in Fig. 4.c)
As shown, major power loss in the diode occurs during the period tb.
Recovery can be abrupt or smooth as shown in Fig. 5. To know it quantitatively, we can use the
S – factor.
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Schottky Diode: It has an aluminum-silicon junction where the silicon is an n-type. As the metal
has no holes, there is no stored charge and no reverse-recovery time. Therefore, there is only
the movement of the majority carriers (electrons) and the turnoff delay caused by
recombination process is avoided. It can also switch off much faster than a p-n junction diode.
As compared to the p-n junction diode it has:
(a) Lower cut-in voltage
(b) Higher reverse leakage current
(c) Higher operating frequency
Application: high-frequency instrumentation and switching power supplies.
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MOSFET is a voltage-controlled majority carrier (or unipolar) three-terminal device. Its symbols
are shown in Fig. 7 and Fig. 8. As compared to the simple lateral channel MOSFET for low-
power signals, power MOSFET has different structure. It has a vertical channel structure where
the source and the drain are on the opposite side of the silicon wafer as shown in Fig. 10. This
opposite placement of the source and the drain increases the capability of the power MOSFET
to handle larger power.
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In all of these connections, substrates are internally connected. But in cases where it is
connected externally, the symbol will change as shown in the n-channel enhancement type
MOSFET in Fig. 9. N-channel enhancement type MOSFET is more common due to high mobility
of electrons.
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Basic circuit diagram and output characteristics of an n-channel enhancement power MOSFET
with load connected are in Fig. 11 and Fig. 12 respectively.
Drift region shown in Fig. 11 determines the voltage-blocking capability of the MOSFET.
When VGS = 0,
VDD makes it reverse biased and no current flows from drain to source.
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When VGS > 0,
Electrons form the current path as shown in Fig. 11. Thus, current from the drain to the
source flows. Now, if we will increase the gate-to-source voltage, drain current will also
increase.
Figure 12. Drain Current (ID) vs Drain-to-Source Voltage (VDS) Characteristics Curves
For lower value of VDS, MOSFET works in a linear region where it has a constant resistance equal
to VDS / ID. For a fixed value of VGS and greater than threshold voltage VTH, MOSFET enters a
saturation region where the value of the drain current has a fixed value.
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If XY represents the load line, then the X-point represents the turn-off point and Y-point is the
turn-on point where VDS = 0 (as voltage across the closed switch is zero). The direction of
turning on and turning off process is also shown in Fig. 13.
Besides the output characteristics curves, transfer characteristics of power MOSFET is also
shown in Fig. 14.
Figure 14. Gate-to-Source Voltage vs. Drain Current Characteristics for Power MOSFET
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Here, VTH is the minimum positive voltage between gate and the source above which MOSFET
comes in on-state from the off-state. This is called threshold voltage. It is also shown in the
output characteristics curve in Fig. 12.
Close view of the structural diagram given in Fig. 11 reveals that there exists a fictitious BJT and
a fictitious diode structure embedded in the power MOSFET as shown in Fig. 15.
As source is connected to both base and emitter of this parasitic BJT, emitter and base of the
BJT are short circuited. That means this BJT acts in cut-off state.
Figure 15. Fictitious BJT and Fictitious Diode in the Power MOSFET
Fictitious diode anode is connected to the source and its cathode is connected to the drain. So,
if we apply the negative voltage VDD across the drain and source, it will be forward biased. That
means, the reverse-blocking capability of the MOSFET breaks. Thus, this can be used in inverter
circuit for reactive loads without the need of excessive diode across a switch. Symbolically, it
is represented in Fig. 16.
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Although MOSFET internal body diode has sufficient current and switching speed for most of
the applications, there may be some applications where the use of ultra-fast diodes is required.
In such cases, an external fast-recovery diode is connected in an antiparallel manner. But a
slow-recovery diode is also required to block the body diode action as given in Fig. 17.
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One of the important parameters that affects the switching characteristics is the body
capacitances existing between its three terminals i.e. drain, source and gate. Its representation
is shown in Fig. 18.
Parameters CGS, CGD and CDS are all non-linear in nature and given in the device’s data sheet of a
particular MOSFET. They also depend on the DC bias voltage and the device’s structure or
geometry. They must be charged through gate during turn-on process to actually turn on the
MOSFET. The drive must be capable of charging and discharging these capacitances to switch
on or switch off the MOSFET.
Thus, the switching characteristics of a power MOSFET depend on these internal capacitances
and the internal impedance of the gate drive circuits. Also, it depends on the delay due to the
carrier transport through the drift region. Switching characteristics of power MOSFET are
shown in Fig. 19 and Fig. 20.
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There is a delay from t0 to t1 due to charging of input capacitance up to its threshold voltage
VTH. Drain current in this duration remains at zero value. This is called a delay time. There is a
further delay from t1 to t2 during which the gate voltage rises to VGS, a voltage required to drive
the MOSFET into on-state. This is called the rise time. This total delay can be reduced by using
a low-impedance drive circuit. The gate current during this duration decreases exponentially
as shown. For the time greater than t2, the drain current ID has reached its maximum constant
value I. As drain current has reached the constant value, the gate-to-source voltage is also
constant as shown in the transfer characteristics of MOSFET in Fig. 20.
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For turn-off characteristics, assume that the MOSFET is already in the switched-on situation
with steady state. As t = t0, gate voltage is reduced to zero value; CGS and CGD start to discharge
through gate resistance RG. This causes a turn-off delay time up to t1 from t0 as shown in Fig.
21. Assuming the drain-to-source voltage remains fixed. During this duration, both VGSand IG
decreases in magnitude, drain current remains at a fixed value drawing current from C GD and
CGS.
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For the time where t2 > t > t1, gate-to-source voltage is constant. Thus, the entire current is now
being drawn from CGD. Up to time t3, the drain current will almost reach zero value; which turns
off the MOSFET. This time is known as the fall time, this is when the input capacitance
discharges up to the threshold value. Beyond t3, gate voltage decreases exponentially to zero
until the gate current becomes zero.
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Power BJT is used traditionally for many applications. However, IGBT (Insulated-Gate Bipolar
Transistor) and MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) have replaced it
for most of the applications but still they are used in some areas due to its lower saturation
voltage over the operating temperature range. IGBT and MOSFET have higher input
capacitance as compared to BJT. Thus, in case of IGBT and MOSFET, drive circuit must be
capable to charge and discharge the internal capacitances.
The BJT is a three-layer and two-junction npn or pnp semiconductor device as given in Fig. 22.
(a) and (b).
Although BJTs have lower input capacitance as compared to MOSFET or IGBT, BJTs are
considerably slower in response due to low input impedance. BJTs use more silicon for the
same drive performance.
In the case of MOSFET studied earlier, power BJT is different in configuration as compared to
simple planar BJT. In planar BJT, collector and emitter is on the same side of the wafer while in
power BJT it is on the opposite edges as shown in Fig. 23. This is done to increase the power-
handling capability of BJT.
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Power n-p-n transistors are widely used in high-voltage and high-current applications which
will be discussed later.
Input and output characteristics of planar BJT for common-emitter configuration are shown in
Fig. 24. These are current-voltage characteristics curves.
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Figure 24. Input Characteristics and Output Characteristics for the Common-Emitter Configuration
of Planar BJT respectively
Characteristic curves for power BJT is just the same except for the little difference in its
saturation region. It has additional region of operation known as quasi-saturation as shown in
Fig. 25.
This region appears due to the insertion of lightly-doped collector drift region where the
collector base junction has a low reverse bias. The resistivity of this drift region is dependent
on the value of the base current. In the quasi-saturation region, the value of ß decreases
significantly. This is due to the increased value of the collector current with increased
temperature. But the base current still has the control over the collector current due to the
resistance offered by the drift region. If the transistor enters in hard saturation region, base
current has no control over the collector current due to the absence of the drift region and
mainly depends on the load and the value of VCC.
A forward-biased p-n junction has two capacitances named depletion layer capacitance and
diffused capacitance. While a reverse bias junction has only a depletion capacitance in action.
Value of these capacitances depends on the junction voltage and construction of the transistor.
These capacitances come into role during the transient operation i.e. switching operations.
Due to these capacitances, transistor does not turn on or turn off instantly.
Switching characteristics of power BJT is shown in Fig.26. As the positive base voltage is
applied, base current starts to flow but there is no collector current for some time. This time is
known as the delay time (td) required to charge the junction capacitance of the base to emitter
to 0.7 V approx. (known as forward-bias voltage). For t > td, collector current starts rising and
VCE starts to drop with the magnitude of 9/10th of its peak value. This time is called rise time,
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required to turn on the transistor. The transistor remains on so long as the collector current is
at least of this value.
For turning off the BJT, polarity of the base voltage is reversed and thus the base current
polarity will also be changed as shown in Fig. 26. The base current required during the steady-
state operation is more than that required to saturate the transistor. Thus, excess minority
carrier charges are stored in the base region which needs to be removed during the turn-off
process. The time required to nullify this charge is the storage time, t s. Collector current
remains at the same value for this time. After this, collector current starts decreasing and base-
to-emitter junction charges to the negative polarity; base current also get reduced.
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IGBT combines the physics of both BJT and power MOSFET to gain the advantages of both
worlds. It is controlled by the gate voltage. It has the high input impedance like a power
MOSFET and has low on-state power loss as in case of BJT. There is no even secondary
breakdown and not have long switching time as in case of BJT. It has better conduction
characteristics as compared to MOSFET due to bipolar nature. It has no body diode as in case
of MOSFET but this can be seen as an advantage to use external fast recovery diode for specific
applications. They are replacing the MOSFET for most of the high voltage applications with less
conduction losses. Its physical crosssectional structural diagram and equivalent circuit diagram
is presented in Fig. 27 to Fig. 29. It has three terminals called collector, emitter and gate.
There is a p+ substrate which is not present in the MOSFET and responsible for the minority
carrier injection into the n-region. Gain of NPN terminal is reduced due to wide epitaxial base
and n+ buffer layer.
There are two structures of IGBTs based on doping of buffer layer:
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(Note: ➔ means implies)
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Based on this circuit diagram given in Fig.30, forward characteristics and transfer characteristics are
obtained which are given in Fig.31 and Fig.32. Its switching characteristic is also shown in Fig. 33.
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(Note: Tdn : delay time ; Tr: rise time ; Tdf : delay time ; Tf1: initial fall time ; Tf2: final fall time)
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GTO (Gate Turn-off Thyristor)
GTO can be turned on with the positive gate current pulse and turned off with the negative
gate current pulse. Its capability to turn off is due to the diversion of PNP collector current by
the gate and thus breaking the regenerative feedback effect.
Actually the design of GTO is made in such a way that the pnp current gain of GTO is reduced.
Highly doped n spots in the anode p layer form a shorted emitter effect and ultimately
decreases the current gain of GTO for lower current regeneration and also the reverse voltage
blocking capability. This reduction in reverse blocking capability can be improved by diffusing
gold but this reduces the carrier lifetime. Moreover, it requires a special protection as shown
in Fig. 43.
Fig. 40 shows the four Si layers and the three junctions of GTO and Fig. 41 shows its practical
form. The symbol for GTO is shown in Fig.42.
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Overall switching speed of GTO is faster than thyristor (SCR) but voltage drop of GTO is larger.
The power range of GTO is better than BJT, IGBT or SCR.
The static voltage current characteristics of GTO are similar to SCR except that the latching
current of GTO is larger (about 2 A) as compared to SCR (around 100-500 mA).
The gate drive circuitry with switching characteristics is given in Fig. 43 and Fig. 44.
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MODULE II
• Capacitance If a current is applied to a capacitor, the capacitor gradually charges up and the
voltage across it rises linearly at a rate equal to I/C where is the applied current and C is the
capacitance. In this case the voltage across the capacitor cannot change instantly.
When an instantaneous change in current occurs, the voltage changes linearly. [This assumes
a current source with an infinite voltage capability is used].
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• Inductor: : For an inductor, it is not possible for there to be an instantaneous change in
current. Instead, when a voltage is applied, the current builds up linearly over time at a rate
equal to V/L where V is the applied voltage and L is the inductance.
Using the standard equations it is possible to determine the current and voltage profiles:
The energy from the rising current is stored in the magnetic field associated with the inductor.
If the current flowing through the inductor is suddenly interrupted, the magnetic field reacts
against this and produces a very high "back emf" to counteract the change.
Having seen the fundamental or basic concepts behind switching voltages and currents to capacitors
and inductors, these basic concepts can be applied to switch mode regulator solutions to provide a
variety scenarios for voltage step up and step down circuits.
As the technology uses switching techniques where the series element is on or off, this approach
provides much better levels of efficiency than a linear where power is dissipated.
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This circuit is not as effective as may be thought at first sight. Although the only resistive element in
the theoretical circuit is the load, this is not the only way in which energy is lost because charging a
capacitor directly from a voltage source or a capacitor dissipates as much energy as is transferred to
the capacitor. As a result of this, switching mode regulators cannot use capacitor switching techniques
alone.
When the switches are in the positions shown above, the voltage V1 is applied across the inductor and
the current i1 builds up at a rate equal to V1/L. Therefore the peak value obtained will be proportional
to the time the switches are in this position, i.e. (V1/L) x t
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When the switches are reversed, the current will continue to flow at a rate i2 which is equal to -V2/L.
As an ideal inductor dissipates no energy, there is no power loss in an ideal system using an inductor
in this fashion. As a result, it is this method of energy transfer that forms the basis for all switching
regulators.
• +Vin, -Vout: This configuration of a buck-boost converter circuit uses the same number of
components as the simple buck or boost converters. However this buck-boost regulator or
DCDC converter produces a negative output for a positive input. While this may be required
or can be accommodated for a limited number of applications, it is not normally the most
convenient format.
When the switch in closed, current builds up through the inductor. When the switch is opened
the inductor supplies current through the diode to the load.
Obviously the polarities (including the diode) within the buck-boost converter can be reversed
to provide a positive output voltage from a negative input voltage.
• +Vin, +Vout: The second buck-boost converter circuit allows both input and output to be the
same polarity. However to achieve this, more components are required. The circuit for this
buck boost converter is shown below.
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In this circuit, both switches act together, i.e. both are closed or open. When the switches are
open, the inductor current builds. At a suitable point, the switches are opened. The inductor
then supplies current to the load through a path incorporating both diodes, D1 and D2.
For the step up mode, the input voltage is less than the output voltage (Vin < Vout). It
shows that the output current is less than the input current. Hence the buck booster is a
step up mode.
In the step down mode the input voltage is greater than the output voltage (Vin > Vout). It
follows that the output current is greater the input current. Hence the buck boost converter
is a step down mode.
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It is a type of DC to DC converter and it has a magnitude of output voltage. It may be more
or less than equal to the input voltage magnitude. The buck boost converter is equal to
the fly back circuit and single inductor is used in the place of the transformer. There are
two types of converters in the buck boost converter that are buck converter and the other
one is boost converter. These converters can produce the range of output voltage than
the input voltage. The following diagram shows the basic buck boost converter.
There are two different types of working principles in the buck boost converter.
• Buck converter.
• Boost converter.
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Buck Converter
Working
The inductor L is the initial source of current. If the first transistor is OFF by using the
control unit then the current flow in the buck operation. The magnetic field of the inductor
is collapsed and the back e.m.f is generated collapsing field turn around the polarity of
the voltage across the inductor. The current flows in the diode D2, the load and the D1
diode will be turned ON.
The discharge of the inductor L decreases with the help of the current. During the first
transistor is in one state the charge of the accumulator in the capacitor. The current flows
through the load and during the off period keeping Vout reasonably. Hence it keeps the
minimum ripple amplitude and Vout closes to the value of Vs
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By charging the capacitor C the load is applied to the entire circuit in the ON State and it
can construct earlier oscillator cycles. During the ON period the capacitor C can discharge
regularly and the amount of high ripple frequency on the output voltage. The approximate
potential difference is given by the equation below.
VS + VL
During the OFF period of second transistor the inductor L is charged and the capacitor C
is discharged. The inductor L can produce the back e.m.f and the values are depending
up on the rate of change of current of the second transistor switch. The amount of
inductance the coil can occupy. Hence the back e.m.f can produce any different voltage
through a wide range and determined by the design of the circuit. Hence the polarity of
voltage across the inductor L has reversed now.
The input voltage gives the output voltage and atleast equal to or higher than the input
voltage. The diode D2 is in forward biased and the current applied to the load current and
it recharges the capacitors to VS + VL and it is ready for the second transistor.
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Continuous Conduction Mode
In the continuous conduction mode the current from end to end of inductor never goes to
zero. Hence the inductor partially discharges earlier than the switching cycle.
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When a large step-up or step-down conversion ratio is required, the use of a transformer can allow better
converter optimization. By proper choice of the transformer turns ratio, the voltage or current stresses
imposed on the transistors and diodes can be minimized, leading to improved efficiency and lower cost.
Multiple dc outputs can also be obtained in an inexpensive manner, by adding multiple secondary
windings and converter secondary-side circuits. The secondary turns ratios are chosen to obtain the
desired output voltages. Usually only one output voltage can be regulated via control of the converter
duty cycle, so wider tolerances must be allowed for the auxiliary output voltages. Cross-regularion is a
measure of the variation in an auxiliary output voltage, given that the main output voltage is perfectly
regulated [18-20].
A physical multiple-winding transformer having turns ratio n1:n2:n3:... is illustrated in Fig. 6.17(a). A
simple equivalent circuit is illustrated in Fig. 6.17(b), which is sufficient for understanding the operation
of most transformer-isolated converters. The model assumes perfect coupling between windings and
neglects losses; more accurate models are discussed in a later chapter. The ideal transformer obeys the
relations
n1 n2 n3 (6.16)
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Fig. 6.17. Simplified model of a multiple-winding transformer (a) schematic symbol, (b) equivalent
circuit containing a magnetizing inductance and ideal transformer.
The magnetizing current iM(t) is proportional to the magnetic field H(t) inside the transformer core.
The physical B-H characteristics of the transformer core material, illustrated in Fig. 6.18, govern the
magnetizing current behavior. For example, if the magnetizing current iM(t) becomes too large, then the
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magnitude of the magnetic field H(t) causes the core to saturate. The magnetizing inductance then
becomes very small in value, effectively shorting out the transformer.
The presence of the magnetizing inductance explains why transformers do not work in dc circuits: at dc,
the magnetizing inductance has zero impedance, and shorts out the windings. In a well-designed
transformer, the impedance of the magnetizing inductance is large in magnitude over the intended
range of operating frequencies, such that the magnetizing current iM(t) has much smaller magnitude
than il(t). Then il’(t) ≈ il(t), and the transformer behaves nearly as an ideal transformer. It should be
emphasized that the magnetizing current iM(t) and the primary winding current il(t) are independent
quantities.
The magnetizing inductance must obey all of the usual rules for inductors. In the model of Fig.
6.17(b), the primary winding voltage vl(t) is applied across LM, and hence diM (t)
L
vl (t) = M (6.17) dt
Integration leads to
i v
1 iM (t) − M (0) = l (τ )dτ (6.18) LM
So the magnetizing current is determined by the integral of the applied winding voltage.
The principle of inductor volt-second balance also applies: when the converter operates in steady-state,
the dc component of voltage applied to the magnetizing inductance must be zero:
1T s
∫v
0= l (t)dt (6.19) Ts 0
Since the magnetizing current is proportional to the integral of the applied winding voltage, it is
important that the dc component of this voltage be zero. Otherwise, during each switching period there
will be a net increase in magnetizing current, eventually leading to excessively large currents and
transformer saturation.
The operation of converters containing transformers may be understood by inserting the model of
Fig. 6.17(b) in place of the transformer in the converter circuit. Analysis then proceeds as described in
the previous chapters, treating the magnetizing inductance as any other inductor of the converter.
Practical transformers must also contain leakage inductance. A small part of the flux linking a winding
may not link the other windings. In the two-winding transformer, this phenomenon may be modeled
with small inductors in series with the windings. In most isolated converters, leakage inductance is a
nonideality that leads to switching loss, increased peak transistor voltage, and that degrades
crossregulation, but otherwise has no influence on basic converter operation.
There are several ways of incorporating transformer isolation into a dc-dc converter. The full-bridge,
half-bridge, forward, and push-pull converters are commonly used isolated versions of the buck
converter. Similar isolated variants of the boost converter are known. The flyback converter is an
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isolated version of the buck-boost converter. These isolated converters, as well as isolated versions of
the SEPIC and the Cuk converter, are discussed in this section.
Fig. 6.19. Full-bridge transformer-isolated buck converter: (a) schematic diagram, (b) replacement of
transformer with equivalent circuit model.
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During the first subinterval 0 < t < DTs, transistors Q1 and Q4 conduct, and the transformer primary
voltage is vT = Vg. This positive voltage causes the magnetizing current iM(t) to increase with a slope of
Vg/LM. The voltage appearing across each half of the center-tapped secondary winding is nVg, with the
polarity mark at positive potential. Diode D5 is therefore forward-biased, and D6 is reverse-biased. The
voltage vs(t) is then equal to nVg, and the output filter inductor current i(t) flows through diode D5.
Several transistor control schemes are possible for the second subinterval DTs < t < Ts. In the most
common scheme, all four transistors are switched off, and hence the transformer voltage is vT = 0.
Alternatively, transistors Q2 and Q4 could conduct, or transistors Q1 and Q3 could conduct. In any event,
diodes D5 and D6 are both forward-biased during this subinterval; each diode conducts approximately
one-half of the output filter inductor current.
Actually, the diode currents iD5 and iD6 during the second subinterval are functions of both the output
inductor current and the transformer magnetizing current. In the ideal case (no magnetizing current),
the transformer causes iD5(t) and iD6(t) to be equal in magnitude since, if il’(t) = 0, then niD5(t)=niD6(t). But
the sum of the two diode currents is equal to the output inductor current:
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ni i
il '(t) − D5 (t)+ (t) = 0
D6 (6.21)
The node equation at the primary of the ideal transformer is
ni ni i
il (t) − D5 (t)+ (t) =
D6 (6.23) M (t)
Equations (6.23) and (6.20) describe, in the general case, the transformer winding currents during the
second subinterval. According to Eq. (6.23), the magnetizing current iM(t) may flow through the primary
winding, through one of the secondary windings, or it may divide between all three of these windings.
How the division occurs depends on the i-v characteristics of the conducting transistors and diodes. In
the case where il = 0, the solution to Eqs. (6.20) and (6.23) is
1
iD5(t) = i(t)− iM (t)
2n
(6.24)
1 1
iD6 (t) = i(t)+ iM (t)
2 2n
Provided that iM << ni, then iD5 and iD6 are each approximately 0.5i.
The next switching period, Ts < t < 2Ts, proceeds in a similar manner, except that the transformer is
excited with voltage of the opposite polarity. During Ts < t < (Ts + DTs), transistors Q2 and Q3 and diode
D6 conduct. The applied transformer primary voltage is vT = -Vg, which causes the magnetizing current
to decrease with slope - Vg/LM. The voltage vs(t) is equal to nVg, and the output inductor current i(t)
flows through diode D6. Diodes D5 and D6 again both conduct during (Ts + DTs) < t < 2Ts, with operation
similar to subinterval 2 described previously. It can be seen that the switching ripple in the output filter
elements has frequency fs = 1/Ts. However, the transformer waveforms have frequency 0.5fs.
By application of the principle of inductor volt-second balance to the magnetizing inductance, the
average value of the transformer voltage vT(t) must be zero when the converter operates in steady
state. During the first switching period, positive volt-seconds are applied to the transformer,
approximately equal to
(Vg − (Q1 and Q4 forward voltage drops))(Q1 and Q4 conduction time) (6.25)
During the next switching period, negative volt-seconds are applied to the transformer, given by
−(Vg − (Q2 and Q3 forward voltage drops))(Q2 and Q3 conduction time) (6.26)
The net volt-seconds, that is, the sum of Eqs. (6.25) and (6.26), should equal zero. While the full
bridge scheme causes this to be approximately true, in practice there exist imbalances such as small
differences in the transistor forward voltage drops or in the transistor switching times, so that <vT> is
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small but nonzero. In consequence, during every two switching periods there is a net increase in the
magnitude of the magnetizing current. This increase can cause the transistor forward voltage drops to
change such that small imbalances are compensated. However, if the imbalances are too large, then the
magnetizing current becomes large enough to saturate the transformer.
Transformer saturation under steady-state conditions can be avoided by placing a capacitor in series
with the transformer primary. Imbalances then induce a dc voltage component across the capacitor,
rather than across the transformer primary. Another solution is the use of current-programmed control,
discussed in a later chapter. The series capacitor is omitted when current-programmed control is used.
By application of the principle of volt-second balance to the output filter inductor L, the dc load
voltage must be equal to the dc component of vs(t):
v
V= s (6.27)
By inspection of the vs(t) waveform in Fig. 6.20, <vs> = nDVg. Hence,
Transistors Q1 and Q2 must not conduct simultaneously; doing so would short out the dc source Vg
and lead to low efficiency and transistor failure. If necessary, delay can be introduced between the
turnoff of one transistor and the turn-on of the next transistor to prevent overlapping conduction.
Diodes D1 to D4 ensure that the peak transistor voltage is limited to the dc input voltage Vg, and also
provide a conduction path for the transformer magnetizing current at light load. Details of the switching
transitions of the full-bridge circuit are discussed further in a later chapter, in conjunction with
zerovoltage switching phenomena.
The full-bridge configuration is typically used in switching power supplies at power levels of
approximately 750 W and greater. It is usually not used at lower power levels because of its high parts
count - four transistors and their associated drive circuits are required. The utilization of the
transformer is good, leading to small transformer size. In particular, the utilization of the transformer
core is very good, since the transformer magnetizing current can be both positive and negative. Hence,
the entire core B-H loop can be used. However, in practice, the flux swing is usually limited by core loss.
The transformer primary winding is effectively utilized. But the center-tapped secondary winding is not,
since each half of the center-tapped winding transmits power only during alternate switching periods.
Also, the secondary winding currents during subinterval 2 lead to winding power loss, but not to
transmittal of energy to the load. Design of the transformer of the full-bridge configuration is discussed
in detail in a later chapter.
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The half-bridge transformer-isolated buck converter is illustrated in Fig. 6.21. Typical waveforms are
illustrated in Fig. 6.22. This circuit is similar to the full-bridge of Fig. 6.19(a), except transistors Q3 and
Q4, and their antiparallel diodes, have been replaced with large-value capacitors Ca and Cb. By
voltsecond balance of the transformer magnetizing inductance, the dc voltage across capacitor Cb, is
equal to the dc component of the voltage across transistor Q2, or 0.5Vg. The transformer primary
voltage vT(t) is then 0.5 Vg, when transistor Q1 conducts, and -0.5Vg when transistor Q2 conducts. The
magnitude of vT(t) is half as large as in the full-bridge configuration, with the result that the output
voltage is reduced by a factor of 0.5:
nDV
V = 0.5 g (6.29)
The factor of 0.5 can be compensated for by doubling the transformer turns ratio n. However, this
causes the transistor currents to double.
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So the half-bridge configuration needs only two transistors rather than four, but these two transistors
must handle currents that are twice as large as those of the full-bridge circuit. In consequence, the
halfbridge configuration finds application at lower power levels, for which transistors with sufficient
current rating are readily available, and where low parts count is important. Utilization of the
transformer core and windings is essentially the same as in the full-bridge, and the peak transistor
voltage is clamped to the dc input voltage Vg by diodes D1 and D2. It is possible to omit capacitor Ca if
desired. The currentprogrammed mode generally does not work with half-bridge converters.
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The transformer magnetizing current is reset to zero while the transistor is in the off-state. How this
occurs can be understood by replacing the three-winding transformer in Fig. 6.23 with the equivalent
circuit of Fig. 6.17(b). The resulting circuit is illustrated in Fig. 6.24, and typical waveforms are given in
Fig. 6.25. The magnetizing inductance LM, in conjunction with diode D1, must operate in the
discontinuous conduction mode. The output inductor L, in conjunction with diode D3, may operate in
either continuous or discontinuous conduction mode. The waveforms of Fig. 6.25 are sketched for
continuous mode operation of inductor L. During each switching period, three subintervals then occur
as illustrated in Fig. 6.26.
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Fig. 6.26. Forward converter circuit: (a) during subinterval 1, (b) during subinterval 2, (c) during
subinterval 3.
During subinterval 1, transistor Q1 conducts and the circuit of Fig. 6.26(a) is obtained. Diode D2
becomes forward-biased, while diodes D1 and D3 are reverse-biased. Voltage Vg is applied to the
transformer primary winding, and hence the transformer magnetizing current iM(t) increases with a
slope of Vg/LM as illustrated in Fig. 6.25. The voltage across diode D3 is equal to Vg, multiplied by the
turns ratio n3/n1.
The second subinterval begins when transistor Q1 is switched off. The circuit of Fig. 6.26(b) is then
obtained. The transformer magnetizing current iM(t) at this instant is positive, and must continue to
flow. Since transistor Q1 is off, the equivalent circuit model predicts that the magnetizing current must
flow into the primary of the ideal transformer. It can be seen that n1iM ampere-turns flow out of the
polarity mark of the primary winding. Hence, according to Eq. (6.16). an equal number of total
ampereturns must flow into the polarity marks of the other windings. Diode D2 prevents current from
flowing into the polarity mark of winding 3. Hence, the Current iMn1/n2 must flow into the polarity mark
of winding 2. So diode D1 becomes forward biased, while diode D2 is reverse-biased. Voltage Vg applied
to winding 2, and hence the voltage across the magnetizing inductance is -Vgn1/n2, referred to winding
1. This negative voltage causes the magnetizing current to decrease, with a slope of -Vgn1/n2LM. Sincc
diode D2 is reverse-biased, diode D3 must turn on to conduct the output inductor current i(t).
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When the magnetizing current reaches zero, diode D1 becomes reverse-biased. Subinterval 3 then
begins, and the circuit of Fig. 6.26(c) is obtained. Elements Q1, D1, and D2 operate in the off state, and
the magnetizing current remains at zero for the balance of the switching period.
n2
D2 = D (6.31)
n1
Note that the duty cycle D3 cannot be negative. But since D + D2 + D3 = 1, we can write
D
D3 =1− D − 2 ≥0 (6.32)
Substitution of Eq. (6.31) into Eq. (6.32) leads to
n2
D (6.35)
If this limit is violated, then the transistor off-time is insufficient to reset the transformer magnetizing
current to zero before the end of the switching period. Transformer saturation may then occur.
The transformer magnetizing current waveform iM(t) is illustrated in Fig. 6.27, for the typical case
where n1 = n2. Figure 6.27(a) illustrates operation with D ≤ 0.5. The magnetizing inductance, in
conjunction with diode D1, operates in the discontinuous conduction mode, and iM(t) is reset to zero
before the end of each switching period. Figure 6.27(b) illustrates what happens when the transistor
duty cycle D is greater than 0.5. There is then no third subinterval, and the magnetizing inductance
operates in continuous conduction mode. Furthermore, subinterval 2 is not long enough to reset the
magnetizing current to zero. Hence, there is a net increase of iM(t) over each switching period.
Eventually, the magnetizing current will become large enough then saturate the transformer.
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Fig. 6.27. Magnetizing current waveform, forward converter: (a) DCM, D < 0.5; (b) CCM, D > 0.5.
The converter output voltage can be found by application of the principle of inductor volt-second
balance to inductor L. The voltage across inductor L must have zero dc component, and therefore the
dc output voltage V is equal to the dc component of diode D3 voltage vD3(t). The waveform vD3(t) is
illustrated in Fig. 6.25. It has an average value of
n3
DV
vD3 =V = g (6.36) n1
This is the solution of the forward converter in the continuous conduction mode. The solution is subject
to the constraint given in Eq. (6.34).
It can be seen from Eq. (6.34) that the maximum duty cycle could be increased by decreasing the
turns ratio n2/n1. This would cause iM(t) to decrease more quickly during subinterval 2, resetting the
transformer faster. Unfortunately, this also increases the voltage stress applied to transistor Q1. The
maximum voltage applied to transistor Q1 occurs during subinterval 2; solution of the circuit of Fig.
6.26(b) for this voltage yields
A two-transistor version of the forward converter is illustrated in Fig. 6.28. Transistors Q1 and Q2 are
controlled by the same gate drive signal, such that they both conduct during subinterval 1, and are off
during subintervals 2 and 3. The secondary side of the converter is identical to the single-transistor
forward converter; diode D3 conducts during subinterval 1, while diode D4 conducts during subintervals
2 and 3. During subinterval 2, the magnetizing current iM(t) forward-biases diodes D1 and D2. The
transformer primary winding is then connected to Vg, with polarity opposite that of subinterval 1. The
magnetizing current then decreases, with slope = Vg/LM. When the magnetizing current reaches zero,
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diodes D1 and D2 become reverse-biased. The magnetizing current then remains at zero for the balance
of the switching period. So operation of the two-transistor forward converter is similar to the
singletransistor forward converter, in which n1=n2. The duty cycle is limited to D < 0.5. This converter
has the advantage that the transistor peak blocking voltage is limited to Vg, and is clamped by diodes D1
and D2. Typical power levels of the two-transistor forward converter are similar to those of the half-
bridge configuration.
nDV
V= g (6.38)
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Current-programmed control can be employed to mitigate the transformer saturation problems.
Operation of the push-pull converter using only duty cycle control is not recommended.
Utilization of the transformer core material and secondary winding is similar to that for the full-bridge
converter. The flux and magnetizing current can be both positive and negative, and therefore the entire
B-H loop can be used, if desired. Since the primary and secondary windings are both center-tapped,
their utilization is suboptimal.
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Fig. 6.31. Derivation of the flyback converter: (a) buck-boost converter; (b) inductor L is wound with two
parallel wires; (c) inductor windings are isolated, leading to the flyback converter; (d) with a 1:n turns
ratio and positive output.
The flyback converter may be analyzed by insertion of the model of Fig. 6.17(b) in place of the flyback
transformer. The circuit of Fig. 6.32(a) is then obtained. The magnetizing inductance LM functions in the
same manner as inductor L of the original buck-boost converter of Fig. 6.31(a). When transistor Q1
conducts, energy from the dc source Vg is stored in LM. When diode D1 conducts, this stored energy is
transferred to the load, with the inductor voltage and current scaled according to the 1:n turns ratio.
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Fig. 6.32. Flyback converter circuit: (a) with transformer equivalent circuit model, (b) during subinterval
1, (c) during subinterval 2.
During subinterval 1, while transistor Q1 conducts, the converter circuit model reduces to Fig. 6.32(b).
The inductor voltage vL, capacitor current iC, and dc source current ig, are given by
vL =Vg v
iC =− (6.39)
R ig = i
With the assumption that the converter operates in the continuous conduction mode, with small
inductor current ripple and small capacitor voltage ripple, the magnetizing current i and output
capacitor voltage v can be approximated by their dc components, I and V, respectively. Equation (6.39)
then becomes
vL =Vg
V
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iC =− (6.40)
R ig = I
During the second subinterval, the transistor is in the off state, and the diode conducts. The equivalent
circuit of Fig. 6.32(c) is obtained. The primary-side magnetizing inductance voltage vL, the capacitor
current iC, and the dc source current ig, for this subinterval are:
v vL =−
n
i v
iC = − (6.41) n R ig = 0
It is important to consistently define vL(t) on the same side of the transformer for all subintervals.
Upon making the small-ripple approximation, one obtains
V vL =−
n
I V
iC = − (6.42) n R ig = 0
The vL(t), iC(t), and ig(t) waveforms are sketched in Fig. 6.33 for continuous conduction mode operation.
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vL = D(Vg )+ D'(− )=0 (6.43) n
Solution for the conversion ratio then leads to
V D Vg D'
M(D) = = n (6.44)
So the conversion ratio of the flyback converter is similar to that of the buck-boost converter, but
contains an added factor of n.
I= (6.46)
This is the dc component of the magnetizing current, referred to the primary. The dc component of the
source current ig is
Fig. 6.34. Flyback converter equivalent circuit model, CCM: (a) circuits corresponding to Eqs. (6.43),
(6.45), and (6.47); (b) equivalent circuit containing ideal dc transformers.
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The flyback converter is commonly used at the 50 to 100 W power range, as well as in high-voltage
power supplies for televisions and computer monitors. It has the advantage of very low parts count.
Multiple outputs can be obtained using a minimum number of parts: each additional output requires
only an additional winding, diode, and capacitor. However, in comparison with the full-bridge,
halfbridge, or two-transistor forward converters, the flyback converter has the disadvantages of high
transistor voltage stress and poor cross-regulation. The peak transistor voltage is equal to the dc input
voltage Vg plus the reflected load volt V/n; in practice, additional voltage is observed due to ringing
associated with the transformer leakage inductance. Rigorous comparison of the utilization of the
flyback transformer with the transformers of buck-derived circuits is difficult because of the different
functions performed by these elements. The magnetizing current of the flyback transformer is unipolar,
and hence no more than half of the core material B-H loop can be utilized. The magnetizing current
must contain a significant dc component. Yet, the size of the flyback transformer is quite small in
designs intended to operate in the discontinuous conduction mode. However, DCM operation leads to
increased peak currents in the transistor, diode, and filter capacitors. Continuous conduction mode
designs require larger values of LM, and hence larger flyback transformers, but the peak currents in the
power stage elements are lower.
A full-bridge configuration is diagrammed in Fig. 6.35, and waveforms for the continuous conduction
mode are illustrated in Fig. 6.36. The circuit topologies during the first and second subintervals are
equivalent to those of the basic nonisolated boost converter, and when the turns ratio is 1:1, the
inductor current i(t) and output current io(t) waveforms are identical to the inductor current and diode
current waveforms of the nonisolated boost converter.
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Application of the principle of inductor volt-second balance to the inductor voltage waveform vL(t)
yields
V
vL = D(Vg )+ D'(Vg − ) = 0
(6.48) n
Solution for the conversion ratio M(D) then leads to
V n Vg D'
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M(D) = = (6.49)
This result is similar to the boost converter M(D), with an added factor of n due to the transformer turns
ratio.
The transistors must block the reflected load voltage V/n = Vg/D’. In practice. additional voltage is
observed due to ringing associated with the transformer leakage inductance. Because the instantaneous
transistor current is limited by inductor L, saturation of the transformer due to small imbalances in the
semiconductor forward voltage drops or conduction times is not catastrophic. Indeed, control schemes
are known in which the transformer is purposely operated in saturation subinterval 1 [13, 15].
A push-pull configuration is depicted in Fig. 6.37(a). This configuration requires only two transistors,
each of which must block voltage 2V/n. Operation is otherwise similar to that of the full-bridge. During
subinterval 1, both transistors conduct. During subinterval 2, one of the transistors operates in the off
sate, and energy is transferred from the inductor through the transformer and one of the diodes to the
output. Transistors conduct during subinterval 2 during alternate switching periods, such that
transformer volt-second balance is maintained. A similar push-pull version of the Watkins-Johnson
converter, converter 6 of Fig. 6.15, is illustrated in Fig. 6.37(b).
Fig. 6.37. Push-pull isolated converters: (a) based on the boost converter, (b) based on the
WatkinsJohnson converter.
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6.3.6 Isolated Versions of the SEPIC and the Cuk Converter
The artifice used to obtain isolation in the flyback converter can also be applied to the SEPIC and
inverse-SEPIC. Referring to Fig. 6.38(a), inductor L2 can be realized using two windings, leading to the
isolated SEPIC of Fig. 6.38(b). An equivalent circuit is given in Fig. 6.38(c). It can be seen that the
magnetizing inductance performs the energy-storage function of the original inductor L2. In addition,
the ideal transformer provides isolation and a turns ratio.
Fig. 6.38. Obtaining isolation in the SEPIC: (a) basic nonisolated converter, (b) isolated SEPIC, (c) with
transformer equivalent circuit model.
Typical primary and secondary winding current waveforms ip(t) and is(t) are portrayed in Fig. 6.39, for
the continuous conduction mode. The magnetic device must function as both a flyback transformer and
also a conventional two-winding transformer. During subinterval 1, while transistor Q1 conducts, the
magnetizing current flows through the primary winding, and the secondary winding current is zero.
During subinterval 2, while diode D1 conducts, the magnetizing current flows through the secondary
winding to the load. In addition, the input inductor current il flows through the primary winding. This
induces an additional component of secondary current il/n, which also flows to the load. So design of
the SEPIC transformer is somewhat unusual, and the rms winding currents are larger than those of the
flyback transformer.
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By application of the principle of volt-second balance to inductors L1 and LM, the conversion ratio can
be shown to be
V nD Vg D'
M(D) = = (6.50)
Ideally, the transistor must block voltage Vg/D'. In practice, additional voltage is observed due to ringing
associated with the transformer leakage inductance.
An isolated version of the inverse-SEPIC is shown in Fig. 6.40. Operation and design of the transformer
is similar to that of the SEPIC.
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and C1b. A transformer can now be inserted between these capacitors, as indicated in Fig. 6.41(c). The
polarity marks have been reversed, so that a positive output voltage is obtained. Having capacitors in
series with the transformer primary and secondary windings ensures that no dc voltage is applied to the
transformer. The transformer functions in a conventional manner, with small magnetizing current and
negligible energy storage within the magnetizing inductance.
Fig. 6.41. Obtaining isolation in the Cuk converter: (a) basic nonisolated Cuk converter, (b) splitting
capacitor C1 into two series capacitors, (c) insertion of transformer between capacitors.
Utilization of the transformer of the Cuk converter is quite good. The magnetizing current can be both
positive and negative, and hence the entire core B-H loop can be utilized if desired. There are no
center-tapped windings, and all of the copper is effectively utilized. The transistor must block voltage
Vg/D', plus some additional voltage due to ringing associated with the transformer leakage inductance.
The conversion ratio is identical to that of the isolated SEPIC, Eq. (6.50).
The isolated SEPIC and Cuk converter find application as switching power supplies, typically at power
levels of several hundred watts. They are also now finding use as ac-dc low-harmonic rectifiers.
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