1 2 3 4 5 6 7 8

Power
Connectors

A A

power.sch Connectors.sch

100k 220k

GND
R8 R12 W6
TEST_1P

U1D
B - B

68k
13
- O
Vadj0
+ + 14
AO3 12
R4

D2
LM324
C8
C4
Zener_2V5
1u 1nF

GND

GND
100k 220k

GND
R7 R11 W8
TEST_1P

U1C
-
9
- O
Vadj1
68k + + 8
AO2 10
R3

D4
LM324
C7
C3
Zener_2V5
1u
C 1nF C
GND

GND

100k 220k

GND
R6 R10 W5
TEST_1P

U1B
-

68k
6
- O
Vo_analog0
+ + 7
AO1 5
R2

D1
LM324
C6
C2
Zener_opt
1u 1nF
GND

D D
GND
100k 220k
GND

R5 R9 W7
TEST_1P

U1A 5V@3A
C9 C10

V+
-

4
2
- O
Vo_analog1 100n 10u
AO0
68k + + 1

11
V-
3
R1

D3
LM324
C5 GND
C1
Zener_opt
1u 1nF

GND

GND

E E

L. Horacio Arnaldi
LabDPR
Sheet: /
File: lago_sch.sch
Title: RP_CTRL_BOARD
LAGO RP interface board
Size: A3 Date: 07/2018 10/04/2018 Rev: 3
KiCad E.D.A. kicad 4.0.2+dfsg1-stable Id: 1/3
F F
1 2 3 4 5 6 7 8
 1 2 3 4 5 6

DB15 DB15
1 1
3V3@0A4 3V3@0A4
9 9
A 2 2 A
-3V3@0A4 -3V3@0A4 P1
10 10 1
3V3@0A4
3 3 2
5V@3A 5V@3A
11 11 3
DIO7_N_GPS_PPS

Conn_GPS
4 4 4
+12V +12V DIO7_P_GPS_RST
12 12 5
I2C_SDA
5 5 6
Vadj0 Vadj1 I2C_SCL
13 13 7
UART_RX
6 6 8
Vreadout0 Vreadout1 UART_TX
14 14
7 7
P2
15

Conn_BMP280
15 +SensTemp1 1
+SensTemp0 5V@3A
8 8 2
-SensTemp0 -SensTemp1
3
J1 J2 I2C_SDA
4
I2C_SCL
5V@3A +SensTemp0
GS2 GS1
GS2

W9 AI0 AI1

GS4
TEST_1P

GS3
+SensTemp1

GS2
GS2
GS2

P3
B 12k -SensTemp0 -SensTemp1 1 B
Vreadout0 AI2 3V3@0A4

I2C_EXT

GND
R13 2
3
Zener_3V3

R17 R18 I2C_SDA

1K_1% 1k_1% 4
D5
R15

I2C_SCL
33k

P4
1 P6
3V3@0A4

CONN_01X04
GND GND 1

I2C_EXT
Vo_analog0

GND
2
GND 2
Configuración para 1mV/K 3
I2C_SDA 3
GND 4
I2C_SCL 4
W10 P5
Vo_analog1
TEST_1P 1
3V3@0A4

CONN_01X06
2
3
12k SPI_CLK
4 L15 L17
Vreadout1 AI3 SPI_CS
R14 5
SPI_MOSI 10u 10u
6
SPI_MISO
GND GNDA GND GNDD
R16
33k

Zener_3V3

L16 L18
D6

Alimentación RedPitaya 10u 10u

C C
JP5
GND GNDA GND GNDD
5V@3A +5V_RP_alim 3V3@0A4
GND GND L7 L9 L11 L13
C11
R19 R20 10u 10u 10u
10k 10k 10u
J4 100n
GND GNDA GND GNDA GND GNDD GND GNDD
DIO0_P 1
DIO0_N GND L8 L10 L14
2 I2C_SCL L12
GND GND

GND GND

GND

GND

26 25 26 25 DIO1_P 3 10u 10u 10u 10u

24 23 24 23 DIO1_N I2C_SDA
4
22 21 22 21 GND GNDA GND GNDA GND GNDD GND GNDD
DIO2_P 5
20 19 20 19
AO3 AO2 DIO2_N 6
18 17 18 17
AO1 AO0 DIO3_P
CONN_02X13

DIO7_N_GPS_PPS DIO7_P_GPS_RST
CONN_02X13

7
16 15 16 15
AI3 AI2 DIO6_N DIO6_P DIO3_N 8
14 13 14 13
AI1 AI0 DIO5_N DIO5_P DIO4_P 9
GND

GND

12 11 12 11
DIO4_N DIO4_P DIO4_N 10
10 9 10 9
I2C_SDA I2C_SCL DIO3_N DIO3_P DIO5_P 11 L. Horacio Arnaldi
8 7 8 7
UART_RX UART_TX DIO2_N DIO2_P DIO5_N 12
6 5 6 5 LabDPR
SPI_CS SPI_CLK DIO1_N DIO1_P DIO6_P 13
4 3 4 3 Sheet: /Connectors/
SPI_MISO SPI_MOSI DIO0_N DIO0_P DIO6_N 14
D 2 1 2 1 File: Connectors.sch D
+5V_RP_alim +3V3 +3V3 DIO7_P_GPS_RST 15
RP_E1 RP_E2 DIO7_N_GPS_PPS 16 Title: RP_CTRL_BOARD
HEADER_16
Size: A4 Date: 07/2018 Rev: 3
KiCad E.D.A. kicad 4.0.2+dfsg1-stable Id: 2/3
1 2 3 4 5 6
 1 2 3 4 5 6

+12V
JP7
A J3 Fuse GNDD A

2.2uF
+12V 1 2
1 W13

11

12
R21 Jumper 1u

C24
3 LT8471 U3 3V3@0A4
C18 GNDD MBRS340

R22
560 3 Vin1 C1
1
2

GND

GND
C15 D9 3.9uH L5
C16 18 2 GNDD

JP1
BARREL_JACK Vin2 E1 3V3@0A4

Led_Small
100n L4 10u_opt

1u
C35
100u 14 5 R33

D7
GNDD Shout FB1
220k C31 C33

GNDD
15uH C28 C29
GND 13 C3 GND
10 2.2uF 10u_opt
GNDD L1 R34 100n

GNDD
6 20 68k 47u@10V W14
GND OV/UV C2 47u@10V
C25 -3V3@0A4
174K R24 8 19 GNDDGNDD

3.9uH
GNDD SS1 E2

L3
JP1: 12V Alimentación ventilador (opcional) GNDD GNDD GNDD
100n 15 16 D10
SS2 FB2 MBRS340 L6

SYNC

PG1

PG2
C17 47u@10V 10u_opt -3V3@0A4

RT
R31 10u_opt C34
C19 220k 47u@10V
C27

17
C32 100n_opt

4
C30
100n R32
68k GNDD
GNDD
GNDD

182K R27

100K R29

100K R30
GNDD

GNDD GNDD
B B

+12V W11 W12

+12V_in +5V@3A
SRP1265-470M 47u
LM2596
JP6 L2
1
+Vin U2 Out
2 5V@3A 5V@3A
B550C-13-F

C12 C13 C14

C22
22n_100V 470n_100V C21 C23 C26
On/Off

D8

4
GND

100u_25V FB
470n_100V 330u 220n_100V 470n_100V
GNDA GNDA
GNDA
GNDA
3

GNDA GNDA GNDA GNDA

R23
C 1k C
GNDA
R25 R28
3k3 100
GNDA
C20
R26
1k 3n3_50V

GNDA

L. Horacio Arnaldi
LabDPR
Sheet: /Power/
D File: power.sch D

Title: RP_CTRL_BOARD
Size: A4 Date: 07/2018 Rev: 3
KiCad E.D.A. kicad 4.0.2+dfsg1-stable Id: 3/3
1 2 3 4 5 6