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TL072

LOW NOISE JFET INPUT OPERATIONAL


AMPLIFIERS
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Features General Description

• Low Power Consumption The JFET-input operational amplifiers in the TL072 are similar to
• Wide Common-Mode and Differential Voltage Ranges the TL082, with low input bias and offset currents and fast slew
• Low Input Bias and Offset Currents rate. The low harmonic distortion and low noise make the TL072
• Output Short-Circuit Protection ideally suited for high-fidelity and audio preamplifier applications.
• Low Total Harmonic Distortion…0.003% Typ Each amplifier features JFET inputs (for high input impedance)
coupled with bipolar output stages integrated on a single
• Low Noise Vn= 18nV ΗΖ Typ at f=1kHz monolithic chip.
• High Input Impedance…JFET-Input Stage
• Internal Frequency Compensation
• Latch-Up-Free Operation
• High Slew Rate…13V/μs Typ
• Common-Mode Input Voltage Range Includes VCC+
• SOP-8L: Available in “Green” Molding Compound
(No Br, Sb)
• Lead Free Finish/ RoHS Compliant (Note 1)

Applications

• Active filters
• Audio pre-amps

Ordering Information

TL 072 S G - 13

Package Green Packing


S : SOP-8L G : Green 13 : Tape & Reel

Package Packaging 13” Tape and Reel


Device
Code (Note 2) Quantity Part Number Suffix
TL072SG-13 S SOP-8L 2500/Tape & Reel -13
Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
http://www.diodes.com/products/lead_free.html
2. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.

TL072 Rev. 1 1 of 11 MAY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Pin Assignments

(1) Dual channel SOP-8L


( Top View )

OUTPUT1 1 8 VCC+
INVERTING INPUT1 2 7 OUTPUT2
TL072
NON-INVERTING INPUT1 3 6 INVERTING INPUT2
VCC- 4 5 NON-INVERTING INPUT2

SOP-8L

Pin Descriptions

Pin Name Pin No. Description


OUTPUT1 1 Channel 1 Output
INVERTING INPUT1 2 Channel 1 Inverting Input
NON-INVERTING INPUT1 3 Channel 1 Non-inverting Input
VCC- 4 Supply Voltage
NON-INVERTING INPUT2 5 Channel 2 Non-inverting Input
INVERTING INPUT2 6 Channel 2 Inverting Input
OUTPUT2 7 Channel 2 Ouput
VCC+ 8 Supply Voltage

Block Diagram

TL072 Rev. 1 2 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Absolute Maximum Ratings (Note 8)

Symbol Parameter Rating Unit


ESD HBM Human Body Model ESD Protection 1 KV
ESD MM Machine Model ESD Protection 200 V
VCC+ Supply Voltage + (Note 3) +18 V
VCC- Supply Voltage - (Note 3) -18 V
VI Input voltage (Notes 3 and 5) ±15 V
VID Differential input Voltage, VID (Note 4) ±30 V
Duration of output short circuit (Note 6) Unlimited
PD Power Dissipation (Note 7) 860 mW
o
TJ Operating Junction Temperature Range 150 C
o
TST Storage Temperature Range -65 to +150 C
Notes: 3. ALL voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC-.
4. Differential voltage are at the non-inverting input terminal with respect to the inverting input terminal.
5. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15V, whichever is less.
6. The output may be shorted to ground or either supply. Temperature and/or supply voltage must be limited to ensure that the dissipation rating is
not exceeded.
7. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD=(TJ(max)-TA)/ θJA . Operating at the absolute maximum TJ of 150℃ can affect reliability

Recommended Operating Conditions (Note 8)

Symbol Description Rating Unit


VCC± Supply Voltage ±15 V
TA Operating Ambient Temperature Range -40 to +85 °C
Notes: 8. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate
conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the
test conditions, see the Electrical Characteristics.

TL072 Rev. 1 3 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Electrical Characteristics (VCC± = ±15V, TA = 25 oC; unless otherwise noted)

Symbol Parameter Test Conditions Min Typ. Max Unit


VO=0, TA=25 oC 3 6
VIO Input Offset Voltage mV
RS=50Ω TA= full range 8
α Temperature Coefficient
vIO VO=0, RS=50Ω, TA= full range 18 μV/ oC
of Input Offset Voltage
TA=25 oC 5 100 pA
IIO Input Offset Current VO=0
TA= full range 2 nA
o
TA=25 C 65 200 pA
IIB Input Bias Current VO=0
TA= full range 20 nA
Common Mode
VICR ±11 -12~+15 V
Input Voltage Range
o
RL=10kΩ, TA=25 C ±12 ±13.5
Maximum Peak RL≧10kΩ, ±12
VOM V
Output Voltage Swing TA= full range
RL≧2kΩ ±10
Large Signal Differential VO=±10V, TA=25 oC 50 200
AVD V/mV
Voltage Amplification RL≧2kΩ TA= full range 25
B1 Unity Gain Bandwidth 3 MHz
ri Input Resistance TA=25 oC 1012 Ω
Common Mode VIC=VICRmin, VO=0
CMRR 75 100 dB
Rejection Ratio RS=50Ω, TA=25 oC
Supply Voltage VCC=±9 to ±15V
kSVR Rejection Ratio VO=0 80 100 dB
(ΔVCC±/ΔVIO) RS=50Ω, TA=25 oC
Supply Current VO=0, TA=25 oC
ICC 1.4 2.5 mA
(each amplifier) No load
VO1/VO2 Crosstalk Attenuation AVD=100, TA=25 oC 120 dB
V =10V, CL=100pF, RL=2kΩ
SR Slew Rate at Unity Gain I 8 13 V/μs
(See Figure 1)
tr Rise Time VI=20mV, RL=2kΩ, CL=100pF 0.1 μs
Overshoot Factor (See Figure 1) 20 %
Equivalent Input Noise f=1kHz 18 nV HZ
Vn RS=20Ω
Voltage f=10 Hz to 10kHz 4 μV
Equivalent Input Noise
In RS=20Ω, f=1kHz 0.01 pA HZ
Current
VIrms=6V, AVD=1,
Total Harmonic
THD RL≧2kΩ, RS≦1kΩ, 0.003 %
Distortion
f=1kHz
Thermal Resistance o
θJA SOP-8L (Note 9) 145 C/W
Junction-to-Ambient
Thermal Resistance o
θJC SOP-8L (Note 9) 35 C/W
Junction-to-Case
Notes: 9. Test condition for SOP-8L: Devices mounted on FR-4 substrate PC board, with minimum recommended pad layout.

TL072 Rev. 1 4 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Typical Performance Characteristics

Maximum Peak Output Voltage vs Supply Voltage Maximum Peak Output Voltage vs Temperature
15.0

VOM -Maximum Peak Output Voltage(±V)


15.0
VOM -Maximum Peak Output Voltage(±V)

RL=10kΩ RL=10kΩ
12.5 TA =25℃ 12.5

RL=2kΩ
10.0 10.0

7.5 7.5

5.0 5.0

2.5 2.5 VCC±=±15V


See Figure 2

0.0
0 0.00
0 2 4 6 8 10 12 14 16 18 -50 -25 0 25 50 75 100
T A-Free Air Temperature (℃ )
|Vcc±| Supply Voltage (V)

Maximum Peak Output Voltage vs Load Resistance Maximum Peak Output Voltage vs Frequency
15.0 15.0
VOM -Maximum Peak Output Voltage(±V)

VOM -Maximum Peak Output Voltage(±V)

VCC±=±15V VCC±=±15V RL=10kΩ


TA =25℃ TA =25℃
12.5 12.5
See Figure 2 See Figure 2

10.0 10.0 VCC±=±10V

7.5 7.5

5.0 5.0 VCC±=±5V

2.5 2.5

0.0
0 0
0.0
0.1
10 0.2 0.4 0.7 100
1 2 4 71000
10
100 1k 10k 100k 1M 10M
Load Resistance (kΩ)
Frequency (Hz)

TL072 Rev. 1 5 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Typical Performance Characteristics (Continued)

Maximum Peak Output Voltage vs Frequency Maximum Peak Output Voltage vs Frequency
15.0 15.0
VOM -Maximum Peak Output Voltage(±V)

VOM -Maximum Peak Output Voltage(±V)


RL=2kΩ TA =-40℃ VCC±=±15V

12.5 VCC±=±15V TA =25℃ 12.5 RL=2kΩ


See Figure 2 See Figure 2

10.0 10.0 TA =25℃

VCC±=±10V
7.5 7.5 TA =85℃

5.0 5.0
VCC±=±5V

2.5 2.5

0
0.0 0.0
0
100 1k 10k 100k 1M 10M
10000
10k 40k 100000
100k 400k1000000
1M 4M 10000000
10M
Frequency (Hz) Frequency (Hz)

Input Bias Current vs Temperature Large Signal


Differential Voltage Amplification vs Temperature
1000.0
AVD -Differential Voltage Amplification (V/mV)

100.00
100 1000
VCC±=±15V
400
200
IIB -Input Bias Current(nA)

10.00
10
100
100.0

40
1.001
20

10
10.0
VCC±=±15V
0.10
0.1
4 VO=±10V
2 RL=2kΩ

0.01
0.01 1.01
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100
TA-Free-Air Temperature (℃)
TA-Free Air Temperature (℃)

TL072 Rev. 1 6 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Typical Performance Characteristics (Continued)

Supply Current vs Supply Voltage Supply Current vs Temperature

2.0 2.4
1.8 2.2
2.0
1.6

ICC± -Supply Current(mA)


ICC± -Supply Current(mA)

1.8
1.4
1.6
1.2 1.4
1.0 1.2
0.8 1.0

0.6 0.8
TA =25℃ 0.6
0.4 VCC±=±15V
No Signal 0.4
0.2 No Signal
No Load 0.2 No Load
0
0.0 0
0.0
0 2 4 6 8 10 12 14 16 -50 -25 0 25 50 75 100
|Vcc±| Supply Voltage (V) TA-Free Air Temperature (℃)

Total Power Dissipation vs Temperature Common Mode Rejection Ratio vs Temperature


CMRR -Common-Mode Rejection Ratio(dB)

150 98
VCC±=±15V
PD -Total Power Disspation(mW)

97 RL=10kΩ
125
96
100
95

75 94

93
50
92
VCC±=±15V
25
No Signal 91
No Load
0 90
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100
TA-Free Air Temperature (℃) TA-Free Air Temperature (℃)

TL072 Rev. 1 7 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Typical Performance Characteristics (Continued)

Voltage-Follower
Equivalent Input Noise Voltage vs Frequency
Large-Singnal Pulse Response
6
Vn - Equivalent Input Noise Voltage(nV/√ Hz)

50 Input
VCC±=±15V VCC±=±5V
AVD=10 4 RL=2kΩ

Input and Output Voltages(V)


40 RS=20Ω C L=100pF
TA =25℃ 2 TA =25℃
30
0
Output
20
-2

10
-4

0 -6
10
10 40 100 400 1000
1k 4k 10000
10k 40k 100000
100k -0.5 0 0.5 1 1.5 2 2.5 3 3.5
Frequency (Hz) t-Time-μs

Total Harmonic Distortion vs Frequency Output Voltage vs Elapsed Time

11 28
VCC±=±15V
0.4 Overshoot
AVD=1 24
Total Harmonic Distortion(%)

VI(RMS)=6V
VO -Output Voltage(mV)

20
TA =25℃ 90
0.1
0.1
16
0.04
12

8
0.01
0.01
VCC±=±5V
4
0.00 RL=2kΩ
10%
0 TA =25℃
tr
0.001
0.001 -4
100
0.1 400 1k
1 4k 10k
10 40k 100k
100 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Frequency(Hz) t-Elapsed Time-μs

TL072 Rev. 1 8 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Test Circuit

10kΩ

1kΩ
V
OUT OUT
V
CL=100pF RL=2kΩ RL CL=100pF

Figure 1. Unity-Gain Amplifier Figure 2. Gain-of-10 Inverting Amplifier

Marking Information

(1) SOP-8L

( Top View )
8 5
Logo G : Green
TL072 YY : Year : 08, 09,10~
Part Number
YY WW X X WW : Week : 01~52; 52
represents 52 and 53 week
X : Internal Code
1 4

TL072 Rev. 1 9 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

Package Information ( All Dimensions in mm )

(1) Package type: SOP-8L

3.85/3.95
5.90/6.10

0.254
0.10/0.20
Gauge Plane
Seating Plane
0.62/0.82
Detail "A"

7°~9° 7°~9°
0.35max. 45°
0.15/0.25
1.30/1.50
1.75max.

Detail "A"
0°/8°

1.27typ 0.3/0.5

4.85/4.95

8x-0.60
5.4

6x-1.27
8x-1.55

Land Pattern Recommendation


(Unit: mm)

TL072 Rev. 1 10 of 11 JULY 2009


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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS

IMPORTANT NOTICE

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS
DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other
changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability
arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any
license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described
herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies
whose products are represented on Diodes Incorporated website, harmless against all damages.

Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized
sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall
indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.

Products described herein may be covered by one or more United States, international or foreign patents pending. Product names
and markings noted herein may also be covered by one or more United States, international or foreign trademarks.

LIFE SUPPORT

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without
the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided
in the labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected
to cause the failure of the life support device or to affect its safety or effectiveness.

Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or
systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements
concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems,
notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further,
Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes
Incorporated products in such safety-critical, life support devices or systems.

Copyright © 2009, Diodes Incorporated

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TL072 Rev. 1 11 of 11 JULY 2009


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