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Indian Institute of Technology Bombay

 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
tracking), 8802(Progress)  Email :, 

Specification for Real Time Simulator

I. Eligibility Criteria for Vendor’s

1. Vendor should have experience in developing real-time HIL facilities for the Electrical Industries and
preferably for Power System and power electronic applications. The vendor must have supplied systems to
Academic institutions which have been used in various electrical R&D projects.
2. Vendor should demonstrate all features to the user as part of TEC (Technical Evaluation Committee).
3. IIT Bombay has developed various MATLAB Simulink models for electrical systems. Further, various control
and system models will be developed during the use of the test facility. The HIL system should have provision
to port these models.
4. Vendor should provide details of their project team hierarchy with qualification and experience for in-house
test facilities, infrastructure and past experience in carrying out similar tasks.
5. Vendor should provide training, and familiarize IIT Bombay researchers for operation of the test facility.
6. Vendor provided solution must be based on Commercial off-the-shelf (COTS) hardware. It must be scalable
and flexible allowing easy integration with new controllers.
7. Vendors must be OEMs or their authorised representatives.
8. Single vendor should supply the complete hardware and software as per the given specification.
9. Bidders should submit all supporting documents for the above mentioned eligibility along with tender.

II. General Specification

The requirement is for the use of state-of-the-art Hardware-in-Loop Simulation Systems (HILS Systems) for testing
and integrating various electrical systems, such as, the integrated renewable energy, Energy Storage, DER’s and other
smart grid systems, using functional dynamic models with the actual hardware in order to develop and study solutions
suitable for the next generation electrical systems

This tender document is about procurement of a HiLS system which will be integrated with various controllers.
Recognizing that the HIL simulator is needed for the long-term, with multiple projects and programme objectives,
Supplier should provide modular hardware architecture as mentioned below:

 Scalable Processing – multi-core/multi-processor/ (Field Programming Gate Array) FPGA configurations to

meet real-time model computation requirements. A basic single core configuration can be used for simple
models and expanded to multiple cores as computational needs increase with the use of more complex models
for higher simulation fidelity.

 Expandable I/O and Signal Conditioning– the I/O chassis should support multiple FPGA I/O modules as well
as third-party boards. Supplier should provide several modules of I/Os, any change or increase in I/O
requirements should be accommodated by replacing/adding modules and cards at any point of time. Since
projects will be running for multiple years, scope of adding or removing the I/O module should be available.
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
tracking), 8802(Progress)  Email :, 

 Commercial Real Time Operating System (RTOS) used should support wide range of software tools to run in
real time environment. This capability will be critical for our projects which will be using the in house
developed Simulink Models, Certified C Code, FORTRAN and third party tools like, DigSILENT
PowerFactory, PSS/E, CYME, AMESim, Dymola etc…

 Test automation should support tools like Python, LabView TestStand, Altia, PROVETech etc.. This will help
IIT Bombay to achieve complete testing of hardware for the various conditions.

 Vendor should supply an OPEN but fully integrated solution, HIL system should have high degree of
FLEXIBILITY to meet a variety of testing objectives.

III. Detailed specifications

Detailed requirement of the real time simulator system are given below:

HiLS-System Level

The system-level requirements that are to be satisfied by the HiLS System are given below:

 Systems offered should be primarily designed for hard real-time high fidelity simulation of electrical systems.
The purpose is to aid in the design, development of prototypes of controllers and monitoring systems, suitable
for implementation in actual electrical systems.

 Industry production standard hardware platforms based on PC technologies (with multi-core, multi-processor
motherboards, PCIe/VME/PXI and Gigabit Ethernet communication capabilities) with emphasis on open
architecture for ensuring interoperability with products of industry-leading manufacturers of similar systems.

 Multi-node or multi-core distributed architecture with I/O capabilities with direct linkage to I/O modules or
systems to ensure reduction of model-I/O communication overheads and latencies in closed loop operation.

 Real-time communication through external communication links amid all the nodes for deterministic
exchange of parameters amongst models or through shared memory in case of execution of models in multi-
core system with appropriate clock synchronization through master slave mechanism.

 Software framework for assignment of models to various nodes/cores and distribution of executable software
models to respective nodes/cores for simultaneous execution and control of specific I/O, in hard real-time,
through the use of an RTOS, in frame-synchronised manner, at simulation time steps as fast as 20 us, in order
to achieve high fidelity with respect to the performance of the actual systems.
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
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 Real time computation of complete electro-mechanical systems up to an assured time-step of 20

microseconds. Multi-rate/Multi-time step simulation should be possible. With FPGA based simulation for
Power Electronics simulation time step should be as low as 150ns.

 Re-configurable FPGA based simulation model creation, debugging and execution capabilities with on-board
discrete I/Os required to ensure time-steps as small as 150ns and direct control of interfaces to external

 Test script generation, execution and intrusive/non-intrusive debugging in manual, interactive mode as well as
in automatic mode.

 Selection of signals and parameters for display and plotting at run-time

 Test results display as well as recording/logging in on-line mode in hard disk storage
Indian Institute of Technology Bombay
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tracking), 8802(Progress)  Email :, 

Specification details for Hardware and Software

Items Details Specifications
HIL General  Plant simulator with a capability to simulate a
Hardwar Features of minimum of 100 3-phase bus simulation at 20-50
e with Hardware micro-seconds with a provision to expand with multi
accessorie units
s  Plant simulator with a capability to perform closed loop
testing of protection relays and other hardware with a
provision to interface with existing amplifiers if need.
 Controller simulator with a capability to simulate
control logic required for renewable energy, power
systems, power electronics and drives applications.
 Hardware architecture should be modular in nature to
allow future expansion.
 Ethernet communication on a LAN to allow control of
both plant and controller simulator via one or many
standard computer workstations.
 The computational unit shall be performed preferably
by off the shelf computer technology.
 FPGA based I/O cards to minimize latency in ADC,
DAC, DI, and DO.
 Minimum count of I/O for the plant simulator must be
16ADC, 16DAC, 32DI, 32DO.
 Minimum count of I/O for controller simulator must be
16ADC, 16DAC, 24DI, 24DO.
 User programmable FPGA must be available on the
controller simulator to do fast power electronics
 Rack mountable chassis for scalability.
 Supplied hardware should support communication
protocol for smart grid applications like IEC61850,
C37.118, DNP3 etc. , required for future application
Simulator Simulator Chassis should be rack mountable and should 04
Chassis have minimum specifications given below
a. Powerful target computer, with Multi Core Processor,
Minimum Quad core
b. Minimum supported speed 3.0Ghz
c. Supported SDD, Minimum 128 GB
Indian Institute of Technology Bombay
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d. Supported DDR RAM, minimum 8 GB

e. Should have PCL slots to support third party
cards/custom made cards
f. Should have SFP Ports

ADC should ensure simultaneous signal capture from
multiple channels, and should eliminate skew errors
Analog associated with multiplexed channels. Specification are
Input-16 Ch given below
a. Cards with minimum 16 differential channels with
independent 16 bit ADCs, 2.5 us conversion time,
simultaneous conversion, controlled by on-board FPGA

b. Capability to convert analog signal between the base

simulator time steps to implement special models and
signal processing functions with time step of 2.5 us
depending on A/D converter speed selected
c. Gain and offset calibration factor adjustable by software
d. The same card should be capable of reading 6 resolver
signals from the device/controller.

Analog 04
Output-16 DAC should ensure simultaneous signal generations for
Ch multiple channels and should eliminate skew errors
associated with multiplexed channels. Specification are
given below
a. One card with 16 channels of independent 16-bit DACs,
1.0 us settling time/channel, simultaneous conversion
controlled by on-board FPGA
b. Output buffer amplifiers with maximum output voltage
range adjustable from ± 100 mV to ± 16 V (±16 V
standard) to keep the full 16-bit resolution
c. Capability to control the conversion time of each channel
by the FPGA
d. Capability to convert analog signal between the base
simulator time step to implement special models and signal
processing functions with time step of 1 us
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
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e. Gain and offset calibration factor adjustable by software

f. Short-circuit protection at 10 mA.

Discrete 04
Inputs- 32 Digital input module should be versatile and provide digital
Ch input signal with specific voltage conditioning. It should
support for the voltage isolation. All channels should be
sampled simultaneously for better accuracy. It should take
real life TTL or differential level signals. Specification are
given below
a. 32 independent channels per module/card
b. Current input from 2 mA to 6 mA
c. Input current protection by a resettable solid-sate fuse
d. Input voltage adjustable from 5 V to 30 V
e. Optical-isolation on all channels is a must
f. Short-circuit protection at 100 mA
g. Software configurable PWM input on the same card for
a frequency of 100 Khz (minimum) and upto 10 channels
of encoder at the same time.

Digital 04
Output- 32 Digital Output module should be versatile and provide
Ch digital output signal with specific voltage conditioning. It
should support for the voltage isolation. All output
channels should be sampled simultaneously for better
accuracy. It should interface with real life TTL or
differential level signals. Specification are given below
a. 32 independent push-pull channels per module/card
b. All outputs accept voltage of 5 to 30V and the output
current is up to ±50mA per channel
c. All outputs are generated simultaneously with a
maximum transition delay of 50ns
d. Short-circuit protected by auto-resettable fuse
e. Software configurable PWM output on the same card for
a frequency of 100 Khz (minimum) and upto 10 channels
of encoder at the same time.

Power General Switching Frequency : 2 to 8 kHz 04

Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
tracking), 8802(Progress)  Email :, 

Amplifier Specification
Ambient Temperature : 10-45°C
Humidity : 95% RH or less (no condensation)
Device : IGBT
Grid Side Inverter Control : DSP based Field oriented
Grid side Test points : 3 voltages & currents
Output side Test Points : 3 voltages & currents

Specification Input Voltage : 3-phase, 415V, 50Hz
Input Voltage Tolerance : +10%, -15%
Input Frequency : 50Hz
Input Frequency Tolerance : ±3%
I/P Current Max : 17.5A
I/P Power Factor : 0.95 & higher at Rated conditions
Specification Output Voltage : 3-phase ,4 wire, Isolated 415V
Output Apparent Power : 11.25 kVA
Output power : 9 kW
Max Output Current : 15.6A
Output Frequency : 50HZ ,± 2Hz

Protection Input Under voltage

Input Over voltage
Input over current
Input short circuit
Output under voltage
Output over voltage
Output over current
Output short circuit
Over temperature

High Voltage 03
Solid State Should provide digital signals from 5 V upto 250 V DC to
Relay Box external equipment. Should have solid state output
modules, each module should switch upto 250mA to
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
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Number of Channels : 16
Front : Banan Jack, Rear : DB37
Power : 110/220V Auto Switching
Status Indicator

External adequate DC Power Supply with required rating

SFP 1 set
Communicat SFP communication and Optical cable should be provided
ion to interface with multiple units to run one large simulation

 Modelling environment should be based on 04
 IITB intends to use these offline simulation software
which are available in the Institute.
 Should aid development of custom logic & algorithms
used in advanced control schemes ( e.g., C s-function).
 Integrated Development Environment Host software
licenses across the lab allowing users to run
simulations on a windows target in non-real time mode.
 Software should be capable of generating PWM pulses
independent of simulation clock.
Modeling  FPGA programming environment interface, which can
Environmen be used for faster converter simulation, must be
t available
 Provision to perform load flow studies.
 Ability to edit parameters of the system during real
time execution.
 Automatic Core Allocation in cases of Multi-core
simulation which will help us in minimizing time and
effort to allocate cores manually should be available.
 Should have the capability for FPGA-based simulation
environment of power electronics systems using
Graphical Circuit Editor like SimPowerSystem,
PLECS, PSIM, PSPICE eliminating VHDL coding or
XSG programming.
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
tracking), 8802(Progress)  Email :, 

 Models for easy learning of engineers in the field of

Power Systems, Drives and Power Electronics must be
provided compatible to SimPowerSystems to get
started with basic examples.
 Feature to simulate micro-grids with distributed energy
resources such as wind, solar PV etc.
 Provision to simulate distribution system.
 Feature to study smart grid systems. And should
support communication protocol like IEC 61850,
 Feature to display the time variations of any signal of
 Capability of a minimum multiple drives and detailed
inverter models at a time step of 25 microseconds on
CPU and 150ns on FPGA.
 Ability to simulate PMSM drives in 250 ns (end-to-
end) (useful feature for drives applications).
 Should have specialized solvers for Drives and Power
 Should have provision for scripting language (e.g.
 Ability for other third party Simulations software like
GT-Power, AMESim, TESIS, etc.
 Modelling environment for Power Electronics, Drives
and Control Systems is preferred to be compatible with
MATLAB environment due to extensive usage of the
 Ability to take care of multiple events happening in
between time steps.
 Ability to perform real time simulation of power
electronics converters up to a switching frequency of
100 kHz.
 Ability to simulate at least 3-level converter with a
switching frequency of 100 kHz.
I/O should be GUI based, easy to configure and edit the
parameter on the fly
Model-based FPGA programming environment interface,
need to simulate high fidelity model of power converters
Software environment ability to create automated test
scripts in languages such as Python
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
tracking), 8802(Progress)  Email :, 

Simulating electro-mechanical transient stability studies of 01

very large power grids with thousands of 3-phase buses,
generators, transformers, transmission lines, loads and
controllers. Should use a fundamental frequency solver
optimized to compute RMS values of voltages, currents,
Phasor active and reactive power in real time, with a typical time
Simulation step of 1 milliseconds.
Should simulate power grid with 2000, 3Ø Buses in Real
Should be able to build the circuit using the standard C++
library (machines, loads, transformer etc..)
Should be able to build circuit using the Functional mock-
up interface (FMI) library (with standard exciters, PSS,
machines etc..)
Should possible to import user defined components
developed with modelica software through Functional
mock-up unit (FMU)

Should support other simulation softwares, like DigSilient

PowerFactory, PSS/E, MATLAB Simulink, CYME etc..,
should be capable of model importing from, and exporting
to, these softwares
C37.118 drivers for fast transmission and reception of
synchro phasor streams, according to the IEEE C37.118
Communicat standard, typically composed of a set of 3 voltages and 3
ion Protocol currents (magnitudes and angles).

Synchronization through GPS, IEEE 1588, IRIG-B or 1PPS

Should support up to 240 frames per second

Support class M and P equipment

Interface PMU, PDC, SCADA, control and protection
Compatible with C37.238-2011 standard for precision time
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
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Additional requirements:

 The four subsystems should be able to operate in parallel as a single system, and independently as four individual


 Installation/Commissioning/Training at IITB

Warranty: Five years from the date of delivery to IIT Bombay

Required Application for Power system and Power Electronics.

1) Execute MATLAB Simulink/SimPowerSystems models directly in real time

2) Perform both plant and/or controller simulation using the same unit for Hardware In Loop (HIL) and Rapid
Control Prototyping (RCP) applications
3) Execute transmission network like IEEE large bus benchmark systems with detailed model of generators,
controls, transformers, transmission lines and loads
4) Simulate detailed IEEE distribution systems up to IEEE 13 bus system
5) Simulate detailed Wind power plant using DFIG or PMSG
6) Execute detailed model of multiple solar PV panels based PV farm
7) Simulate CIGRE benchmark two-terminal LCC-HVDC
8) Simulate various FACTS devices like SVC, TCSC, STATCOM, UPFC
9) Simulate power converters associated with RE sources operating at switching frequency up to 2 kHz
Indian Institute of Technology Bombay
 Direct : (+91­22) 2576 8800 (JR) / 8803 (Local) / 8804 (Import) /  8805 (Enquiry & Bill
tracking), 8802(Progress)  Email :, 

10) Send up to 16 CT/PT/CVT signals to actual protection relays, PMUs and other Intelligent Electronic Devices
11) Receive up to 32 status/command signals in the form of digital inputs from external controllers and
12) Perform closed loop testing of low voltage interface protection relays for different contingencies in the power
13) Detailed simulation of 2-level, 3-level converters used in medium voltage industrial drives applications with
switching frequencies as high as 2 kHz.
14) Prototype control algorithms for laboratory scale converters used in renewable energy, power quality
applications etc.
15) Test in closed loop 2-level and 3-level inverters for drives and power conversion applications
16) Prototype control of wind energy systems using DFIG or PMSG
17) Control a wind turbine emulator system using DC motor setup
18) Prototype different control schemes associated with Solar PV inverters
19) Validate control algorithms of Switched Mode Power Supply (SMPS) and UPS
20) Test industrial controls for drives such as Direct Torque Control, V/f etc.
21) I/O channels: 16 Analog output, 16 Analog input, 32 Digital input, 32 Digital output
22) Simulation of power converters of up to 64 switches at a time step as low as 250 ns. Thus, having a high-
fidelity power electronic real-time simulation. The user can therefore, easily have converter switching
frequencies as high as 50 kHz.
23) Different types of converter topology should be possible to simulate on FPGA. Without having skill of FPGA


1. Supplied system should be scalable for the future requirement. System be able to add IO’s by adding chassis
2. Supplied systems should support required communication protocol which are used in drives application
3. Should be able to add software license at point of time to increase the computation power
4. System supplied should be with COTS technology