Current-Source Converter Based Sssc:

Modeling and Control

Y. Ye, Student Member, IEEE M. Kazerani, Member, IEEE V. Quintana, Fellow Member, IEEE

Univemity of Waterloo
Department of Electrical& Computer Engineering
200 University Ave. West
Waterloo, Ontario, Canada, N2L 3G1
Tel: (519) 888-4567, Ex. 3737
Fax: (519) 746-3077
E-mail: m.kazerani@ece.uwaterloo.ca

Abstract Static Synchronous Series Compensator (SSSC) is a
series connected FACTS controller, which is capable of providing
reactive power compensation to a power system. The output of an
SSSC is a series injected ac voltage, which leads or lags the line
current by 90°, thus emulating a controllable inductive or
capacitive reactance. SSSC can be used to reduce the equivalent
line impedance and thus enhance the active power transfer
capability of the transmission line. SSSC is conventionally
realized with a voltage-source converter. In this paper, an SSSC
based on the current-source converter topology is proposed. In this
structure, the de-side current is regulated to a value larger than the
peak value of the maximum line current. The injected voltage is
controlled according to the desired reactive power compensation.
The decoupled state-feedback control for the injected voltage with
a separated dc current control is applied to the proposed system.
The advantages of the proposed scheme include fast dynamic
response and high quality of current and voltage waveforms. The
proposed SSSC has been simulated using the PSCAWEMTDC
package. The simulation results show that excellent current and
voltage waveforms as well as very short response times can be
obtained while operating at a low switching frequency. This
makes the proposed scheme suitable for high power applications.
Keywords: SSSC, VSC, CSC, Series Compensation, Decoupled
State-Feedback Control.
I. Introduction
Series reactive power compensation has been researched
for many years. Originality, f=ed or switched capacitors
were coqnected in series with the transmission line to
reduce the equivalent line impedance and thus increase the
active power transfer capability. With the development in
power electronics, switch-mode power converters based on
controllable switches such as GTO and IGCT have become
capable of doing the job with higher flexibility and
controllability. A typical application is the Static
Synchronous Series Compensator (SSSC’) which is a series
reactive power compensation device. SSSC is
conventionally realized by a voltage-source converter
(VSC) [1]. An alternative scheme based on the current-
source converter (CSC) topology has been proposed in [2].
The choice of VSC topology over CSC has been due the
advantages attributed to the VSC topology, such as
simplicity of control and higher efficiency; as well as the
disadvantages attributed to the CSC topology, such as more
complicated control, lower efficiency and possibility of
resonance between the filter capacitors and the line
inductance. However, the above situation is about to
change. The application of effective switching techniques
and control methods to the CSC topology has guaranteed
trouble-free switching and damping of oscillations due to
the resonance of filter capacitors with the line inductance.
Also, the evolution of new semiconductor devices, such as
Non-Punch-Through IGBT (NPT-IGBT) and IGCT with
high reverse voltage blocking capability, low losses, and
low power requirement in the driving circuit, has lifted the
need for placing a diode in series with the switching devices
and boosted the overall efficiency. There is a lot to be learnt
through the research on the application of CSC topology in
the realization of FACTS controllers.
In [2], the dc current is controlled in accordance with the
variations of the magnitude of the line current. In this way,
the power losses can be reduced when the line current is
low. However, this scheme results in a slow response
during transients. When a higher compensation percentage
is required, implying a larger line current, the dc inductor
has to be charged to a higher dc current before the required
reactive power compensation can be provided. In this paper,
thanks to the modeling and control techniques employed,
the transient response is quite fast. Therefore, losses can be
minimized by choosing the minimum de-side current
required for the desired var compensation, and the
maximum compensation level can be varied by adjusting
the de-side current. This control strategy is advantageous in
the cases where the compensation level is not expected to
change in large steps and the speed of response is not very
critical. In other cases where SSSC is used to enhance the
dynamic stability of a power system, the speed of response
is very critical. Then the de-side current can be kept

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constant at its maximum so that when the line impedance is
to be reduced to ensure dynamic stability, no time will be
wasted in charging up the dc inductor. In such cases, using
superconducting material in the de-side inductor guarantees
minimum de-side losses.
M important issue in all of the reactive power
compensation devices is the choice of the reference
quantity. The most straightforward way is to give the
desired reactive power supplied or absorbed by the SSSC as
the reference. A similar approach is to give the desired
injected voltage as the reference. However, it is usually
inconvenient to give these kinds of reference quantities. A
series var compensation device is used to inject a voltage in
series with the line which is leading or lagging the line
current by 90°. Thus, the device acts as an equivalent
inductor or capacitor. From the system point of view, it is
more convenient to specify the injected reactance as the
reference. In this work, a variable “k” which varies between
–lOOOAand 100Yo, is used as the reference. “k” is, in fact,
the ratio of the injected reactance to the original line
reactance, X. Thus, the total equivalent line reactance
becomes (l+k)X. “k” assumes positive or negative sign for
injecting inductive or capacitive reactance, respectively.
large amount of harmonics in the system voltage; however,
in practical, all the transmission lines have equivalent
phase-to-ground capacitors, so the voltage should not be
highly polluted. That is why it is essential to model the
transmission line as a T-network in simulation. This is an
important difference flom the voltage source converter
case, where the harmonic source is the injected ac voltage.
The inductive transmission line can help filtering by nature
in this case.
The primary side of each transformer is connected in
series with the transmission line. The secondary sides of the
transformers are connected in Y. The control objectives of
the SSSC are to keep the de-side current constant and to
give the system reactive power compensation as required.
I
!
—. t
I
,ea
T

In the following sections, fwst a dynamic model for the

CSC-based SSSC is introduced. Then, a decoupled state-
feedback controller and a separate dc current control loop
are formulated and used to control the injected voltage in
series with the line and regulate the de-side current. Finally,
the steady-state and transient performances of the SSSC are
evaluated using the simulation results obtained from the
PSCAIYEMTDC simulation package.

II. MODELING AND CONTROL OF

CSC-BASED SSSC

The schematic diagram of a CSC-based SSSC is shown

in Fig. 1. It is connected in series with the transmission line
Fig. 1 CSC-based SSSC
through three single-phase transformers. The transmission
line is modeled as a T-network, with R-L circuit in both
In Fig. 1, each transformer is modeied as a combination
side, represented as R,-L, and R,-I+, and a capacitor Cl
of an ideal transformer and a series R-L impedance. The
connected to the ground.
turns ratio of the transformers is n: 1, with the primary on
the system side and secondary on the converter side. The
The existence of the capacitor is very important for the
injected vohage to the system is called v~j,, vln,b, and v,nJC,
series compensation device with a current source converter respectively, for the three phases. In Fig. 1, ordy V,nJa is
topology, where the source of the harmonic is the ac
shown. C is the filter capacitor. LdC is the smoothing
current. Since it is used for series compensation, the ac
inductor and the resistor NC represents the converter losses.
output current of the converter is actually the line current,
Idcis the dc current. [i]=[i, i~ i,] T denotes the currents on the
with the only difference caused by the turns-ratio of the
secondary side, [V]=[VaV’bvCjTdenotes the voltages across
transformers. Because of applying PWM technology, the
the filtering capacitors, and [ii]=[i,. i,b iiC]Tdenotes the CSC
output ac current of the converter contains a lot of high
terminal current. After applying Park transformation, the
order harmonics. Although the amount of high order
above variables become [I]=[Id IJT, [V]=[Vd VJT, [Ii]=[Iid
harmonics in the output current can be greatly reduced due
LIT.
to the filtering capacitor, it is not totally eliminated. So the
line current also contains some high order harmonics. If the
CSC has to be controlled by the tri-level SPWM
transmission line is model as R-L circuit, very small
technique [3] in which case it behaves as a 3-phase linear
amount of harmonics in the current will be amplified to be

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 power amplifier. C’SC under tri-level SPWM control can be x= Ax+ Bu+Fe (13)
modeled as: y=cx (14)

iia = UlaIdc (1) where,

iib = mbI& (2)
iic = mcIdc (3) ‘=[vd ‘q~; ‘=[lid l@lT; e=lcl; y=[vd ‘q~;
L#&C +RdCIdC=nlava +mbvb +rnc VC (4)

A=[_Om :]B=~ $F=[-;];

where m,, mb, I% are the modulation signals of the 3
phases, normalized to the peak of the triangular carrier
signal. The modulation signals can also be transformed into 10
c= 01”
d-q frame. Thus, (1) to (4) can be re-written as
[1
Iid = MdIdc (5) For a linear system represented by (13) and (14), it is
Iiq = MqIdc (6) easy to design a state feedback controller [4] so that the
output variables follow the reference input variables and are
Ldc~ldc +Rdcldc ‘;Mdvd +;MqVq
(7) not influenced by the disturbance input. The controller can
be in the form of
Taking the line current in phase-a as the reference phasor
for the d-q transformation, the dynamic equations from the u=–Kxi-Tyref +Me (15)
converter to the secondary side of the transformer are
where,

;vd=–~~d+(f,v
+h&c (8) Yref = [lidref Iiqref ~ is the reference inpu~
‘c
K is a 2x2 constant state feedback matrix;
~V (9) T is a 2x2 constant diagonal gain matrix; and
~t q = ‘~vd ++;MqIdC
M is a 2x 1 constant vector.
%. 3 3
& =–—Idc+- — M~Vd+— MqVq (10)
‘dc 2Ldc 2Ldc The closed-loop input-output relationship is

The input variable, are Md and MT The output variables are

y=c(s~A+BW1(BTyef +(BIWt-F)e (16)
IdCand V~ which are chosen based on the control objectives
of the SSSC. The above system is nonlinear. A common
method to deal with the nonlinemity is to linearize the In this particular case, it is possible to fmd a K, such
equations around an operating point. But, in this particular that the matrix C(SI-A+BK)-lB is a diagonal matrix
case, since the nonlinearity is caused by Id. and the (implying a decoupled system) and the poles can be placed
dynamics of Id, is slower than those of vd and Vq, it is at the desired locations. The procedure of finding K is
possible to divide the system into an inner control loop and straightforward. Suppose
an outer control loop, where the two loops can be dealt with

[1
separately.
K= ‘“ “2 (17)
k21 k22
The inner loop is the linear part of the system. The model is
Calculate the closed form of C(sI-A+BK)-lB. The result is
(11) a 2x2 matrix. Choose the entries of K to make the matrix
C(SI-A+BK)-lB diagonal and place the poles at the desired
locations.
(12)

In this case, one can choose

In this system, I,d and l,q are the inputs, vd and Vq are the
state variables, as well as the outputs, (a and C are constant
values, and Id is the line current. From the control point of (18)
view, Id can be considered as a ‘measurable disturbance
input’, since it is neither a state variable, nor an input or
where p is a positive value and the point (-p, O) is the
output. The dynamic model in the matrix form is
location of both poles of the closed-loop system.

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 After K is designed, T can be chosen to make the
closed-loop gain equal to unity which means that in the
steady state, the relationship y=y,,f holds.
In this case, the matrix T is
[1
T= ‘c 0 (19)
0 pc
The matrix M should be designed in such a way that the
output y is influenced by the disturbance e as slightly as
possible. The ideal case is that C(sl-A+lBK~l(BM+F) is O.
The result in this case is
M=[l Or (20)
The final closed-loop transfer function is
(21)
It is a decoupled system. The transient response time is
determined by p. The steady state error is O.
The only unsolved problem for this system is how to get the
reference values. There are two reference values, V~ef and
V~,cf.They can be obtained from the outer control loop.
V&cf is obtained from the dc current control loop, the
nonlinear part in the original system model. The dynamic
equation for this loop is given by (1 O). Following a method
similar to that used in [5], i.e., multiplying both sides of
(10) by Id. and substituting the active power equation
‘~(Iid’~d
p=~Idvd +Iiqvq) (22)
into the dynamic equation, one gets
2RdC 2 2 p which is split equally at left and right hand sides of the
@c)=- —-(ldc)+— (23)
Ldc ‘d.
This is a fwst-orcler dynamic equation with (I&) as the
state variable as well as the output, and P as the input. A
simple PI controller can be designed to regulate the dc
current with no steady state error. Since rd is measurable,
the actaal input variable V~ can be delived from P and l&
The result is actually the reference vahJe of vd for the inner
control loop. The block diagram for deriving V&.f is shown
in Fig. 2.
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‘;re~dre’
d.
Fig. 2 Control Diagmm for Obtaining Vd&
The other reference input, V~..f, can be given in one of
the following three ways.
1) It can be given directly according to the system
requirement;
2) Usually, it is more convenient to give an injected
reactive power reference value, Qmf. In this case, V~Ef
can be found horn the desired Q,.f using the
relationship Q = ~ IdVq (since Iq = O);
3) In series compensation, sometimes the control target is
to compensate a certain percentage of the line
reactance. In this’ case, it is more convenient to give the
percent compensation as the reference value. Let’s
define k as the degree of compensation. The range of k
can be from –1 00°/0 to 10OO/O. Then, Vg,.f can be given
by
Vqref = kcr)(L, + Lr )Id (24)
where to(L~ + Lr ) is the reactance of the transmission
hne and Id is the line current.
Out of the three methods of giving V~,.f, the last one is
the most comdicated. but the most meankwful. This
method is used in the following digital simulation.
111.SIMULATION RESULTS
The simulated power system is composed of two voltage
sources at the sending- and receiving-ends of a transmission
line. The RMS values of the line to line voltages at both
ends are 230kV and their phase difference is 100. The base
values for the voltage and power are taken to be 230kV and
100MVA, respectively. The equivalent T-model is used for
the transmission line. The line impedance is O.01-+-jO. 1 p.u.,
SSSC. An equivalent capacitor is put in the middle of the
line. The capacitance of Cl is 0,5 @?, which is equal to 10
p.u. impedance. Three 100MVA 23kv123kv transformers
are connected in the middle of each phase in series. The
leakage reactance and resistance of the transformers, as
referred to the primary side, are 0.1 p.u. and 0.01 p.u.,
respectively, with regard to the bases of the transformers.
All the filter capacitors are sized at 1.6 @, which places the
resonant frequency of the LC circuit to be 330Hz. The dc
inductor LdCis sized at 3OrnH, which ensures the dc current
ripple to be less than 10’XO,A lfl resistor is connected in
series with the dc inductor to represent the internal losses of
the converter. The switching frequency is set to 1980Hz
952
which is 33 times the fimdamental Iiequency of 60 Hz. During all the simulations, the ripple in IdCis less than
Simulation results are shown in Figs. 3 and 4. In both 10’%O.The total harmonic distortion (THD) in the line
figures, Idc is the dc current; i, is the current in phase a in current is always less than 5°/0. The THD in the system
the primary side; vtij. is the injected voltage to tie system in voltage is always less than 30A.The injected voltages have a
phase & and ea is the system phase to ground voltage in lot of harmonic components. This is expected for the small
phase a. capacitance used. A better injected voltage waveform can
be obtained using a larger filter capacitor. But, the
Fig. 3 shows how the system responses to a step change waveform of the injected voltage is not important, as long
in the reactive power requirement. Here, the reactive power as the system voltage waveform is satisfied; and a larger
requirement is represented by the reference value for the capacitance implies larger ftmdrtmental-frequency current
percentage of the equivalent injected reactance. At frost, I& in the capacitors and thus a higher rating for the CSC-based
is regulated at 2kA. The equivalent injected reactance is set Sssc.
to be O. At t=l 10 ms, the reference value of the injected
reactance is set to be –50°A of the original line reactance.
As seen fkom Fig. 3(c), the injected voltage responds to the (kA) Id=
change in the reference and settles to the new steady-state 3
2 . .......... .......... ..........
value within one cycle. The dc current remains the same , f ...................i............... ....i........................................................
value during the transient stage of the regulation, as seen , I I 1
‘“”””i
I
Oi
from Fig. 3(a). With the reduction in the equivalent line 0,2 0.22 0;24 0.26 0.2s 0.3 (s)
(.)
impedance, the line current increases and stabilized to the
new value within cme cycle, as seen fi-om Fig. 3(b).

(kv)
80 v illia
40
0
40
.m

(kV)
v inja
m 1

0
Fig. 4 Step change in the dc current referace value
.!m (a) dc cnrren~ (b) hue current in phase A, (c) injected voltage in phase a;
(d) system voltage at the connecting point in phase a.

IV. CONCLUSION

In this paper, an SSSC based on the current-source

Fig. 3 Step change in the line reactance reference value
(a) dc curren~ (b) line current in phase A, (c) injected voltage in phase <
(d) system voltage at the connecting point in phase a.
Fig. 4 shows how the converter responds to a step
change in the dc current reference value. Continuing from
the previous simulation, at t=220ms, the dc current
reference value, Id.,.f, is set to be 2. 5kA. As seen from Fig.
4(a), Id, follows the change and reaches the new set-point
within one cycle. The line current, shown in Fig. 4(b), has a
small period of transient to charge the dc inductor. After the
transient, the line current resumes its original value. The
injected voltage, Fig. 4(c), is almost not influenced.
converter (CSC) topology is proposed. The dynamic model
of the system is derived and divided into a linear part and a
nonlinear part. The linear part is controlled in an inner loop
by a decoupled state-feedback controller. The nonlinear part
is controlled in an outer loop by a PI controller which
regulates the de-side current and provides the reference
values for the inner loop. The steady-state and transient
performances of the SSSC are evaluated using the
simulation results from PSCAD/EMTDC package. The
simulation results indicate that the CSC-based SSSC can
fi.dfill all the objectives of an SSSC. The CSC-based SSSC
has the potential of becoming a new FACTS device because
of its fast response and low harmonic components in the
output current.

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 V. REFERENCES

Mehrdad Kazerani (S’88, M’96) received the

[1] L. Gyugyi, “Dynamic Compensation of AC Transmission Lines by B. SC. degree from Shimz University, Iran, M.
Solid-State Synchronous Voltage Scources”, IEEE Transactions on Eng. Degree from Concordia University,
Power Delivery, vol. 9, no. 2, April 1994,p.904-911. Montreal, Canada, and Ph.D. degree from
[2] G. Joos, J. Espinoza, “Three-Phase Series var Compensation Based McGill University, Montreal, Canada, in
on a Voltage-Controlled Current Source htverter with 1980, 1990, and 1995, respectively. From
Supplemental Modulation Index control”, IEEE Transactions on 1982 to 1987, he was with the Energy
Power Electronics, vol. 14, no. 3, May 1999, P.587-598. Ministry, Iran. He is presently Assistant
[3] X. Wang, “Advances in Pulse Width Modulation Techniques”, Profasor with the Department of Electrical
Ph.D. Thesis, Dept. of Elmtrical Engineering, McGill Univemity, and Computer Engineering, Unive~ity of
March 1993. Waterloo, Waterloo, Ontario, Canada. His
[4] Panes J. Antsaklis, Anthony N. Michel, “Linear Systems”, The research interests are in the areas of power
McGraw-Hill Companies, INC., 1997, p.355-356. electronic circuits and systems design, active
[5] Y. Ye, M. Kazerani, “Decoupled State-Feedback_ jControl of CSI power filters, matrix converters, and FACTS.
Based STATCOM, The Proceedings of the 32”” Annual North
American Power Symposium, vol. 2, October 23-24,2000, session
12, p.1-8.

Victor H. Quintana (Fellow Member’01 )

VI. BIOGRAPHIES received the Dipl. Ing. Degree (1 959) from the
State Technical University of Chile and the
M. SC. (1965) and PhD (1970) degees in
Yang Ye (S’99) received the B.Eng. and M. Electrical Engineering from the University of
Eng. Degree from Tsinghua University, Wisconsin, Madison, and the University of
P. R.China, in 1994 and 1997, respectively. Toronto, ON, respectively. Since 1973, he has
He worked in ABB China Ltd. from 1997 to been with the University of Waterloo,
1998. He is presently a Ph.D. $udent in the of Electrical & Computer
Department
Department of Electrical and Computer Engineering where he is a full professor. URL:
Engineering, University of Waterloo, httrx/Av WW.Viclo@uintana.com/
Waterloo, Ontario, Canada. His research
interests are circuit design and control of
power electronic systems and FACTS
devices.

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