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ADAMSON UNIVERSITY

COLLEGE OF ENGINEERING
ELECTRONICS ENGINEERING DEPARTMENT

Final Project
8- Bit Arithmetic Logic Unit

MEMBERS:
Espiritu, Rhodnar A.
Hernaez, Chris Emilson T.
Torres, Ed Gerard R.

Engr. Mark Angelo Purio

Instructor
I. Introduction

Arithmetic Logic Unit (ALU) is the section of the computer processor that executes arithmetic

and logical operation. ALU is an exclusively combinational logic circuit which means output

changes with changing of input response. The ALU is a utile device in microprocessor, performing

various logical and arithmetic operations [1].

An ALU is a combinational logic circuit, meaning that its outputs will change asynchronously

in response to input changes. In normal operation, stable signals are applied to all of the ALU

inputs and, when enough time (known as the "propagation delay") has passed for the signals to

propagate through the ALU circuitry, the result of the ALU operation appears at the ALU outputs.

The external circuitry connected to the ALU is responsible for ensuring the stability of ALU input

signals throughout the operation, and for allowing sufficient time for the signals to propagate

through the ALU before sampling the ALU result.

In designing the Arithmetic Logic Unit, the group used a freeware VLSI designing tool named,

Electric. VLSI Electric is a state-of-the-art computer-aided design system for Very-Large-Scale-

Integration circuit design. A large set of tools is available including design-rule checkers,

simulators, routers, layout generators, and more. Electric interfaces to most popular CAD

specifications including EDIF, LEF/DEF, VHDL, CIF and GDS. The most valuable aspect of

Electric is its layout-constraint system, which enables top-down design by enforcing consistency

of connections [2].
II. Design Procedure

a. Build the components of the Arithmetic Section


b. The arithmetic unit of this ALU is composed of Adder and Subtractor.
c. Build the second part of the ALU which is the Logic Unit.
d. The logic unit consists of AND, NAND, OR, NOR, XOR, and XNOR.
e. Integrate the different unit using multiplexer.
f. Simulate the actual layout.
g. Validate the simulation.

III. Final Design


A. Truth Table

Table 1. Truth Table of 1 Bit Full Adder

A B Cin Carry out Sum

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

Table 1 shows the truth table of an adder circuit. This shows the input and output behavior
of the circuit. The system consists of two different outputs, one is the sum and the other one is the
carry out. The output values were determined using the given input values.
Table 2. Truth Table of 1 Bit Full Subtractor

A B Bin Borrow Difference

0 0 0 0 0

0 0 1 1 1

0 1 0 1 1

0 1 1 0 1

1 0 0 1 0

1 0 1 0 0

1 1 0 0 0

1 1 1 1 1

Table 2 shows the truth table of an subtractor circuit. This shows the input and output
behavior of the circuit. The system consists of two different outputs, one is the difference and the
other one is the borrow. The output values were determined using the given input values.

Table 3. Truth Table of AND Gate

A B Output

0 0 0

0 1 0

1 0 0

1 1 1

Table 3 shows the truth table of an AND circuit. This shows the input and output behavior
of the circuit. The system consists of two inputs and one output. It will output a logic high if and
only if both of the inputs are logic high.
Table 4. Truth Table of NAND Gate

A B Output

0 0 1

0 1 0

1 0 0

1 1 0

Table 4 shows the truth table of an NAND circuit. This shows the input and output behavior
of the circuit. The system consists of two inputs and one output. It will output a logic high if and
only if both of the inputs are logic low.

Table 5. Truth Table of OR Gate

A B Output

0 0 0

0 1 1

1 0 1

1 1 1

Table 5 shows the truth table of an OR circuit. This shows the input and output behavior
of the circuit. The system has two inputs and only one output. It will output a logic high if either
one of the two inputs is logic high.
Table 6. Truth Table of NOR Gate

A B Output

0 0 1

0 1 0

1 0 0

1 1 0

Table 6 shows the truth table of an NOR circuit. This shows the input and output behavior
of the circuit. The system has two inputs and only one output. It will output a logic high if either
one of the two inputs is logic low.

Table 7. Truth Table of XOR Gate

A B Output

0 0 0

0 1 1

1 0 1

1 1 0

Table 7 shows the truth table of an XOR circuit. The system has two inputs and only one
output. It will output a logic high if the inputs are not equal to each other.
Table 8. Truth Table of XNOR Gate

A B Output

0 0 1

0 1 0

1 0 0

1 1 1

Table 7 shows the truth table of an XNOR circuit. The system has two inputs and only one
output. It will output a logic high if the inputs are equal to each other.

Table 9. Truth Table of Inverter

A Output

0 1

1 0

Table 9 shows the input/output behavior of an inverter circuit. The system has an input A and
only one output. Every input into the circuit will just produce an output opposite of the input.
Table 10. Operational Code of the Arithmetic Logic Unit

S0 S1 S2 Operation

0 0 0 0

0 0 1 1

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 1

Table 10 shows the control operation of the ALU system. Specific inputs to the control
input corresponds to an operation the ALU will perform.

B. Schematic Diagram

1 Bit Full Adder


W
8 Bit Adder/Subtractor

AND
NAND

OR
NOR

XOR
XNOR

8-bit ALU
C. Layout Diagram

Adder/Subtractor
AND

NAND
OR

NOR
XOR

XNOR
8bit-ALU
IV. Results

A. Simulation

Adder/Subtractor

Figure 1. Adder/Subtractor Circuit

Figure 1 proved that the Adder/Subtractor Circuit was working. The simulation proved
that the input value delivered the output value expected from the truth table.
OR

Figure 2. Simulation of OR Circuit

Figure 2 proved that the OR Circuit was working. The simulation proved that the input
value delivered the output value expected from the truth table.

NOR

Figure 3. Simulation of NOR Circuit

Figure 3 proved that the NOR Circuit was working. The simulation proved that the input
value delivered the output value expected from the truth table.
AND

Figure 4. Simulation of AND Circuit

Figure 4 proved that the AND Circuit was working. The simulation proved that the input value
delivered the output value expected from the truth table.

NAND

Figure 5. Simulation of NAND Circuit

Figure 5 proved that the NAND Circuit was working. The simulation proved that the
input value delivered the output value expected from the truth table.
XOR

Figure 6. Simulation result of XOR Gate

Figure 6 proved that the XOR Circuit was working. The simulation proved that the input
value delivered the output value expected from the truth table.

XNOR

Figure 7. Simulation of XNOR Circuit

Figure 7 proved that the XNOR Circuit was working. The simulation proved that the input
value delivered the output value expected from the truth table.
8-bit ALU
V. ANALYSIS

An Arithmetic Logic Unit can be used to perform different operations in a single


integrated system. The design project was built from the basic unit of arithmetic and logical
units. The Arithmetic Unit consists of Adder/Subtractor. The Logic Unit consists of OR,
NOR, AND, NAND, XOR, and XNOR. The 8 bit adder is achieved by connecting 8 one
bit full adders to each other. The subtractor can be formed by using the Adder circuit and
putting XOR inputs to its B inputs and having a control input to toggle between Addition
and Subtraction. The inverter, XOR, XNOR, NAND, AND, NOR, and OR circuits are
simply made by having 8 one bit versions of themselves side by side. In order to integrate
these different units, a multiplexer was used. Multiplexing these different units will yield
an Arithmetic Logic Unit or simply called ALU.

VI. CONCLUSION

In the simulation of the Arithmetic Logic Unit of the 8-bit ALU the concept of the system
must be fully understand. The software used in making the schematic diagram is Multisim and
Electric for the layout diagram. The students who will be designing an ALU must have the
knowledge of using these software. ALU being one of the most important building blocks of
many computing circuits is very essential to computers as it performs the instructions the user
is inputting to the system. Design an ALU will help students to better understand the different
concepts of logical circuits and VLSI.

VII. REFERENCES
[1] T. Esther Rani, M.A. Rani and R. Rao, “AREA optimized low power arithmetic and logic
unit,” IEEE International Conference on Electronics Computer Technology, April 2011,
pp.224–228.

[2] http://www.staticfreesoft.com/jmanual/mchap01-01.html

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