Formatted ...
International Journal of Applied Mathematics Formatted
& Statistical Sciences (IJAMSS) ...
ISSN (P): 2319-3972; ISSN (E): 2319-3980 Formatted ...
Vol. 8, Issue 3, Apr - May 2019; 1-8
© IASET Formatted ...
International Journal of Applied Formatted
and Natural Sciences (IJANS) ...
ISSN(P): 2319-4014; ISSN(E): 2319-4022 Formatted ...
Vol.STUDY OF
7, Issue 6, Oct – Nov
AN2018;
ECONOMIC
11-141-8 ORDER QUANTITY MODEL UNDER LINEAR DEMAND,
International Journal of Applied Mathematics Formatted ...
& Statistical Sciences (IJAMSS); ISSN
CONSTANT DETERIORATION AND SHORTAGES ARE PERMITTED Formatted ...
Print:2319-3972; ISSN Online:2319-3980;©
IASETInternational Journal of Electronics and Formatted ...
FILTERING AND
Communication ACQUISITION
Engineering (IJECE) OF PCM FRAMES USING SYSTEM GENERATOR
Formatted
ISSN(P): 2278-9901; ISSN(E): 2278-991X ...
Vol. 8, Issue 13, DecApr -- JanMay 2019; Garima Sharma1 & Ambika Mahawar2 Formatted ...
1-61-10
1
Adriáan Stacul1 & Edgardo Comas2 Formatted ...
© IASET
Assistant Professor, Mody University of Science and Technology, Rajasthan, India Formatted ...
2 Formatted ...
Research Scholar, Mody University of Science and Technology, Rajasthan, India
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1,2 Formatted ...
Instituto De Investigaciones Cientiíficas Y Téecnicas Para La Defensa
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Buenos Aires, Argentina
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2 Garima Sharma & Ambika Formatted: Font: 9 pt, Bold, Italic
Mahawar10 Adrian Stacul &
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Received: 2923 JunApr 20189 | Revised: 05 30 DecApr 20189 | Accepted: 015 910 DecMay 20189 Formatted: Font: Bold
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.
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1 INTRODUCTION Formatted: Font: 11 pt
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Inventory is stocks of consuming goods. It is of two types:
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Direct inventory – The items which play a direct role in the manufacturing and is the main part of complete Formatted: Indent: First line: 0", Space After: 6 pt
goods is added indirect inventory. Formatted: Font: 11 pt
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Indirect inventory – Materials which are necessary for the manufacturing of items but not a part of complete
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goods are included in the indirect inventory. Formatted: Font: (Default) Times New Roman, Not Italic
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In many departmental stores, the manager has to maintain the stock which depends on many factors like time of
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order, demand, lead time, etc. So, they deal with problems like under-stocking and over-stocking. Inventory should be
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maintained for the smooth and efficient running of any business firms so that they can provide best services to customers
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immediately or at a short time span. In inventory, EOQ is the order quantity which maintains minimum total inventory cost. Formatted: Font: 10 pt, Not Italic
It involves costs like holding cost, shortage cost, deterioration cost and etc. This is known as the EOQ model because it gives Formatted: Font: 10 pt
the most economic size of the order to place. Witn in begun research on inventory and gave a theory about the deterioration of Formatted: Font: 10 pt, Not Italic
fashion items after a certain time of storage. Later, Ghare and Schrader started their study for the consumption of Formatted: List Paragraph, Indent: Left: 0.5", Space After:
6 pt, Bulleted + Level: 1 + Aligned at: 0.75" + Indent at: 1"
deteriorating items which was close to the negative exponential function of time. With the help of linear differential equation,
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they stated deterioration of inventory which included inventory level and demand rate as a function of time. Shah and Jaiswal Formatted: Font: 10 pt, Not Italic
considered the demand to be a function of time and presented an ordered level inventory model for deteriorating items. Their Formatted: Font: 10 pt
model was rectified by Aggarwal. These models assumed deterioration rate and demand pattern to be constant and Formatted: Font: 10 pt, Not Italic
replenishment was assumed to be infinite and shortages were denied. In 1963, continuously decaying inventory for a constant Formatted: Space After: 6 pt
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demand was considered by Ghare and Schrader for the first time. Then, the variable deterioration rate of two parameters of
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Weibull distribution was used to formulate a model which assumed constant demand rate and shortages were denied by
R.B.Covert and G.S.Philip in 1973. Then Philip extended their model for variable deterioration rate. However, all these
models were limited as they were only applicable to constant demand. In 2013, Trilokyanath Singh and Hadibandhu Formatted: Font: (Default) Times New Roman, Not Italic
Pattnayak worked on an EOQ Model for deteriorating items which assumed linear demand, variable deterioration and partial Formatted: Font: 10 pt, Not Italic
backlogging. Further, in 2015, they worked on an ordering policy with time-proportional deterioration, linear demand and Formatted: Font: 10 pt
permissible decay in payment and again in 2016 with Pandit Jagatananda Mishra, they developed an EOQ Model for Formatted
deteriorating items with linear demand, salvage value and partial backlogging. EOQ models are used in various managing Formatted: Indent: First line: 0"
firms like food managing firms, merchandise managing firms, and power plants and etc. The objective of this model is to Formatted: Font: 8 pt, Bold, Italic
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check the convexity of the graph between total inventory cost and time and to calculate the sensitivity analysis of the optimal Font color: Auto
solution with the help of a numerical example. Formatted: Font: 8 pt, Bold, Italic
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the originally transmitted signal and the received signal (note that the latter is band-limited, so the abrupt flanks no longer Formatted: Font: Not Italic
exist). The complete model (Fig. 2) shows two instances of the acquisition system: first, the filtering model (where you enter
an ideal PCM frame with noise added) and second, the acquisition model (in charge of the synchronization).
Figure 2: Complete PCM Model with Added Noise, Filtering, and PCM Acquisition Formatted: Font: Bold, Not Italic, Font color: Dark Red
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3 Development
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The model with System Generator [14] provides a high -level tool for the development of high -performance Formatted: Font: Not Italic, Font color: Dark Red
systems using Xilinx devices with FPGA technology, and thus defines and characterizes logic circuits to fulfill a specific Formatted: Font color: Dark Red
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function.
The main difference between any HDL and the rest of the programming languages is that the description languages Formatted: Font: Not Italic
are synthesized, not compiled or executed like any other program. This is due to the fact that programming languages are
defined as procedures. Instead, the hardware description is based on the definition of behaviors according to the inputs and
the desired processing concurrently [4].
During the synthesis, the interconnection of the available resources in the FPGA is defined so they behave in the Formatted: Font: Not Italic
way described. It is part of the work of the development tools to carry out the necessary optimization to take less resources or
for the block to operate at higher frequencies. The System Generator automatically translates the block development of a
Simulink[12] model into HDL by optimizing FPGA times and area, and also generates the final binary file [10].
The implementation in hardware was performed on the 3PX1 development kit manufactured by Emtech [2], with a Formatted: Font: Not Italic
Spartan-6 FPGA (XC6SLX25 [13]). This board meets the basic needs to initiate the development and prototyping of specific
system applications with FPGA technology. The board also includes a flash memory where to store the firmware,
push-buttons to use as inputs and LEDs to use as status indicators. It was mounted on an open cabinet made of acrylic to give
greater rigidity to the board, also to be able to unify it as a single module with BNC connectors for connection and
disconnection without compromising the FPGA device. Three connectors were placed on the front panel, two with the PCM
Transmitter outputs (data and clock) and a third connector with the input to the acquiring system, Fig 3.
The hardware design for the FPGA was performed using MATLAB[9] in conjunction with the System Generator, a Formatted: Font: Not Italic
tool provided by Xilinx to work in that environment. The MATLAB-Code was used to implement the MATLAB language
directly on an FPGA, eliminating the need to program under VHDL or Verilog.
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Figure 3: Implementation in the FPGA Development kit Formatted: Font: Bold, Not Italic, Font color: Dark Red
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3.1 PCM Filtering Formatted: Font: Not Italic, Font color: Dark Red
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To generate a realistic scenario, we add noise to an ideal PCM signal. This design supports critical conditions where Centered + 6.6", Right
noise could exceed 50% of the signal level. To achieve this, we perform a specific configuration of the “Noise generator” Formatted: Font color: Dark Red
block and perform the noise measurement using the equation. Formatted: Font: Not Italic
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Signal RMSValueofPCMdata
SNR = = (1)
Noise RMSValueofNoisegenerated
The SNR measurement model can be seen in Fig. 4 and the resulting value is approximately 0.6, i.e. the noise, in this Formatted: Font: Not Italic
case, is set to be 60% of the signal level, whereby the condition is completely secured (Fig. 5). This mentioned model
perform a real -time SNR measurement, which is advantageous to test different simulation scenarios with different types of
frames and times.
Figure 5: Results of SNR in PCM Data with Noise Added Formatted: Font: Bold, Not Italic, Font color: Dark Red
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This PCM filter sub-system implements a CIC filter (Cascaded Integrator-Comb). Implementations of CIC filters Formatted: Font: Bold, Font color: Dark Red
have structures that use only adders, subtracters, and delay elements. These structures make CIC filters appealing for their Formatted: Space After: 6 pt
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hardware-efficient implementations of multirate filtering [11].
In System Generator, the CIC filter block has a single input port and a single output port, xn and yn , and M is the Formatted: Font: Not Italic
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differential delay. In the decimator configuration, the sampling rate is reduced by a factor of R, sub-sampling the output of
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the last stage of the integrator [15].
Figure 6: Implementation of PCM Data Filtering with CIC Filter Formatted: Font: Bold, Not Italic, Font color: Dark Red
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As can be seen in Fig. 6, the implemented model is a 10 step CIC filter that, despite consuming many resources and Formatted: Font: Bold, Font color: Dark Red
a large area of the FPGA, ensures a good filtering that meets the high level of requirement in the design. On the other hand, Formatted: Font: Not Italic
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we must ensure that the width of each bit is kept equal to the output of the filter compared to its original ideal, so we adapt a
filter 25:1, which generates 68-bit data at the end of the CIC filter [7]. These last data are compared toa constant to generate
a digital pulse at the output of the subsystem. It was determined, by multiple tests and simulations, that the appropriate value
19
of the constant is set to 5.10 . Figure 8 shows how the filtering is done correctly in a PCM data signal. Formatted: Font: Not Italic
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Figure 7: Results of PCM Data Filtering. First Channel: PCM Data W/Noise, Formatted: Font: Bold, Not Italic, Font color: Dark Red
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3.2 PCM Acquisition
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In order to process the PCM incoming data, it is important to first determine the start and end of each packet. Since Formatted: Font: Bold, Not Italic, Font color: Dark Red
from the point of view of the entry there is no distinction, the data entry is continuous and asynchronous. The development Formatted: Font: Bold, Font color: Dark Red
challenge is to be able to detect the beginning of each package, a pattern recognition or sync word detection, to regenerate the Formatted: Font: Not Italic, Font color: Dark Red
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data synchronously for further processing. The complete model can be seen in Fig. 8.
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Figure 8: PCM Acquisition Model Formatted: Font: Bold, Not Italic, Font color: Dark Red
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The algorithm developed for the re-synchronization block is based on the rising edge detection of PCM data input.
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This sub-system (Fig. 9) performs a first PCM clock re-generation continuously and synchronizes automatically when a
rising edge is detected in the incoming signal.
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shift register, to find the sync-word bit by bit (performs a bit-sync). The second generates additional signals to other blocks. Formatted: Font: Bold, Not Italic, Font color: Dark Red
The results of the simulation can be seen in Fig. 10. In the last channel, we can see the incoming PCM data signal in the Formatted: Font: Not Italic, Font color: Dark Red
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subsystem, and when the first rising edge is detected, the clock is re-synched, and a valid frame flag is activated, indicating a
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possible true PCM frame. From that moment, an algorithm starts to recognize the sync-word configurated (performed by a
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block which is called lock). Figure 10 shows how after 16 bits, the output is true indicating that the sub-system found a valid
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sync-word. In this case, the sync-word is 1110101110010000 ( EB9016 ). Formatted: Font: Not Italic
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Figure 10: Results of PCM RESYNC. First Channel: PCM Data Clock Regenerated, Second Channel: Bytes Formatted: Font: Bold, Not Italic, Font color: Dark Red
PCM Frame, Third Channel: True Valid PCM Frame, Fourth Channel: Bits in PCM Frame, Formatted: Font: Bold, Not Italic, Font color: Dark Red
Fifth Channel: Lock Signal (Sync-Word Detected), Sixth Channel: PCM Data Formatted: Font: Bold, Not Italic, Font color: Dark Red
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Several freqcuency measurements were performed with an analyzer. The PCM data (output of the PCM simulator) Formatted: Space After: 6 pt
have 99.9998 KHz with a standard deviation of 1.1248 MmHz, with 125 samples per second in a total of 10 seconds of Formatted: Font: Not Italic
duration. A second frequency stability measurement was performed with the PCM filtering and acquisition in full operation,
and the results of the PCM clock regenerated are 9.9998 KHz with a standard deviation of 1.5216 MmHz (Fig. 11). In
conclusion, the error added by the model is practically null.
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Figure 11: Results of Regenerated PCM Clock Stability Formatted: Font: Bold, Not Italic, Font color: Dark Red
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Frame storage in the system is essential for a protocol conversion or pre-processing algorithms. In this case, the
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acquisition system converts the incoming PCM data and sends it synchronized using the UART protocol, through to USB Formatted: Font: Not Italic
physical connection [1]. This sub-system combines M-Code block (MATLAB script code) taking the incoming flow of bits
and the flag indicating a valid frame, and generates one byte for each channel of the frame. These bytes are stored in a
distributed memory FIFO to decrease the resources and area of the FPGA, especially for low-cost devices where hardware
resources are more limited without compromising the operation frequency. The operation of the STORE sub-system is
shown in Fig. 12 and it can be observed how the sub-system takes the valid byte at the beginning of the frame, taking into Formatted: Justified, Space After: 6 pt
account that the sync word is EB90 in hexadecimals. Formatted: Font: Bold, Not Italic, Font color: Dark Red
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Figure 12: Operation of the STORE Sub-System. First Channel: Number of Bytes in FIFO, Second
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The SEND subsystem collects the data stored in the STORE block and serializes them with an 8N1 UART protocol Formatted: Font: 8 pt, Bold, Italic
Figure 13: PCM Frame Converted to UART. First Channel: Transmit in UART Protocol, Second Formatted: Font: Bold, Not Italic, Font color: Dark Red
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Channel: Flag Indicating Bytes in UART, Third Channel: Flag Indicating Bits in UART.
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4 Implementation and Results Formatted: Font: Not Italic, Font color: Dark Red
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By connecting the PCM simulator (a known frame used as a pattern) to the acquiring system, we can receive the data
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captured in a computer through a USBusb-serial port. The data will be dumped into a vector called "serial data".
To perform the proposed analysis, we will convert serial data into an matrix, where each column represents a Formatted: Font: Not Italic
complete frame (from the sync word to the end of the frame) and the column number is the received frame number. Figure 14 Formatted: Font: Not Italic
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shows the matrix in an HSV color chart by treating it as like an image. The matrix will be cropped to keep only the payload by
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deleting the first 4 bytes and the last byte, called serialdatamatrix. A new matrix of constants is generated representing the
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ideal matrix (as if there were no errors) called data matrix. The two matrices are subtracted to a new matrix called difn. The
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resulting image is shown in Fig. 15. Formatted: Font: 8 pt, No underline, Font color: Auto
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dif ( m,n ) = serialdatamatrix( m,n ) datamatrix( m,n ) Formatted: Font: Bold
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((2)
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Field Code Changed
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Figure 15: Errors in PCM Acquisition Rows: Channel of PCM Formatted: Font: Bold, Not Italic, Font color: Dark Red
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Data (Bytes), Column: Number of PCM Frame Received.
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In total, 2102 errors were detected from a total of 1375232 bytes captured (21488 PCM frames at 5ms per frame
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with a length of 64 bytes each). Also, the system was tested successfully with 1Mbps obtaining the same results. Subtracting Formatted: Font: Not Italic
the first 4 bytes and the last (5 bytes in total), we have a total of 21488 frames of 59 bytes in the payload, resulting in a total
of 1267792 bytes.
If we calculate the percentage of bytes with error vs. the total payload bytes, it gives an efficiency of 99.83. The Formatted: Font: Not Italic
maximum error introduced by the acquiring system is 0.165%, assuming that the error occurs in the complete byte, i.e. the 8
bits are erroneous.
This value is due to the fact that the acquiring system is re-engaged by each received frame. Other systems Formatted: Font: Not Italic
synchronize only once with the first valid sync-word. Therefore, if an error occurs in the medium of the acquisition of a
frame, when it detects the sync-word of the next frame, it is re-accommodated. This shows that while the system introduces a Formatted: Font: Not Italic, Font color: Dark Red
small error in the telemetry chain, it is minimal and self-correcting, thus proving trustworthy for mission-critical applications. Formatted: Font: (Default) Times New Roman, 10 pt, Not
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5 CONCLUSIONS
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In total, 230 frames were found with errors, and a maximum of 5 bytes with error per frame. If an entire frame Formatted
discard policy is applied in case we found only one error, in total it would be 1.07% of discarded frames. The BER calculated Formatted: Indent: First line: 0"
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is about 0.15%.
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Another important analysis is to corroborate the amount of erroneous data as a function of time by performing a Font color: Auto
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fitting of the number of frames received vs. number of errors accumulated in time. The results are shown in Fig.16 and the
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Figure 16: Errors in PCM Acquisition First: Number of Errors Accumulated in Time, Second: Residuals. Formatted: Font: Bold, Not Italic, Font color: Dark Red
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For the implementation of the PCM acquisition model, the base software and the FPGA device of Table 1 were Formatted: Font: Not Italic
used. The results of the final implementation, i.e. once the final hardware routing was generated after the synthesis, can be
analyzed in Fig. 17. As a conclusion, we can highlight that it occupies a very little area of the hardware. Therefore, this
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system is compatible with low-cost FPGA devices, where the area and resources are very limited. Formatted: Justified, Space After: 6 pt
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Table 1: Software Version and Target Device for the System Implementation Formatted: Font: Not Italic
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Software Version and Target Device Formatted: Space After: 6 pt
Formatted Table
Product ISE:14. Target S
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Version: 2 P.28xd Family: partan6
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pt, Line spacing: single
t
HC = Ch∫0 1 I1 (t)dt Formatted: Font: 10 pt, Not Italic
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t2 cθ+2d dθ−cθ2 dθ2 5
= Ch [c 1
+( ) t13 + ( ) t14 − t ] Formatted: Font: 10 pt, Not Italic
2 6 8 10 1
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(8)
We aspire to evaluate the optimal (best) values of t1 and T in order to reduce the total inventory cost TC to a Formatted: Font: 10 pt, Not Italic
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16 Garima Sharma & Ambika
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Edgardo Comas
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On solving we have, optimal shortage period t1 = 0.0368 unit time and length of ordering cycle T = 1.26362 unit
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time. And the economic order quantity is
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Q = 59.87774763 units and the minimum total inventory cost per unit time Formatted ...
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TC = 73.15493756. We get a graph according to the above values:
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Figure 2
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Table 1 Formatted ...
TC Formatted ...
Parameter %Change %Change Formatted ...
t T Q TC
in in TC
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Parameter
cC -20% 0.03922 1.34674 57.13199 67.45764 -7.788 Formatted ...
-10% 0.03796 1.30348 58.6176 70.35164 -3.832 Formatted ...
10% 0.03573 1.22679 60.95309 75.87453 3.717 Formatted ...
20% 0.03473 1.19266 61.87596 78.51667 7.329
Formatted ...
d -20% 0.03783 1.29899 60.74516 71.92532 -1.68
-10% 0.03729 1.28074 60.2808 72.54861 -0.828 Formatted ...
10% 0.03633 1.24751 59.5277 73.74554 0.766 Formatted ...
20% 0.03589 1.23229 59.22379 74.32149 1.594 Formatted ...
Ch -20% 0.04577 1.26647 60.14835 72.95245 -0.276
Formatted ...
-10% 0.04079 1.26489 59.99803 73.06471 -0.123
10% 0.03352 1.26258 59.77931 73.22904 0.101 Formatted ...
20% 0.03077 1.26172 59.69727 73.29099 0.185 Formatted ...
Cs -20% 0.03256 1.38919 72.36949 66.19795 -9.509
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-10% 0.03474 1.32149 65.48729 69.78257 -4609
10% 0.03876 1.21339 55.21253 76.34606 4.362 Formatted ...
20% 0.04063 1.16925 51.26821 79.37999 8.509 Formatted ...
Co -20% 0.03339 1.14641 49.28462 64.85879 -11.34 Formatted ...
-10% 0.03515 1.20698 54.63043 69.10762 -5.532
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10% 0.03835 1.31692 65.03593 77.02987 5.296
20% 0.03982 1.36736 70.11272 80.75508 10.389 Formatted ...
Cd -20% 0.0368 1.26362 59.87775 73.15494 0 Formatted ...
-10% 0.0368 1.26362 59.87775 73.15494 0 Formatted ...
10% 0.0368 1.26362 59.87775 73.15494 0
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Impact Factor (JCC): 4.1675 NAAS Rating 3.45 Formatted ...
Impact Factor (JCC): 4.1675; NAAS Rating: 3.45;
Impact Factor (JCC): 5.2039 NAAS Rating Formatted ...
3.80Impact Factor (JCC): 4.8623 NAAS Rating Formatted
3.17 ...
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Study oOf Aan Economic Order Quantity Model Under Linear Demand, Constant Deterioration Aand Shortages Aare Permitted
17 Filtering and Acquisition of PCM Frames using System Generator Formatted ...
7
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20% 0.0368 1.26362 59.87775 73.15494 0
θ -20% 0.0368 1.26362 59.87775 73.15494 0 Formatted ...
-10% 0.0368 1.26362 59.87775 73.15494 0 Formatted ...
10% 0.0368 1.26362 59.87775 73.15494 0 Formatted ...
20% 0.0368 1.26362 59.87775 73.15494 0
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Figure 17: Place and Route Implementation Report
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ACKNOWLEDGMENTS Formatted ...
The present R&D work was carried out under the supervision of my Ph.D. thesis director, Ph.D. Mario Lavorato, the Head of Formatted ...
the Digital Techniques Laboratory, Eng Daniel Pastafigliato whom I would like to express my deepest appreciation for Formatted ...
making this study possible. In addition, I would also like to thank all the personnel working at the Laboratory of Digital
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Techniques in Instituto de Investigaciones Científicas y Técnicas para la Defensa (CITEDEF): Martín Morales, Ariel Dalmas
Di Giovanni, Sergio Saluzzi and Sebastián Alavarez; who permanently collaborate in the development of software and Formatted ...
hardware for this type of applications. Finally, I am very grateful to the CITEDEF authorities for the logistics support and to Formatted ...
MINDEF (Defense Department of Argentina), which provides financial support to this type of programs and projects.
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REFERENCES Formatted ...
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English (United States)
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