Synthesis Netlist
Library Model
Dofile commands
Outputs: -
FastClk
ProcClk
Reset
Input Scan channel Output Scan channel
Top Design: cntl2
Scan_En
Scan_chain Input1 chainout1
Scan_chain Input2 chainout2
Scan_chain input3 chain out3
Vlsiguru Confidential 1
VLSIGURU DFT TRAINING SCAN INSERTION LAB OBSERVATIONS
12) Log file: - please note your observations from the log file
Top module is cntl12
Number of shift registers =25
Longest have 3 flop
Shortest have 2 flop
No of no scan memory element =102
No of non scan memory element converted to scanable =102
Number of new Pins inserted= 7 (3 scan inputs, 3+ scan outputs, scan_en )
Vlsiguru Confidential 2