Anda di halaman 1dari 2

# Reg. No.

:
Mohamed Sathak A J College of Engineering
Siruseri IT Park, OMR, Chennai - 603103.
Assessment - I Exam
Date /Time Max. Marks 50 Marks
Subject with Code EC 8552 - Computer Architecture And Time 90 minutes
Organization
Branch ECE Year/Semester III/V

Course Objectives
The Student should be able
S. No. Course Objective
1 To make students understand the basic structure and operation of digital computer
2 To familiarize with implementation of fixed point and floating-point arithmetic operations
3 To study the design of data path unit and control unit for processor
4 To understand the concept of various memories and interfacing
5 To introduce the parallel processing technique
Course Outcomes:
On Completion of the course the students will be able to
CO No. Course Outcome
1 Describe data representation, instruction formats and the operation of a digital computer
2 Illustrate the fixed point and floating-point arithmetic for ALU operation
3 Discuss about implementation schemes of control unit and pipeline performance
4 Explain the concept of various memories, interfacing and organization of multiple processors
5 Discuss parallel processing technique and unconventional architectures

## BLOOMS TAXONOMY(BT Level)

K1-Remembering , K2-Understanding, K3-Applying, K4-Analyzing, K5-Evaluating ,K6-Creating

## Part A (7x2=14 marks) CO BT level Univ. QP

(Answer all the questions) Mapping Reference
1 What is an uniprocessor? 1 K2

## 6 Differentiate RISC with CISC? 1 K2

7 Write the equation for the dynamic power required per transistor. 1 K1
Part B (2x13=26marks) CO BT Univ.QP Marks
(Answer all the questions) level Reference Alloted
8 (a) 1 K2 13
What is an addressing mode? What is the need for
addressing in a computer system? Explain the various

(OR)

## 9 (a) Write MIPS instruction format for following instructions 1 K4 3+3+3+

ii)sub \$t0,\$s3,\$s4
iii)lw \$s1,20(\$s2)
iv)sw \$s1,20(\$s2)
OR

## (b) Assume that the variables f and g are assigned to registers 1 K4 13

\$s0 and \$s1 respectively. Assume that the base address of
the array A is in register \$s2.Assume f is zero initially.
f=-g-A[4];
A[5]=f+100;
Translate the above C statements into MIPS code. How
many MIPS assembly instructions are needed to perform
the C statements and how many different registers are
needed to carry out the C statements?

## Part C (1x10=10marks) CO BT Univ.QP Marks

level Reference Alloted
10. (a) Explain in detail about the operand and operations involved 1 K2 3+3+4
in MIPS
OR
(b) 1
Consider three different processor P1, P2 and P3executing the same K5
instruction set. P1 has a10
3 GHz
clock rate and a CPI of 1.5 . P2 has a 2.5 GHz clock rate and a CPI of 1.0. P3 has a 4.0 GHz clock
rate and has a CPI of 2.2.
A) Which processor has the highest performance
expressed in instructions per second?
B)If the processors each execute a program in
10 seconds. Find the number of cycles and the
number of instructions in each processor.