TCM3.2L
LA
P&S
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©
Copyright 2009 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by JA/JY 0966 BU TV Consumer Care, the Netherlands Subjecttom odification EN 3122 785 18660
2009-Jun-19
EN 2 1. TCM3.2L LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
First release.
2 .1 Technical Specifications
2.2 Directions for Use
For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started, Click on the hyperlinks in table above.
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Technical Specifications and Connections TCM3.2L LA 2. EN 3
Note: The following connector color abbreviations are used HDMI 1 & 2: Digital Video, Digital Audio - In
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= (see HDMI - Side Connections)
Grey, Rd= Red, Wh= White, and Ye= Yellow.
CVI-1&2: Cinch: Video YPbPr - In, Audio - In
USB2.0 Gn -Vide o Y 1 V PP / 75 Ω
Bu - Video Pb 0.7 V PP / 75 Ω
Rd - Video Pr 0.7 V PP / 75 Ω
1 2 3 4 Wh - Audio L 0.5 V RMS / 10 k Ω
E_06532_022.eps Rd - Audio R 0.5 V RMS / 10 k Ω
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Precautions, Notes, and Abbreviation List TCM3.2L LA 3. EN 7
2009-Jun-19
EN 8 4. TCM3.2L LA Mechanical Instructions
4. Mechanical Instructions
Index of this chapter:
4.1 Service Positions
4.2 Cable Dressing and Taping
4.3 Assy/Panel Removal
4.4 Set Re-assembly
Notes:
• Figures below can deviate slightly from the actual situation,
due to the different set executions.
The foam bars (order code 3122 785 90580 for tw o pieces) can
be used for all types and sizes of Flat TVs.
See figure Figure 4-1 for details. Sets with a display of 42" and
larger, require four foam bars [1]. Ensure that the foam bars
are always supporting the cabinet and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By positioning the TV face down on the (ESD protectiv e) foam
bars, a stable situation is created to perform measurements
and alignments. By placing a mirror under the TV, the screen
can be monitored.
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Mechanical Instructions TCM3.2L LA 4. EN 9
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EN 10 4. TCM3.2L LA Mechanical Instructions
Caution: It is mandatory to remount screws at their srcinal Description below is based upon the 42" model with LG display.
position during re-assembly. Failure to do so may result in Disassembly method of other LCD panels is comparable to the
damaging the SSB. Refer to Figure 4-4 for details. one described below. See also “Mechanical layout” drawings.
4. Unplug an d remove all cab les.
5. Remove the Main Supply Panel an d Small SIgnal Board as
4.3.1 Rear Cover
described earlier.
6. Remove all metal brackets that are mounted on the panel
Warning/Notes:
(be aware of the different screws used, see figure “Used
• Disconnect the mains power cord before rear cover
screws”):
removal.
– Two VESA holder brackets at the top (screw #2).
• Itis not necessary to remove the stand whil e removing the
– Two SSB holder brackets (screws #2 and #3).
rear cover.
– Two central holder brackets (scr ew #2).
• Re-use the srcinal screws when re-assembling the TV.
– One PSU holder bracket (screw#1).
7. Remove the stand [1] (screw #5).
1. Remove all screws of the rear cover. 8. Remove the subframe of the stand [2] (screw #2).
Important: Be sure to re-use the same screws when 9. Remove the brackets [3] (screw #3) that secure the LCD
remounting the rear cover, as these screws have a 30 panel, and remove screws #4 at the bottom of the LCD.
degrees thread instead of the common used 45 degrees 10. The LCD panel can now be lifted from the front cabinet.
thread.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.
4.3.2 Speakers
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Mechanical Instructions TCM3.2L LA 4. EN 11
Button SIDE AV
bracket
IPBbracket
IR - Lens
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SIDE AV
Button
bracket
SSB bracket B
IR -LED
A C -In Br ac ke t Stand
2 * Speaker
bracket
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Service Modes, Error Codes, and Fault Finding TCM3.2L LA 5. EN 15
5.4.4 Error C odes 5.5 The B linking LED P rocedure (L AYER-2 c odes)
Take notice that some errors need several minutes before they 5.5.1 Introduction
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
The software is capable of identifying different kinds of errors.
check if the front LED is blinking or if an error is logged.
Because it is possible that more than one error can occur over
time, an error buffer is available that is capable of storing the
Table 5-2 Layer 1 code overview last five errors that occurred. This is useful if the OSD is not
working properly.
Code Board
2 SSB
Errors can also be displayed by the blinking LED procedure.
3 Platform supply (12V detection)
The method is to repeatedly let the LED pulse with as many
pulses as the error code number, followed by a time period of
Table 5-3 Layer-2 code overview 1.5 seconds in which the LED is “off”. Then this sequence is
repeated.
Layer 2 Error Detection Type Remarks E.g. error code 4 will res ult in four times the sequence LED “on”
error code Description Method for 0.25 seconds / LED “off” for 0.25 seconds. After this
0 No
Error N/A N/A N/A sequence the LED will be “off” for 1.5 seconds. Any RC
14 GeneralI 2C I2C Bu s Spontaneous Communication Error command terminates this sequence.
blinking on I2C bus
15 Tuner I2C Bus Error Log Communication Error
+ blinking in SDM with Tuner Displaying the entire error buffer
16 Demodulator I2C Bus Error Log Communication Error The entire error buffer can be displayed when service mode
+ blinking in SDM with TDA9886T “SDM” is entered (by remote control command
17 Audioamplifier I 2C Bus Error Log Communication Error 062596<MENU>). When in protection, this sequence will not
+ blinking in SDM with Audio amplifier work, but than LAYER-1 error code should suffice.
18 NVMEEPROM I 2C Bu s Spontaneous Communication Error
blinking with EEPROM In order to avoid confusion with RC signal reception blinking,
this blinking procedure is terminated when a RC command is
received.
2009-Jun-19
EN 16 5. TCM3.2L LA Service Modes, Error Codes, and Fault Finding
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Yes
Yes
Check 33V is
OK? check the
U2,Q13
No
Is No
Q14,C184,C197 check
,L54 shorted to D2,R184,R178
earth?
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Service Modes, Error Codes, and Fault Finding TCM3.2L LA 5. EN 17
No
Check the voltage of Check
U17.8~11,it 24v? L139,L140
Yes
Yes Change the
Check the voltage of No Check the Q24
software of U10 &
U17.31 & U17.23,is it OK? &,is it OK?
U8
Yes
Yes
Check
U17.24,U17.21, No Check the
L103,L101,R361,R362
U17.36 is 3.3V?
Yes
No
Check
Change the U17
R & L speaker
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No colour
No YES YES
Reset Check
To Tuner Input Check E2PROM
Local system cable & antenna U21
YES
Fine Frequency
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EN 18 5. TCM3.2L LA Service Modes, Error Codes, and Fault Finding
5.7.1 Introduction To upgrade the HDMI EDID, pin 7 of the EDID NVM [1] has to
be short circuited to ground. See ComPair for further
instructions.
It is possible for the user to upgrade the main software via the
USB port. A description on how to upgrade the main software
can be found in the DFU and below.
1
5.7.2 Main Software Upgrade 1
In “normal” conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the “upgrade.bin”. This can
also be done by the consumers themselves via the Software
Update Assistant in the user menu (see DFU), but they will
have to download their software from the commercial Philips
website.
upgrade.
4. Switch “on” the TV, an d activate the Main men u with the Figure 5-6 HDMI-1 & HDMI-2 EDID NVM
“Menu/House” key on the remote control.
5. In the Main menu, go to the “Software update” item.
6. Press “OK” key to go to the submenu.
7. Select “Local updates” in the submenu and press the “OK”
key to enter the Software Update application.
8. You will be prompted to cancel or to proceed with the
software updating.
9. To proceed, select “Update” and press the “OK” key to
enter the next menu. In the next menu select “Start” and
press “OK” key to start the software update.
10. Upgrading will now begin and the progress of the updating
will be displayed. After the software updating is completed, 1
the TV will automatically restart.
To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has
to be short circuited to ground. See ComPair for further
instructions.
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Service Modes, Error Codes, and Fault Finding TCM3.2L LA 5. EN 19
Cancel Upgrade N
Valid auto-run file?
Layout 2
Y
Please don t shut off t he powe r
The software u pdate may takes 3 to 5 N
N
minutes
Is USB file version > Is USB file version <=
Erasing... En d
set SW set SW
Layout 3
Y Y
Layout 4
N
N
Proceed?
Software update Y
fail ed! Wo uld you TV auto erase
Valid auto-run
like to try again Y and upgrade
file
software
Layout 5
See La you t 3 See La you t 4
TV auto restart Y N
the set, prompt Prompt user to
Successful?
user to remove try again
US B
See Layout 5
N Y
EN D Retry?
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EN 24 7. TCM3.2L LA Circuit Descriptions
7.3.3 IPL42L P SU
Block Diagram
DIM
PFC o u tp u t
3 95 V INVERTER +H V
AC
Re l a y PFC IC IC OZ9926A
Inp u t
L6562A (O2) -HV
(ST) ENABLE
S witchcon trol
BL-ON
Volt a ge Detect
PWM Power
Su pply IC
24 V
P S -ON
FA5571
(FUJI)
S TB Power
Su pply IC
3 .3 V
F S Q510
(FAIRCHILD
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Key Components
The key component ICs are:
• Stand-by power sup ply IC: FS Q510 (Fair child).
• PFC control IC: L6562 (ST).
• 24V PWM control IC: FA5571N (FUJI).
• Inverter hig h volta ge con trol IC: OZ9 926 (O 2).
Control Signals
Output Characteristics
Fault Finding
Normal PSU working order:
• Connect the AC power plug.
• The 3.3V Stand-by power supply (Stand-by uP U801) will
start. This is a “single-ended flyback regulator”. For a good
functioning of this part, check the availability of 1.25V on
U803 (TL431).
• On connector P802, signal line “PS_ON” will go “high”
(3V3) and relay K801 will be activated.
• Also capacitors C811/C812 will be charged, supplying
IC806 with electricity. This will start the PFC circuit and
generate the +24 V control.
• Now, IC805 will start, and will generated the 24V output.
• On connector P802, signal “DIM” sets the PWM dimming
status.
• On connector P802, when signal “BL-ON” goes “high”, the
high voltage Inverter (IC901, OZ9926A) will start.
2009-Jun-19
IC Data Sheets TCM3.2L LA 8. EN 25
8. IC Data Sheets
Index of this chapter: This chapter shows the internal block diagrams and pin
8.1 Diagram B01, LD1117 (IC U4) configurations of ICs that are drawn as “black boxes” in the
8.2 Diagram B01, RT8110 (IC U13) electrical diagrams (with the exception of “memory” and “logic”
8.3 Diagram B01, MP1593 (IC U14) ICs).
8.4 Diagram B01, PQ1CX41 (IC U20)
8.5 Diagram B02, MX25L3205 (IC U10)
8.6 Diagram B02, MT8222 (IC U11)
8.7 Diagram B03, RT9199 (IC U1)
8.8 Diagram B04, TDA9885 (IC U2)
8.9 Diagram B07, WM8501 (IC U9)
8.10 Diagram B09, RC4558 (IC U26/U37)
8.11 Diagram B09, LM833D (IC U27)
8.12 Diagram B10, STA333BW (IC U17)
BlockDiagram PinConfiguration
LD1117DT
DPAK
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EN 26 8. TCM3.2L LA IC Data Sheets
DRIVE VCC
VCC
V CC Power-
Regulator On Reset IOC
POR
OC R OC
0.8V REF
+ PHASE
UVP Soft-Start
0.5V - -
and Fault
+
Logic -
SSE + 1.5V
S1L PH_M
SS UGATE
+
+ Gm EO + Gate VCC BOOT
FB - + Control
-
Logic LGATE
PW M
GND
Oscillator
(TOP VIEW)
E E E
S T T
A A D A
H G N G
P U G L
8 7 6 5
1 2 3 4
T E B C
O V
I F C
O R V
B D
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IC Data Sheets TCM3.2L LA 8. EN 27
Block Diagram
IN 2
INTERNAL CURRENT
REGULATORS SENSE
AMPLIFIER + 5V
OSCILLATOR
SLOPE
COMP --
1 BS
40/385KHz
CLK M1
+ + S Q
R Q
3 SW
0.7V -- SHUTDOWN -- CURRENT
COMPARATOR COMPARATOR
EN 7 M2
LOCKOUT
-- COMPARATOR
1.8V
2.3V/
2.6V + + -- 4 GND
Pin Configuration
TOP VIEW
BS 1 8 SS
IN 2 7 EN
SW 3 6 COMP
GND 4 5 FB
EXPOSED PAD
ON BACKSIDE
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CONNECT TO PIN 4
Figure 8-3 Internal block diagram and pin configuration
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EN 28 8. TCM3.2L LA IC Data Sheets
Block Diagram
Pin Configuration
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IC Data Sheets TCM3.2L LA 8. EN 29
Block Diagram
a
Address X d
- d
D it
Generator e io
c Memory Array n
o a
d l
e 4
r K
b
SI Data
Register
Y-Decoder
SRAM
Buffer
Sense Output
Mode State Amplifier Buffer
CS#, ACC, Logic Machine HV
WP#,HOLD# Generator
SO
Pin Configuration
PIN DESCRIPTION
SYMBOL DESCRIPTION
16-PIN SOP (300 mil)
CS# ChipSelect
SI SerialDataInput
HOLD# 16 SCLK SO/PO7(1) Serial Data Output or Parallel Data
1
output/input
VCC 2 15 SI
SCLK ClockInput
NC 3 14 PO6
HOLD#(2) Hold, to pause the serial communication
PO2 4 13 PO5
PO1 5 12 PO4 (HOLD# is not for parallel mode)
WP#/ACC Write Protection: connect to GND;
PO0 6 11 PO3
12V for program/erase acceleration:
CS# 7 10 GND
connect to 12V
SO/PO7 8 9 WP#/ACC
VCC + 3.3V Power Supply
GND Ground
PO0~PO6 Parallel data output/input (PO0~PO6 can
be connected to NC in serial mode)
NC NoInternalConnection
Note:
1. PO0~PO7 are not provided on 8-LAND SON package.
2. HOLD# is recommended to connect to VCC during
parallel mode.
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EN 30 8. TCM3.2L LA IC Data Sheets
Control ignal
S (GPIO,…) Merge Color US
Dithering DSP
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IC Data Sheets TCM3.2L LA 8. EN 31
Block Diagram
VCNTL VIN
Current Limit
Thermal Protection
+
REFEN
EA VOUT
-
GND
Pin Configuration
(TOP VIEW)
VIN 8 VCNTL
GND 2 7 VCNTL
REFEN 3 6 VCNTL
VOUT 4 5 VCNTL
SOP-8
VIN 8 NC
GND 2 7 NC
GND
REFEN 3 6 VCNTL
VOUT 4 5 NC
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EN 32 8. TCM3.2L LA IC Data Sheets
Block Diagram
external
VIF-PLL reference crystal
filter
(1)
TOP TAGC VAGC VPLL REF AFC
9 1 4 16 19 1 5 21
CAGC neg CBL
VIF2 2
VIDEO TRAPS 17 CVBS video output 2 V (p-p)
VIF1 1 VIF-PLL
4.5 to 6.5 MHz [1.1 V (p-p) without tra
TDA9885
TDA9886
8 AUD
SINGLE REFERENCE QSS MIXER/ AUDIO PROCESSING
SIF2 24
INTERCARRIER MIXER AND AND SWITCHES 5 DEEM
SIF1 23 AM-DEMODULATOR de-emphasis
network
MAD
NARROW-BAND FM-PLL 6 AFD
OUTPUT
SUPPLY SIF-AGC I2C-BUS TRANSCEIVER DETECTOR CAF
PORTS
CAGC
20 18 13 3 22 11 10 7 12 4
VP AGND n.c. OP1 OP2 SCL SDA DGND SIOMAD FMPLL
FM-PLL filter
Pin Configuration
VIF1 1 24 SIF2
VIF2 2 23 SIF1
OP1 3 22 OP2
FMPLL 4 21 AFC
DEEM 5 20 VP
AFD 6 19 VPLL
TDA9885
TDA9886
DGND 7 18 AGND
AUD 8 17 CVBS
TOP 9 16 VAGC(1)
SDA 10 15 REF
SCL 11 14 TAGC
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IC Data Sheets TCM3.2L LA 8. EN 33
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EN 34 8. TCM3.2L LA IC Data Sheets
IN−
IN+
OUT
VCC−
(TOP VIEW)
1OUT 1 8 VCC+
1IN− 2 7 2OUT
1IN+ 3 6 2IN−
VCC− 4 5 2IN+
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IC Data Sheets TCM3.2L LA 8. EN 35
Pin Configuration
Output 1 1 8 VCC
2 1 7 Output 2
Inputs 1
3 6
2 Inputs 2
VEE 4 5
(Top View)
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EN 36 8. TCM3.2L LA IC Data Sheets
Block Diagram
SA
I2C
OUT1A
OUT1B
SDI
POWER OUT2A
LRCKI Serial
Data Input OUT2B
BICKI
Channel mapping
CONTROL
STATUS
RESET
EQ, Tone, DDX3A
INT LINE Volumes… DDX3B
DDX4A/TWARNEXT
PWDN DDX4B/EAPD
Processor
XTI
PLL
PLL_FILTER
Pin Configuration
GND_SUB 1 36 Vdd_DIG
SA 2 35 GND_DIG
TEST MODE 3 34 SCL
VSS 4 33 SDA
VCC_REG 5 32 INT_LINE
OUT2B 6 31 RESET
GND2 7 30 SDI
VCC2 8 29 LRCKI
OUT2A 9 28 BICKI
OUT1B 10 27 XTI
VCC1 11 26 PLL_GND
GND1 12 25 PLL_FILTER
OUT1A 13 24 PLL_Vdd
GND_REG 14 23 POWRDN
Vdd 15 22 GND_DIG
CONFIG 16 21 VDD_DIG
OUT3B/DDX3B 17 20 TWARN/OUT4B
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BlockDiagrams TCM3.2L LA 9. EN 37
9. Block Diagrams
Wiring Diagram 32" (P& S)
WIRING DIAGRAM 32" (P&S)
LCD DISPLAY
F T
F D D S
D L U
/O B D D V ) 1 D
N N S V V V V N L E O 1 1 E IN
O 2 2 S
N N P N N D 1 1 _ R
- V D N N K N N N L T R 4 _ _
S S
O
- 5 D /1 /1 D D D
N N 4 E
3 C 2 1 0 E I B 3 3 1 0 N ( IN Y IO D D IR B
B
B W /.3 4 4 V
L V
L G GE D E P E N I V
S
P P N 2
G+ +
2 . . E
. E
. E
. E
. .S B . O
. V . O
. O
. O
. O
. G
. 5A K GL GO5
P602 2
. . 3
0 . . . .
. . . . 0 2 4 6 8 0 2 4 7 9 3 5 1 8 0
2 4 6 8 1 1 1 1 1 2 2 2 2 2 3 3 2 3 4 1. . . . . . .
1.ADIN1 1 1 8 6 4 2 P7 6 5 4 3 2 1
2.LED-WHITE 2 2 1 1 P2 ) DD D
V V V V ) B
H H 1 J V 0 D X
4H H 11.DIM 12.BL_ON
3.LED-RED 3
. . . . 0 DA V
S
2 1 V V P E
4.GND P1 2 P1 2 9.COM 10.P_ON B
( P- D /5 D D /1 (B D
S S D D
P P
D N N 4
K P P P R R P P P P P D
7. +3.3VSB 8. N.C. N .3 N N 42 7V V 3 C 2 1 O C C B 4 3 2 1 0 N
5.IR 2B . G 3 GG+ 1L L G GE E. E
. E
. E
. E
. D
. N
. V
. O
. O
. O
. O
. O
. G
.
5.COM 6.COM 21 . . . . . . . . . . 1 3 5 7 9 1 3 5 7 1 3 5 7 9
6. 3.3VSB P1 9 7 5 3 1 P1 3 5 7 9 1 1 1 1 1 2 2 2 2 3 3 3 3 3
3.COM 4.+24V
MAIN POWER SUPPLY 1 +24V 2.+24V
P601
1. 3.3V
A IPB
2. IR_IN
3. GND
4. LED-RED
5. GPIO_11 B SSB
6.KEY
7. ADIN1
D
R L
A O
O R
B T
Y N
E O
K C
T3.15A
1N L
. .
) - + + -
0 L
P3 1 1 _ L R R
_ _ _
(B T T T T
5U U U U
2O OOO
. . . .
P1 2 3 4
INLET
TO TO
BACKLIGHT BACKLIGHT
RIG
SHPE
T AKER LS
EPFT
EAKER
1 2 1 IR LED PANEL
IN D D D
D E E N R 5 V J
1A. L
. L
. G
. I. +
.
P1 2 3 4 5 6
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BlockDiagrams TCM3.2L LA 9. EN 38
LCD DISPLAY
F
F D D S T
D L U 1 D
/O B D D V )
N NS V V
2 2 V V N L SE O 1
1 1
1 E
_ R IN
OV
-O - /5 D D D
S S
D N N K N N N L R N N P N N D _ _I B
D /1 /1 N N 4 3 C 2 1 0 SE IT B 4 3 3 1 0 N (B IN Y IO D D R
B W3. N 42 2
4 V L
L V G G .E .E .E .E .E .E . .B .V .O .O .O .O .O .G 5 D E
P E N I SV
.P .P 3 G+ + . . . . 0 2 4 6 8 0 2 4 7 9 3 5 1 8 0 1 .A .K .G .L .G .O .5
2 0 . . . . 2 4 6 8 1 1 1 1 1 2 2 2 2 2 3 3 2 3 4 P 7 6 5 4 3 2 1
1 1 8 6 4 2
) J B ) D D
X
1 D V 0 D D E
0 S
V 2 1 V V P
P602 B
( P- A D 5
/ D D 1
/ (B SD SD D D P 3P K P P P R R P P P P P D
N3 N N 4
2 C 2 1 OC C B 4 3 2 1 0 N
V N N 4 E E E E E D N V
1.ADIN1 2 .B G 3. 7 V O OOOO G
2.GPIO_11 2 1 . . GG +
. . . 1 .L .L .G .G .E .1 3. .5 .7 .9 .1 3. .5 .7 .1 3. .5 .7 .9
P 1 9 7 5 3 1 P 1 3 5 7 9 1 1 1 1 1 2 2 2 2 3 3 3 3 3
3. LED-RED
2 2 2 1 1 1
P802
4.GND 0 V V 0 V V 11.DIM 12.BL_ON
5.IR_IN 9 .H .H 9 .H .H 9.COM 10.P_ON
P 1 2 P 1 2
6. 3.3V 7. +3.3VS B 8. N.C.
5.COM 6.COM
3.COM 4.+24V
P601 MAIN POWER SUPPLY B SSB
1. 3.3V
2.IR_IN
A IPB
1 +24V 2.+24V
3.GND
4.LED-RED
5.GPIO_11
6.KEY
7.ADIN1
D
R L
A O
O R
B T
Y N
E O
K C
) ) - + + -
0 - + 0
1 WW 1 _L _L _R _R
(B .C B B (B T T T T
3
. U U 5 U U U U
2 .N . . 2 .O .O .O .O
S S
1 T5.0A P 1 2 3 P 1 2 3 4
0 N L
8 . .
P3 1
SUB WOOFER
TO
BACKLIGHT TO
BACKLIGHT
INLET
IR LED PANEL 1 2 1
J IN D D D
D E E N
V
5
1 .A .L .L .G .IR .+
P 1 2 3 4 5 6
RIGHT SPEAKER LEFT SPEAKER
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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 40
F F
E E
D D
C C
B B
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 41
18520_550_090313.eps
090313
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 42
18520_551_090313.eps
090313
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 45
15820_552_090313.eps
090313
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 46
15820_553_090313.eps
090313
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 47
SSB: DC/DC
8 7 6 5 4 3 2 1
B01 DC - DC
12_M
U20 C5
12_M 1000P
PQ1CX41H2ZPQ
12_M GND
1 8 C161 Z244
L21 VOUT VB DV10 C87
0.01U T
220R 2 7 Z13 D4 L1 470U GND
VIN GND2 12/24V_AUDIO SR34 15UH 16V
T
3 6 L16 C145 C146
C105 OADJ GND1 33UH 220P 0.1U DV10 L137 U14
C152 C151 R122
100U 4 5 GND 200R MP1593 DN C156
100P 0.1U CONTROL COMP 5K6 C524
C150 16V 1 8 0.1U
L138 C158 BS SS 10U
0.1U 13 -PQ1CX4-1HB R117 200R 0.1U NC
10K 2 7
IN EN R121
C148 C104 110K
470U 3 6 C159
GND G ND GND GND 0.01U C472 SW COMP C157
10V GND GND 1U
470U 0.1U
4 5
35V GND FB
GND GND
R118 GND
C147 R116 C160
D 100P 10K GND C162 12_M D
D5 12K GND 8200P 100P C168
SR23 R123 0.1U
12K4
GND C149 GND
3900P
GND GND
GND R134 R136
R752 GND R102 100K 3K9
47K 5V_M
0R 5VSB D7
5V_M 5V_M1 GND
LL4148 Q7 D12
Q57 U4 5VS B BT3904 LL4148 R130
A03 401A C R101 2K2
5V_M LD1117S33 10K
D B
S 4 R96
R120 4 10K R105
E
22K C541 J R143 12_M 4K7
G D +3V3 Q6 GND
0.1U A
/ T Z14 10K SHORT_PROTECT BT3904 12_IF
R73 1 D U IN T R144
N O V 10K R98 R100
47K R697 G
1 2 3 NC C 8K2 D13
470K SW 10K R99
B LL4148
C 680R R13 1
Q4 R119 Q10 B POWERON/OFF E 1K
BT3904 4K7 BT3 904
C E R97
C D33 C155 C154 10K D10 D11 C
B LL4148 0.1U GND LL4148
0.1U LL4148 GND +3V3
R710 5V_DDR
E GND
C556 10K
4U7 C106 C102 R137 R135
GND GND 100U 100U 3K9 R13 2 2K7
16V 16V GND GND 1K8 R133
4K7
GND
GND GND
R3
5V_M U3 0R NC
R5 R4 LD1117S
2R7 2R7 C129 R9 GND C3
S-NC S -NC R698 0.1U NC
470K NC 120R 10U
4
4 C142
R108 5V_OUTS IDE 0.1U
R10 820R J
D
T 5VSB D34 +3V3
2R7 S-120 /A Z9 DDRV LL4148
D U IN C13 1
S-0 N O V T NC C127
1G 2 3 L14 12_M1 1 8 1U 12_M 0.1U
B 220R S2 D2A
NC B
5V_DDR R13 9 2 7 3
G2 D2B C126 2 1
T
G
22K 3 6
0.1U V O N
D
NC NC C140
I U
Z12
N /
S1 D1A AV12
T A
0.1U
D
SW
J
C94 C345 4 5
C133 C93 G1 D1B
0.1U
4
47U R138
0.22U 47U C170 4
R107 C13 4 6V3 4K7 Q2 1U
910R 6V3 NC NC
0.1U A048 03
S-200 GND U5
NC GND LD1117S12
C103 C141 C128
0.1U GND 0.1U
GND 100U GND
16V NC
GND
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 49
F F
(DDR SD-RAM with termination) VTT
R671 R668
150R 22R
MEM_VREF
U33 5 4
MEM_DQ0
5 4
RDQ0
8 1 8 1
R660 R656
GND
150R 22R
MEM_CS# RCS#
5 4 5 4
C425 MEM_BA0 RBA0
6 3 6 3
0.1U
MEM_BA1 RBA1
DDRV +3 V3 7 2 7 2
MEM_ADDR10 RA10
DDRV 8 1 8 1
GND R664 R657
150R 22R
8 1 MEM_ADDR7 RA7
C C114 U1 C8 0
C
R719 47U VTT R4 84 5 4
47U RT9199 6V3 22R RCLK0 C424 7 2 MEM_ADDR6 RA6
6V3 0R NC VTT
MEM_CLK0
3300P
1 8 L 80 R4 87 6 3
VIN NC 3 C111 1K 6 3 MEM_ADDR5 RA5
47U 220R
MEM_VREF 2 7 R721 SDRAMADD SDRAM75R R483 7 2
GND NC2 6V 3 100R
GND MEM_VREF R4 85 5 4 MEM_ADDR4 RA4
NC
3 6 0R SDEAMNC 8 1
GND REFEN VCNTL 22R
C413 SDRAMNC GND R663 R658
4 5 0.1U C575 R499 MEM_CLK0# RCLK0# 22R
VOUT NC1 150R
C412 10U 1K 8 1 MEM_ADDR12 RA12
R720 C415 1000P NC SDRAM75R
SDRAMNC 5 4
0R NC C47 0.1U MEM_CLKEN 7 2 MEM_ADDR11
RCKE RA11
4U7 C426
6 3
C4 30 R4 86 0.1U 6 3 MEM_ADDR9 RA9
0.1U 22R 7 2
GND 5 4 MEM_ADDR8 RA8
GND 8 1
GND GND
R670 R659
GND 150R 22R
MEM_ADDR0 RA0
5 4 5 4
C45 C427 MEM_ADDR1 RA1
4U7 3300P 6 3 6 3
MEM_ADDR2 RA2
7 2 7 2
B MEM_ADDR3 RA3
B
8 1 8 1
DDRV
GND
C8 9 C112 C4 3 C414 C417 C416 C418 C419 C408 C409 C410 C411
470U 4U7 0.1U 3300P 3300P 3300P 3300P 0.1U
100U 0.1U 0.1U 0.1U
10V 16V
GND
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 50
SSB: Tuner
8 7 6 5 4 3 2 1
B04 TUNER
F Z1 Z2 F
5VOUT
5VOUT
APLS EU TCLAP
R160
22K
R167 R166
4K7 4K7 R153 R161
T 4K7 12K C208
1 2 U
C 1 L A 4 C L A
-O 0.01U
3 D16
G C S C D B B C T C F G S C D C P T F
C187 X3 C186 R156
A N A S S M M N B N I A A S S N B B I BA277 1500P TV-RF-AGC
4M 0.1U 100K
1 2 3 4 5 6 7 8 9 0 1 1 3 4 5 6 7 9 1 NC
1 1 1 Q12 R159
BT3904 GND
Z 39 T NC R158
GND
22K
R756 R168 330R
GND Z38 T 0R C C182
NC 10K
Z3 5 B OP2 0.01U
GND T C1 88
NC
R755 E 0.47U
GND 0R C201 9 885NC
R169 0.01U C204 5VOUT
Z36 NC C177
Z33 T T ZT37 10K NC 20P GND L50
T NC 0.22U
E 5V-IF Z3 4 D6 1000UR E
BA277 R165 5V-IF
470R
L52 C49 C213 RF-AGC CVB S
1000UR 0.1U C205 BA277 GND C117
10U D15
0.01U 100U
C118 GND
4 3 2 1 0 9 8 7 6 5 4 3 C189 16V
47U 2 2 2 2 2 1 1 1 1 1 1 1
6V3 C211 0.01U
0.1U R727 2 1 2 C P L D S C F C C
1 2 3 5
4 IF IF P F V L N B G E G N
C212 R174 0R S S O A P G V A R A R162
1U R154 L51 4K7 NC V A C V T 220R
GND
1UH D 1 2
C214
100R S DA_TV NC R170 N D T T R190
IN G
/ N U U 75R
GND 3300P R189 5VOUT 0R
N G O O
0R GND NC I D TV-CVB S TV1-V
GND R155 NC L D A
100R GND L M M
SCL_TV X7 SAW-D9453 D 2 1 2 1 P E D N D P A L LATAMNCAP-ADD
C438 L-45-SAW9 37-0M0 U F
I F
I P M E F G U O D C O
I E
0.01U GND V V O F D A D A T S S S
C179 R180
47P C180 33R X2 1 2 3 4 5 6 7 8 9 0 1 2 B
SAW- 395 3D/K7270M 1 1 1 TDA9885T C Q13
12_M U6 4 47P R181 R186
BC857C
LD1117S50
4 2K2 2K2 R187 D 1 2
N D T T
5V-IF 5K6 IN G
/ N U U
G
L62 N G O O R172
O N
V U D
/ Z160 I 10K
0R C432 C199
I A
R48 T
N T
GND
D
3 1 2 3 4 5 0.01U
J1
22R 2
33V
1000P MPX2
2W 12_IF GND
D R18 4 2
D
22K TV_AUDIO
C116 D17 L-45-SAWM3 9-530
100U BA277 GND
16V L48 R182 R173
C206 C202 12K
1000UR D2 0.1U 0R
33V 0.01U R152 NC C178 C18 5
2K2 0.47U Z 32 Z31
C176 0.01U
0.1U 5V-IF C43 1 T T
GND 1000P C191
R178 R151
C193 47K L54 R179 GND L55 1000P
L61 0R NC R191
0.1U 1000UH 100K 1000UH C209
D2 8 0.56UH NC R188 0.01U C210 C190 100R S CL_TV
R163
0BAV99 5K6 390P 1000P GND 2K2 R157
R150 NC 100R
12K GND Q14 S DA_TV
TV-RF-AGC 2 BC8 46B
C192 C197 R185
RF-AGC D14 C C
1K
LL414 8 0.1U 200P GND
C198 B C183 Q16 B GND C194 C1 81
0.1U 3
4700P C124ET
C175 47P 47P
E
C115 E
0.1U C18 4
47U 1 C440
270P
6V 3 1000P
GND 5VOUT
GND
C GND C
GND
GND
Far from signal R509 C62
C203
0.1U 22K 0.01U
5V-IF 5VOUT MPX2_P
5VOUT C
MPX2 B
GND Q15
C61
+3V3 R383 E BC 846B 0.01U
R177 R176 R171 MPX2_N
4K7 4K7 L49 82R R503 0R
2.2UH 10R C215 NC
5
TV1-V CVB S0P L63 R507
12UH Q17 0.1U
R192 BC 846B L-ADD 330R
R175 150R L-ADD R193 R518
SDA_TV 3 C196 L-ADD L-ADD C 22K
4K7 C195 TV-CVBS 150R
4 220P X1 B GND
220P 4M5
3 1
L-ADD L-ADD
CVBS0N R501 E R514
SCL_TV 5VOUT R195 0R 100R TV1-V
6
1
R516 1K GND GND
2
GND 10K L-ADD L-ADD(NC) L-ADD
L-ADD J1
C207 0R NC
B U30 0.1U R515
UM6K1N
2
R500 B
C 220R
12-UM6K1N-0BX 4K7 R196 L-ADD J2
OP2 B 0R NC
C119 C120 Q18 0R
47U R512 R513 47U L-ADD BC8 46B L-ADD
C4 34 C433 GND 6V 3 39K 6V3
E L-NC J3
33P 3 9K GND NC
33P TV_AUDIO MPX1 0R
GND GND
R511 J4
100R C439 C4 35 NC
22P 0R
R510 22P GND GND
OSCL0 GND GND 100R
OSDA0
GND
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 51
SSB: HDMI
8 7 6 5 4 3 2 1
B05 HDMI
P5
MNT-HOLE2
6
MNT-HOLE1
F 5 F
P16
GND GND
1 RX0_2
RX2+ R45 R3 1
RX0_2 1 2 RX0_0 GND-1
GND1 2 1 2 4
USB_DP0
3 RX0_2B R35 R33 DPOS-1
3 5V_M
RX2- RX0_2B 1 2 RX0_0B 1 2 USB_DM0
L65 C219
RX1+ 4 RX0_1 DNEG-1
2 L64
R3 6 R3 0 C91 120R 0.1U 120R
RX0_1 1 2 RX0_C
5 1 2 VCC-1
1
GND2 100U NC +3V3
6 RX0_1B 2 2 16V U12
RX1- R34 R32 R200 TPS2550
RX0_1B RX0_CB F1 F2
RX0_0 1 2 1 2 100K 6 1
7 C90 OUT IN
RX0+
1
8 R22 47U
GND3 GND GND R47 6V3 R201
GND 5 2
RX0_0B ILIM GND 10K
9 1 1 R199
RX0- R52 R541
4 3 100R
RXC+ 10 RX0_C 10K D C217 GND FAULT EN
PWM1
2 N 0.1U +3 V3
G R197
11 OPWR0_5V 13-TPS255-0DB 0R
GND4 GND
NC C218
RXC- 12 RX0_CB R540 R713 0.1U
R53 7 100R GND R198 R202
100R HDMISCL_0 HDMIDDCS CL_0 10K 100R 24K
E 13 HDMI_CEC_3V3 PWM3 E
NC1 HDMISDA_0 HDMIDDCS DA_0 GND
NC2 14 T R53 6 100R UP33
Z103 D GND
15 HDMISCL_0 P13 N
DDCCLK C444 G
GND C469
HDMISDA_0 10P
DDCDA 16 C445 1 RX2_2 1000P
RX2+
10P
17 R561 GND1 2 R46 R38
GND5 Q20 RX2_2 1 2 RX2_0
1K GND 1 2
VCC 18 BT3904 3 RX2_2B
R148 RX2-
C
1K GND R42 R40
19 HDMICAB0 B RX1+ 4 RX2_1 RX2_2B 1 2 RX2_0B 1 2
HPD
E C298 5 R43 R37
GND2
T
Z104 RX2_1 1 2 RX2_C
1000P 1 2
R542 RX1- 6 RX2_1B
100K GND R539 1
47K 7 RX2_0 R41 R39
RX0+ GND RX2_1B 1 2 RX2_CB 1 2
R564
100R U22 GND3 8
R563 AT24C02 R51
GND 1
R538 Z43
100R 8 1 RX2_0B
47K T VCC A0 RX0-
9
C443 R557
7 2 10K
2
R57 WP A1 0.1U RXC+ 10 RX2_C D
N
D R562 1 1
6 3 11 G D
10K SCL A2 GND4 OPWR2_5V
2 Z45
5 4 RXC- 12 RX2_CB R556
SDA GND
T
R53 100R
R54 R549 100R
GND Z42 T 13 HDMI_CEC_3V3
HDMISCL_2 HDMIDDCSCL_2
GND NC1
Z46 T 14
HDMISDA_2 HDMIDDCSDA_2
2 2 T NC2
Z44
T
Z107 R548 100R UP35
15 HDMISCL_2
DDCCLK C447
GND GND
DDCDA 16 HDMISDA_2 10P
C448
GND5 17 R559 10P
Q21 GND
1K
P14 VCC 18 BT3 904 R254
GND C
19 1K GND
1 RX1_2
HPD B
RX2+ R25 R24
RX1_2 1 2 RX1_0 20 C452
2 1 2
T
GND1 NC20 Z108 E 1000P
3 RX1_2B R28 R27 21 R558 R552
RX2- RX1_2B RX1_0B
NC21 100K GND 47K
1 2 1 2
4 RX1_1
RX1+ R29 R23 GND
RX1_1 U23
1
5 1 2 RX1_C 1 2
GND2 GND R545 R551 AT24C02
C 100R Z48 8 1
RX1- 6 RX1_1B
R44 R26
47K T VCC A0 C
R94 C446
RX1_1B RX1_CB
1
RX1_0 1 2 1 2 7 2 0.1U
7 GND WP A1
RX0+ R544 R550
100R 6 3
8 10K
2
GND3 SCL A2
1 1
R56 Z50
RX1_0B 5 4
9 SDA GND
T
RX0- R530 GND R55 R50
10K Z47 T
2
RXC+ 10 RX1_C D GND
N
G Z51 T
11 T
GND4 OPWR1_5V 2 2 Z49
RXC- 12 RX1_CB R529
100R HDMISCL_1 R525 100R HDMIDDCSCL_1 GND GND
13 HDMI_CEC_3V3
HDMISDA_1 HDMIDDCSDA_1
NC1
P11
NC2 14 T R524 100R UP30
Z105 3
+
RX0_2 19 20
15 HDMISCL_1 C449 3
V
DDCCLK
10P RX0_2B 17 18 OSCL0
DDCDA 16 HDMISDA_1 C442 +3V3SB
5V_M
10P RX0_1 15 16 OSDA0
17 R532 +3V3
GND5 Q19
1K GND RX0_1B 13 14 GND
VCC 18 BT3904
R149
B C
1K GND GND 11 12 HDMI_CEC_3V3
19 B R113 B
HPD 33K
C337 RX0_0 9 10 HDMISCL_0
20 E R112 R565
NC20 1000P
T
Z106 33K RX0_0B 7 8 HDMISDA_0
R531 R528 100R
21
NC21 100K GND 47K Q5
2N7002 GND 5 6 GND
R566
RX0_C 3 4 HDMICAB0
1 U24 CEC CEC1 100R HDMI_CEC_3V3
GND R521 AT24C02
100R R527 Z40 RX0_CB 1 2 OPWR0_5V
8 1
47K T VCC A0
GND R8 7 C441
7 2 0.1U
WP A1 NC
R520 R526
6 3
1 1
10K 100R SCL A2
2
Z41
5 4
SDA GND
T
GND R58 R59
Z52 T GND
Z54 T
2 2 T
Z53
GND GND
A A
8 7 6 5 4 3 2 1
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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 52
T Z61
_
Z57
M
GND T Z62
C56 T
T Z63 R206 L123
VGAS DA0 8 K2 2U2
VGA_L 120R Z56 P7
VGASCL0 2
R205 C58 L124 T
8 K2 2U2
C225 R228 VGA_R 120R
REDP 0.01U 68R 3
RED
Z55 T
R203 1
R204 22K 47-MIC012-XX0
C227 22K C551 C544
C224 10P
L133 C55 R210 470P 470P
0.01U 2U2 GND
VGAGND YPBPR2_R 120R 8K2
Y2_R
VGAVSYNC# GND GND
GND GNDGND
L13 1 C57 R209
120R 2U2 8 K2 C222
YPBPR2_L Y2_L
10P
C229 R226
C 0.01U R319
68 R BLUE C550 R207 R208 100R C
BLUP C548 22K VSCL_T
470P 22K GND TXD0_EXT
470P
GND
C226 R227
0.01U 68R
GRNP GREEN R212
22K
P39
C228 R211 GND
10P R233 Z59
22K C220 R216 75R P9
C233
1 0.047U 100R T 6
B GND GND US B_DP1 47P SY1_IN B
CVBS 6 L68 120R
2 2
GND US B_DM1 CVBS 7 L67 120R SC1_IN 1
3 5
C70 C68 R224 F12
R222 2U2 VCC_1
8 K2 C231 R232 Z58
1
AV1R_IN 2U2 8K2 AV2R_IN AV2_R 4
AV1_R 0.047U F11
100R R60 T
NC C23 2 R215 7
47P R69
R223 75R
C71 R221 C69 2 1
8K2 AV2L_IN 2U2 8K2 AV2_L
AV1L_IN 2U2 AV1_L GND
GND 2 3
T 4
R217 R218
22K 22K R219 R220 GND Z60
22K 22K
GND
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 53
R276
NC 47-SCA014-XX0G GND 0R
A A
GNDGND
8 7 6 5 4 3 2 1
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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 54
SHIELD 11
F F
GND GND
1 AV2_IN Z88
VIN
SCT2_AV_OUT T C288 C271
VOUT 12 2200P
2200P
2 C270
BLNKGND P31 Z191 C289 2200P
AV2R_IN_1 R316 C273 2200P
VGND 13 1 L88 Z175
RED 120R 100R 0.047U
Z86 CVBS5 P27 1 T T
3 L89
BLNK T NC 2.2UH
NC NC 2 HPOUTR1
R 14 SCT2_R/C_IN AV2L_IN_1
3 R297 C287 L90
4 75R 47P 2.2UH HPOUTL1
DATAGND WHITE SCT2_R/C_IN NC NC 3
F29 F31 1 1
2 2
C R3 18 R317 NC
220R 15K R80 R82 C
NC NC
R519 GND
0R ADIN4_1 GND
GND
GND NC
R294
GND SCT2_FS_IN
33K ADIN4
1
GND NC
1
F25 R295
R83 10K
C281 NC NC
Z169 22P F27
T 2
2 R8 6 R302 R3 09 C283
NC 10R 100R 0.047U C531
P30 6 AV1_IN CVBS 1 R288 R758 R741
GND 10U 470R 1K 100R SCT1_AUL_OUT
AL0 DA_AUL
YELLOW
5 Z164 R308 C282 16V NC A_MUTE R291 C NC NC
75R 47P NC R293 1K C583 C451
T L8 7 B
120R 47K 2200P 2200P
4 AV1L_IN NC NC NC NC
Q28 E
B BT3904
WHITE C53 0 NC B
3 Z170 GND R759 R742
C286 10U 1K GND 100R GND S CT1_AUR_OUT
T Z8 5 Z84 R313 AR0 DA_AUR
L91 0.1U GND
T T NC 100R
2 120R AV1R_IN NC SPDIFOUT R289 R292 C NC NC
16V
2 NC R290 470R A_MUTE 1K B C584 C450
RED NC
BLACK 47K 2200P 2200P
1 R85 NC NC NC E NC NC
1 R314 Q29
C549 C552 2 1 C285 BT3904
100R NC
470P 470P 33P NC
GND NC GND GND
F26
P18 GND
GND GND
GND GND NC 47-RCA276-XX0G
GND
A A
8 7 6 5 4 3 2 1
18520_507_090312.eps
090312
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 55
F F
C5 33
C540 100U R602
12_M 10U 16V 10R
R612 16V HPOUTL1
100R AUL_OUT0
R600 12_MA C
U27 A_MUTE R603 1K Q36 R335
R611 33K B
U26 1 3-LM833D-00B BT3904 4K7
33K
RC4558 C5 32
R340 1 8 C457 E
1 8 C460 R617 10U 1OUT VCC C5 39 R597
C5 35 R609 1OUT VCC+ C536 16V 15K 0.1U 100U
R608 10U 10U AL2 100R AL21 2 7 10R HPOUTR1
100R 10K 0.1U C463 1IN- 2OUT GND 16V GND
AL 3 C465 2 7 16V AUR_OUT0
1IN- 2OUT GND 100P C462 100P C
100P C464 100P 3 6 A_MUTE
16V 3 6 0.022U 1IN+ 2IN- B
GND
1IN+ 2IN- C456 Q33
C296 C459 C294 1000P 4 5 BT3904
GND 2IN+ R599 R336
0.022U 1000P 4 5 R334 1K
E
R338 VCC- 2IN+ R616 4K7
R606 13 K LM35 8 33K
13K C534 GND GND
GND 33K R339
C5 37 R598 10U
R607
10U
R610 R6 30 AR2 100R AR21GND 15K
GND
AR3 100R GND 10K 33K
R627
16V C96 33K
16V C458 R629 C293
1000P C95 C467 33K C455 C468 22U
C295 0.022U
22U 0.1U D R333 1000P 0.1U 16V
0.022U R337 16V N
13 K G 13 K
R628
E 33K E
GND GND GND GND GND
GND
GND
12/24V_AUDIO 12_M
R3 47 12_M R396
D19 33K R387 C581
LL4148 100R 4U7 1K MICOUT_L
D
N
+12V 5V-IF R728 R729 G U37
C492 C563 RC4558
0R 0R 220U 120P
NC R3 03 R384 1 8 C562
12_M R749 16V C576 R3 46 1OUT VCC+ C5 80 R404
47K 5K1 0.1U MICOUT_R
10R AV1L_IN 4U7 1K 2 7 4U7 1K
1IN- 2OUT GND
D25 R594 C572 120P
LL4148 D21 3 6
1K R140 1IN+ 2IN- R417 R418
BAV70 820R C564
1
1000P 4 5 22K 22K
C466 C92 VCC- 2IN+
C538 330U
0.1U C122 10U C461 R 345
100U 16V R715 R593 16V A_MUTE GND 5K1
16V 0.1U 1K E Q5 3 3
C577 R3 48 R386
100R BT3906 GND 33K
B AV1R_IN GND 4U7 1K
D GNDGND D
GND GND GND 2
GND C
OFF_MUTE
R306 C53 R 373
GND 100K
C59 R595 R95 C568 10U C330 33K
10U 100K 820R 1000P 0.1U
+3V3SB
R366
+3V3 R142 33K
100K D
GND GND GND N
GND GND G
GND R3 90
GND 10K R389
38
R10K
5 A_MUTE 100R PWDN
D20 +12V
+12V R349 LL414 8 R3 65 C +12V
R5 88 R58 6 R584 100R 10K Q43
22K 22K 22K GPIO_21 B
R589 R58 7 BT3904
R5 85
22K 22K 22K E
D100 R581
MCU_M LL4148
R4 32 10K
C121 C495 GND
1000P 10K
10U NC MUX_CTL2
R583 16V MUX_CTL3 R58 0
R590
22K 22K R43 5 10K C
10K NC C GPIO_20 B Q32
C GND GND +12V GPIO_8 B Q24 BT3904
BT 3904 C
R146 R624 E
+12V E NC
22K 22K
C494
C574 1000P GND
Y1_L GND
1000P
VGA_L 16 1 R141 C123 NC
AV2_L VDD Y0B 0.1U
22K
Y2_L 15 2 GND
Y2A Y2B GND
14 3 MUX1-R
Y1A ZB
MUX1-L 12_M R244
13 4 12_MA
ZA Y3 B +12V 0R GND
Q100
12 5 R620 U16
Y1_R Y0A Y1B NC BT3904 22K +12V HEF4052B
11 6
VGA_R Y3 A E C E
R604 16 1
10 7 C76 VDD Y0B
AV2_R A0 VEE 10R B
10U C502 15 2 AUD_ROUT
9 8 MUX1-L Y2A Y2B
Y2_R A1 VSS C453 R246 0.1U
1K8 AV1_L 14 3
0.1U Y1A ZB +12V
R631 MICOUT_L AUD_LOUT
MUX_CTLC0 C216 13 4 C67
100R U15 ZA Y3 B R341
HEF4052B 10U 10U
GND GND 12 5 AUD_LOUT
1K2 AUD_L
MUX_CTLC1 C MUX1-R Y0A Y1B
B MCU_M Q101 C454 B
B AV1_R 11 6 0.1U R 332
BT3 904 MICOUT_R Y3 A E C75 1K2
R632 AUD_ROUT AUD_R
100R R127 E 10 7 10U
A0 VEE
4K7 C60
9 8 10U
R633 A1 V SS
GND GND 100R
MUX_CTL2
+12V +12V GND
R426 R748
MUX_CTL3 100R 0R
R6 35 NC
R5 82
10K
10K GND
MUX_CTLC0
MUX_CTLC1
R6 38
R6 37 C 10K C
GPIO_7 Q39
GPIO_1 10K Q38 B
B
BT3 904 BT3 904
E
E
C471
C493 1000P GND
1000P GND
A A
GND
GND
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 56
R12 L13 L3
0R NC 33R 33R
D E4P_1 E4P O4N_1 O4P D
R21 3 2 3 2
0R NC E4P_1 C169 10P O4P_1 C491 10P E4N_1 E4N O4P_1 O4N
5V_M 4 1 4 1
U2 8 E3 P_1 C246 10P O3P_1 C490 10P E 3P_1 E3P O3 P_1 O3P
R20 A0480 3 LVDSVDD 3 2 3 2
0R ECKP_1 C327 OCKP_1 C4 89 E3N_1 E3 N O3N_1 O 3N
12_M 1 8 10P 10P
S2 D2A 4 1
L12 4 1 L2
2 7 E2P_1 C280 10P O2P_1 C4 88 10P 33R L11 33R L5
+3V3 G2 D2B 33R 33R
3 6 E1P_1 C475 10P O1P_1 C4 87 10P ECKP_1 ECKP OCKP_1 OCKP
R380
S1 D1A
22K 3 2 3 2
4G1 5 E0P_1 C407 10P O0P_1 C4 86 10P ECKN_1 ECKN OCKN_1 OCKN
D1B 4 1 4 1
R381 R3 74
R382 4K7 E4N_1 C336 10P O4N_1 C4 85 10P E2P O2P_1 O2P
470K E2P_1
10K 3 2 3 2
E3N_1 C328 10P O3N_1 C4 84 10P E2N_1 O2N_1 O2N
R73 2 E2N
C C86 4 1
ADIN5 1K
Q45 0.22U ECKN_1 C479 OCKN_1 C4 83 L10 4 1 L4
B 10P 10P 33R L9 33R L7
BT 3904 D26 33R 33R
LL414 8 E2N_1 C478 10P O2N_1 C4 82 10P O1P_1 O1P
E E1P_1 E1P
R3 91 3 2 3 2
E1N_1 C477 10P O1N_1 C4 81 10P
4K7 E1N_1 E1N O1N_1 O1N
4 1 4 1
E0N_1 C476 10P O0N_1 C4 80 10P O0P_1
E0P_1 E0P O0P
3 2 3 2
C E0N_1 E0N O0N_1 O0N C
GND 4 1 L6 4 1
GND GND L8
33R 33R
Z115
T Z112
T Z113
P25 T Z114
T
NC/OUT_L- L17
1 L18 OUTR+/SUBW+ 22UH
OUT2A
OUTL+/OUT_L+ 22UH OUT1A
2 CLICKNC
OUTL-/OUT_R+
C 303 C3 19
3 C3 13
0.1U 0.1U
NC/OUT_R- 330P CLICKNC R16
4 C314 C83
AMP_12/24V 1000P 0.47U C320 6R8
P23
R1 3
22R CLICK&32"P S NC Z110
1000P
CLICKNC
C3 18
0.1U
CLICKNC Audio VMID control
R18 T C306 C3 16 R653
330P
C315 R355 C3 10 6R8 R354 3 1000P CLICKNC CLICKNC 200R AUD_VMID
R359 R356 1000P CLICKNC C 82
C518 3K 3 3 K3
0R 0.1U 0R 0.47U
C521 NC R6 39 NC
220U 2 CLICKNC
C
220U C3 04 C317 OFF_MUTE 10K
B 35V GND 0.1U GND B C77 C503
35V GND 0.1U GND R14 GND 1 R15 Q40 10U B
T CLICKNC R17 NC 0.1U
R19 22R C321 22R E BT3904
C307 C81 Z111 6R 8 CLICKNC NC
0.47U 6R 8 1000P CLICKNC
C520 1000P CLICKNC
C519
220U 220U GND GND GND
R357
35V 3K3 C3 12 C299
35V
C3 11
330P 0.1U L20
0.1U
L19 R712 CLICKNC 22UH OUT2B
R358 22UH OUT1B 0R OUT2A
OUTR-/S UBW-
GND 3K 3 CLICKNC
NC
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 57
2 GND
C334 2 R125
C557 C335 100P
GND 100P
1000P C560
1000P GND
C333 GND
100P
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 58
PART 1
18530_552a_090319.eps
PART 2
18530_552b_090319.eps
18520_556_090319.eps
40-T8222P-MAD2XG 090324
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 59
PART 1
18520_556a_090313.eps
090324
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 60
PART 2
18520_556b_090313.eps
090324
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 61
PART 1
18520_557a_090313.eps
PART 2
18520_557b_090313.eps
18520_557_090313.eps
40-T8222P-MAD2XG 090324
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 62
PART 1
18520_557a_090313
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 63
PART 2
18520_557b_090313.eps
090324
2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 64
F F
E E
R602
22K K1
P601
vol+ 12 11
7 R601
3K3 vol-
6 KEY 10 9
R603
5 5K6 menu 8 7
R605 ch+
4 6 5
9K1
ch- 4 3
3 R604
1.2K POWER
D 2 2 1 D
C1
1 0.1U
R606
0R
P602
C C
+3.3V 6
IR_IN 5
GND 4
LED_RED 3
GPIO_11 2
ADIN1 1
B B
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 65
15820_559_090313.eps
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 66
IR Panel
8 7 6 5 4 3 2 1
J IR Panel
F F
IR
VCC G1
GND
R7 R10
100R 4K7
R8
100R
P1
R5
6 +3.3V 22K
E E
5IR_IN
4 GND C1 R3
10U R9
4K7 1K8
3LED_RED
GPIO_11
2
1 ADIN1
D2
D1
D D
R1 C R4
C
4K7 Q1 Q2 1K
B BC847BW B
BC847BW
E E
+3.3V +3.3V
C C
R20
R15
4K7
NC 100K
NC
+3.3V
R2 C
4K7 G2
B
Q3 C
BC847BW 2
E R19
0R E
NC
R11
B
10K C B
NC Q4
BC847BW B
R16
E 10K
R13 NC
ADIN1 1K
R17
100K
R14
2
U U U 1 10K R18
0 0 0 R K
2 1 3 1 4 1 3 100K
3
C C C
A A
8 7 6 5 4 3 2 1
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Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 67
Layout IR Panel
Personal Notes:
40-T8222P-IRF2XG 18530_531_090505.eps
090505
10000_012_090121.eps
090121
2009-Jun-19