Implementation of Automatic Bus Transfer Scheme on Multi-Function

Microprocessor Based Relays

M. Thakur (GE Multilin), B. Kasztenny (GE Multilin), J. Eapen (Powell Industries).

1. Introduction

In a typical generating plant, the Unit Auxiliary Transformer (UAT) feeds the motor
bus (refer to Figure 1). During the generator unit start-up/shut down sequence, or any
fault on generator side, the Alternative Source Transformer (AST) provides power to the
motor bus. This practice of transferring the motor bus to the alternate source as fast and
as secure as possible by keeping the dead time to a minimum is called the “Automatic
Bus Transfer Scheme”(ATS).

S y ste m

U n it
T r a n sfo r m e r S t at io n S e rv ice So u rce A lte r n a te S o u rc e

U n it A ux ilia ry A lte rn a te S o u rc e
G e n e rat o r T ra n sfo rm e r T r a n sfo r m e r

A u x ilia r y B re a k e r A lte rn a te S o u rc e B r e a ke r
UV

M o to r B u s
T rip U A T a nd
In itia te T ra n s fe r
M o to r B r e a ke r

O t h e r L o ad s M M M

Figure 1 Motor Bus connected with Unit Auxiliary Transformer

Similarly, in a typical Industrial Tie Bus Transfer System (Figure 2), the Automatic
Bus Transfer scheme is used to minimize the effect of outages on one of the incoming
supplies by opening the normally-closed incoming breaker connected to that supply, and
then re-energizing the decaying bus by closing the normally-open bus tie breaker after the
voltage of the decaying bus voltage drops to a predetermined level
 In c o m e r S u p p ly 1 In c o m e r S u p p ly 2

X m er X m er
P ro te c tio n I& C

V T 's V T 's
C T 's C T 's

ATS

V T 's V T 's

Bus1 T ie B re a k e r Bus2

M M
X m er

Figure 2: Typical Industrial Tie Bus Transfer Scheme

In both of the above-mentioned applications, on recovery of the lost source, the load
is transferred back to the preferred source. This transfer can be accomplished
automatically or manually and in a break-then-make (open transition) or make-then-break
(closed transition) mode.

The prime requirement of the Automatic Bus Transfer scheme is quick and safe
restoration of the power. However, the simplicity of the Automatic Bus Transfer
application is undermined by the fact that each motor’s bus has a unique voltage decay
and phase angle characteristic during a transfer. Also, the various applications of the
Automatic Bus Transfer scheme typically lack in flexibility in their design such as a
close/open transition, system-grounding methods, motors fed from starters etc.

Depending upon the criticality of the motor loads, safety of the applied motors, and
the cost of implementation (varying from a power plant to industrial applications), there
are typically four types of bus transfer schemes in practice:

• Slow transfer scheme

• Residual Voltage Transfer Scheme

• In-Phase Transfer Scheme

• Fast Transfer Scheme

 A fast bus transfer can be accomplished in the following two ways:

1. Simultaneous/Parallel (Hot) Transfer

2. Sequential Transfer

This paper presents the basic principle and a comparative analysis of the various
Automatic Bus transfer schemes in practice and their applications in the industries and
power plants. The prime objectives of this paper are as follows: the illustration of a
flexible residual voltage Automatic Bus Transfer scheme implementation using a multi-
function microprocessor based relay, a study of its onsite-testing criteria, and finally the
inferring of its common troubleshooting stages encountered in the real-world application.

Slow transfer (Poor man’s transfer scheme)

This scheme involves the detection of a loss of the source, opening the affected
source breaker and then energizing the dead bus after a predetermined safe decay time.
This scheme typically does not require the bus voltage to be monitored and is designed to
wait for a predetermined time, normally greater than 0.5 seconds (allowing the motors to
coast down), before connecting the decaying bus voltage to the alternative healthy
incomer source.

The calculated predetermined delay time must be longer than the maximum transfer
time for residual voltage-dependent transfers, in order to ensure that the residual voltage
criterion is met (Vresidual < VM – VN).

Since the bus monitoring voltage relay does not supervise this scheme, it offers cost
effectiveness and easy implementation for less critical motor loads.

• Advantages:
o Very cost effective
o Easy to implement
o Motors are very safe

• Disadvantages:
o Complete loss of the motor loads so can not use it on critical
process applications
o Slight possibility of motor damage if timing is not accurate
Residual Voltage Transfer

In the event of a loss of the incomer source, this scheme transfers the motor bus to the
alternate healthy source after the voltage of the decaying bus voltage drops to a
predetermined level. This protects the decelerating motors of the decaying bus from
damage by connecting them to an unsynchronized alternative healthy voltage.

The permissible setting of the residual voltage to transfer the motor bus can be
calculated from the given maximum allowable voltage across the motors (machine data
from the manufacturer) and the stability of the power system as to how many of these
motors can be reaccelerated without significant voltage sags.

As shown in Figure 3, residual voltage transfer is allowed when the voltage profile of
the decaying bus (VB) enters Zone 3.

The residual voltage transfer criterion is indicated by:

Vresidual < VM – VN

where VM is maximum allowable voltage across the motor and VN is alternative

healthy source’s nominal voltage.

Based on the pre-load condition of the motor bus, the residual voltage transfer can
take 0.5 to 3.0 seconds to complete.

This scheme is slightly more complicated as it requires voltage relays to detect

undervoltage conditions on the incomers, residual voltage relays on the bus, electrical
interlocks to accomplish a safe bus transfer, and synchrocheck relays to synchronize the
system of return of the lost incomer supply. The scheme may also require synchocheck
relays to verify that the bus is in synch with the source when returning back to the normal
source.

This scheme is applicable where the motor loads are non critical and the safety of the
motors is the prime concern.

• Advantages:
o Safe motor bus transfer,
o Cost effective and less complicated to implement (relative to in phase
and fast transfer schemes).

• Disadvantages:
o Load shedding might be required,
o Motors fed contactors will drop out,
o Paralleling of the incomers is commonly required when returning back
to normal
In-Phase Transfer

In the event of a loss of the incomer source, this scheme predicts and transfers the
motor bus to the alternate healthy source when the decaying bus residual voltage phase
angle is in-phase with the phase angle of the alternate healthy source voltage and phase
angle difference is close to zero.

By doing this, the voltage difference across the alternative healthy source breaker is
reduced to only the difference in the magnitude of the alternative healthy source (VN) and
the decaying bus voltage (VB).

This net result is minimizes the resultant V/Hz difference between the decaying Bus
voltage and the alternate healthy source. Thereby minimizing the impact on the running
motors and loads on the decaying bus

As shown in Figure 3, the In-Phase Transfer scheme is allowed when the voltage
profile of the decaying bus (VB) enters Zone 2.

In addition to the requirements of the residual voltage transfer scheme, this scheme
requires an automatic synchronizer relay to connect the decaying bus voltage to the
healthy source with near-zero phase angle difference. Advanced and accurate information
of the tie breaker closing time is required to make this scheme function properly.

The scheme also provides a fast method for transferring the motor bus in instances
where the two incomer supplies are not initially in sync.

• Advantages:
o Continuous power to the motors and load
o Huge saving when critical motors are involved in processes and power
plants

• Disadvantages:
o Rare but possible situation of motor damage
o Load shedding might be required
o Relatively expensive and
o Complex to implement
Fast Bus Transfer

In the event of a loss of the incomer source, this scheme transfers the motor bus to the
alternate healthy source as fast as possible by keeping the dead time to a minimum.

A simultaneous/parallel fast transfer scheme simultaneously issues commands to

open (trip) the normal source breaker and close the alternative healthy source breaker. By
doing so, it limits the total transfer time from 1 to 2 cycles (power system frequency).
Since this is a paralleling scheme it requires that the circuit breakers interrupting and
incomer transformers withstanding capabilities be rated for the parallel operation.
The sequential fast transfer scheme prevents the paralleling of the incomer supplies while
transferring the motor bus by first tripping the normal source breaker of the lost incomer
and then closing the alternative healthy source breaker. However the total transfer time is
increased by the normal source breaker tripping time plus the time required in
acknowledging the breaker open status.

Both the above-mentioned schemes require a synchrocheck relay to detect the change
in relative phase angle between the disconnected /decaying bus and the alternate source
voltages before closing the alternative source to the decaying bus. These schemes are also
referred as Supervised Fast Transfer schemes.

As shown in Figure 3, the fast transfer scheme is allowed when the voltage profile of
the decaying bus (VB) enters Zone 1.

In addition to the above requirements, this scheme requires a dynamic high-speed

synchronizer relay to ensure that the phase angle, frequency, and voltage magnitude
difference between the motor bus voltage and the alternative source voltage is within
acceptable limits prior to issuing closing command to the alternative healthy breaker.
Similar to the In-phase transfer scheme this scheme also requires advanced and accurate
information of the tie breaker closing time. In addition to the above requirements, the
scheme should be fast in blocking the scheme when the phase angle difference falls
outside the Zone 1 (shown in Figure 3).

The intent of the fast transfer scheme is primarily to maintain the uninterrupted power
supply to the bus thereby supporting critical loads and critical motors in the system.
However accomplishing a high-speed motor transfer involves relatively expensive
equipment and is generally complex to implement.

• Advantages:
o Uninterrupted power supply.
o Other transfer schemes can be implemented as a back up

• Disadvantages:
o Rare but possible situation of motor damage
o Expensive and complex to implement.
 Zone 1: Fast Bus Transfer (<0.2 sec)
At time t=0, VB=VN

VB VN
VR
Zone 2: In phase Transfer (>0.2 and <2 sec.)

Zone 3: Residual Voltage

Transfer (>0.5 and <3 sec.)

Voltage profile of the

decaying bus (motor loads)

VB = Decaying Bus Voltage (motor loads)

VN = Health Incomer Voltage
VR = Resultant voltage across the healthy incomer

Figure 3: Possible Transfer Zones for a Bus Transfer Scheme

2. Implementation of a typical residual voltage dependent transfer scheme on a

microprocessor-based relay

The typical Automatic Bus Transfer scheme shown in Figure 3 minimizes the effect
of outages during the transformer fault or an undervoltage condition on one of the
incoming supplies by opening the incoming breaker (for example, 52-1) connected to that
supply, then re-energizing the decaying bus by closing the bus tie breaker (52-T). This
transfers the decaying bus to the other healthy incomer source.

To protect motors (for example, M1 and M2) connected to the decaying bus from
damage, the bus tie breaker (52-T) is not allowed to close after a transfer has been
initiated until the decaying (residual) voltage on the bus has been reduced to a safe level.

In addition, the scheme also confirms the following before issuing a close command:

1. Both incoming breakers (52-1 and 52-2) are racked-in and closed with the tie
breaker (52-T) also racked-in.
 2. The incoming breaker is not carrying any fault current. This prevents a faulted bus
from being transferred to the alternative healthy source.

3. There is no undervoltage condition existing on the other incomer source and no

voltage dipping, followed by a consecutive voltage restoration of both the
incomers due to a system disturbance.

Traditionally, the Automatic Bus Transfer Scheme was implemented by using

individual electromechanical relays, and by developing the control systems (electrical
interlocks) separately.

This has been shown in the panel layout of Figure 4.

50/ 51 P 50/ 51 N 27 27R1 25 27R2

CS Selected to Trip
CS 51G
86T 27I R/L
R/L

Control Power Selected to Trip PB

Supply Switch Voltmeter1 Voltmeter2

PB PB 25 Voltmeter

Figure 4: Typical Panel Layout for the incoming and tie breaker

Developments in relay technology led to the first generation of microprocessor-based

relays. They offered simplicity in the implementation of the Automatic Bus Transfer
Scheme by providing a built-in control system and protection elements as shown in
Figure 5.

Here the Automatic Bus Transfer Scheme has been implemented using three first-
stage microprocessor-based relays.
 M1 L oad M2 M3 L oad M4

52 -T
(3)
Bus No. 1 B u s N o. 2
P rotection
50/51P,N
B us 1_ V T ’s(3) B u s2 _V T ’s(3)
27- R 1
27- R 2
25
G roup 3
5 2-1 5 2-2
(3 ) (3 )
25 Lin e _V T ’s L ine _V T ’s 25
50/51P,N C T 's C T 's 50/51P,N

27- L 1 27- L 1

27-L 2 27- L 2
U /V
G roup 1 G roup 2

C losed
2 O pen
XM ER 51 G 5 1G
XM ER

B rea k er 1 B re ak er 2

Incom er Source 1 Incom er Source 2

Figure 5: Typical Residual Voltage Dependent Automatic Bus Transfer Scheme

 The required information between the relays is exchanged through hardwired digital
inputs and outputs. This scheme requires a significant number of hardwires connecting
one relay to another (for example Incomer 1 to Incomer 2) as shown in Figure 6.

52-T closed
Tie
Relay
52-T racked in

d
an

52 d ra Tie r 1 in
an e
-2 ck fro
Cl nc rac
Cl rack osed
52 Inco Tie in

o s om k
m

clo ed m
-T m fro
ed

I
52
in

s e in
Cl

rac r 1

-T

d
d
-1

e
ke

e ed
52

e
os
52-2 closed
Incomer 1 Incomer 2
Relay Relay
52-1racked in 52-2 racked in

52-2 closed and racked in

52-1 closed and racked in

Undervoltage on Incomer 1
Undervoltage on Incomer 2

Figure: 6 Control interlocks of a typical residual voltage transfer scheme

These first generation microprocessor-based relays were superior in providing control

and protection elements in comparison to their ancestral relays. However, they still
lacked a custom built Automatic Bus Transfer Scheme, due to their limited hardware and
software capabilities.

Due to the various onsite practices, the implementation of the residual voltage
dependent bus transfer scheme also varies from one site to another and requires a great
flexibility in its implementation. Here are the few examples of onsite flexibility
requirements.

• On the return of the lost power supply, there is practice of using various
restoration methods such as: manual and automatic; close transition and open
transition.

• Generally the line side Potential Transformer (PT) input detecting undervoltage
on the incomer supply is phase-phase or phase-ground. This arrangement cannot
detect a blown fuse condition on the unmonitored phase-ground voltage of the
primary side of the incomer transformer.
 • Similarly, the blown fuse of the measured voltage inputs could cause the initiation
of the bus transfer scheme and needs to be blocked.

• While transferring the motor bus to another healthy source, there is need to select
control mediums (based on the measured analog inputs) to decide the completion
of the transfer. For example, monitoring overloading condition on the incoming
transformer and its required load shedding.

• Need for more inputs and outputs from the relay to implement electrical interlocks
(such as picking up master trip relay 86 for a fault on the bus side) which also
creates undervoltage condition on the incoming feeder, and to avoid paralleling of
the incoming sources.

Recent technological advancements in relay hardware design and the development of

high-speed peer-to-peer communication protocols has resulted in the latest generation of
intelligent electronics devices (IEDs). These relays have the capability to accept multiple
levels of current and voltage inputs and to analyze these values at significantly increased
speeds. The advantages of using these numerical IEDs are simplification of the
Automatic Bus Transfer system, component cost reduction, increased system reliability,
and the availability of events for transfer analysis.

There are many efficient ways to apply these IEDs to obtain a custom-built automatic
bus transfer scheme. For example

• Using two IEDs with high-speed peer-to-peer communication (fiber optics, or

GOOSE messaging) between them.

Transfer Enabled
Transfer in Auto
52-1closed 52-2 closed
Breaker status
52-1racked in Slected to trip 52-2racked in
Downstream fault on incomers
PTs Incomer 1 Incomer 2 PTs
Magnetic Module

Relay Undervoltage condition on incomers Relay

Magnetic Module

CT's CT's

Fiber Optic
Tie breaker staus
Slected to trip

Figure 7: Automatic Bus Transfer Scheme based two IEDs

 • Using one IED with several magnetic modules to cater to requirements of
multiple current transformers (CTs) and potential transformers (PTs)

M1 L oad M2 M3 L oad M4

5 2-T
(3 )
B us N o . 1 Bus No. 2
P rotection

B u s 1 _V T ’s(3 ) B u s2 _ V T ’s (3 )

M icro P rocessor based

A uto m atic Tran sfer S che m e

52 -1 5 2 -2
27(3) 25(1) 27(4)
(3) (3 )
L in e_ V T ’s
25(2) 25(3)
L in e _V T ’s
50/ 50/
C T 's
51P ,N 51P ,N
C T 's
27(1) 27(2)

UV

XM ER 5 1G
5 1G XM ER

B rea k er 1 B re ak e r 2
C losed
2 O pen

In com er Source 1 Incom er S ou rce 2

Figure 7: Automatic Bus Transfer Scheme based on single IED

The new generation microprocessor relays offer the following advantages in

implementing Automatic Bus Transfer Schemes:

• Significant reduction in hardware wiring between traditional bus transfer relays

(such as the information about the healthiness of the other incomer voltage and
the incomer breakers status).

• Provision of built in Programmable Logic Controller, timers, add on contact input

and output features, flexible development of a custom built Automatic Bus
Transfer Scheme such as Close and Open transition.

• Built in advance elements offering system measured analog values (such as the
maximum bus load at the time of transfer) and thereby deciding the control
medium.
 • Capability to accept multiple levels of current and voltage inputs and to analyze
these values at tremendous speeds.

3. Testing procedures

Unlike conventional transfer schemes using traditional relays, testing microprocessor-

based Automatic Transfer Schemes requires additional steps and better understanding of
the different logics used within the relay(s). A considerable amount of knowledge
regarding the software and firmware revision is required before programming these
microprocessor-based relays. Unlike conventional relays, microprocessor-based relays
generally have numerous pages of setpoints to be entered into the relay to ensure proper
functioning. Moreover, it is necessary to determine which setpoints specifically affect the
transfer scheme. Also, we need to bear in mind that some manufacturers have factory set
default setpoints values already installed on these relays and only by understanding these
values one can accomplish the desired functions. Here are the basic requirements for the
on-site starting and testing of the transfer scheme:

• Understanding the method for programming the relay, either from the front panel
or by downloading the setpoints using a computer/laptop.

• Verifying the firmware revisions on the relays and ensuring they are the most
recent or at least the same on all relays.

• Ensuing the date and time synchronization (time stamping) on the relays is correct
(in order to facilitate troubleshooting).

• Understanding the different means by which the relays communicate with each
other; e.g. digital inputs/outputs, serial port communications, analog inputs,
virtual inputs/outputs, etc.

Once the relay has been properly programmed, one can proceed in applying voltages
and currents to the relay. Applying an undervoltage on one of the sources and watching
the source breaker trip (open) and the alternate source or tie breaker close does not
complete the true testing. On microprocessor-based relays, it is very important to work
through all the different scenarios applicable to the design and to ensure all criteria are
met. Some additional checks while testing a transfer scheme are:

• Verifying that all digital and analog inputs are registered by the relay(s). For
example, open/close breakers, rack in/out breakers, change operating switch
positions, etc.

• If the synchrocheck is being used, make sure that the incomer breakers do not
close when the phases are swapped or are out of predetermined phase angle
boundary.
 • Ensuring that all output contacts operate per the logic and schemes; e.g., the close
output contact is asserted when a signal to close is received from the control
switch, or DCS or through the communication.

• Ensuring that an open transition scheme does close the tie breaker or alternate
healthy breaker if the main/incomer breaker fails to open.

• Making sure that a transfer does not get initiated when control power is lost to any
one of the relays and that the bus is experiencing a short circuit fault.

There are certain advantages and disadvantages of testing the microprocessor-based

relays and the transfer scheme logic.

• Disadvantages:
o Logic is more complex and requires additional testing time.
o Programming of the relays and troubleshooting software could be
cumbersome
o Additional training is required for the personnel testing these relays

• Advantages:
o The same program can be used on multiple transfer schemes once a
standard is established
o The sequence of operation and event recording are excellent tools for
troubleshooting wiring errors and relay operations.
o Analog measurements and phasor/vector values are helpful to detect
rolled VT secondary wiring.
o Conventional scheme generally had limited flags or indications
whereas the microprocessor based relays can store valuable
information regarding the voltage and current conditions and the
separate flags for different settings can be used to ease the testing.
4. Conclusion

The implementation of the automatic bus transfer scheme varies from one application to
the other and needs to possess flexibility.

There are various questions which needs to be answered prior to the automatic bus
transfer scheme’s implementation, namely:

• What is the system configuration?

• What is the type of grounding system?

• What is the type of load (less of more critical) on the bus?

• What is the type of voltage sensing (single phase, or three phase) input for
initiating a transfer on the loss of an incomer supply?

• What are the effects of selecting a particular voltage sensing input?

• Should we initiate transfer on the negative sequence due to a blown fuse on the
primary side of the incomer transformer, or block it in the event of a blown fuse
in one of the voltage sensing inputs?

A proper planned study for a given application will go a long way in selecting the
right type of automatic bus transfer scheme .Use of the numerical IEDs are recommended
for simplification of the Automatic Bus Transfer system, component cost reduction and
increased system reliability, and the availability of events for transfer analysis.

5. References

[1] Pettigrew, R.D, and P. Powell. A report prepared by the Motor Bus Transfer
Working Group of the Power System Relaying Committee.

[2] Burnworth, T.A, and K. Zimmerman. Motor Bus Transfer Application and
Trends, Texas A&M Relay conference 1991.

[3] Industrial Power Systems Data Book, General Electric Co, Schenectady NY, sec
813, 1968.

[4] Pettigrew, R.D. Automated Bus Transfer Scheme theory and application, Texas
A&M Relay conference 1984.