Anda di halaman 1dari 4

31 AUGUST 2019

MINI
PROJECT
REPORT

Digital System
Design with HDL
lab (ECP 404)

GCD using
Euclid's
Algorithm

Report by:
Shruti Rathi (A-25)

Approved by:
Prof. Prasheel Thakre
Asst. Professor, EC dept.
Mini Project Report

WHAT IS
Euclidian Algorithm to
find GCD?

This method asks you to perform


successive division, first of the
smaller of the two numbers into the
larger, followed by the resulting
remainder divided into the divisor of
each division until the remainder is
equal to zero.

At that point, look at the remainder WHY THIS?  


of the previous division – that will be
the greatest common divisor.
GCD recursion theorem

For any nonnegative integer a and
any positive integer
b,
GCD (a,b) = GCD (b, a mod b)
Euclid’s algorithm is
a recursive program based on this
theorem
GCD  (a, b) = GCD (|a|, |b|) THEOREMS:
-For any nonnegative integer a and any
positive integer b,
GCD (a,b) = GCD (b, a mod b)

Euclid’s algorithm is a recursive


program based on this theorem
GCD  (a, b) = GCD (|a|, |b|)

Page 02
Mini Project Report
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.all;
entity gcd1 is
port ( x, y: in std_logic_vector (11
downto 0);
Code
gcd: out std_logic_vector ( 11
downto 0));
end gcd1;
architecture gcd1 of gcd1 is
begin
MARKETING
process (x, y)
HIGHLIGHTS FOR
variable xv, yv: std_logic_vector (11
THE YEAR
downto 0);
begin
xv:=x;
yv:=y;
while (xv/=yv) loop
if xv<yv then
yv:= yv-xv;
else
xv:= xv-yv;
end if;
end loop;
gcd<=xv;
end process;

Output
end gcd1;

Page 03
Mini Project Report

Optional
Code
library Ieee;
use ieee.std_logic_1164.all;
NEXT_STATE<= INIT when STATE = INIT
use ieee. std_logic_unsigned.all;
and START = '0' else
use ieee.std_logic_arith.all; STRT when STATE = INIT and START = '1' else
entity gcd is RUN when STATE = STRT else
port (a, b : in std_logic_vector (7 RUN when STATE= RUN and EQUAL = '0' else
downto 0); FINISH when STATE = RUN and EQUAL = '1' else
INIT when STATE = FINISH else
clk, rst, start: in std_logic;
STATE;
c: out std_logic_vector (7 downto 0);
done:out std_logic ); process (a,b,clk,rst)
end gcd; begin
if clk' event and clk = '1' then
if state=STRT then x<=a;y<=b;equal<='0';

architecture behav of gcd is elsif state=RUN then


signal x, y:std_logic_vector (7 downto if x=y then equal <='1';
0);
elsif x>y then x<=x-y;
signal equal:std_logic;
else y<=y-x;
end if;
type states is (INIT, STRT, RUN, FINISH); end if;
signal state, next_state : stateS; end if;
end process;

begin done <='1' when STATE=FINISH else '0';


process (CLK, RST, NEXT_STATE) c<=y;
end behav;
begin
if (RST= '1') then STATE <= INIT;
elsif (CLK' event and CLK ='1') then
STATE<= NEXT_STATE;
end if;
end process;
Number theory:
algorithms are used widely, due in part to the
invention of cryptographic
schemes based on large prime numbers
The feasibility of these schemes rests on our ability

Applications
Applications to find these large primes easily, while their security
rests on our inability to factor the product of large
primes

Page 06

Anda mungkin juga menyukai