EC 305 MICROPROCESSORS AND MICROCONTROLLERS

MODULE-1

Syllabus:

Basheer V P
Asst. Professor and PG Coordinator
Al Ameen Engineering College, Shoranur, Palakkad
 1.1 Organization of a Microprocessor based System

Figure 1.1

• Figure shows a simplified structure of a microprocessor-based system or product.

• It includes three components: microprocessor, I/O (input/output) and memory
(read/write memory and read only memory).
• These components are organized around a common communication path called bus.
• The entire group of components is also referred to as a system or a microcomputer
system.
• So, microprocessor is one component of the microcomputer.

Microprocessor

• A microprocessor is a multipurpose, programmable, clock driven, register-based

electronic device that reads instructions from a storage device called memory, accepts
binary data as input and processes data according to those instructions and provides
results at output.
• The microprocessor can be divided into three segments: arithmetic/logic unit, register
array and control unit.

Arithmetic/Logic Unit:

• This is the area of microprocessor where various computing functions are

performed on data.
• The ALU performs arithmetic operations like addition, subtraction and logical
operations like AND,OR,etc.
 Register Array:

• This area of the microprocessor consists of various registers. These registers are
primarily used to store data temporarily during the execution of a program.

Control Unit:

• The control unit provides the necessary timing and control signals to all the
operations in the microcomputer.
• It controls the flow of data between the microprocessor and memory and
peripherals.

Memory

• Memory stores binary information such as instructions and data and provides that
information to the microprocessor whenever necessary.
• To execute programs, the microprocessor reads instructions and data from memory and
performs computing operations in its ALU section. Results are either transferred to the
output section to display or stored in the memory for later use.
• The memory block shown in the figure has two sections: Read only Memory (ROM) and
Read/Write Memory (R/W/M).
• The ROM is used to store programs that do not need alterations. Programs stored in the
ROM can only be read; they cannot be altered.
• The Read/Write Memory (R/W/M) is also known as user memory. It is used to store
user programs and data. The information stored in this memory can be easily read and
altered.

I/O (Input/Output)

• The third component of a microprocessor-based system is I/O; it communicates with the

outside world. I/O includes two types of devices: input and output. These I/O devices
are also known as peripherals.
• The input devices such as keyboard, switches and analog to digital converter transfer
binary information from the outside world to the microprocessor.
• The output devices transfer data from microprocessor to the outside world. They
include devices such as LCD displays, light emitting diodes, printer, digital to analog
converter etc.

System Bus

• The system bus is a communication path between the microprocessor and peripherals.
It is nothing but a group of wires to carry bits. All peripherals share the same bus;
however the microprocessor communicates with only one peripheral at a time. The
timing is provided by control unit of the microprocessor.
 1.2 Evolution of Microprocessors
The development of microprocessors can be divided as 5 generations.

First generation (1971 – 73)

Intel Corporation introduced 4004, the first microprocessor in 1971. It is evolved from the
development effort while designing a calculator chip.

There were three other microprocessors in the market during the same period:

• Rockwell International’s PPS-4 (4 bits)

• Intel’s 8008 (8 bits)
• National Semiconductor’s IMP-16 (16 bits)
They were fabricated using PMOS technology which provided low cost, slow speed and low
output currents

Second Generation (1974 – 1978)

Marked the beginning of very efficient 8 – bit microprocessors.

Some of the popular processors were:

• Motorola’s 6800 and 6809

• Intel’s 8085
• Zilog’s Z80
They were manufactured using NMOS technology.

This technology offered faster speed and higher density than PMOS

Third generation microprocessors (1979 – 80)

This age is dominated by 16 – bits microprocessors

Some of them were:

• Intel’s 8086/80186/80286
• Motorolla’s 68000/68010
They were designed using HMOS technology

HMOS provides some advantages over NMOS as

Speed-power-product of HMOS is four times better than that of NMOS

HMOS can accommodate twice the circuit density compared to NMOS

Intel used HMOS technology to recreate 8085A and named it as 8085AH with a higher price tag.

Fourth Generation (1981 – 1995)

• This era marked the beginning of 32 bits microprocessors

• Intel introduced 432, which was bit problematic
• Then a clean 80386 in launched.
• Motorola introduced 68020/68030.
They were fabricated using low-power version of the HMOS technology called HCMOS.
Motorola introduced 32-bit RISC processors called MC88100

Fifth Generation (1995 – till date)

This age the emphasis is on introducing chips that carry on-chip functionalities and
improvements in the speed of memory and I/O devices along with introduction of 64-bit
microprocessors.

Intel leads the show here with Pentium, Celeron and very recently dual and quad core
processors working with up to 3.5GHz speed.

1.3 8085 Microprocessor

Features of 8085:
 It is an 8 bit microprocessor.
 It is manufactured with N-MOS technology.
 It has 16-bit address bus and hence can address up to = 65536 bytes (64KB)
memory locations through A0-A15.
 It has 8-bit data bus.
 It supports external interrupt request.
 It requires a signal +5V power supply and operates at 3.2 MHZ single phase clock.
 It is enclosed with 40 pins, DIP (Dual in line package).

Architecture of 8085
The architecture of 8085 is shown in figure 1.2. The internal architecture of 8085 includes the
ALU, register array, timing and control unit, instruction register and decoder, interrupt control
and serial I/O control.

ALU:

Functions of ALU:

 It performs arithmetic operations like ; addition, subtraction, increment, etc.

 It performs logical operations like ; AND ing, OR ing, X-OR ing, NOT etc.
 It accepts operands from accumulator and temporary register.
 It stores the result in accumulator.
 It provides states of result to the flag register.

Register Array:
1. General Purpose Registers:

 The 8085/8080A has six general-purpose registers to store 8-bit data; these are
identified as B,C,D,E,H, and L .
 They can be combined as register pairs - BC, DE, and HL - to perform some 16-bit
operations.
 The temporary registers W and Z are intended for internal use of the processor and it
cannot be used by the programmer.

2. Accumulator:
 The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This
register is used to store 8-bit data and to perform arithmetic and logical operations.
 The result of an operation is stored in the accumulator.
 The accumulator is also identified as register A.

3. Flag Register:

 Flag is a flip-flop which changes its status according to the result stored in the
accumulator.
 Flag register is also known as status register.
 8085 has an 8-bit Flag register with 5 active flags. They are called Zero (Z), Carry
(CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags.
 The bit position of the flip flop in flag register is:

Sign Flag

If the result of an operation is negative then sign flag is set otherwise reset.

Zero Flag (Z)

If the result stored in an accumulator is zero then this flag is set otherwise it is reset.
 Auxiliary carry Flag (AC)

If any carry goes from D3 to D4 in the result, then it is set otherwise it is reset.

Parity Flag (P)

If the no of 1's in the result stored in the accumulator is even, then it is set otherwise it is
reset for the odd.

Carry Flag (C)

If the result stored in an accumulator generates a carry in its final output then it is set
otherwise it is reset.

4. Program Counter (PC):

 This is a 16-bit register used to hold the address of the next instruction to be
executed.

 When a byte (machine code) is being fetched, the program counter is

incremented by one to point to the next memory location.

5. Stack Pointer (SP):

 The stack pointer is also a 16-bit register used as a memory pointer.
 It points to a memory location in R/W memory, called the stack.
 The beginning of the stack is defined by loading 16-bit address in the stack
pointer.

6. Instruction Register (IR):

 It is an 8-bit register. An instruction fetched from memory is temporarily stored
in Instruction Register before decoding.
 The register is not accessible to user.
 Instruction register holds the opcode of instruction that is to be decoded and
executed.

Instruction Decoder:

 Instruction decoder takes bits stored in the instruction register and decodes it and
tells to CPU what it need to do for it and enable the components for the operation.
 Simply, instruction decoder is like a dictionary. It tells the meaning of the
instruction.

Timing and Control Unit:

 It provides timing and control signal to the microprocessor to perform the various
operations.
 It has three control signals. It controls all external and internal circuits.
 It operates with reference to clock signal.
 It synchronizes all the data transfers.

Serial Input Output Control:

 There are two pins in this unit. This unit is used for serial data communication.
Interrupt Unit:
 Interrupt is a mechanism by which an I/O or an instruction can suspend the normal
execution of processor and get itself serviced.
 There are 6 interrupt pins in this unit. Generally an external hardware is connected
to these pins.
 These pins provide interrupt signal sent by external hardware to microprocessor
and microprocessor sends acknowledgement for receiving the interrupt signal.

1.4 Microprocessor Initiated Operations

 These are operations that the microprocessor itself starts.
 Primarily microprocessor performs four operations:-
a) Memory read (Reads data from memory).
b) Memory writes (Write data into memory).
c) I/O read (Accept data to output device).
d) I/O writes (Sends data to output device).

The Memory Read Operation:

– To read the contents of a memory location, the following steps take place:
• The microprocessor places the 16-bit address of the memory location on
the address bus.
• The microprocessor activates a control signal called “memory read”
which enables the memory chip.
• The memory decodes the address and identifies the right location.
• The memory places the contents of the memory location on the data bus.
• The microprocessor reads the value of the data bus.
•
The Memory Write Operation:
– To write the contents of a memory location, the following steps take place:
• The microprocessor places the 16-bit address of the memory location on
the address bus.
• The memory decodes the address and identifies the right location.
• The microprocessor places the 8-bit data to be written on the data bus.
• The microprocessor activates a control signal called “memory write”
which enables the memory chip.
• Then the data available on the data bus will be written to the selected
memory location.

(I/O read and write operations are working with the same procedure. Address generated will be
that of I/O and read/write control signals will be I/O read and I/O write)
 1.5 8085 Bus Organization
BUSES:

The buses are group of lines or wires that carries data, address or control signals.

Address Bus:

 Address bus is a group of 16 lines generally identified as A₁₅-A₀.

 The address bus is unidirectional, that is bits flow in one direction-from microprocessor
to peripheral devices.
 In a computer system, each peripheral or memory location is identified by a binary
number, called an address, and the address bus is used to carry a 16-bit address.

Data Bus:

 Data bus is a group of 8 lines generally identified as D₇-D₀.

 These lines are bidirectional, that is dataflow in both direction from microprocessor and
memory/peripherals.

Control Bus:

 The control bus is comprised of various single lines that carry control signals.
 These are not group of lines like address or data buses, but individual lines that provide
a pulse to control a microprocessor operation like Read, Write etc.
 The microprocessor generates specific control signals for every operation it performs,
like memory read, write etc.
 1.6 Pin Configuration:
All the signals can be classified into seven groups. They are
1. Address bus
2. Data bus
3. Control and status signals
4. Interrupt signals
5. Externally initiated signals
6. Serial I/O signals and
7. Power and frequency signals

1. Address bus:
 The 8085 has 8 signal lines A15-A8, which are unidirectional and used as the higher
order address bus.
2. Data Bus:
 The signal lines AD7-AD₀ are bidirectional.
 They serve as the lower order address bus as well as the data bus.
 During the earlier part of cycle, they are used as address bus and later as data bus and
hence these are multiplexed. This is done so as to reduce the number of pins externally.
3. Control and status signals:

This group of signals includes two control signals ( RD and WR ), three status signals (IO/
M , S1 and S0) to identify the nature of the operation and one special signal (ALE) to
indicate the beginning of the operation. These signals are as follows:
i. ALE-Address Latch Enable:
 This is a positive going pulse generated every time the 8085 begins as
operation (machine cycle).
 It indicates that the bits on AD7-AD0 are address bits.
 This signal is primarily used to latch the lower-order address from the
multiplexed bus and generate a separate set of eight address lines A7-A0.
ii. RD -Read:
 This is a Read control signal (active low).
 This signal indicates that the selected I/O or memory is to be read.
iii. WR -Write:
 This is a Write control signal (active low).
 This signal indicates that the data on the data bus are to written into a
selected memory or I/O location.
iv. IO/ M :
 This is a status signal used to differentiate between I/O and memory
operations.
 When it is high, it indicates an I/O operation; when it is low, it indicates a
memory operation.
 This signal is combined with RD and WR to generate I/O and memory
control signals.
v. S1 and S0:
 These signals, similar to IO/ M , can identify various operations, but they
are rarely used in small systems.

S1 S0 Operation
0 0 HALT
0 1 WRITE
1 0 READ
1 1 FETCH

4. Interrupt Signals:
The 8085 has 5 interrupt signals,
i. INTR (Input): (INTERRUPT REQUEST)
 It is used as a general purpose interrupt.
 If it is active, the Program Counter (PC) will be inhibited from
incrementing and an INTA will be issued.

ii. INTA (Output): (INTERRUPT ACKNOWLEDGE)

 It is used to acknowledge an interrupt.

iii. RST 5.5,RST 6.5,RST 7.5-- (Inputs):

 These are vectored interrupts that transfer the program control to specific
memory locations.
 They have higher priority than INTR. Among these, the priority order is
7.5, 6.5, and 5.5
 iv. TRAP (Input):
 Trap interrupt is a non-maskable interrupt. It is recognized at the same
time as INTR.
 It is unaffected by any mask or Interrupt Enable.
 It has the highest priority of any interrupt.

5. Externally Initiated Signals:

a) HOLD (Input):
 It indicates that another Master is requesting the use of the Address and
Data buses.
 The CPU, upon receiving the Hold request will relinquish the use of buses
as soon as the completion of the current machine cycle. Internal processing
can continue.
 The processor can regain the buses only after the Hold is removed. (The
combination of HOLD, HLDA, READY signals are used to implement DMA)

b) HLDA (Output): - HOLD ACKNOWLEDGE

 It indicates that the CPU has received the Hold request and that it will
relinquish the buses in the next clock cycle.
 HLDA goes low after the Hold request is removed. The CPU takes the buses
one half clock cycle after HLDA goes low.

c) READY (Input):
 If Ready is high during a read or write cycle, it indicates that the memory
or peripheral is ready to send or receive data.
 If Ready is low, the CPU will wait for Ready to go high before completing
the read or write cycle.

d) RESET IN (Input):
 When its low, the PC is set to 0, the buses are tri-stated and the
microprocessor is reset.

e) RESETOUT(OUTPUT):
 This indicates that microprocessor is being reset. This can be used to reset
other devices.

6. Serial I/O Ports:

 The 8085 has two signals to implement the serial transmission; they are
SID (serial input data) and SOD (serial output data).

7. Power and Clock Frequency:

i. Vcc: +5V power supply
ii. Vss: Ground reference.
iii. X1, X2: Crystal or R/C network connections to set the internal clock generator X1
can also be an external clock input instead of a crystal. The input frequency is
divided by 2 to give the internal operating frequency.
iv. CLK (OUT)- Clock Output for use as a system clock.
1.6 Generation of Control Signals
 The control signals generated by 8085 microprocessor are RD (Read) and WR
(Write).
 But, the RD signal is used for reading memory and reading input device.
Similarly, the WR signal is used for writing memory and writing output device.
 So, it is necessary to generate two different Read Signals; one for memory and
another for I/O device. Similarly two separate write signals must be generated.

Figure Generation of Read/Write control signals for memory and I/O.

 Figure shows that four different control signals are generated by combining the
control signals RD and WR and status signal IO/ M .
 Here OR gates are functionally connected as negative NAND gates.
 The signal IO/ M goes low for memory operation. Hence,
o For a memory read operation, both inputs of gate G1 will be low and hence
the signal Memory Read will be generated (low).
o For a memory write operation, both inputs of gate G2 will be low and
hence the signal Memory Write will be generated (low).
 The signal IO/ M goes high for I/O operation. So an inverter is used to
complement this signal for only to generate I/O control signals. Hence,
o For an I/O read operation, both inputs of gate G3 will be low and hence the
signal I/O Read will be generated (low).
o For an I/O write operation, both inputs of gate G4 will be low and hence the
signal I/O write will be generated (low).