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EE141

EE141-Fall 2003
Digital Integrated
Circuits

Lecture 5
MOS Operation
and Modeling

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Administrative Stuff
‰ Labs start this week
ƒ Option to choose MicroMagic or Cadence
‰ Homework #2 posted last week, due 9/16
‰ Lecture pre-taping tomorrow
ƒ 1:30-3pm 203 McLaughlin

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Last Lecture
‰ Last lecture
ƒ CMOS manufacturing process
ƒ CMOS design rules
‰ Today’s lecture
ƒ MOS transistor operation and modeling

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What is a Transistor?

A Switch! An MOS Transistor

VGS ≥ VT |VGS|

Ron
S D

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Threshold Voltage: Concept

+
S VG S D
G

n+ n+

n-channel Depletion
region
p-substrate

B
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The Threshold Voltage

Threshold

Fermi potential

2φF is approximately - 0.6V for p-type substrates


γ – the body factor
VT0 is approximately 0.45V for our process

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The Body Effect


0.9

0.85

0.8

0.75

0.7
V (V)

0.65
T

0.6

0.55

0.5

0.45

0.4
-2.5 -2 -1.5 -1 -0.5 0
V (V)
BS

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The Drain Current


Charge in the channel is controlled by the gate voltage:

Drain current is proportional to charge and velocity:

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The Drain Current


Combining velocity and charge:

Integrating over the channel:

Transconductance:

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Transistor in Linear
Linear (Resistive) mode
VGS VDS
S
G ID
D

n+ – V(x) + n+

L x

p-substrate

MOS transistor and its bias conditions


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Transistor in Saturation
VGS

VDS > VGS - VT


G

D
S

- +
n+ VGS - VT n+

Pinch-off

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Saturation
For VGD < VT, the drain current saturates

k′ W
I D = n (VGS − VT )2
2 L

Including channel-length modulation

k′ W
I D = n (VGS − VT )2 (1 + λVDS )
2 L

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Modes of Operation
Cutoff:

VGS < VT ID = 0

Resistive:
kn′ W  2 
VDS
VT < VGS ; VGS − VT > VDS ID = (VGS − VT )VDS − 
2 L  2 
Saturation:

VT < VGS ; VGS − VT < VDS k′ W


I D = n (VGS − VT )2
2 L
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Current-Voltage Relations
A Good Ol’ Transistor
-4
x 10
6
VGS= 2.5 V

Resistive Saturation
4
VGS= 2.0 V
ID (A)

3 Quadratic
VDS = VGS - VT Relationship
2
VGS= 1.5 V

1
VGS= 1.0 V

0
0 0.5 1 1.5 2 2.5
VDS (V)

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A model for manual analysis

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Current-Voltage Relations
The Deep-Submicron Era
-4
x 10
2.5

VGS= 2.5 V
Early Saturation
2

VGS= 2.0 V
1.5
ID (A)

Linear
1
VGS= 1.5 V Relationship

0.5 VGS= 1.0 V

0
0 0.5 1 1.5 2 2.5
VDS (V)

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Velocity Saturation

υ n (m/s)
υsat = 105
Constant velocity

Constant mobility (slope = µ)

ξc = 1.5 ξ (V/µm)
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Velocity Saturation
ID
Long-channel device

VGS = VDD
Short-channel device

V DSAT VGS - V T VDS


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ID versus VGS
-4
x 10 x 10
-4
6 2.5

5
2

4 linear
quadratic 1.5
ID (A)

ID (A)
3

1
2

0.5
1
quadratic
0 0
0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
VGS(V) VGS(V)

Long Channel Short Channel

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ID versus VDS
-4 -4
x 10 x 10
6 2.5
VGS= 2.5 V
VGS= 2.5 V
5
2
Resistive Saturation
4 VGS= 2.0 V
VGS= 2.0 V 1.5
ID (A)
ID (A)

3
VDS = VGS - VT 1 VGS= 1.5 V
2
VGS= 1.5 V
0.5 VGS= 1.0 V
1
VGS= 1.0 V
0 0
0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
VDS(V) VDS(V)

Long Channel Short Channel

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Including Velocity Saturation


Approximate velocity:

And integrate current again:

In deep submicron, there are four regions of operation:


(1) cutoff, (2) resistive, (3) saturation and (4) velocity saturation
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Regions of Operation

Long Channel Short Channel

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An Unified Model for Manual Analysis

S D

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Regions of Operation
-4
x 10
2.5

VDS=VDSAT
2
Velocity
Linear
Saturated
1.5
ID (A)

0.5
VDSAT=VGT

VDS=VGT
Saturated
0
0 0.5 1 1.5 2 2.5
V DS (V) 24
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A PMOS Transistor
-4
x 10
0
VGS = -1.0V

-0.2
VGS = -1.5V

-0.4
ID (A)

VGS = -2.0V
-0.6 Assume all variables
negative!
-0.8
VGS = -2.5V

-1
-2.5 -2 -1.5 -1 -0.5 0
VDS (V)

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Transistor Model for Manual Analysis

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The Transistor as a Switch

VGS ≥ VT
Ron ID
V GS = VD D
S D
Rmid

R0

V DS
VDD/2 VDD

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The Transistor as a Switch


5
x 10
7

5
(Ohm)

4
eq

3
R

0
0.5 1 1.5 2 2.5
V (V)
DD

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The Transistor as a Switch

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Next Lecture
‰ CMOS Inverter
ƒ Voltage transfer characteristic
ƒ Switching behavior

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