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Instruction Operands Description

Corrects result in AH and AL after addition when working with Corrects the result of multiplication of two BCD values.
BCD values.
Algorithm:
It works according to the following Algorithm:

if low nibble of AL > 9 or AF = 1 then: • AH = AL / 10

• AL = remainder
No
• AL = AL + 6 AAM
operands
• AH = AH + 1 Example:
• AF = 1 MOV AL, 15 ; AL = 0Fh
• CF = 1 AAM ; AH = 01, AL = 05
RET
else C Z S O P A
No
AAA ? r r ? r ?
operands
• AF = 0
• CF = 0
ASCII Adjust after Subtraction.
in both cases: Corrects result in AH and AL after subtraction when working with
clear the high nibble of AL. BCD values.

Example: Algorithm:
MOV AX, 15 ; AH = 00, AL = 0Fh
AAA ; AH = 01, AL = 05 if low nibble of AL > 9 or AF = 1 then:
RET
C Z S O P A
• AL = AL - 6
r ? ? ? ? r • AH = AH - 1
• AF = 1
• CF = 1
ASCII Adjust before Division.
Prepares two BCD values for division. No else
AAS
operands
Algorithm:
• AF = 0
• CF = 0
• AL = (AH * 10) + AL
• AH = 0 in both cases:
No
AAD clear the high nibble of AL.
operands
Example: Example:
MOV AX, 0105h ; AH = 01, AL = 05 MOV AX, 02FFh ; AH = 02, AL = 0FFh
AAD ; AH = 00, AL = 0Fh (15) AAS ; AH = 01, AL = 09
RET RET
C Z S O P A C Z S O P A
? r r ? r ? r ? ? ? ? r
Add with Carry. Transfers control to procedure, return address is (IP) is pushed to
stack. 4-byte address may be entered in this form: 1234h:5678h,
first value is a segment second value is an offset (this is a far call,
Algorithm: so CS is also pushed to stack).
REG,
memory operand1 = operand1 + operand2 + CF
memory, Example:
REG Example:
ADC REG, REG STC ; set CF = 1 ORG 100h ; directive to make simple .com file.
memory, MOV AL, 5 ; AL = 5 procedure
immediate ADC AL, 1 ; AL = 7 CALL p1
name
REG, RET label
immediate CALL ADD AX, 1
C Z S O P A 4-byte
r r r r r r RET ; return to OS.

p1 PROC ; procedure declaration.

MOV AX, 1234h
p1 ENDP
C Z S O P A
REG, Algorithm:
memory unchanged
memory, operand1 = operand1 + operand2
REG
ADD REG, REG Example:
memory, MOV AL, 5 ; AL = 5 Convert byte into word.
immediate ADD AL, -3 ; AL = 2
REG, RET Algorithm:
immediate C Z S O P A
if high bit of AL = 1 then:
r r r r r r

• AH = 255 (0FFh)

operand1. else

These rules apply: No

CBW
operands • AH = 0
REG, 1 AND 1 = 1
memory 1 AND 0 = 0
memory, 0 AND 1 = 0 Example:
REG 0 AND 0 = 0 MOV AX, 0 ; AH = 0, AL = 0
AND REG, REG MOV AL, -5 ; AX = 000FBh (251)
memory, CBW ; AX = 0FFFBh (-5)
immediate Example: RET
REG, MOV AL, 'a' ; AL = 01100001b
C Z S O P A
immediate AND AL, 11011111b ; AL = 01000001b ('A')
RET unchanged
C Z S O P
0 r r 0 r
No Clear Carry flag.
CLC
operands
Algorithm: REG, REG operand1 - operand2
memory,
CF = 0 immediate result is not stored anywhere, flags are set (OF, SF, ZF, AF, PF,
REG, CF) according to result.
immediate
C Example:
0 MOV AL, 5
MOV BL, 5
CMP AL, BL ; AL = 5, ZF = 1 (so equal!)
RET
Clear Direction flag. SI and DI will be incremented by chain C Z S O P A
instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB,
r r r r r r
MOVSW, STOSB, STOSW.

Algorithm:
No
CLD DF = 0 Compare bytes: ES:[DI] from DS:[SI].
operands
Algorithm:
D
0 • DS:[SI] - ES:[DI]
• set flags according to result:
OF, SF, ZF, AF, PF, CF
Clear Interrupt enable flag. This disables hardware interrupts. • if DF = 0 then
o SI = SI + 1
Algorithm: o DI = DI + 1
No
No IF = 0 CMPSB else
CLI operands
operands
I o SI = SI - 1
0
o DI = DI - 1

Example:
see cmpsb.asm in c:\emu8086\examples\.
Complement Carry flag. Inverts value of CF.
C Z S O P A
Algorithm:
r r r r r r
if CF = 1 then CF = 0
No if CF = 0 then CF = 1
CMC
operands
Compare words: ES:[DI] from DS:[SI].
C Algorithm:
r
No
CMPSW
operands • DS:[SI] - ES:[DI]
• set flags according to result:
REG, Compare. OF, SF, ZF, AF, PF, CF
memory • if DF = 0 then
CMP o SI = SI + 2
memory, Algorithm:
REG
o DI = DI + 2 • AF = 1

else if AL > 9Fh or CF = 1 then:

o SI = SI - 2 • AL = AL + 60h
o DI = DI - 2
• CF = 1

Example:
see cmpsw.asm in c:\emu8086\examples\.
Example:
MOV AL, 0Fh ; AL = 0Fh (15)
C Z S O P A DAA ; AL = 15h
RET
r r r r r r
C Z S O P A
r r r r r r

Algorithm: Decimal adjust After Subtraction.

Corrects the result of subtraction of two packed BCD values.
if high bit of AX = 1 then:
Algorithm:
• DX = 65535 (0FFFFh)
if low nibble of AL > 9 or AF = 1 then:

else • AL = AL - 6
• AF = 1
No
CWD
operands
• DX = 0
if AL > 9Fh or CF = 1 then:
No
DAS
operands
Example: • AL = AL - 60h
MOV DX, 0 ; DX = 0 • CF = 1
MOV AX, 0 ; AX = 0
MOV AX, -5 ; DX AX = 00000h:0FFFBh
CWD ; DX AX = 0FFFFh:0FFFBh
RET Example:
MOV AL, 0FFh ; AL = 0FFh (-1)
C Z S O P A DAS ; AL = 99h, CF = 1
unchanged RET
C Z S O P A
r r r r r r
Corrects the result of addition of two packed BCD values.

Algorithm: Decrement.
No
DAA REG
operands Algorithm:
if low nibble of AL > 9 or AF = 1 then: DEC memory
operand = operand - 1
• AL = AL + 6
Example:
Example: MOV AX, -203 ; AX = 0FF35h
MOV AL, 255 ; AL = 0FFh (255 or -1) MOV BL, 4
DEC AL ; AL = 0FEh (254 or -2) IDIV BL ; AL = -50 (0CEh), AH = -3 (0FDh)
RET RET
Z S O P A C Z S O P A
r r r r r ? ? ? ? ? ?
CF - unchanged!

Unsigned divide. Signed multiply.

Algorithm: Algorithm:

when operand is a byte: when operand is a byte:

AL = AX / operand AX = AL * operand.
AH = remainder (modulus) when operand is a word:
when operand is a word: REG (DX AX) = AX * operand.
REG AX = (DX AX) / operand IMUL memory Example:
DIV memory DX = remainder (modulus)
MOV AL, -2
Example: MOV BL, -4
MOV AX, 203 ; AX = 00CBh IMUL BL ; AX = 8
MOV BL, 4 RET
DIV BL ; AL = 50 (32h), AH = 3 C Z S O P A
RET
r ? ? r ? ?
C Z S O P A
CF=OF=0 when result fits into operand of IMUL.
? ? ? ? ? ?

Input from port into AL or AX.

Second operand is a port number. If required to access port number
Halt the System. AL, over 255 - DX register should be used.
im.byte Example:
Example: AL, DX IN AX, 4 ; get status of traffic lights.
MOV AX, 5 IN IN AL, 7 ; get status of stepper-motor.
AX,
No HLT
HLT im.byte C Z S O P A
operands
C Z S O P A AX, DX
unchanged
unchanged

Increment.
Signed divide.
Algorithm:
Algorithm:
REG operand = operand + 1
REG when operand is a byte: INC memory
IDIV memory AL = AX / operand Example:
AH = remainder (modulus) MOV AL, 4
when operand is a word: INC AL ; AL = 5
AX = (DX AX) / operand RET
DX = remainder (modulus) Z S O P A
r r r r r o CS
o flags register
CF - unchanged!

C Z S O P A
Interrupt numbered by immediate byte (0..255).
popped
Algorithm:

Push to stack:
Short Jump if first operand is Above second operand (as set by
CMP instruction). Unsigned.
o flags register
o CS Algorithm:
o IP
• IF = 0 if (CF = 0) and (ZF = 0) then jump
INT
immediate • Transfer control to interrupt procedure Example:
byte include 'emu8086.inc'

Example: ORG 100h

MOV AH, 0Eh ; teletype. MOV AL, 250
MOV AL, 'A' JA label CMP AL, 5
INT 10h ; BIOS interrupt. JA label1
RET PRINT 'AL is not above 5'
JMP exit
C Z S O P A I label1:
unchanged 0 PRINT 'AL is above 5'
exit:
RET
C Z S O P A
Interrupt 4 if Overflow flag is 1. unchanged
Algorithm:

if OF = 1 then INT 4
Short Jump if first operand is Above or Equal to second operand (as
Example: set by CMP instruction). Unsigned.
No
INTO ; -5 - 127 = -132 (not in -128..127)
operands Algorithm:
; the result of SUB is wrong (124),
; so OF = 1 is set:
MOV AL, -5 if CF = 0 then jump
SUB AL, 127 ; AL = 7Ch (124) Example:
INTO ; process error. include 'emu8086.inc'
RET
JAE label ORG 100h
MOV AL, 5
CMP AL, 5
Interrupt Return. JAE label1
PRINT 'AL is not above or equal to 5'
Algorithm: JMP exit
No label1:
IRET
operands Pop from stack: PRINT 'AL is above or equal to 5'
exit:
RET
o IP
C Z S O P A Short Jump if Carry flag is set to 1.

unchanged Algorithm:

if CF = 1 then jump
Example:
Short Jump if first operand is Below second operand (as set by include 'emu8086.inc'
CMP instruction). Unsigned.
ORG 100h
Algorithm: MOV AL, 255
JC label
if CF = 1 then jump JC label1
Example: PRINT 'no carry.'
include 'emu8086.inc' JMP exit
label1:
ORG 100h PRINT 'has carry.'
MOV AL, 1 exit:
JB label CMP AL, 5 RET
JB label1 C Z S O P A
PRINT 'AL is not below 5'
JMP exit unchanged
label1:
PRINT 'AL is below 5'
exit:
RET Short Jump if CX register is 0.
C Z S O P A
Algorithm:
unchanged
if CX = 0 then jump
Example:
include 'emu8086.inc'
Short Jump if first operand is Below or Equal to second operand (as
set by CMP instruction). Unsigned. ORG 100h
MOV CX, 0
Algorithm: JCXZ label JCXZ label1
PRINT 'CX is not zero.'
if CF = 1 or ZF = 1 then jump JMP exit
Example: label1:
include 'emu8086.inc' PRINT 'CX is zero.'
exit:
ORG 100h RET
MOV AL, 5 C Z S O P A
JBE label CMP AL, 5
JBE label1 unchanged
PRINT 'AL is not below or equal to 5'
JMP exit
label1:
PRINT 'AL is below or equal to 5' Short Jump if first operand is Equal to second operand (as set by
exit: CMP instruction). Signed/Unsigned.
RET
C Z S O P A JE label Algorithm:

unchanged if ZF = 1 then jump

Example:
include 'emu8086.inc' CMP AL, -5
JGE label1
ORG 100h PRINT 'AL < -5'
MOV AL, 5 JMP exit
CMP AL, 5 label1:
JE label1 PRINT 'AL >= -5'
PRINT 'AL is not equal to 5.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'AL is equal to 5.'
exit: unchanged
RET
C Z S O P A
unchanged Short Jump if first operand is Less then second operand (as set by
CMP instruction). Signed.

Algorithm:
Short Jump if first operand is Greater then second operand (as set
by CMP instruction). Signed. if SF <> OF then jump
Example:
Algorithm: include 'emu8086.inc'

if (ZF = 0) and (SF = OF) then jump ORG 100h

Example: MOV AL, -2
include 'emu8086.inc' JL label CMP AL, 5
JL label1
ORG 100h PRINT 'AL >= 5.'
MOV AL, 5 JMP exit
JG label CMP AL, -5 label1:
JG label1 PRINT 'AL < 5.'
PRINT 'AL is not greater -5.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'AL is greater -5.'
exit: unchanged
RET
C Z S O P A
unchanged Short Jump if first operand is Less or Equal to second operand (as
set by CMP instruction). Signed.

Algorithm:
Short Jump if first operand is Greater or Equal to second operand
(as set by CMP instruction). Signed. if SF <> OF or ZF = 1 then jump
Example:
Algorithm: JLE label include 'emu8086.inc'

JGE label if SF = OF then jump ORG 100h

Example: MOV AL, -2
include 'emu8086.inc' CMP AL, 5
JLE label1
ORG 100h PRINT 'AL > 5.'
MOV AL, 2 JMP exit
label1: C Z S O P A
PRINT 'AL <= 5.'
exit: unchanged
RET
C Z S O P A
unchanged Short Jump if first operand is Not Above and Not Equal to second
operand (as set by CMP instruction). Unsigned.

Algorithm:
Unconditional Jump. Transfers control to another part of the
program. 4-byte address may be entered in this form: 1234h:5678h, if CF = 1 then jump
first value is a segment second value is an offset. Example:
include 'emu8086.inc'

Algorithm: ORG 100h

MOV AL, 2
always jump JNAE label CMP AL, 5
Example: JNAE label1
include 'emu8086.inc' PRINT 'AL >= 5.'
label
JMP exit
4-byte
JMP ORG 100h label1:
MOV AL, 5 PRINT 'AL < 5.'
JMP label1 ; jump over 2 lines! exit:
PRINT 'Not Jumped!' RET
MOV AL, 0 C Z S O P A
label1:
PRINT 'Got Here!' unchanged
RET
C Z S O P A
unchanged Short Jump if first operand is Not Below second operand (as set by
CMP instruction). Unsigned.

Algorithm:
Short Jump if first operand is Not Above second operand (as set by
CMP instruction). Unsigned. if CF = 0 then jump
Example:
Algorithm: include 'emu8086.inc'

if CF = 1 or ZF = 1 then jump ORG 100h

Example: MOV AL, 7
include 'emu8086.inc' JNB label CMP AL, 5
JNB label1
JNA label ORG 100h PRINT 'AL < 5.'
MOV AL, 2 JMP exit
CMP AL, 5 label1:
JNA label1 PRINT 'AL >= 5.'
PRINT 'AL is above 5.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'AL is not above 5.'
exit: unchanged
RET
Short Jump if first operand is Not Below and Not Equal to second if ZF = 0 then jump
operand (as set by CMP instruction). Unsigned. Example:
include 'emu8086.inc'
Algorithm:
ORG 100h
if (CF = 0) and (ZF = 0) then jump MOV AL, 2
Example: CMP AL, 3
include 'emu8086.inc' JNE label1
PRINT 'AL = 3.'
ORG 100h JMP exit
MOV AL, 7 label1:
JNBE label CMP AL, 5 PRINT 'Al <> 3.'
JNBE label1 exit:
PRINT 'AL <= 5.' RET
JMP exit C Z S O P A
label1:
PRINT 'AL > 5.' unchanged
exit:
RET
C Z S O P A
Short Jump if first operand is Not Greater then second operand (as
unchanged set by CMP instruction). Signed.

Algorithm:

Short Jump if Carry flag is set to 0. if (ZF = 1) and (SF <> OF) then jump
Example:
Algorithm: include 'emu8086.inc'

if CF = 0 then jump ORG 100h

Example: MOV AL, 2
include 'emu8086.inc' JNG label CMP AL, 3
JNG label1
ORG 100h PRINT 'AL > 3.'
MOV AL, 2 JMP exit
ADD AL, 3 label1:
JNC label PRINT 'Al <= 3.'
JNC label1
PRINT 'has carry.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'no carry.'
exit: unchanged
RET
C Z S O P A
unchanged Short Jump if first operand is Not Greater and Not Equal to second
operand (as set by CMP instruction). Signed.

Algorithm:
Short Jump if first operand is Not Equal to second operand (as set JNGE label
by CMP instruction). Signed/Unsigned. if SF <> OF then jump
JNE label Example:
Algorithm: include 'emu8086.inc'
ORG 100h PRINT 'AL <= -3.'
MOV AL, 2 JMP exit
CMP AL, 3 label1:
JNGE label1 PRINT 'Al > -3.'
PRINT 'AL >= 3.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'Al < 3.'
exit: unchanged
RET
C Z S O P A
unchanged Short Jump if Not Overflow.

Algorithm:

Short Jump if first operand is Not Less then second operand (as set if OF = 0 then jump
by CMP instruction). Signed. Example:
; -5 - 2 = -7 (inside -128..127)
Algorithm: ; the result of SUB is correct,
; so OF = 0:
if SF = OF then jump
Example: include 'emu8086.inc'
include 'emu8086.inc'
ORG 100h
JNO label
ORG 100h MOV AL, -5
MOV AL, 2 SUB AL, 2 ; AL = 0F9h (-7)
JNL label CMP AL, -3 JNO label1
JNL label1 PRINT 'overflow!'
PRINT 'AL < -3.' JMP exit
JMP exit label1:
label1: PRINT 'no overflow.'
PRINT 'Al >= -3.' exit:
exit: RET
RET C Z S O P A
C Z S O P A
unchanged
unchanged

Short Jump if No Parity (odd). Only 8 low bits of result are

Short Jump if first operand is Not Less and Not Equal to second checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
operand (as set by CMP instruction). Signed. instructions.

Algorithm: Algorithm:

if (SF = OF) and (ZF = 0) then jump JNP label if PF = 0 then jump
JNLE label Example: Example:
include 'emu8086.inc' include 'emu8086.inc'

ORG 100h ORG 100h

MOV AL, 2 MOV AL, 00000111b ; AL = 7
CMP AL, -3 OR AL, 0 ; just set flags.
JNLE label1 JNP label1
PRINT 'parity even.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'parity odd.'
exit: unchanged
RET
C Z S O P A
unchanged Short Jump if Overflow.

Algorithm:

Short Jump if Not Signed (if positive). Set by CMP, SUB, ADD, if OF = 1 then jump
TEST, AND, OR, XOR instructions. Example:
; -5 - 127 = -132 (not in -128..127)
Algorithm: ; the result of SUB is wrong (124),
; so OF = 1 is set:
if SF = 0 then jump
Example: include 'emu8086.inc'
include 'emu8086.inc'
org 100h
JO label
ORG 100h MOV AL, -5
MOV AL, 00000111b ; AL = 7 SUB AL, 127 ; AL = 7Ch (124)
JNS label OR AL, 0 ; just set flags. JO label1
JNS label1 PRINT 'no overflow.'
PRINT 'signed.' JMP exit
JMP exit label1:
label1: PRINT 'overflow!'
PRINT 'not signed.' exit:
exit: RET
RET C Z S O P A
C Z S O P A
unchanged
unchanged

Short Jump if Parity (even). Only 8 low bits of result are checked.
Short Jump if Not Zero (not equal). Set by CMP, SUB, ADD, Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.
TEST, AND, OR, XOR instructions.
Algorithm:
Algorithm:
if PF = 1 then jump
if ZF = 0 then jump Example:
Example: include 'emu8086.inc'
include 'emu8086.inc' JP label
JNZ label ORG 100h
ORG 100h MOV AL, 00000101b ; AL = 5
MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags.
OR AL, 0 ; just set flags. JP label1
JNZ label1 PRINT 'parity odd.'
PRINT 'zero.' JMP exit
JMP exit label1:
label1: PRINT 'parity even.'
PRINT 'not zero.' exit:
RET
C Z S O P A
unchanged Short Jump if Signed (if negative). Set by CMP, SUB, ADD, TEST,
AND, OR, XOR instructions.

Algorithm:
Short Jump if Parity Even. Only 8 low bits of result are checked.
Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. if SF = 1 then jump
Example:
Algorithm: include 'emu8086.inc'

if PF = 1 then jump ORG 100h

Example: MOV AL, 10000000b ; AL = -128
include 'emu8086.inc' JS label OR AL, 0 ; just set flags.
JS label1
ORG 100h PRINT 'not signed.'
MOV AL, 00000101b ; AL = 5 JMP exit
JPE label OR AL, 0 ; just set flags. label1:
JPE label1 PRINT 'signed.'
PRINT 'parity odd.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'parity even.'
exit: unchanged
RET
C Z S O P A
unchanged Short Jump if Zero (equal). Set by CMP, SUB, ADD, TEST, AND,
OR, XOR instructions.

Algorithm:
Short Jump if Parity Odd. Only 8 low bits of result are checked. Set
by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. if ZF = 1 then jump
Example:
Algorithm: include 'emu8086.inc'

if PF = 0 then jump ORG 100h

Example: MOV AL, 5
include 'emu8086.inc' JZ label CMP AL, 5
JZ label1
ORG 100h PRINT 'AL is not equal to 5.'
MOV AL, 00000111b ; AL = 7 JMP exit
JPO label label1:
OR AL, 0 ; just set flags.
JPO label1 PRINT 'AL is equal to 5.'
PRINT 'parity even.' exit:
JMP exit RET
label1: C Z S O P A
PRINT 'parity odd.'
exit: unchanged
RET
C Z S O P A
unchanged No Load AH from 8 low bits of Flags register.
LAHF
operands
Algorithm:
MOV BX, 35h
AH = flags register MOV DI, 12h
LEA SI, [BX+DI] ; SI = 35h + 12h = 47h
AH bit: 7 6 5 4 3 2 1 0 Note: The integrated 8086 assembler automatically replaces LEA
[SF] [ZF]  [AF]  [PF]  [CF] with a more efficient MOV where possible. For example:
bits 1, 3, 5 are reserved.
org 100h
LEA AX, m ; AX = offset of m
C Z S O P A RET
unchanged m dw 1234h
END

unchanged
Algorithm:

• REG = first word

• DS = second word Load memory double word into word register and ES.

Algorithm:
Example:
• REG = first word
• ES = second word
ORG 100h
REG, LDS AX, m
LDS
memory Example:
RET

m DW 1234h ORG 100h

DW 5678h REG,
LES LES AX, m
memory
END
RET
AX is set to 1234h, DS is set to 5678h.
m DW 1234h
DW 5678h
C Z S O P A
unchanged END

Load Effective Address. C Z S O P A

unchanged
Algorithm:
REG,
LEA
memory • REG = address of memory (offset)
No Load byte at DS:[SI] into AL. Update SI.
LODSB
operands
Example:
Algorithm: REP LODSW ; finally there will be 555h in AX.

RET
• AL = DS:[SI]
• if DF = 0 then a1 dw 111h, 222h, 333h, 444h, 555h
o SI = SI + 1 C Z S O P A
unchanged
else

o SI = SI - 1
Decrease CX, jump to label if CX not zero.
Example:
Algorithm:
ORG 100h
• CX = CX - 1
LEA SI, a1
MOV CX, 5 • if CX <> 0 then
MOV AH, 0Eh o jump

m: LODSB else
INT 10h
LOOP m
o no jump, continue
RET LOOP label
Example:
a1 DB 'H', 'e', 'l', 'l', 'o' include 'emu8086.inc'
C Z S O P A
ORG 100h
unchanged MOV CX, 5
label1:
PRINTN 'loop!'
LOOP label1
Load word at DS:[SI] into AX. Update SI. RET
C Z S O P A
Algorithm:
unchanged

• AX = DS:[SI]
• if DF = 0 then
o SI = SI + 2 Decrease CX, jump to label if CX not zero and Equal (ZF = 1).

else Algorithm:
No
LODSW
operands
o SI = SI - 2 • CX = CX - 1
• if (CX <> 0) and (ZF = 1) then
LOOPE label o jump
Example:

ORG 100h else

LEA SI, a1
MOV CX, 5 o no jump, continue
Example: C Z S O P A
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255 unchanged
; on third loop (100+100+100),
; so loop will exit.

ORG 100h Algorithm:

MOV AX, 0
MOV CX, 5
label1: • CX = CX - 1
PUTC '*' • if (CX <> 0) and (ZF = 0) then
ADD AX, 100 o jump
CMP AH, 0
LOOPE label1 else
RET
C Z S O P A
o no jump, continue
unchanged
Example:
; Loop until '7' is found,
; or 5 times.
Decrease CX, jump to label if CX not zero and Not Equal (ZF = 0). LOOPNZ label
include 'emu8086.inc'
Algorithm:
ORG 100h
• CX = CX - 1 MOV SI, 0
MOV CX, 5
• if (CX <> 0) and (ZF = 0) then label1:
o jump PUTC '*'
MOV AL, v1[SI]
else INC SI ; next byte (SI=SI+1).
CMP AL, 7
LOOPNZ label1
o no jump, continue RET
v1 db 9, 8, 7, 6, 5
Example: C Z S O P A
LOOPNE label ; Loop until '7' is found,
; or 5 times. unchanged

include 'emu8086.inc'

ORG 100h Decrease CX, jump to label if CX not zero and ZF = 1.

MOV SI, 0
MOV CX, 5 Algorithm:
label1:
PUTC '*'
MOV AL, v1[SI] • CX = CX - 1
LOOPZ label
INC SI ; next byte (SI=SI+1). • if (CX <> 0) and (ZF = 1) then
CMP AL, 7 o jump
LOOPNE label1
RET else
v1 db 9, 8, 7, 6, 5
o no jump, continue Copy byte at DS:[SI] to ES:[DI]. Update SI and DI.

Algorithm:
Example:
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255 • ES:[DI] = DS:[SI]
; on third loop (100+100+100), • if DF = 0 then
; so loop will exit. o SI = SI + 1
o DI = DI + 1
include 'emu8086.inc'

ORG 100h else

MOV AX, 0
MOV CX, 5 o SI = SI - 1
label1: o DI = DI - 1
PUTC '*'
CMP AH, 0 No Example:
MOVSB
LOOPZ label1 operands
RET ORG 100h
C Z S O P A
CLD
unchanged LEA SI, a1
LEA DI, a2
MOV CX, 5
REP MOVSB
Copy operand2 to operand1.
RET
The MOV instruction cannot:
a1 DB 1,2,3,4,5
a2 DB 5 DUP(0)
• set the value of the CS and IP registers.
C Z S O P A
REG, • copy value of one segment register to another segment
memory register (should copy to general register first). unchanged
memory, • copy immediate value to segment register (should copy
REG to general register first).
REG, REG
memory, Copy word at DS:[SI] to ES:[DI]. Update SI and DI.
immediate
Algorithm: Algorithm:
REG,
immediate
MOV operand1 = operand2
SREG, Example: • ES:[DI] = DS:[SI]
memory • if DF = 0 then
memory, ORG 100h o SI = SI + 2
SREG MOV AX, 0B800h ; set AX = B800h (VGA memory). No o DI = DI + 2
MOV DS, AX ; copy value of AX to DS. MOVSW
REG, operands
SREG MOV CL, 'A' ; CL = 41h (ASCII code).
else
SREG, MOV CH, 01011111b ; CL = color attribute.
REG MOV BX, 15Eh ; BX = position on screen.
MOV [BX], CX ; w.[0B800h:015Eh] = CX. o SI = SI - 2
RET ; returns to operating system. o DI = DI - 2
C Z S O P A
unchanged Example:
ORG 100h No Operation.

CLD Algorithm:
LEA SI, a1
LEA DI, a2
MOV CX, 5 • Do nothing
REP MOVSW
Example:
RET No ; do nothing, 3 times:
NOP
operands NOP
a1 DW 1,2,3,4,5 NOP
a2 DW 5 DUP(0) NOP
C Z S O P A RET

unchanged C Z S O P A
unchanged

Unsigned multiply.
Invert each bit of the operand.
Algorithm:
Algorithm:
when operand is a byte:
AX = AL * operand.
when operand is a word:
• if bit is 1 turn it to 0.
(DX AX) = AX * operand. • if bit is 0 turn it to 1.
REG REG
MUL memory Example: NOT memory
MOV AL, 200 ; AL = 0C8h Example:
MOV BL, 4 MOV AL, 00011011b
MUL BL ; AX = 0320h (800) NOT AL ; AL = 11100100b
RET RET
C Z S O P A C Z S O P A

r ? ? r ? ? unchanged
CF=OF=0 when high section of the result is zero.

Negate. Makes operand negative (two's complement). Logical OR between all bits of two operands. Result is stored in
first operand.
Algorithm:
These rules apply:
REG,
• Invert all bits of the operand memory 1 OR 1 = 1
• Add 1 to inverted operand memory, 1 OR 0 = 1
REG 0 OR 1 = 1
REG OR REG, REG 0 OR 0 = 0
NEG memory Example: memory,
MOV AL, 5 ; AL = 05h immediate
NEG AL ; AL = 0FBh (-5) REG, Example:
NEG AL ; AL = 05h (5) immediate MOV AL, 'A' ; AL = 01000001b
RET OR AL, 00100000b ; AL = 01100001b ('a')
C Z S O P A RET
r r r r r r C Z S O P A
0 r r 0 r ? • POP DX
• POP CX
• POP AX

Output from AL or AX to port.

First operand is a port number. If required to access port number C Z S O P A
over 255 - DX register should be used. unchanged
im.byte, Example:
AL MOV AX, 0FFFh ; Turn on all
im.byte, OUT 4, AX ; traffic lights.
OUT Get flags register from the stack.
AX
DX, AL MOV AL, 100b ; Turn on the third
OUT 7, AL ; magnet of the stepper-motor. Algorithm:
DX, AX
C Z S O P A
• flags = SS:[SP] (top of the stack)
unchanged No
POPF
operands • SP = SP + 2

C Z S O P A
Get 16 bit value from the stack.
popped
Algorithm:

• operand = SS:[SP] (top of the stack) Store 16 bit value in the stack.
• SP = SP + 2
Note: PUSH immediate works only on 80186 CPU and later!
REG
POP SREG Algorithm:
Example:
memory
MOV AX, 1234h
PUSH AX • SP = SP - 2
POP DX ; DX = 1234h
REG • SS:[SP] (top of the stack) = operand
RET
SREG
C Z S O P A PUSH
memory
unchanged immediate Example:
MOV AX, 1234h
PUSH AX
POP DX ; DX = 1234h
Pop all general purpose registers DI, SI, BP, SP, BX, DX, CX, AX RET
from the stack. C Z S O P A
SP value is ignored, it is Popped but not set to SP register).
unchanged
Note: this instruction works only on 80186 CPU and later!

No Algorithm:
POPA Push all general purpose registers AX, CX, DX, BX, SP, BP, SI, DI
operands
in the stack.
• POP DI No Original value of SP register (before PUSHA) is used.
PUSHA
• POP SI operands
• POP BP Note: this instruction works only on 80186 CPU and later!
• POP xx (SP value ignored)
• POP BX
Algorithm: OF=0 if first operand keeps original sign.

• PUSH AX Rotate operand1 right through Carry Flag. The number of rotates is
• PUSH CX set by operand2.
• PUSH DX
Algorithm:
• PUSH BX
• PUSH SP memory,
shift all bits right, the bit that goes off is set to CF and
• PUSH BP immediate
previous value of CF is inserted to the left-most position.
• PUSH SI REG,
immediate
• PUSH DI RCR Example:
STC ; set carry (CF=1).
memory,
MOV AL, 1Ch ; AL = 00011100b
C Z S O P A CL
RCR AL, 1 ; AL = 10001110b, CF=0.
REG, CL
unchanged RET
C O
r r

Store flags register in the stack. OF=0 if first operand keeps original sign.

Algorithm:
Repeat following MOVSB, MOVSW, LODSB, LODSW, STOSB,
STOSW instructions CX times.
• SP = SP - 2
No
PUSHF
operands • SS:[SP] (top of the stack) = flags Algorithm:

check_cx:
C Z S O P A
if CX <> 0 then
unchanged

• do following chain instruction

chain • CX = CX - 1
REP
Rotate operand1 left through Carry Flag. The number of rotates is instruction • go back to check_cx
set by operand2.
When immediate is greater then 1, assembler generates several
RCL xx, 1 instructions because 8086 has machine code only for else
this instruction (the same principle works for all other shift/rotate
instructions). • exit from REP cycle
memory, Algorithm:
immediate Z
REG,
shift all bits left, the bit that goes off is set to CF and r
immediate
RCL previous value of CF is inserted to the right-most
position.
memory,
CL
Example:
REG, CL Repeat following CMPSB, CMPSW, SCASB, SCASW instructions
STC ; set carry (CF=1).
while ZF = 1 (result is Equal), maximum CX times.
MOV AL, 1Ch ; AL = 00011100b
RCL AL, 1 ; AL = 00111001b, CF=0. chain
REPE Algorithm:
RET instruction
C O check_cx:
r r
if CX <> 0 then r

• do following chain instruction

• CX = CX - 1
Repeat following CMPSB, CMPSW, SCASB, SCASW instructions
• if ZF = 1 then:
while ZF = 0 (result is Not Zero), maximum CX times.
o go back to check_cx
Algorithm:
else
check_cx:
o exit from REPE cycle
if CX <> 0 then

else
• do following chain instruction
• CX = CX - 1
• exit from REPE cycle
• if ZF = 0 then:
o go back to check_cx
Example: chain
REPNZ
see cmpsb.asm in c:\emu8086\examples\. instruction
else

Z o exit from REPNZ cycle

r
else

Repeat following CMPSB, CMPSW, SCASB, SCASW instructions • exit from REPNZ cycle
while ZF = 0 (result is Not Equal), maximum CX times.

Algorithm: Z
r
check_cx:

if CX <> 0 then
Repeat following CMPSB, CMPSW, SCASB, SCASW instructions
• do following chain instruction while ZF = 1 (result is Zero), maximum CX times.
• CX = CX - 1 Algorithm:
• if ZF = 0 then:
chain
REPNE
instruction
o go back to check_cx check_cx:

else if CX <> 0 then

chain
REPZ
instruction
o exit from REPNE cycle • do following chain instruction
• CX = CX - 1
else • if ZF = 1 then:
o go back to check_cx
• exit from REPNE cycle
else

Z
o exit from REPZ cycle unchanged

else

Rotate operand1 left. The number of rotates is set by operand2.

• exit from REPZ cycle
Algorithm:
Z memory,
immediate shift all bits left, the bit that goes off is set to CF and the
r REG, same bit is inserted to the right-most position.
immediate Example:
ROL
MOV AL, 1Ch ; AL = 00011100b
memory, ROL AL, 1 ; AL = 00111000b, CF=0.
Return from near procedure. CL RET
REG, CL C O
Algorithm:
r r
• Pop from stack: OF=0 if first operand keeps original sign.
o IP
• if immediate operand is present: SP = SP + operand Rotate operand1 right. The number of rotates is set by operand2.

Example: Algorithm:
memory,
ORG 100h ; for COM file. immediate shift all bits right, the bit that goes off is set to CF and the
No
operands REG, same bit is inserted to the left-most position.
RET CALL p1 immediate Example:
or even ROR
immediate MOV AL, 1Ch ; AL = 00011100b
ADD AX, 1 memory, ROR AL, 1 ; AL = 00001110b, CF=0.
CL RET
RET ; return to OS. REG, CL C O
p1 PROC ; procedure declaration. r r
MOV AX, 1234h OF=0 if first operand keeps original sign.
p1 ENDP
C Z S O P A Store AH register into low 8 bits of Flags register.
unchanged Algorithm:

flags register = AH
Return from Far procedure. AH bit: 7 6 5 4 3 2 1 0
No
SAHF [SF] [ZF]  [AF]  [PF]  [CF]
operands
Algorithm: bits 1, 3, 5 are reserved.
No
operands • Pop from stack: C Z S O P A
RETF o IP
or even r r r r r r
immediate o CS
• if immediate operand is present: SP = SP + operand

C Z S O P A SAL memory, Shift Arithmetic operand1 Left. The number of shifts is set by
immediate operand2. C Z S O P A
REG,
immediate Algorithm: r r r r r r

memory,
CL • Shift all bits left, the bit that goes off is set to CF.
REG, CL • Zero bit is inserted to the right-most position. Compare bytes: AL from ES:[DI].

Example: Algorithm:
MOV AL, 0E0h ; AL = 11100000b
SAL AL, 1 ; AL = 11000000b, CF=1. • ES:[DI] - AL
RET
• set flags according to result:
C O OF, SF, ZF, AF, PF, CF
r r • if DF = 0 then
OF=0 if first operand keeps original sign. No o DI = DI + 1
SCASB
operands
else
Shift Arithmetic operand1 Right. The number of shifts is set by
operand2.
o DI = DI - 1
Algorithm:
C Z S O P A
• Shift all bits right, the bit that goes off is set to CF. r r r r r r
memory, • The sign bit that is inserted to the left-most position has
immediate the same value as before shift.
REG,
immediate Example: Compare words: AX from ES:[DI].
SAR
MOV AL, 0E0h ; AL = 11100000b
memory, SAR AL, 1 ; AL = 11110000b, CF=0. Algorithm:
CL
REG, CL MOV BL, 4Ch ; BL = 01001100b
SAR BL, 1 ; BL = 00100110b, CF=0. • ES:[DI] - AX
• set flags according to result:
RET OF, SF, ZF, AF, PF, CF
C O • if DF = 0 then
No o DI = DI + 2
r r SCASW
operands
OF=0 if first operand keeps original sign. else

Subtract with Borrow. o DI = DI - 2

REG,
Algorithm:
memory C Z S O P A
memory,
operand1 = operand1 - operand2 - CF r r r r r r
REG
SBB REG, REG
Example:
memory,
STC
immediate
MOV AL, 5 Shift operand1 Left. The number of shifts is set by operand2.
REG, memory,
SBB AL, 3 ; AL = 5 - 3 - 1 = 1
immediate immediate
SHL Algorithm:
REG,
RET
immediate
• Shift all bits left, the bit that goes off is set to CF. D
memory,
CL • Zero bit is inserted to the right-most position. 1
REG, CL
Example:
MOV AL, 11100000b
SHL AL, 1 ; AL = 11000000b, CF=1. Set Interrupt enable flag. This enables hardware interrupts.

RET Algorithm:
C O
No IF = 1
r r STI
operands
OF=0 if first operand keeps original sign. I
1
Shift operand1 Right. The number of shifts is set by operand2.

Algorithm:
Store byte in AL into ES:[DI]. Update DI.
memory, • Shift all bits right, the bit that goes off is set to CF.
Algorithm:
immediate • Zero bit is inserted to the left-most position.
REG,
SHR
immediate
Example: • ES:[DI] = AL
MOV AL, 00000111b • if DF = 0 then
memory, o DI = DI + 1
SHR AL, 1 ; AL = 00000011b, CF=1.
CL
REG, CL
RET else
C O
r r o DI = DI - 1
OF=0 if first operand keeps original sign.
Example:
No
STOSB
Set Carry flag. operands
ORG 100h

Algorithm: LEA DI, a1

MOV AL, 12h
No CF = 1 MOV CX, 5
STC
operands
REP STOSB
C
1 RET

a1 DB 5 dup(0)
C Z S O P A
Set Direction flag. SI and DI will be decremented by chain
instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, unchanged
MOVSW, STOSB, STOSW.
No
STD Algorithm:
operands
No Store word in AX into ES:[DI]. Update DI.
STOSW
DF = 1 operands
Algorithm: REG, 0 AND 1 = 0
immediate 0 AND 0 = 0
• ES:[DI] = AX
• if DF = 0 then Example:
o DI = DI + 2 MOV AL, 00000101b
TEST AL, 1 ; ZF = 0.
else TEST AL, 10b ; ZF = 1.
RET

o DI = DI - 2 C Z S O P
0 r r 0 r
Example:

ORG 100h
Exchange values of two operands.
LEA DI, a1
MOV AX, 1234h Algorithm:
MOV CX, 5
operand1 < - > operand2
REP STOSW
REG, Example:
memory MOV AL, 5
RET
XCHG memory, MOV AH, 2
REG XCHG AL, AH ; AL = 2, AH = 5
a1 DW 5 dup(0)
REG, REG XCHG AL, AH ; AL = 5, AH = 2
C Z S O P A
RET
unchanged C Z S O P A
unchanged

Subtract.

Algorithm: Translate byte from table.

REG, Copy value of memory byte at DS:[BX + unsigned AL] to AL
memory operand1 = operand1 - operand2 register.
memory,
REG Example: Algorithm:
SUB REG, REG MOV AL, 5
memory, SUB AL, 1 ; AL = 4 AL = DS:[BX + unsigned AL]
immediate
REG, RET Example:
immediate C Z S O P A
No ORG 100h
r r r r r r XLATB LEA BX, dat
operands
MOV AL, 2
XLATB ; AL = 33h

REG, Logical AND between all bits of two operands for flags only. These RET
memory flags are effected: ZF, SF, PF. Result is not stored anywhere.
memory, dat DB 11h, 22h, 33h, 44h, 55h
TEST REG These rules apply: C Z S O P A
REG, REG
memory, 1 AND 1 = 1 unchanged
immediate 1 AND 0 = 0
Logical XOR (Exclusive OR) between all bits of two operands.
Result is stored in first operand.

These rules apply:

REG, 1 XOR 1 = 0
memory 1 XOR 0 = 1
memory, 0 XOR 1 = 1
REG 0 XOR 0 = 0
XOR REG, REG
memory,
immediate Example:
REG, MOV AL, 00000111b
immediate XOR AL, 00000010b ; AL = 00000101b
RET
C Z S O P A
0 r r 0 r ?