An Integrated Analog Lock-In Amplifier for Low-Voltage Low-Frequency Sensor Interface
A. De Marcellis1, G. Ferri1, M. Patrizi1, V. Stornelli1, A. D’Amico2, C. Di Natale2, E. Martinelli2, A. Alimelli3, R.Paolesse3
1
Department of Electrical and Information Engineering, University of L’Aquila, Monteluco di Roio, 67040 L’Aquila, Italy
Tel.:+390862434446, Fax: +390862434403; ferri@ing.univaq.it
2
Department of Electronic Engineering, University of Tor Vergata, 00133 Roma, Italy
3
Department of Chemical Science and Technology, University of Tor Vergata, 00133 Roma, Italy
Abstract
In this paper we propose a low single supply voltage (2V)
analog lock-in amplifier, completely integrable on silicon,
designed in a standard CMOS technology, for electronic
sensor interfaces used in low-frequency applications. In
particular, the proposed architecture is suitable for those
sensor interfaces where the signal to be measured has a small
amplitude and is buried into noise. In these cases, the lock-in
amplifier guarantees the signal recovery from noise (till to 0.1
SNR), provided that the generated small signal, coming from
sensor, has a fixed and well-known frequency. Together with
the integrated solution, waiting for the chip fabrication, we
have built a discrete element board, with commercial
components, for preliminary experiments which confirm the
validity of the proposed lock-in system, since it is able to
detect, for example, very small quantities of carbon monoxide
(CO).
Introduction
A sensor, converting physical or chemical phenomenons
into electrical signals, responds to natural stimulus through an
electrical signal, which, in some cases, can present an
extremely small amplitude. In fact, in some sensor
applications, the signal to be measured is very small and
sometimes is lower than noise level. In these cases, a linear
filtering operation is not sufficient to extract the signal
information, so special techniques have to be adopted. Among
these, we have: lock-in amplifiers (analog or digital),
waveform averagers (such as signal averagers, box car
integrators and waveform eductors), auto-correlators and
cross-correlators. All these solutions, even if operating with
different strategies, apply the same fundamental approach,
which consists of reducing, as much as possible, the noise
bandwidth [1].
The lock-in amplifier is a signal recovery instrument,
utilized mainly in optics but also in those applications where
the noisy signal, generated by the sensor, has a fixed and well-
known frequency (reference frequency) [2]. Commercial lock-
in amplifiers [3-6] are very expensive and absolutely not
suitable for portable applications that utilize a single-cell
battery, as well as digital solutions, based on Digital Signal
Processor (DSP), need a very large silicon area [7] in an
integrated implementation.
1-4244-1245-5/07/$25.00 ©2007 IEEE
For this reason we here propose an analog lock-in
amplifier, powered by a low single supply voltage (2V),
completely integrable on silicon, designed in a standard
CMOS technology (AMS 0.35µm). The proposed architecture
has been optimized to operate at three different reference
frequencies (11Hz, 17Hz and 77Hz), so to avoid any kind of
interference with 50 Hz net frequency and its harmonics.
Furthermore, waiting for the chip fabrication, we have also
built a lock-in system through a discrete element board, which
utilizes low-cost commercial components and working only at
77 Hz. Experimental results performed on this board have
confirmed the correct functionality of the complete system,
which is suitable for integrated front-ends where very small
quantities of sensor signal have to be detected.
The Lock-In Amplifier
Lock-in amplifiers are a special kind of AC voltmeters
which measure the amplitude of an AC signal at a reference
frequency, f0, even when the power of this input signal is
extremely small and, eventually, smaller than the power of
environmental interferences. Figure 1 shows the block scheme
of the proposed lock-in amplifier, completely developed with
analog blocks. The circuit topology uses a phase-sensitive
detection strategy which allows to measure the amplitude and
phase of a noisy signal, being an AC input signal known. In
this way the system reduces the noise bandwidth through a
synchronous detection which needs the knowledge of the
useful signal frequency, f0. In particular, the lock-in amplifier
output voltage is a DC signal proportional to the component
amplitude of the input small signal which has the same
frequency of the reference signal. Referring to the block
scheme of the proposed lock-in amplifier, shown in Figure 1,
it is possible to highlight two different channels: the input
signal channel and the reference signal channel. The first
active block, which processes the input signal, is a Low Noise
Amplifier (LNA). It provides an high DC gain, adding noise,
as small as possible, to the input signal. In order to achieve
better performances, its DC gain can be simply set through
external variable components. Generally, the signal of interest
may be contaminated by a wide-band additive disturb, due to
various interferences and noise processes. Since the spectrum
of the signal of interest is zero for all frequencies but f0, a
suitable band-pass filter, whose center frequency is exactly f0,
might greatly increase the SNR.

Figure 1. Block scheme of the proposed lock-in amplifier architecture.
Upper path: input signal channel. Lower path: reference signal channel.
Therefore, the second active block in the input signal
channel is a band-pass filter which removes the noise
contribution at all the frequencies except at f0. However, for a
significant signal to noise ratio (SNR) enhancement, the
quality factor Q of the band-pass filter should be very large
even if it can be extremely difficult to tune its center
frequency.
In the reference channel, different phase shifters must be
used in order to both null and put in quadrature the phase
difference between the reference signal and the signal coming
from the sensor. As depicted in Figure 1, the relative phase of
reference signal can be easily synchronized with the input
signal through two active blocks: a tunable phase shifter and a
90° fixed phase shifter. In this way, the next block, a mixer or
Phase-Sensitive Detector (PSD), generates a periodic signal,
whose DC component is proportional to the amplitude of AC
input signal and depends from mentioned phase difference.
The signal generated by the mixer may easily be extracted by
means of a suitable low-pass filter, which represents the final
block of the complete system. In order to pull out exactly the
DC component, from periodic signal generated by the mixer,
an accurate design of a low-pass active filter, having a very
low cut-off frequency, is necessary. Therefore, neglecting the
band-pass filtering, the lock-in quality factor Q can be
expressed as following:
f0
Q=
∆f
where ∆f is the band-width of the low-pass filter. The SNR
improvement, achieved through the use of the lock-in
amplifier, is the ratio between the SNR at the lock-in output
and the SNR at its input. For this particular SNR enhancement
system, each basic block can be opportunely integrated, so to
design a lock-in amplifier into a single chip, suitable for
portable sensor applications.
The integrated solution
The proposed analog system has been designed for
operating at three different reference frequencies (11Hz, 17Hz
and 77Hz), which have been chosen so to reduce, as much as
possible, any kind of interference with the 50 Hz net supply
oscillation frequency and its harmonics. In the architecture
here proposed, shown in Figure 1, the low amplitude signal
embedded in noise, coming from the sensor, is amplified
through an AC differential amplifier, whose block scheme is
depicted in Figure 2. This amplifier provides a very high DC
gain and a small input equivalent noise level. In order to
achieve better performances, it has been implemented by three
LNAs, opportunely connected, as shown in Figure 2.
Moreover, its DC gain can be simply set through the external
variable resistance Rgain (see Figure 2). Each employed LNA
has the internal topology shown in Figure 3, which allows, at
77 Hz reference frequency, a 23nV/Hz½ equivalent input
noise to be obtained. Consequently, the complete differential
instrumentation AC amplifier has a 34nV/Hz½ equivalent
input noise, for a 92dB fixed DC gain. The second active
element, in the input signal channel, is a band-pass filter,
whose implemented block scheme is shown in Figure 4.
Through a single active component, an LNA also in this case,
three different second order band-pass filters have been
implemented, each one having a specific central frequency,
relatively to the three lock-in operating frequencies (11Hz,
17Hz and 77Hz). Each of them can be separately activated,
through external switches, and performs a quality factor Q of
about 2. This allows to reduces errors or problems due to the
variation of the central frequency owed to the technologic
spread, while the maximum voltage gain at central frequency
is next to the unit. Then, after the band-pass filter, the
resulting input signal is combined into a mixer with a
reference signal having, as mentioned, the same frequency but
a different phase. In order both to null and put in quadrature
the phase difference between mixer input signals, a tunable
phase shifter and a 90° fixed phase shifter have been
implemented so to easily synchronize the mixer inputs. Both
these blocks have been designed utilizing a traditional internal
circuit topology, based on the cascade of two Push-Pull stages
and the capacitance charge-discharge effect.
(1)
Figure 2. Differential instrumentation amplifier.

Figure 3. Internal topology of LNA.
In particular, the phase tuning can be easily obtained by
varying an external voltage which acts on the tunable phase
shifter, so tuning the current flowing into the capacitance.
Figure 5 shows the block scheme of the implemented
mixer, which utilizes an LNA as main active device, and two
analog switches. These latter are controlled by the reference
square wave signal, through two control lines in phase-
opposition. Finally, the mixer is followed by an active low-
pass filter having a very low cut-off frequency (in the mHz
range), related to the desired SNR, which reduces the noise
contribution through a DC extraction.
Figure 4. Block scheme of the active Band-Pass filter.
Figure 5. Block scheme of the Mixer (PSD).
Figure 6. Block scheme of a single Gm-C cell employed for
the Low-Pass filter implementation.
The implemented active filter is based on a
Transconductance active block (Gm), which, together with a
capacitance C, allows to obtain a Gm-C integrator cell, as it
shown in Figure 6. A fourth order low-pass filter has been
simply obtained by cascading four Gm-C cells, achieving a
cut-off frequency of about 1.3 mHz, with all the CGm equal to
100 pF which corresponds to the maximum integrable value,
considering the utilized CMOS technology. In Figure 7 the
internal topology of the employed Transconductance blocks
are reported. In order to obtain a filter with a very low cut-off
frequency, the Gm block has been designed employing a
Three Input Amplifier (TIA) [8]. Figure 8 shows the circuit
schematic at transistor level, of the designed TIA which
allows to achieve very low Gm values and, consequently,
better performances in terms of DC extraction. The filter
output, in this manner, is a DC voltage whose level is
proportional to the amplitude of the input signal and depends
on the reference signal phase. Since all the lock-in blocks have
been internally designed, at transistor level, in a standard
CMOS technology and supplied at 2V, a complete integrated
solution has been achieved.
Figure 7. Internal topology of the Gm block.
 Through this scheme, we are aimed to detect very small
RSENS variations. More in details, the measurement results
operated by prototype board are reported in Table 1. It shows
the capability of the system to reveal with success an input
voltage signal of only 350 nV. Furthermore, the fabricated
board has been utilized to detect the presence of a gas, fluxed
into a chamber (see Figure 14). In particular, for preliminary
experimental measurements, we have utilized a commercial
resistive gas sensor (FIGARO TGS 2600) to which we have
fluxed, for 5 minutes, carbon-monoxide (CO), at different
concentrations, alternating it with a 15-minutes cleaning
nitrogen (N) flux. In Figure 15 the system time response is
shown, considering the signal output of the lock-in prototype
(A, B) and the voltage signal (C, D) at the output node of the
first conditioning block (resistive voltage divider), according
to Table 2. This has allowed us to estimate the sensor
resistance value and its variation under the presence of 2.5
ppm and 5 ppm of CO.

Figure 8. The designed TIA circuit schematic at transistor level.

Preliminary Experimental Results

As previously mentioned, a prototype board, whose
photograph is reported in Figure 9, has been fabricated for
preliminary analysis. Figure 10 and Figure 11 depict the
measured mixer output signals (when the input sensor signal
and the reference are “in-phase” and “in-quadrature”,
respectively) to be filtered by the final low-pass module,
implemented by cascading two Miller integrators, having a Figure 10. Measurement results at the mixer output (right) of Figure 4
cut-off frequency equal to 980mHz. Their output signals are for in-phase input and reference signals (left).
shown in Figure 12, for the two mentioned particular cases.
The designed analog lock-in system has been proved to
recover with success the signal from the noise till to 0.1 SNR
without performance degradation. In Figure 13 the
measurement system, comprehensive of the input conditioning
passive circuit with the “equivalent” sensor resistance (RSENS),
is shown. In this figure, VREF is a 77 Hz sinusoidal wave, the
same frequency of the voltage excitation signal, VECC.

Figure 11. Measurement results at the mixer output (right) of Figure 4

for in-quadrature input and reference signals (left).

Figure 12. Measurement results at the Low-Pass filter output

Figure 9. The fabricated prototype lock-in board. for in-phase (left, about 330mV ) and in-quadrature (right, 0V)
input and reference signals.
 Measured Calculated
VECC p-p VIN p-p
RL GAIN VOUT VOUT
[V] [V]
[Ω
Ω] [V] [V]
9.86 K 30 m 5691 52.17 µ 98.4 m 94.5 m
9.86 K 10 m 5691 17.39 µ 28.6 m 31.5 m
9.86 K 2m 5691 3.48 µ 7.2 m 6.3 m
0.99 K 2m 34142 0.350 µ 2.8 m 3.8 m
Table 1. Measurement results with the fabricated prototype,
for RSENS equal to 5.66MΩ.

Figure 13. Measurement scheme for the proposed lock-in.

CO Measured
Estimated
- Concentration Voltage
RSENS [KΩ Ω]
[ppm] [mV]
- Lock-in output
Before A N cleaning 48 31.43
A 2.5 175 8.55
Before B N cleaning 44 34.3
B 5 314 4.72
After B N cleaning 34 44.41
- Output of resistive voltage divider
Before C N cleaning 16 31.09
C 5 89 5.51
Before D N cleaning 15 33.17
D 2.5 45 10.99
After D N cleaning 15 33.17

Table 2. Experimental measures with the fabricated board with relative

RSENS estimation (see Figure 15).
Figure 14. Photo of the utilized experimental apparatus.

Acknowledgments
This work has been supported by PRIN Project N°
2005092937.

Figure 15. Revealed system time response.
Conclusions
We have developed a low-voltage analog lock-in amplifier
completely integrable on silicon, designed in a standard
CMOS technology, suitable for sensor interface applications
powered at single-cell battery. The main advantage of the
proposed lock-in concerns its utilization in portable
instrumentations and in those front-end applications where the
signal to reveal, coming from a sensor, is very weak and/or
buried into noise. The designed system allows to enhance the
SNR, so to improve the minimal resolution of the front-end
sensor, allowing the detection of very small sensor variations,
corresponding to a reduced quantity of gas.
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