Lenovo V310-14ISK, V310-15ISK DA0LV6MB6F0 PDF

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Intel Skylake-U Platform Block Diagram (Windows) 01

DDR4 Memory Down MA
AMD dGPU VRAM DDR3L
A
DDR4 SO-DIMM X1 MB 1866-2133 MT/s PCIE Gen3*4 R16M-M1-30 A
2Gb/4Gb *4
S3
USB3.0 (5Gb/s)*2
eDP Conn(30pin) eDP 2 Lanes
FHD support USB 3.0 Port*2
USB2.0 (480Mb/s)*2
HD Camera USB2.0 (480Mb/s)

PCIE Gen2 *1(5Gb/s) 1G Ethernet
DMIC
RTL8111H
HDMI Conn HDMI (1.65Gb/s) Intel
USB2.0 (480Mb/s) Card Reader
SATA Gen3 (6Gb/s) Skylake-U SoC RTS5170
4-in-1(SD/SDHC/SDXC/MMC) CONN
HDD
B
SATA Gen3 (6Gb/s)

15W B
USB2.0 (480Mb/s) NGFF Slot WLAN+BT

ODD Module
SATA Gen3 (6Gb/s) PCIE Gen2 (5Gb/s) M.2 2230
M.2 NGFF SSD BGA 1356 DP to VGA
PCIE Gen3 * 4
DP 4 Lanes RTD2166-CG
Size : 42x24(mm) DP SW
HP/Mic Audio HDA PS8338B
Combo Jack
AUDIO CODEC USB3.0 (5Gb/s)
Speaker L/R Lenovo
ALC3240 USB2.0 (480Mb/s) Onelink+
Connector
(Cable
Docking)
C C
USB2.0 (480Mb/s)
Finger print Sensor USB2.0 (480Mb/s)
SPI USB 2.0 Port*2
SPI Flash(16MB) USB2.0 (480Mb/s) AOU5 Charger
W25Q128FWSSIG TPS2546RTER
TPM 1.2 24MHz 32.768KHz

ST33HTPM2E32AAB9 LPC
SCAN MATRIX
K/B Hall Sensor
EC(ITE)
EM-1791
SMBus IT8886
D Thermal Sensor D
( 1local +2 remote) W83773G

WRST# SMBus PS/2
CPU PTC Circuit T/P

Quanta Computer Inc.
Charger Battery Synaptics PROJECT : LV6
Size Document Number Rev
1A
RV310 Block Diagram
1
Place near CPU 2 3 4 5 6 7
Date: Friday, March 11, 2016 Sheet
8
1 of 61
5 4 3 2 1
02
{4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
{4,6,53,56} +VCCIO
{4,5,6,9,45,53,56} +VCCSTPLL
U38A SKL_ULT ? Need apply PN

IN_D2# E55 C47 INT_EDP_TXN0
{26} IN_D2# DDI1_TXN[0] EDP_TXN[0] INT_EDP_TXN0 {25}
IN_D2 F55 C46 INT_EDP_TXP0
{26} IN_D2 DDI1_TXP[0] EDP_TXP[0] INT_EDP_TXP0 {25}
D IN_D1# E58 D46 INT_EDP_TXN1 Reserve EDP_HPD opposites circuit! D
{26} IN_D1# INT_EDP_TXN1 {25}
HDMI {26}
{26}
IN_D1
IN_D0#
IN_D1
IN_D0#
IN_D0
F58
F53
DDI1_TXN[1]
DDI1_TXP[1]
DDI1_TXN[2]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
C45
A45
INT_EDP_TXP1
INT_EDP_TXP1 {25}
+3V
{26} IN_D0 G53 B45
IN_CLK# F56 DDI1_TXP[2] EDP_TXP[2] A47
{26} IN_CLK# DDI1_TXN[3] EDP_TXN[3]
IN_CLK G56 B47
{26} IN_CLK DDI1_TXP[3] EDP_TXP[3] R200
DOCK_DDI2_TXN0 C50 E45 INT_EDP_AUXN
{40} DOCK_DDI2_TXN0 DDI2_TXN[0] DDI EDP_AUXN INT_EDP_AUXN {25}
DOCK_DDI2_TXP0 D50 EDP F45 INT_EDP_AUXP
{40} DOCK_DDI2_TXP0 DDI2_TXP[0] EDP_AUXP INT_EDP_AUXP {25}
DOCK_DDI2_TXN1 C52
{40} DOCK_DDI2_TXN1 DDI2_TXN[1]
DOCK_DDI2_TXP1 D52 B52 *10K_4
{40} DOCK_DDI2_TXP1
DOCK DP {40}
{40}
DOCK_DDI2_TXN2
DOCK_DDI2_TXP2
DOCK_DDI2_TXN2
DOCK_DDI2_TXP2
DOCK_DDI2_TXN3
A50
B50
DDI2_TXP[1]
DDI2_TXN[2]
DDI2_TXP[2]
EDP_DISP_UTIL
DDI1_AUXN
G50
EDP_HPD
{40} DOCK_DDI2_TXN3 D51 F50 R199

DOCK_DDI2_TXP3 C51 DDI2_TXN[3] DDI1_AUXP E48 DOCK_DDI2_AUXN
{40} DOCK_DDI2_TXP3 DDI2_TXP[3] DDI2_AUXN DOCK_DDI2_AUXN {40}
F48 DOCK_DDI2_AUXP
DDI2_AUXP DOCK_DDI2_AUXP {40}
G46
DISPLAY SIDEBANDS DDI3_AUXN F46 100K_4
L13 DDI3_AUXP
{26} SDVO_CLK GPP_E18/DDPB_CTRLCLK
L12 L9 PCH_HDMI_HPD
{26} SDVO_DATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 PCH_HDMI_HPD {26}
L7 PCH_DOCK_DP_HPD
GPP_E14/DDPC_HPD1 PCH_DOCK_DP_HPD {40}
N7 L6
R203 2.2K_4 N8 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 N9
+3V GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 L10 EDP_HPD
GPP_E17/EDP_HPD EDP_HPD {25}
N11
N12 GPP_E22/DDPD_CTRLCLK R12 PCH_LVDS_BLON
TP7 GPP_E23/DDPD_CTRLDATA EDP_BKLTEN PCH_LVDS_BLON {25}
R11 PCH_DPST_PWM
EDP_BKLTCTL PCH_DPST_PWM {25}
R175 24.9/F_4 EDP_RCOMP E52 U13 PCH_LCDVCC_EN
+VCCIO EDP_RCOMP EDP_VDDEN PCH_LCDVCC_EN {25}
C SKL_ULT C
1 OF 20 ?
REV = 1 +VCCSTPLL
eDP_COMPIO and ICOMPO signals should be shorted near H_PROCHOT# R590 1K_4
balls and routed with typical impedance <25 mohms
+VCCSTPLL
PM_THRMTRIP#_R R583 1K_4
B2A
U38D ?
SKL_ULT Need apply PN
+VCCIO R601 *51_4 CATERR# D63
EC_PECI A54 CATERR#
{36} EC_PECI PECI
H_PROCHOT# R596 499/F_4 PROCHOT# C65
{36,42,43,45} H_PROCHOT# PROCHOT# JTAG
R762 100/F_4 PM_THRMTRIP#_R C63
{36} PM_THRMTRIP# THERMTRIP#
A65 B61 XDP_TCK0
SKTOCC# PROC_TCK D60 XDP_TDI
B2A CPU MISC PROC_TDI
C55 A61 XDP_TDO
TP34 BPM#[0] PROC_TDO XDP_TMS +VCCIO
D55 C60
TP36 BPM#[1] PROC_TMS XDP_TRST#
B54 B59 TP35
C56 BPM#[2] PROC_TRST#
BPM#[3] B56 XDP_TCK1 XDP_TMS R576 *51_4
B A6 PCH_JTAG_TCK D59 XDP_TDI B
A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI A56 XDP_TDO XDP_TDO R588 51_4
BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 XDP_TMS
TP49 GPP_B3/CPU_GP2 PCH_JTAG_TMS XDP_TRST# XDP_TDI *51_4
AY5 C61 R581
GPP_B4/CPU_GP3 PCH_TRST# A59 XDP_TCK0
R278 49.9/F_4 PROC_POPIRCOMP AT16 JTAGX XDP_TCK0 R602 51_4
R277 49.9/F_4 PCH_OPI_RCOMP AU16 PROC_POPIRCOMP
R620 GT3@49.9/F_4 EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP XDP_TCK1 R603 *51_4
R626 GT3@49.9/F_4 EOPIO_RCOMP H65 OPCE_RCOMP
OPC_RCOMP EC_PECI R792 KBY@330_4
PDC
SKL_ULT ?
4 OF 20 PLACE NEAR CPU
REV = 1
D3A
A A

PROJECT : LV6
1A
SKYLAKE 1/15 eDP/DDI/MISC
Date: Friday, March 11, 2016 Sheet 2 of 61
5 4 3 2 1
5 4 3 2 1
SkyLake ULT Processor (DDR4)

Interleave
{16} M_A_DQSN[7:0]
{16} M_A_DQSP[7:0]
{16} M_A_DQ[63:0]
{17} M_B_DQSN[7:0]
{17} M_B_DQSP[7:0]
{17} M_B_DQ[63:0]
03
{6,16,17,50} +1.2V_SUS
D D
? ?
SKL_ULT SKL_ULT
U38B U38C
AU53 M_A_CLKN0 {16}

Need apply PN
M_A_DQ0 AL71 DDR0_CKN[0] AT53 M_A_DQ32 AY39 AN45
M_A_DQ1 DDR0_DQ[0] DDR0_CKP[0] M_A_CLKP0 {16} M_A_DQ33 DDR0_DQ[32]/DDR1_DQ[0] DDR1_CKN[0] M_B_CLKN0 {17}
AL68 AU55 AW39 AN46 M_B_CLKN1 {17}
M_A_DQ2 AN68 DDR0_DQ[1] DDR0_CKN[1] AT55 TP21 M_A_DQ34 AY37 DDR0_DQ[33]/DDR1_DQ[1] DDR1_CKN[1] AP45
M_A_DQ3 DDR0_DQ[2] DDR0_CKP[1] TP16 M_A_DQ35 DDR0_DQ[34]/DDR1_DQ[2] DDR1_CKP[0] M_B_CLKP0 {17}
AN69 AW37 AP46 M_B_CLKP1 {17}
M_A_DQ4 AL70 DDR0_DQ[3] BA56 M_A_DQ36 BB39 DDR0_DQ[35]/DDR1_DQ[3] DDR1_CKP[1]
M_A_DQ5 DDR0_DQ[4] DDR0_CKE[0] M_A_CKE0 {16} M_A_DQ37 DDR0_DQ[36]/DDR1_DQ[4]
AL69 BB56 BA39 AN56 M_B_CKE0 {17}
M_A_DQ6 AN70 DDR0_DQ[5] DDR0_CKE[1] AW56 TP20 M_A_DQ38 BA37 DDR0_DQ[37]/DDR1_DQ[5] DDR1_CKE[0] AP55
M_A_DQ7 DDR0_DQ[6] DDR0_CKE[2] M_A_DQ39 DDR0_DQ[38]/DDR1_DQ[6] DDR1_CKE[1] M_B_CKE1 {17}
AN71 AY56 BB37 AN55
M_A_DQ8 AR70 DDR0_DQ[7] DDR0_CKE[3] M_A_DQ40 AY35 DDR0_DQ[39]/DDR1_DQ[7] DDR1_CKE[2] AP53
M_A_DQ9 AR68 DDR0_DQ[8] AU45 M_A_DQ41 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR1_CKE[3]
M_A_DQ10 AU71 DDR0_DQ[9] DDR0_CS#[0] AU43 M_A_CS#0 {16} M_A_DQ42 AY33 DDR0_DQ[41]/DDR1_DQ[9] BB42
M_A_DQ11 AU68 DDR0_DQ[10] DDR0_CS#[1] AT45 TP18 M_A_DQ43 AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR1_CS#[0] AY42 M_B_CS#0 {17}
M_A_DQ12 AR71 DDR0_DQ[11] DDR0_ODT[0] AT43 M_A_ODT0_CPU {16} M_A_DQ44 BB35 DDR0_DQ[43]/DDR1_DQ[11] DDR1_CS#[1] BA42 M_B_CS#1 {17}
M_A_DQ13 AR69 DDR0_DQ[12] DDR0_ODT[1] TP12 M_A_DQ45 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR1_ODT[0] AW42 M_B_ODT0_CPU {17}
M_A_DQ14 AU70 DDR0_DQ[13] BA51 M_A_DQ46 BA33 DDR0_DQ[45]/DDR1_DQ[13] DDR1_ODT[1] M_B_ODT1_CPU {17}
M_A_DQ15 AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 M_A_A5 {16} M_A_DQ47 BB33 DDR0_DQ[46]/DDR1_DQ[14] AY48
M_B_DQ0 AF65 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] BA52 M_A_A9 {16} M_B_DQ32 AU40 DDR0_DQ[47]/DDR1_DQ[15] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50 M_B_A5 {17}
M_B_DQ1 AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_A6 {16} M_B_DQ33 AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 M_B_A9 {17}
M_B_DQ2 AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW52 M_A_A8 {16} M_B_DQ34 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48 M_B_A6 {17}
M_B_DQ3 AK64 DDR1_DQ[2]/DDR0_DQ[18] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 M_A_A7 {16} M_B_DQ35 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48 M_B_A8 {17}
M_B_DQ4 AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] AW54 M_A_BG#0 {16} M_B_DQ36 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52 M_B_A7 {17}
M_B_DQ5 AF67 DDR1_DQ[4]/DDR0_DQ[20] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_A12 {16} M_B_DQ37 AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50 M_B_BG#0 {17}
M_B_DQ6 AK67 DDR1_DQ[5]/DDR0_DQ[21] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] BA55 M_A_A11 {16} M_B_DQ38 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48 M_B_A12 {17}
M_B_DQ7 AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 M_A_ACT# {16} M_B_DQ39 AR37 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53 M_B_A11 {17}
C M_B_DQ8 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] TP52 M_B_DQ40 AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52 M_B_ACT# {17} C
M_B_DQ9 AF68 DDR1_DQ[8]/DDR0_DQ[24] AU46 M_B_DQ41 AU33 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG#1 {17}
M_B_DQ10 AH71 DDR1_DQ[9]/DDR0_DQ[25] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU48 M_A_A13 {16} M_B_DQ42 AU30 DDR1_DQ[41]/DDR1_DQ[25] BA43
M_B_DQ11 AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AT46 M_A_CAS# {16} M_B_DQ43 AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AY43 M_B_A13 {17}
M_B_DQ12 AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AU50 M_A_WE# {16} M_B_DQ44 AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44 M_B_CAS# {17}
M_B_DQ13 AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU52 M_A_RAS# {16} M_B_DQ45 AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AW44 M_B_WE# {17}
M_B_DQ14 AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] AY51 M_A_BA#0 {16} M_B_DQ46 AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44 M_B_RAS# {17}
M_B_DQ15 AH69 DDR1_DQ[14]/DDR0_DQ[30] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 M_A_A2 {16} M_B_DQ47 AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AY47 M_B_BA#0 {17}
M_A_DQ16 BB65 DDR1_DQ[15]/DDR0_DQ[31] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] AT50 M_A_BA#1 {16} M_A_DQ48 AY31 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44 M_B_A2 {17}
M_A_DQ17 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 M_A_A10 {16} M_A_DQ49 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AW46 M_B_BA#1 {17}
M_A_DQ18 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AY50 M_A_A1 {16} M_A_DQ50 AY29 DDR0_DQ[49]/DDR1_DQ[33] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46 M_B_A10 {17}
M_A_DQ19 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] BA50 M_A_A0 {16} M_A_DQ51 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 M_B_A1 {17}
M_A_DQ20 BA65 DDR0_DQ[19]/DDR0_DQ[35] DDR0_MA[3] BB52 M_A_A3 {16} M_A_DQ52 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46 M_B_A0 {17}
M_A_DQ21 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[4] M_A_A4 {16} M_A_DQ53 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR1_MA[3] BA47 M_B_A3 {17}
M_A_DQ22 BA63 DDR0_DQ[21]/DDR0_DQ[37] AM70 M_A_DQSN0 M_A_DQ54 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR1_MA[4] M_B_A4 {17}
M_A_DQ23 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQSN[0] AM69 M_A_DQSP0 M_A_DQ55 BB29 DDR0_DQ[54]/DDR1_DQ[38] BA38 M_A_DQSN4
M_A_DQ24 BA61 DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQSP[0] AT69 M_A_DQSN1 M_A_DQ56 AY27 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 M_A_DQSP4
M_A_DQ25 AW61 DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQSN[1] AT70 M_A_DQSP1 M_A_DQ57 AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 M_A_DQSN5
M_A_DQ26 BB59 DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQSP[1] AH66 M_B_DQSN0 M_A_DQ58 AY25 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 M_A_DQSP5
M_A_DQ27 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 M_B_DQSP0 M_A_DQ59 AW25 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] AT38 M_B_DQSN4
M_A_DQ28 BB61 DDR0_DQ[27]/DDR0_DQ[43] DDR1_DQSP[0]/DDR0_DQSP[2] AG69 M_B_DQSN1 M_A_DQ60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR1_DQSN[4]/DDR1_DQSN[2] AR38 M_B_DQSP4
M_A_DQ29 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 M_B_DQSP1 M_A_DQ61 BA27 DDR0_DQ[60]/DDR1_DQ[44] DDR1_DQSP[4]/DDR1_DQSP[2] AT32 M_B_DQSN5
M_A_DQ30 BA59 DDR0_DQ[29]/DDR0_DQ[45] DDR1_DQSP[1]/DDR0_DQSP[3] BA64 M_A_DQSN2 M_A_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQSN[5]/DDR1_DQSN[3] AR32 M_B_DQSP5
M_A_DQ31 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 M_A_DQSP2 M_A_DQ63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR1_DQSP[5]/DDR1_DQSP[3] BA30 M_A_DQSN6
M_B_DQ16 AT66 DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQSP[2]/DDR0_DQSP[4] AY60 M_A_DQSN3 M_B_DQ48 AU27 DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 M_A_DQSP6 +1.2V_SUS
M_B_DQ17 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 M_A_DQSP3 M_B_DQ49 AT27 DDR1_DQ[48] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 M_A_DQSN7
M_B_DQ18 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR0_DQSP[3]/DDR0_DQSP[5] AR66 M_B_DQSN2 M_B_DQ50 AT25 DDR1_DQ[49] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 M_A_DQSP7
M_B_DQ19 AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 M_B_DQSP2 M_B_DQ51 AU25 DDR1_DQ[50] DDR0_DQSP[7]/DDR1_DQSP[5] AR25 M_B_DQSN6
M_B_DQ20 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 M_B_DQSN3 M_B_DQ52 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27 M_B_DQSP6
M_B_DQ21 AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 M_B_DQSP3 M_B_DQ53 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 M_B_DQSN7 R358
M_B_DQ22 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQ54 AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21 M_B_DQSP7
DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[54] DDR1_DQSP[7] 470/F_4
M_B_DQ23 AU65 AW50 M_A_ALERT# M_B_DQ55 AP25
M_B_DQ24 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR0_ALERT# AT52 M_A_PARITY M_A_ALERT# {16} M_B_DQ56 AT22 DDR1_DQ[55] AN43 M_B_ALERT#
B M_B_DQ25 AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR0_PAR M_A_PARITY {16} M_B_DQ57 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 M_B_PARITY M_B_ALERT# {17} B
M_B_DQ26 AP60 DDR1_DQ[25]/DDR0_DQ[57] AY67 M_B_DQ58 AU21 DDR1_DQ[57] DDR1_PAR AT13 SM_DRAMRST# M_B_PARITY {17}
M_B_DQ27 DDR1_DQ[26]/DDR0_DQ[58] DDR_VREF_CA SM_VREF_CA {16} M_B_DQ59 DDR1_DQ[58] DRAM_RESET# SM_RCOMP_0 DDR4_DRAMRST# {16,17}
AN60 AY68 AT21 AR18 R274 121/F_4
M_B_DQ28 AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR0_VREF_DQ BA67 TP55 M_B_DQ60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP_1
NIL-DDR CH - R276 80.6/F_4
M_B_DQ29 AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_VREF_DQ SM_VREF_DQ1 {17} M_B_DQ61 AP22 DDR1_DQ[60] DDR_RCOMP[1] AU18 SM_RCOMP_2
A R275 100/F_4
M_B_DQ30 AT60 DDR1_DQ[29]/DDR0_DQ[61] AW67 M_B_DQ62 AP21 DDR1_DQ[61] DDR_RCOMP[2]
M_B_DQ31 AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR_VTT_CNTL DDR_PG_CTRL {17} M_B_DQ63 AN21 DDR1_DQ[62]
NIL-DDR CH -
DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[63] B PDC
SKL_ULT ? SKL_ULT
2 OF 20 3 OF 20 ?
REV = 1 REV = 1
A A

PROJECT : LV6
1A
SKYLAKE 2/15(DDR4 I/F)
5 4 3 2 1
5 4 3 2 1
{10,11,14,15,17} +3V_DEEP_SUS
04
{10,12,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56} +3VS5
{2,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
{34,35,38,39,41,42,44,45,48,50,51,53,54,56} +5VS5
{2,6,53,56} +VCCIO
{2,5,6,9,45,53,56} +VCCSTPLL
{13,15} +3V_RTC_2
?
SKL_ULT
U38K
D
SYSTEM POWER MANAGEMENT
C3A PCH Pull-high/low(CLG) D
AT11 PCH_SLP_S0#
GPP_B12/SLP_S0# PCH_SLP_S0# {36} +3V_DEEP_SUS
AP15
GPD4/SLP_S3# SUSB# {18,36}
PLTRST# AN10 BA16
SYS_RESET# GPP_B13/PLTRST# GPD5/SLP_S4# SLP_S5# SUSC# {36}
B5 AY16 TP53 SUSWARN# R297 10K_4
RSMRST# AY17 SYS_RESET# GPD10/SLP_S5#
{36} RSMRST# RSMRST# AN15 SUSACK# R293 *10K_4
R595 10K_4 PROCPWRGD A68 SLP_SUS# AW15 SLP_LAN# TP51
H_VCCST_PWRGD B65 PROCPWRGD SLP_LAN# BB17 PM_BATLOW_N_EC R302 10K_4
VCCST_PWRGD GPD9/SLP_WLAN# SLP_WLAN# {33}
AN16 TP13
C276 *0.1U/16V/X7R_4 SYS_PWROK B6 GPD6/SLP_A# GPD2 R763 10K_4
EC_PWROK BA20 SYS_PWROK BA15 DNBSWON#
{29,36,37} EC_PWROK PCH_PWROK GPD3/PWRBTN# DNBSWON# {36}
DSWROK_EC_R BB20 AY15 AC_PRESENT_EC B2A
DSW_PWROK GPD1/ACPRESENT PM_BATLOW_N_EC AC_PRESENT_EC {36}
AU13 PM_BATLOW_N_EC {36}
SUSWARN# AR13 GPD0/BATLOW# +3VS5
*0_4_S R295 SUSACK# AP11 GPP_A13/SUSWARN#/SUSPWRDNACK
GPP_A15/SUSACK# AU11
PCIE_WAKE# BB15 GPP_A11/PME# AP16 INTRUDER#_R R287 1M_4 PCIE_WAKE# R687 10K_4
{19,30,33} PCIE_WAKE# WAKE# INTRUDER# +3V_RTC_2
GPD2 AM15
TP50 AW17 GPD2/LAN_WAKE# AM10 EXT_PWR_GATE# AC_PRESENT_EC R692 10K_4
B2A GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE#
TP15 AT15 AM11 PCH_VRALERT#
GPD7/RSVD GPP_B2/VRALERT# DNBSWON# R780 *10K_4
B2A +3V C3A
SKL_ULT SYS_RESET#
11 OF 20 ? R196 10K_4
REV = 1 PCH_VRALERT# R764 10K_4
RSMRST#
B2A
SYS_RESET#
C RSMRST# R688 10K_4 C
PLTRST#
DSWROK_EC_R R288 100K_4
EC13 EC9 EC38

*E@220P/50V_4 *E@220P/50V_4 *E@220P/50V_4
EXT_PWR_GATE# R251 1K_4

+3VS5
RSMRST# R285 *0_4_S DSWROK_EC_R
+VCCIO +5VS5 +3VS5
+VCCIO +VCCSTPLL
R569 R559 R558
15K_4 100K_4 10K_4
B PLTRST# R591 R582 B

{18,28,30,31,33,36,37} PLTRST#
1K_4 *1K_4 HWPG
3
R437
100K_4
+1.0V_PWRGD_G2 2 Q39
2N7002K R557
HWPG D17 1 2 DB2J40600L H_VCCST_PWRGD_R R597 60.4_4 H_VCCST_PWRGD 100K_4
{36,49,50} HWPG
3
+1.0V_PWRGD_G1 2 Q38
1
METR3904-G
PLTRST#(CLG)
1
C688 C665 R565
*10P/50V_4 0.1U/16V/X7R_4 100K_4
SYS_PWROK R190 *0_4 EC_PWROK

{36} SYS_PWROK
R189 R192
100K_4 100K_4
A A
System PWR_OK(CLG)

PROJECT : LV6
1A
SKYLAKE 3/15(PowerManger)
5 4 3 2 1
5 4 3 2 1
05
{46} +VCC_CORE
{6} +VCCSTG
{2,4,6,9,45,53,56} +VCCSTPLL
{49} +VCCOPC
SKL_ULT ?
U38L
Under CPU +VCC_CORE +VCC_CORE
CPU POWER 1 OF 4
A30 G32
A34 VCC_A30 VCC_G32 G33 Under CPU
A39 VCC_A34
VCC_A39
33A VCC_G33
VCC_G35
G35
A44 G37 C705 C235 C194 C229 C344 C368 C219
C274 C256 C329 C317 C296 C292 C325 C270 AK33 VCC_A44 VCC_G37 G38 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
10U/6.3V_4 22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6 22U/6.3V/X5R_6 22U/6.3V/X5R_6 AK35 VCC_AK33 VCC_G38 G40
D AK37 VCC_AK35 VCC_G40 G42 D
AK38 VCC_AK37 VCC_G42 J30
AK40 VCC_AK38 VCC_J30 J33
AL33 VCC_AK40 VCC_J33 J37
AL37 VCC_AL33 VCC_J37 J40
AL40 VCC_AL37 VCC_J40 K33 C253 C195 C208 C222 C383 C362 C261 C241
C246 C366 C353 C365 C367 C188 C207 AM32 VCC_AL40 VCC_K33 K35 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AM33 VCC_AM32 VCC_K35 K37
AM35 VCC_AM33 VCC_K37 K38
G30 VCC_AM38 VCC_K42 K43
VCC_G30 VCC_K43 R187 100/F_4
K32 E32
+VCC_CORE 100- ±1%
RSVD_K32 VCC_SENSE VCC_SENSE {45} pull-up to VCC
C337 C333 C158 C150 C154 C319 E33 VSS_SENSE {45}
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6 AK32 VSS_SENSE R188 100/F_4 near processor.
RSVD_AK32 B63 H_CPU_SVIDALRT#
AB62 VIDALERT# A63 VR_SVID_CLK_R
+VCCOPC VCCOPC_AB62 VIDSCK
P62 D64 H_CPU_SVIDDAT
V62 VCCOPC_P62 VIDSOUT
VCCOPC_V62 G20
VCCSTG_G20 +VCCSTG
+1.8V_PRIM H63
+1.8V_DEEP_SUS +1.8V_PRIM VCC_OPC_1P8_H63
G61 B2A
R244 GT3@100/F_4 VCC_OPC_1P8_G61 C819
+VCCOPC
+VCCOPC_SRC R246 GT3@0_4 AC63 1U/6.3V_4X
{49} +VCCOPC_SRC VCCOPC_SENSE
681_AGND R239 GT3@0_4 AE63
{49} 681_AGND VSSOPC_SENSE
R163 GT3@0_6 R237 GT3@100/F_4
+VCCEOPIO AE62
AG62 VCCEOPIO
C VCCEOPIO C
C255 C245 +VCCOPC_SRC R247 GT3@0_4 AL63
681_AGND R248 GT3@0_4 AJ62 VCCEOPIO_SENSE
GT3@10U/6.3V_4 GT3@10U/6.3V_4 VSSEOPIO_SENSE PDC
SKL_ULT ?
12 OF 20
REV = 1
+VCC_CORE
Close CPU +VCCEOPIO +VCCSTPLL
C340 GT3@22U/6.3V/X5R_6
C673 C661 C660 C667 C657 C663 C678 C684
47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 R579 SVID ALERT
+VCCOPC 56.2/F_4
C322 GT3@1U/6.3V_4X
H_CPU_SVIDALRT# R599 220/F_4
+VCC_CORE VR_SVID_ALERT# {45}
C323 GT3@1U/6.3V_4X
C324 GT3@22U/6.3V/X5R_6
C689
*0.1U/16V/X7R_4
C181 C670 C666 C169 C675 C656 C671 C677
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
+VCCSTPLL
B B
+VCCSTPLL C682
0.1U/16V/X7R_4
SVID CLK
R587
*54.9/F_4
VR_SVID_CLK_R R600 *0_4_S VR_SVID_CLK {45}
+VCCSTPLL
R577
100/F_4
SVID DATA
H_CPU_SVIDDAT R578 *0_4_S VR_SVID_DATA {45}
A A

PROJECT : LV6
1A
SKYLAKE 4/15 (POWER-1)
5 4 3 2 1
5 4 3 2 1
06
{2,4,53,56} +VCCIO
{48} +VCCSA
{3,16,17,50} +1.2V_SUS
{2,4,5,9,45,53,56} +VCCSTPLL
{5} +VCCSTG
D D
Under CPU +VCCIO

+1.2V_SUS ?
U38N SKL_ULT
CPU POWER 3 OF 4 Under CPU Close CPU

AU23 AK28
AU28 VDDQ_AU23 VCCIO AK30
AU35 VDDQ_AU28 2A 3.1A VCCIO AL30
C413 C409 C412 C406 C433 C416 AU42 VDDQ_AU35 VCCIO AL42 C349 C371 C348 C350 C351 C369 C382 C347 C370 C346
10U/6.3V_4 10U/6.3V_4 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X BB23 VDDQ_AU42 VCCIO AM28 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 10U/6.3V_4 10U/6.3V_4 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
BB32 VDDQ_BB23 VCCIO AM30
BB41 VDDQ_BB32 VCCIO AM42
BB47 VDDQ_BB41 VCCIO +VCCSA
BB51 VDDQ_BB47 AK23
VDDQ_BB51 Under CPU
Close CPU +1.2V_SUS 4.5A VCCSA
VCCSA
AK25
Close CPU Under CPU G23
AM40 VCCSA G25
C424 C431 C420 C417 VDDQC VCCSA G27 C237 C299 C668 C343 C662 C658 C332 C290 C318 C321 C238 C262 C669 C297
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 C407 C387 A18 VCCSA G28 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
+VCCSTPLL VCCST 0.12A VCCSA J22
A22 VCCSA J23
*1U/6.3V_4X
10U/6.3V_4
+VCCSTG VCCSTG_A220.04A VCCSA J27
AL23 VCCSA K23
+VCCPLL_OC VCCPLL_OC VCCSA Close CPU
K25
K20 VCCSA K27 C312 C239 C330 C352 C659 C275
K21 VCCPLL_K200.12A VCCSA K28 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
+VCCPLL VCCPLL_K21 VCCSA K30
VCCSA
C AM23 C
VCCIO_SENSE AM22
VSSIO_SENSE R153 100/F_4
H21 VSSSA_SENSE {45}
VSSSA_SENSE H20
+VCCIO +VCCSTG VCCSA_SENSE VCCSA_SENSE {45}
R154 100/F_4 +VCCSA
R158 *0_4_S 14 OF 20
SKL_ULT ?
+1.2V_SUS +VCCPLL_OC REV = 1
R280 *0_6_S
+VCCSTPLL +VCCPLL
R149 *0_6_S
Under CPU Close CPU
+VCCSTG +VCCPLL_OC +VCCSTPLL +VCCPLL
C203 C379 C187 C293

B 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X B
Close A18 Ball
+VCCSTPLL
C186 C182
*1U/6.3V_4X *22U/6.3V/X5R_6
+1.2V_SUS
C432 C428 C425 C427 C429 C430 C386 C421 C408 C414
10U/6.3V/X5R_6X10U/6.3V/X5R_6X10U/6.3V/X5R_6X10U/6.3V/X5R_6X10U/6.3V/X5R_6X
10U/6.3V/X5R_6X
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
A A
Close to CPU

PROJECT : LV6
1A
5 4 3 2 1
5 4 3 2 1
Under CPU +VCCGT

U38M SKL_ULT ? +VCCGT
+VCCGT {47}
07
CPU POWER 2 OF 4
Close CPU
N70
A48 VCCGT N71
A53 VCCGT VCCGT R63
A58 VCCGT
VCCGT
31A VCCGT
VCCGT
R64 C758 C759 C760 C761 C722 C762
C309 C306 C729 C726 C377 A62 R65 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8 47U/6.3V_8
D 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 A66 VCCGT VCCGT R66 D
AA63 VCCGT VCCGT R67
AA70 VCCGT VCCGT T62
AA71 VCCGT VCCGT U65 C171 C185 C298 C331 C316 C345 C341 C227
C372 C376 C750 C307 C731 AC64 VCCGT VCCGT U68 22U/6.3V/X5R_6 22U/6.3V/X5R_6 22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AC65 VCCGT VCCGT U71
AC66 VCCGT VCCGT W63
J43 VCCGT VCCGT W69 C338 C342 C751 C749
J45 VCCGT VCCGT W70 22U/6.3V/X5R_6 22U/6.3V/X5R_6 22U/6.3V/X5R_6
22U/6.3V/X5R_6
C373 C301 C375 C724 C752 C303 J46 VCCGT VCCGT W71
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X J48 VCCGT VCCGT Y62
J50 VCCGT VCCGT +VCCGT
J52 VCCGT
J53 VCCGT AK42
J55 VCCGT VCCGTX_AK42 AK43
J56 VCCGT VCCGTX_AK43 AK45
J58 VCCGT VCCGTX_AK45 AK46 C743 C180 C193 C748
J60 VCCGT VCCGTX_AK46 AK48 GT3@22U/6.3V/X5R_6 GT3@22U/6.3V/X5R_6 GT3@22U/6.3V/X5R_6 GT3@22U/6.3V/X5R_6
C374 C378 C308 C304 C302 C305 K48 VCCGT VCCGTX_AK48 AK50
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X K50 VCCGT VCCGTX_AK50 AK52
K52 VCCGT VCCGTX_AK52 AK53
C K53 VCCGT VCCGTX_AK53 AK55 C
K56 VCCGT VCCGTX_AK56 AK58 C744 C209 C721 C179
K58 VCCGT VCCGTX_AK58 AK60 GT3@22U/6.3V/X5R_6 GT3@22U/6.3V/X5R_6 GT3@22U/6.3V/X5R_6 GT3@22U/6.3V/X5R_6
L62 VCCGT VCCGTX_AK70 AL43
L63 VCCGT VCCGTX_AL43 AL46
L68 VCCGT VCCGTX_AL60 AM48 C277 C278 C676 C273
L69 VCCGT VCCGTX_AM48 AM50 GT3@10U/6.3V_4 GT3@10U/6.3V_4 GT3@10U/6.3V_4 GT3@10U/6.3V_4
L70 VCCGT VCCGTX_AM50 AM52
L71 VCCGT VCCGTX_AM52 AM53
M62 VCCGT VCCGTX_AM53 AM56
N63 VCCGT VCCGTX_AM56 AM58
N64 VCCGT VCCGTX_AM58 AU58
N66 VCCGT VCCGTX_AU58 AU63 C240 C674 C260 C252
N67 VCCGT VCCGTX_AU63 BB57 GT3@10U/6.3V_4 GT3@10U/6.3V_4 GT3@10U/6.3V_4 GT3@10U/6.3V_4
N69 VCCGT VCCGTX_BB57 BB66
R634 100/F_4 VCCGT VCCGTX_BB66
+VCCGT
{45} VCCGT_SENSE J70 AK62
J69 VCCGT_SENSE VCCGTX_SENSE AL61
{45} VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE
R642 100/F_4
PDC
13 OF 20
SKL_ULT
?
REV = 1
B B
A A

PROJECT : LV6
1A
5 4 3 2 1
5 4 3 2 1
08
D D
U38P U38Q
SKL_ULT ? SKL_ULT ?
GND 1 OF 3 GND 2 OF 3
A5 AL65 AT63 BA49

A67 VSS VSS AL66 AT68 VSS VSS BA53
A70 VSS VSS AM13 AT71 VSS VSS BA57
AA2 VSS VSS AM21 AU10 VSS VSS BA6
AB15 VSS VSS AM45 AU38 VSS VSS BB18
AB16 VSS VSS AM46 AV1 VSS VSS BB26
U38R AB18 VSS VSS AM55 AV68 VSS VSS BB30
AB21 VSS VSS AM60 AV69 VSS VSS BB34
SKL_ULT ? VSS VSS VSS VSS
AB8 AM61 AV70 BB38
AD13 VSS VSS AM68 AV71 VSS VSS BB43
AD16 VSS VSS AM71 AW10 VSS VSS BB55
GND 3 OF 3
AD19 VSS VSS AM8 AW12 VSS VSS BB6
F8 VSS VSS VSS VSS
VSS L18 AD20 AN20 AW14 BB60
G10 VSS VSS VSS VSS VSS
VSS L8 AE64 AN32 AW23 C1
VSS N10 AE65 AN33 AW26 C25
VSS N13 AE66 AN35 AW28 C5
VSS N19 AE67 AN37 AW30 D10
C
G55 VSS VSS VSS VSS VSS C
VSS N65 AF1 AN42 AW36 D18
VSS N68 AF10 AN58 AW38 D22
VSS P17 AF15 AN63 AW41 D25
VSS P19 AF17 AP10 AW43 D26
H15 VSS VSS VSS VSS VSS
VSS R13 AF63 AP23 AW49 D39
J11 VSS VSS VSS VSS VSS
VSS R6 AG16 AP28 AW51 D44
VSS T15 AG17 AP32 AW53 D45
VSS U10 AH13 AP68 AW64 D62
VSS U63 AH6 AP70 AW66 D66
K16 VSS VSS VSS VSS VSS
VSS U64 AH63 AR11 AW8 D69
VSS U66 AH64 AR15 AY66 E11
VSS U67 AH67 AR16 B10 E15
VSS U69 AJ15 AR20 B14 E18
VSS U70 AJ18 AR23 B18 E21
VSS V16 AJ20 AR28 B22 E46
VSS V17 AJ4 AR35 B30 E50
VSS V18 AK11 AR42 B34 E53
VSS W13 AK16 AR43 B39 E56
VSS Y17 AK22 AR48 B53 E71
B
L11 VSS VSS VSS VSS VSS B
VSS Y19 AK27 AR5 B58 F1
L16 VSS VSS VSS VSS VSS
L17 VSS VSS VSS VSS VSS
VSS AK69 VSS VSS AR53 B71 VSS VSS F22
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
18 OF 20 AL28 VSS VSS AR63 BA14 VSS VSS F28
SKL_ULT VSS VSS VSS VSS
REV = 1 ? AL32 AR8 BA18 F32
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL52 VSS VSS AT4 F68 VSS VSS F40
AL58 VSS VSS AT56 VSS VSS BA41
AL64 VSS VSS AT58 VSS
VSS VSS
17 OF 20
PDC
16 OF 20
SKL_ULT SKL_ULT
REV = 1 ? REV = 1 ?
A A

PROJECT : LV6
1A
SKYLAKE 7/15 (GND)
5 4 3 2 1
5 4 3 2 1
09
{13,15,51,53,54,56} +1.0V_DEEP_SUS
{2,4,5,6,45,53,56} +VCCSTPLL
{5,15,42,53,56} +1.8V_DEEP_SUS
?
SKL_ULT
U38S
RESERVED SIGNALS-1
E68 BB68
D B67 CFG[0] RSVD_TP_BB68 BB69 D
D65 CFG[1] RSVD_TP_BB69
CFG3 D67 CFG[2] AK13
CFG4 E70 CFG[3] RSVD_TP_AK13 AK12
C68 CFG[4] RSVD_TP_AK12
D68 CFG[5] BB2 U38T SKL_ULT ?
C67 CFG[6] RSVD_BB2 BA3
F71 CFG[7] RSVD_BA3
SPARE
G69 CFG[8]
F70 CFG[9] AU5 AW69 F6
G68 CFG[10] TP5 AT5 AW68 RSVD_AW69 RSVD_F6 E3
H70 CFG[11] TP6 AU56 RSVD_AW68 RSVD_E3 C11
G71 CFG[12] +1.8V_DEEP_SUS AW48 RSVD_AU56 RSVD_C11 B11
H69 CFG[13] D5 C7 RSVD_AW48 RSVD_B11 A11
G70 CFG[14] RSVD_D5 D4 R211 *0_6 U12 RSVD_C7 RSVD_A11 D12
CFG[15] RSVD_D4 B2 U11 RSVD_U12 RSVD_D12 C12
E63 RSVD_B2 C2 H11 RSVD_U11 RSVD_C12 F52
F63 CFG[16] RSVD_C2 C314 RSVD_H11 RSVD_F52
CFG[17] B3
E66 RSVD_B3 A3 *1U/6.3V_4X
CFG[18] RSVD_A3 20 OF 20
F66 Close to CPU
CFG[19] SKL_ULT
AW1 REV = 1 ?
R174 49.9/F_4 CFG_RCOMP E60 RSVD_AW1
CFG_RCOMP E1
R195 1K_4 E8 RSVD_E1 E2
+1.0V_DEEP_SUS ITP_PMODE RSVD_E2
AY2 BA4 Placement are required for future platform
RSVD_AY2 RSVD_BA4
AY1
RSVD_AY1 RSVD_BB4
BB4 compatibility purpose only.
D1 A4
C D3 RSVD_D1 RSVD_A4 C4 C
RSVD_D3 RSVD_C4
K46 BB5
K45 RSVD_K46 TP4
RSVD_K45 A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3 R674 *0_4_S
C71 RSVD_AY3
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54
BA70 AY4
BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2
J71 AY71 R700 *0_4_S
J68 RSVD_J71 VSS_AY71 AR56 R238 *GT3@0_4
RSVD_J68 ZVM# LPM_ZVM_N {49}
F65 AW71
*0_4_S R173 G65 VSS_F65 RSVD_TP_AW71 AW70
VSS_G65 RSVD_TP_AW70
F61 AP56
E61 RSVD_F61 MSM# C64 R598 *100K_4
RSVD_E61 PROC_SELECT# +VCCSTPLL
PDC 19 OF 20
B SKL_ULT B
REV = 1 ?
Connon-U use, SKL-U
un-install.
Processor Strapping The CFG signals have a default value of '1' if not terminated on the board.
1 0 Circuit
CFG3
Disable: Enable: Set DFX Enable in DFX interface MSR CFG3 R611 *1K_4
(Physcial Debug Enable)
DFX Privacy
CFG4 CFG4 R617 1K_4
(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP
A A

PROJECT : LV6
1A
SKYLAKE 8/15 (RSV)
5 4 3 2 1
5 4 3 2 1
U38E
SKL_ULT
?
{4,11,14,15,17} +3V_DEEP_SUS
{2,4,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
{4,12,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56} +3VS5
10
SPI - FLASH
SMBUS, SMLINK
PCH_SPI1_CLK AV2 R7 SMB_PCH_CLK
{28} PCH_SPI1_CLK SPI0_CLK GPP_C0/SMBCLK
PCH_SPI1_SO AW3 R8 SMB_PCH_DAT
{28} PCH_SPI1_SO SPI0_MISO GPP_C1/SMBDATA
PCH_SPI1_SI AV3 R10 SMLALERT#
{28} PCH_SPI1_SI SPI0_MOSI GPP_C2/SMBALERT# SMLALERT# {11}
PCH_SPI_IO2 AW2
D PCH_SPI_IO3 AU4 SPI0_IO2 R9 SMB_ME0_CLK D
PCH_SPI_CS0# AU3 SPI0_IO3 GPP_C3/SML0CLK W2 SMB_ME0_DAT
AU2 SPI0_CS0# GPP_C4/SML0DATA W1 SML0ALERT#
PCH_SPI_CS2#_TPM SPI0_CS1# GPP_C5/SML0ALERT# SML0ALERT# {11}
{28} PCH_SPI_CS2#_TPM AU1
SPI0_CS2# W3 SMB_ME1_CLK
GPP_C6/SML1CLK V3 SMB_ME1_DAT
SPI - TOUCH GPP_C7/SML1DATA AM7 GPP_B23
GPP_B23/SML1ALERT#/PCHHOT# TP11 EMI(near PCH)
M2
SIO_EXT_SMI# M3 GPP_D1/SPI1_CLK DEBUG_LCLKOUT
{36} SIO_EXT_SMI# GPP_D2/SPI1_MISO
PCI_SERR# J4 EC_LPCCLK
V1 GPP_D3/SPI1_MOSI
V2 GPP_D21/SPI1_IO2 EC37 EC36
M1 GPP_D22/SPI1_IO3 AY13
LPC LPC_LAD0 {33,36}
GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 BA13
GPP_A2/LAD1/ESPI_IO1 LPC_LAD1 {33,36}
BB13 LPC_LAD2 {33,36} *E@18P/50V_4 *E@18P/50V_4
C LINK GPP_A3/LAD2/ESPI_IO2 AY12
GPP_A4/LAD3/ESPI_IO3 LPC_LAD3 {33,36}
{33} CL_CLK G3 BA12 LPC_LFRAME# {33,36}
G2 CL_CLK GPP_A5/LFRAME#/ESPI_CS# BA11
{33} CL_DATA CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET#
{33} CL_RST# G1
CL_RST#
AW9 CLK_PCI_EC_R R679 22/F_4 EC_LPCCLK
GPP_A9/CLKOUT_LPC0/ESPI_CLK EC_LPCCLK {36}
AW13 AY9 CLK_PCI_LPC_R R676 22/F_4 DEBUG_LCLKOUT
{36} EC_RCIN# GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1 DEBUG_LCLKOUT {33}
AW11 CLKRUN# CLKRUN# {36}
AY11 GPP_A8/CLKRUN#
{36} EC_IRQ_SERIRQ GPP_A6/SERIRQ PDC D3A
5 OF 20
SKL_ULT
REV = 1
?
C C
GPIO Pull UP PCH SPI ROM(CLG)

+3V +3V_DEEP_SUS
EC_IRQ_SERIRQ R714 10K_4 SMB_PCH_CLK R650 2.2K_4 PCH_SPI_CS0#_R

TP70 PCH_SPI_CS0#_R {36}
PCH_SPI1_CLK_R
TP67 PCH_SPI1_CLK_R {36}
CLKRUN# R695 8.2K_4 SMB_PCH_DAT R654 2.2K_4 PCH_SPI1_SI_R
TP68 PCH_SPI1_SI_R {36}
PCH_SPI1_SO_R
TP69 PCH_SPI1_SO_R {36}
SIO_EXT_SMI# R625 10K_4 SMB_ME1_CLK R646 1K_4 BIOS_WP#
TP22
TP23 HOLD#
EC_RCIN# R691 10K_4 SMB_ME1_DAT R635 1K_4
PCI_SERR# R624 10K_4 SMB_ME0_CLK R647 1K_4
SMB_ME0_DAT R649 1K_4
+3VS5 R713 *0_4_S

+3VS5 R684 10K_4
U46
PCH_SPI_CS0# R693 33_4 PCH_SPI_CS0#_R 1 8 +3VSPI
B PCH_SPI1_CLK R690 33_4 PCH_SPI1_CLK_R 6 CE# VDD B
PCH_SPI1_SI R699 33_4 PCH_SPI1_SI_R 5 SCK R698 1K_4
SMBus/Pull-up(CLG) PCH_SPI1_SO R694 33_4 PCH_SPI1_SO_R 2 SI
SO HOLD#
7 HOLD# R689 33_4
3 4 C772
C769 WP# VSS
22P/50V/NPO_4 W25Q128FVSIQ 0.1U/16V/X7R_4
+3V_DEEP_SUS
Q41
C773 *1U/10V_4 +3VSPI R697 1K_4
5
3 4 SMB_ME1_CLK PCH_SPI_IO2 R685 33_4 BIOS_WP# PCH_SPI_IO3

{19,36,37,42} MBCLK_THRM
6 1 SMB_ME1_DAT
{19,36,37,42} MBDATA_THRM
*2N7002DW
+3V
Q42 Vender Size P/N
+3V R648 4.7K_4 5 EON 16MB AKE3DZNKQ00(EN25QH128AHIP)
4 3 SMB_PCH_DAT
{17,27} SMB_RUN_DAT GGD 16MB AKE3DF00Q00 (GD25B128CSIGR)
A R656 4.7K_4 2 A
+3V
1 6 SMB_PCH_CLK
Socket DFHS08FS023
{17,27} SMB_RUN_CLK
SSM6N48FU
PROJECT : LV6
1A
SKYLAKE 9/15(SPI/LPC/SM)
5 4 3 2 1
5 4 3 2 1
{4,10,14,15,17} +3V_DEEP_SUS
{2,4,10,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
11
D
Functional Strap Definitions D
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
+3V_DEEP_SUS
ACZ_SPKR
{14,29} ACZ_SPKR
R702
R683 *4.7K_4
*20K/F_4
No Boot:
ACZ_SDOUT The signal has a weak internal pull-down.
{14} ACZ_SDOUT
0 = Enable security measures defined in the Flash
TOP SWAP OVERRIDE Descriptor.
HIGH - TOP SWAP ENABLE 1 = Disable Flash Descriptor Security (override). This
LOW-DISABLED strap should only be asserted high using external
HIGH: LPC SELECTED FOR SYSTEM FLASH pull-up in manufacturing/debug environments ONLY.
R710 1K_4 ACZ_SDOUT
C WEAK INTERNAL PD {36} EN_OVERRIDE This function is useful when running ITP/XDP. C
+3V_DEEP_SUS +3V
R657 R291
1K/F_4 *4.7K_4
SMLALERT# GPP_B18
{10} SMLALERT# {14} GPP_B18
R653 R290
*20K_4 10K_4
No Boot: No Boot:
The signal has a weak internal pull-down. The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security 0 = Disable No Reboot mode.
(TLS) cipher suite (no confidentiality). 1 = Enable No Reboot mode
1 = Enable Intel ME Crypto Transport Layer Security +3V_DEEP_SUS (PCH will disable the TCO
(TLS) cipher suite (with confidentiality). Must be Timer system reboot feature).
pulled up to support Intel AMT with TLS and Intel This function is useful when running ITP/XDP.
B
SBA (Small Business Advantage) with TLS. B
R651
*10K_4
GSPI1_MOSI
{14} GSPI1_MOSI
{10} SML0ALERT# SML0ALERT#
R670 R652
*20K_4 20K_4
No Boot:
No Boot: The signal has a weak internal pull-down.
The signal has a weak internal pull-down. 0 = LPC Is selected for EC.
This field determines the destination of accesses to the 1 = eSPI Is selected for EC.
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
A A

PROJECT : LV6
1A
SKYLAKE 10/15(Strip)
5 4 3 2 1
5 4 3 2 1
U38H
PCIE/USB3/SATA
SKL_ULT
?
SSIC / USB3
{2,4,10,11,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
{4,10,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56} +3VS5
12
H8 USB30_RX1-_R1
USB3_1_RXN USB30_RX1+_R1 USB30_RX1-_R1 {34}
G8
PEG_RXN0 USB3_1_RXP USB30_TX1-_R1 USB30_RX1+_R1 {34}
H13 C13
{18}
{18}
PEG_RXN0
PEG_RXP0
PEG_RXP0 G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13 USB30_TX1+_R1 USB30_TX1-_R1 {34} USB3.0_R1
PEG_TXN0 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB30_TX1+_R1 {34}
{18} PEG_TXN0 C694 EV@0.22U/10V_4X PEG_TXN0_C B17
PEG_TXP0 C693 EV@0.22U/10V_4X PEG_TXP0_C A17 PCIE1_TXN/USB3_5_TXN J6 USB30_RX2-_R2
{18} PEG_TXP0 PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB30_RX2-_R2 {34}
D H6 USB30_RX2+_R2 D
{18} PEG_RXN1
PEG_RXN1 G11 USB3_2_RXP/SSIC_1_RXP B13 USB30_TX2-_R2 USB30_RX2+_R2 {34} USB3.0_R2
PEG_RXP1 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN USB30_TX2+_R2 USB30_TX2-_R2 {34}
{18} PEG_RXP1 F11 A13
PEG_TXN1 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB30_TX2+_R2 {34}
PEG {18} PEG_TXN1 C690 EV@0.22U/10V_4X PEG_TXN1_C D16
PEG_TXP1 C698 EV@0.22U/10V_4X PEG_TXP1_C C16 PCIE2_TXN/USB3_6_TXN J10 USB30_RX3-_DOCK
{18} PEG_TXP1 PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN USB30_RX3-_DOCK {39}
H10 USB30_RX3+_DOCK
PEG_RXN2 USB3_3_RXP/SSIC_2_RXP USB30_TX3-_DOCK USB30_RX3+_DOCK {39}
H16 B15
{18}
{18}
PEG_RXN2
PEG_RXP2 PEG_RXP2 G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15 USB30_TX3+_DOCK USB30_TX3-_DOCK {39} Onelink+_USB3.0
PEG_TXN2 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB30_TX3+_DOCK {39}
{18} PEG_TXN2 C696 EV@0.22U/10V_4X PEG_TXN2_C D17
PEG_TXP2 C697 EV@0.22U/10V_4X PEG_TXP2_C C17 PCIE3_TXN E10
{18} PEG_TXP2 PCIE3_TXP USB3_4_RXN F10
PEG_RXN3 G15 USB3_4_RXP C15
{18} PEG_RXN3 PCIE4_RXN USB3_4_TXN
PEG_RXP3 F15 D15
{18} PEG_RXP3 PCIE4_RXP USB3_4_TXP
PEG_TXN3 C685 EV@0.22U/10V_4X PEG_TXN3_C B19
{18} PEG_TXN3 PCIE4_TXN
PEG_TXP3 C691 EV@0.22U/10V_4X PEG_TXP3_C A19 AB9 USBP1-_R1
{18} PEG_TXP3 PCIE4_TXP USB2N_1 USBP1-_R1 {34} +3V
AB10 USBP1+_R1
F16 USB2P_1 USBP1+_R1 {34} USB2.0_R1
{30} PCIE_RXN5_LAN# PCIE5_RXN
E16 AD6 USBP2-_R2
{30} PCIE_RXP5_LAN PCIE5_RXP USB2N_2 USBP2-_R2 {34}
C702 PCIE_TXN5_LAN_C
0.1U/16V/X7R_4 C19 AD7 USBP2+_R2 SATA_LED#_R R606 10K_4
LAN {30} PCIE_TXN5_LAN#
C703 PCIE_TXP5_LAN_C
0.1U/16V/X7R_4 D19 PCIE5_TXN USB2P_2 USBP2+_R2 {34} USB2.0_R2 DEVSLP1_HDD R618 *10K_4
{30} PCIE_TXP5_LAN PCIE5_TXP AH3 USBP3-_DOCK DEVSLP2_SSD R614 *10K_4
USB2N_3 USBP3-_DOCK {39}
G18 AJ3 USBP3+_DOCK SSD_PEDET# R180 10K_4
{33} PCIE_RXN6_WLAN#
F18 PCIE6_RXN USB2P_3 USBP3+_DOCK {39} Onelink+_USB2.0
{33} PCIE_RXP6_WLAN PCIE6_RXP
C679 PCIE_TXN6_WLAN_C D20
0.1U/16V/X7R_4 AD9 USBP4-_L1
WLAN {33} PCIE_TXN6_WLAN#
C683 PCIE_TXP6_WLAN_C
0.1U/16V/X7R_4 C20 PCIE6_TXN USB2N_4 AD10 USBP4+_L1
USBP4-_L1 {35}
{33} PCIE_TXP6_WLAN PCIE6_TXP USB2P_4 USBP4+_L1 {35} USB2.0_L1&SC +3VS5
{31} SATA_RXN7_ODD# F20 AJ1 USBP5-_L2
PCIE7_RXN/SATA0_RXN USB2N_5 USBP5-_L2 {35}
E20 AJ2 USBP5+_L2 USB_Normal_OC0#_R R586 10K_4
{31} SATA_RXP7_ODD
B21 PCIE7_RXP/SATA0_RXP USB2P_5 USBP5+_L2 {35} USB2.0_L2 USB_Normal_OC1# R580 10K_4
ODD {31} SATA_TXN7_ODD#
A21 PCIE7_TXN/SATA0_TXN
USB2
AF6 USBP6-_FP USB_SC_OC2# R594 10K_4
{31} SATA_TXP7_ODD PCIE7_TXP/SATA0_TXP USB2N_6 USBP6-_FP {38}
C AF7 USBP6+_FP USB_Normal_OC3#_L2 R592 10K_4 C
G21 USB2P_6 USBP6+_FP {38} Figure Printer WLAN_OFF# R619 10K_4
{31} SATA_RXN8_HDD# PCIE8_RXN/SATA1A_RXN
F21 AH1 USBP7-_Card
{31} SATA_RXP8_HDD PCIE8_RXP/SATA1A_RXP USB2N_7 USBP7-_Card {32}
D21 AH2 USBP7+_Card
HDD {31} SATA_TXN8_HDD#
C21 PCIE8_TXN/SATA1A_TXN USB2P_7 USBP7+_Card {32} Cardreader
{31} SATA_TXP8_HDD PCIE8_TXP/SATA1A_TXP AF8 USBP8-_BT
USB2N_8 USBP8-_BT {33}
TP4 E22 AF9 USBP8+_BT
TP6 E23 PCIE9_RXN USB2P_8 USBP8+_BT {33} BT
TP40 B23 PCIE9_RXP AG1 USBP9-_CCD
PCIE9_TXN USB2N_9 USBP9-_CCD {25}
TP37 A23 AG2 USBP9+_CCD
PCIE9_TXP USB2P_9 USBP9+_CCD {25} CCD
TP74 F25 AH7
C3A TP77 E25 PCIE10_RXN USB2N_10 AH8
TP76 D23 PCIE10_RXP USB2P_10
TP75 C23 PCIE10_TXN AB6 USB2_COMP R227 113/F_4
PCIE10_TXP USB2_COMP AG3
R608 100/F_4 PCIE_RCOMPN F5 USB2_ID AG4 R236 *0_4_S
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE
PCIE_RCOMPP A9 USB_Normal_OC0#_R
GPP_E9/USB2_OC0# USB_Normal_OC0#_R {34}
D56 C9 USB_Normal_OC1#
D61 PROC_PRDY# GPP_E10/USB2_OC1# D9 USB_SC_OC2#
PROC_PREQ# GPP_E11/USB2_OC2# USB_SC_OC2# {35}
R696 10K_4 PIRQA# BB11 B9 USB_Normal_OC3#_L2
+3V GPP_A7/PIRQA# GPP_E12/USB2_OC3# USB_Normal_OC3#_L2 {35}
E28 J1 WLAN_OFF#
{31} PCIE_RXN11_SSD PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 WLAN_OFF# {33}
E27 J2 DEVSLP1_HDD
{31} PCIE_RXP11_SSD
D24 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 J3 DEVSLP2_SSD DEVSLP1_HDD {31} HDD Device Sleep
{31} PCIE_TXN11_SSD PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 DEVSLP2_SSD {31}
{31} PCIE_TXP11_SSD C24 SSD Device Sleep
E30 PCIE11_TXP/SATA1B_TXP H2 TPM_INT#
{31} SATA_RXN_SSD# PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 TPM_INT# {28}
{31} SATA_RXP_SSD F30 H3
A25 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 G4 SSD_PEDET#
B
SSD {31} SATA_TXN_SSD#
B25 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 SSD_PEDET# {31}
B
{31} SATA_TXP_SSD PCIE12_TXP/SATA2_TXP H1 SATA_LED#_R
GPP_E8/SATALED# SATA_LED#_R {38}
PCI-E Port Mapping Table PDC

8 OF 20
SKL_ULT
REV = 1 ?
PCI-E Port Function CLK RQ Port Function
USB2.0 Port Mapping Table
Port1 Port0 dGPU
USB2.0 Function
Port2 Port1 LAN PORT-1 USB2.0_R1
Port3
dGPU Port2 WLAN
PORT-2 USB2.0_R2
USB3.0 Port Mapping Table PORT-3 USB2.0_DOCK
Port4 Port3 DOCK PORT-4 USB2.0_L1_S&C
USB3.0 Function
Port5 Port4 Un-used
PORT-5 USB2.0_L2
LAN PORT-1 USB3.0_R1
PORT-6 Figure Printer
Port6 Port5 SSD
PORT-2 USB3.0_R2
WLAN PORT-7 Cardreader
PORT-3 USB3.0_DOCK
Port7
PORT-8 BT
ODD PORT-4
PORT-9 CCD
A A
Port8 HDD PORT-10 NC
Port9 Un-used
Port10 DOCK
Port11 SSD PROJECT : LV6
if Pcie Bus will lane reverse. Size Document Number Rev
Port12 1A
if SATA BUS is SATA2. SKYLAKE 11/15 (PCIE/USB)
5 4 3 2 1
5 4 3 2 1
13
{4,15} +3V_RTC_2
{2,4,10,11,12,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
{9,15,51,53,54,56} +1.0V_DEEP_SUS
{25,29,36,38,39} VSTBY_FSPI
U38J SKL_ULT ?
CLOCK SIGNALS
{18} CLK_PCIE_VGAN
D42
C42 CLKOUT_PCIE_N0
PEG {18} CLK_PCIE_VGAP PCIE_CLK_VGA_REQ# AR10 CLKOUT_PCIE_P0
D {19} PCIE_CLK_VGA_REQ# GPP_B5/SRCCLKREQ0# D
B42
{30} CLK_PCIE_LAN# CLKOUT_PCIE_N1
{30} CLK_PCIE_LAN
A42 F43
PCIE_CLK_LAN_REQ# AT7 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N E43
LAN {30} PCIE_CLK_LAN_REQ# GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P
D41 BA17 PCH_SUSCLK_R R242 *SSD@0_4_S
{33} CLK_PCIE_WLANN CLKOUT_PCIE_N2 GPD8/SUSCLK PCH_SUSCLK {31}
WLAN C41
{33} CLK_PCIE_WLANP PCIE_CLK_WLAN_REQ# CLKOUT_PCIE_P2 XTAL24_IN
AT8 E37
{33} PCIE_CLK_WLAN_REQ# GPP_B7/SRCCLKREQ2# XTAL24_IN XTAL24_OUT +1.0V_DEEP_SUS
E35
TP72 D40 XTAL24_OUT
TP73 C40 CLKOUT_PCIE_N3 E42 XCLK_BIASREF R169 2.7K/F_4
DOCK PCIE_CLK_LAN_REQ#_DOCK AT10 CLKOUT_PCIE_P3 XCLK_BIASREF R176 *60.4/F_4
C3A GPP_B8/SRCCLKREQ3# AM18 RTC_X1 Co-lay 60ohm 1% to GND
RTCX1 RTC_X2
TP38
TP39
B40
A40 CLKOUT_PCIE_N4 RTCX2
AM20 for Connonlake-U use
PCIE_CLKREQ4# AU8 CLKOUT_PCIE_P4 AN18 SRTC_RST#
GPP_B9/SRCCLKREQ4# SRTCRST# AM16 RTC_RST#
R568 *SSD@0_2_SE40 RTCRST#
{31} CLK_PCIE_SSDN CLKOUT_PCIE_N5
SSD {31} CLK_PCIE_SSDP R570 *SSD@0_2_SE38
PCIE_CLK_SSD_REQ# AU7 CLKOUT_PCIE_P5
{31} PCIE_CLK_SSD_REQ# GPP_B10/SRCCLKREQ5# TBT
10 OF 20
SKL_ULT
REV = 1 ?
SKL_ULT ?
U38I
CLK_REQ/Strap Pin(CLG) CSI-2
A36 C37
+3V B36 CSI2_DN0 CSI2_CLKN0 D37
C CSI2_DP0 CSI2_CLKP0 C
C38 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
10K_4 R289 PCIE_CLK_LAN_REQ#_DOCK C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
10K_4 R712 PCIE_CLK_WLAN_REQ# A38 CSI2_DP2 CSI2_CLKP2 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
10K_4 R706 PCIE_CLK_LAN_REQ# CSI2_DP3 CSI2_CLKP3
C31 E13 CSI2_COMP R182 100/F_4
10K_4 R715 PCIE_CLK_VGA_REQ# D31 CSI2_DN4 CSI2_COMP B7
C33 CSI2_DP4 GPP_D4/FLASHTRIG
10K_4 R704 PCIE_CLKREQ4# D33 CSI2_DN5
A31 CSI2_DP5 EMMC
10K_4 R705 PCIE_CLK_SSD_REQ# B31 CSI2_DN6 AP2

A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3
A29 GPP_F16/EMMC_DATA3 AN1
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
CSI2_DP11 PDC GPP_F12/EMMC_CMD
AT1 EMMC_RCOMP R672 200/F_4
EMMC_RCOMP
9 OF 20
SKL_ULT
REV = 1 ?
B B
RTC Clock 32.768KHz (RTC)<RTC> RTC Circuitry (RTC) <RTC> RTC Power trace width 20mils.
VSTBY_FSPI +3V_RTC_2 External Crystal and Green Clock
B2B R442
1.5K_4
C763 15P/50V/NPO_4 RTC_X1 R294

+3V_RTC RTC_RST#
1
Y5 RTC_RST# C242 12P/50V_4

1
20K/F_4
32.768KHz R669 GRTC1
1
2
10M_4 C415
2
3
R441 45.3K_4 2 1 1U/6.3V_4X *JUMP XTAL24_IN R177
2
C755 15P/50V/NPO_4 RTC_X2 D14 DB2J40600L R300 1M_4 24MHZ +-30PPM

20K/F_4 XTAL24_OUT Y1
R434 1K_4 +3V_RTC_1 2 1 SRTC_RST# 2 EC_RTC_RST
EC_RTC_RST {36}
3
4
D13 DB2J40600L
C243 12P/50V_4
C548 Q25
C423 2N7002K
1
R436 1U/6.3V_4X 1U/6.3V_4X R309

*45.3K_4 10K_4
1
A CN21 A
94-0013-01
2
RTC_RST#
EC14
*E@220P/50V_4
PROJECT : LV6
1A
SKYLAKE 12/15 (CLK/EMMC)
5 4 3 2 1
5 4 3 2 1
DGPU <VGA>
<CPU>
14
{4,10,11,15,17} +3V_DEEP_SUS
{2,4,10,11,12,13,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
+3V
EV@10K_4 R281 DGPU_PWR_EN

EV@10K_4
*EV@10K_4
R282
R680
DGPU_HOLD_RST#
DGPU_PWROK
Skylake (GPIO)
SKL_ULT ?
U38F
D D
LPSS ISH
+3V_DEEP_SUS
AN8 P2
{32} CR_EN# DGPU_PWR_EN GPP_B15/GSPI0_CS# GPP_D9 TP47
AP7 P3
BT_RADIO_DIS# {18,56} DGPU_PWR_EN DGPU_HOLD_RST# GPP_B16/GSPI0_CLK GPP_D10 TP46
10K_4 R632 AP8 P4
{18} DGPU_HOLD_RST# GPP_B18 GPP_B17/GSPI0_MISO GPP_D11 TP45
{11} GPP_B18 AR7 P1
PCH_TEMPALERT# GPP_B18/GSPI0_MOSI GPP_D12 BT_RADIO_DIS# {33}
10K_4 R631
AM5 M4
10K_4 R659 SIO_EXT_SCI# AN7 GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA N3
DGPU_PWROK AP5 GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL
{52} DGPU_PWROK GPP_B21/GSPI1_MISO
49.9K/F_4 R660 UART2_TXD GSPI1_MOSI AN5 N1
{11} GSPI1_MOSI GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA N2
49.9K/F_4 R664 UART2_RXD AB1 GPP_D8/ISH_I2C1_SCL
{25} LCD_BK_OFF GPP_C8/UART0_RXD
AB2 AD11
+3V_DEEP_SUS {25} CCD_EN GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA
TP48 W4 AD12
AB3 GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
SKU@10K_2 R661 BOARD_ID0 SKU@10K_2 R662 GPP_C11/UART0_CTS#
UART2_RXD AD1 U1 PCH_TEMPALERT#
BOARD_ID1 SKU@10K_2 {34} UART2_RXD UART2_TXD GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
SKU@10K_2 R658 R663 AD2 U2
{34} UART2_TXD GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
AD3 U3
SKU@10K_2 R666 BOARD_ID2 SKU@10K_2 R665 SIO_EXT_SCI# AD4 GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS# U4
{36} SIO_EXT_SCI# GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT#
IV@10K_2 R222 BOARD_ID3 EV@10K_2 R223 AC1
U7 GPP_C12/UART1_RXD/ISH_UART1_RXD AC2
NDK@10K_2 R218 BOARD_ID4 DK@10K_2 R216 U6 GPP_C16/I2C0_SDA GPP_C13/UART1_TXD/ISH_UART1_TXD AC3
GPP_C17/I2C0_SCL GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
N2B@10K_2 R217 BOARD_ID5 2B@10K_2 R212 U8 GPP_C15/UART1_CTS#/ISH_UART1_CTS#
U9 GPP_C18/I2C1_SDA AY8 BOARD_ID6
NFP@10K_2 R304 BOARD_ID6 FP@10K_2 R312 GPP_C19/I2C1_SCL GPP_A18/ISH_GP0 BA8 BOARD_ID7
C AH9 GPP_A19/ISH_GP1 BB7 BOARD_ID8 C
NSSD@10K_2 R303 BOARD_ID7 SSD@10K_2 R311 AH10 GPP_F4/I2C2_SDA GPP_A20/ISH_GP2 BA7 BOARD_ID9
GPP_F5/I2C2_SCL GPP_A21/ISH_GP3 AY7 BOARD_ID10
ONB@10K_2 R305 BOARD_ID8 ONB@10K_2 R313 AH11 GPP_A22/ISH_GP4 AW7 BOARD_ID11
AH12 GPP_F6/I2C3_SDA GPP_A23/ISH_GP5 AP13
ONB@10K_2 R306 BOARD_ID9 ONB@10K_2 R314 GPP_F7/I2C3_SCL GPP_A12/BM_BUSY#/ISH_GP6 B2A
AF11
ONB@10K_2 R766 BOARD_ID10 ONB@10K_2 R765 AF12 GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
SKL@10K_2 R768 BOARD_ID11 KBY@10K_2 R767
6 OF 20
SKL_ULT
REV = 1 ?
Sku Model BOARD_ID0 BOARD_ID1 BOARD_ID2
0 E42(R310_14) 0 0 0
U38G SKL_ULT ?
1 E52(R310_15) 0 0 1
AUDIO
ACZ_SYNC BA22
2 V310_14 0 1 0 ACZ_BCLK HDA_SYNC/I2S0_SFRM
AY22
ACZ_SDOUT BB22 HDA_BLK/I2S0_SCLK
SDIO/SDXC
{11} ACZ_SDOUT ACZ_SDIN0 HDA_SDO/I2S0_TXD
3 V310_15 0 1 1 {29} ACZ_SDIN0 BA21
AY21 HDA_SDI0/I2S0_RXD AB11 BOARD_ID0
TP54 ACZ_RST# AW22 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB13 BOARD_ID1
J5 HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 AB12 BOARD_ID2
B
4 Tianyi310_14 1 0 0 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 BOARD_ID3 B
AY20 W12
AW20 I2S1_SFRM GPP_G3/SD_DATA2 W11 BOARD_ID4
I2S1_TXD GPP_G4/SD_DATA3 W10 BOARD_ID5
5 Tianyi310_15 1 0 1 GPP_G5/SD_CD#
AK7 W8 R322 *0_4_S
GPP_F1/I2S2_SFRM GPP_G6/SD_CLK NUM_LED# {38}
AK6 W7 R636 *0_4_S
GPP_F0/I2S2_SCLK GPP_G7/SD_WP CAP_LOCK_LED# {38}
6 Reserved 1 1 0 AK9
AK10 GPP_F2/I2S2_TXD BA9
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9 GPP_A16
GPP_A16/SD_1P8_SEL GPP_A16 {34}
7 Reserved 1 1 1 SD_RCOMP
H5 AB7 R220 200/F_4
D7 GPP_D19/DMIC_CLK0 SD_RCOMP
GPP_D20/DMIC_DATA0
BOARD_ID3 Hi = UMA Lo = Discrete D8 AF13 TP9
C8 GPP_D17/DMIC_CLK1 GPP_F23
GPP_D18/DMIC_DATA1
BOARD_ID4 Hi = wo Prolink Lo = w Prolink ACZ_SPKR AW5
{11,29} ACZ_SPKR GPP_B14/SPKR
BOARD_ID5 Hi = wo 2nd Battery Lo = w 2nd Battery 7 OF 20

SKL_ULT
REV = 1 ?
BOARD_ID6 Hi = wo Figure Printer Lo = w Figure Printer
BOARD_ID7 Hi = wo SSD Lo = w SSD

ACZ_SYNC *1K_4 R703 +3V_DEEP_SUS
[ 1, 1, 1 ] = Samsung K4A8G165WB-BCRC D3A ACZ_SYNC
On Board Memory [ 1, 1, 0 ] = Micro MT40A512M16JY-083E:B 33_4 R709 ACZ_SYNC_AUDIO {29}
B2A
A
BOARD_ID10 [ 1, 0, 1 ] = SMART A
[ 1, 0, 0 ] = Teikon
BOARD_ID9 [ 0, 1, 1 ] = Samsung K4A8G165WB-BCPB ACZ_SDOUT 33_4 R711 ACZ_SDOUT_AUDIO {29}
[ 0, 1, 0 ] = Micro MT40A512M16HA-083E:A ACZ_BCLK 33_4 R701
BOARD_ID8 [ 0, 0, 1 ] = Hynix H5AN8G6NAFR-TFC C3A BIT_CLK_AUDIO {29}
[ 0, 0, 0 ] = No Memory Down
B2A C770 Quanta Computer Inc.
BOARD_ID11 Hi = Skylake Lo = Kaby lake
*10P/50V_4
PROJECT : LV6
1A
SKYLAKE 13/15 (HDA/GPIO)
5 4 3 2 1
5 4 3 2 1
{4,10,11,14,17} +3V_DEEP_SUS
15
{9,13,51,53,54,56} +1.0V_DEEP_SUS
{5,9,42,53,56} +1.8V_DEEP_SUS
{4,10,12,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56} +3VS5
{4,13} +3V_RTC_2
{2,4,10,11,12,13,14,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
D D
?
SKL_ULT
U38O
CPU POWER 4 OF 4
+VCCPRIM AB19
C334 1U/6.3V_4X AB20 VCCPRIM_1P0 AK15 +VCCPGPPA
P18 VCCPRIM_1P0 VCCPGPPA AG15 +VCCPGPPB
VCCPRIM_1P0 2.899A VCCPGPPB +3V_DEEP_SUS
Y16 +VCCPGPPC
AF18 VCCPGPPC Y15 +VCCPGPPD
+1.0V_DEEP_SUS VCCPRIM_CORE VCCPGPPD
C326 *1U/6.3V_4X AF19 T16 +VCCPGPPE
V20 VCCPRIM_CORE VCCPGPPE AF16 +VCCPGPPF +VCCPGPPA R234 *0_4_S
VCCPRIM_CORE 2.57A VCCPGPPF
V21 AD15 +VCCPGPPG
VCCPRIM_CORE VCCPGPPG C404 *1U/6.3V_4X +VCCPGPPB R266 *0_4_S
+VCCDSW_1.0V AL1 V19 +3V_DEEP_SUS
C754 1U/6.3V_4X DCPDSW_1P0 VCCPRIM_3P3_V19 +VCCPGPPC R671 *0_4_S
K17 T1 +VCCPRIM_1.0V_T1 R633 *0_6_S
VCCMPHYAON_1P0 VCCPRIM_1P0_T1 +1.0V_DEEP_SUS
R627 *0_6_S +VCCMPHYAON_1P0 L1 +VCCPGPPD R207 *0_4_S
+1.0V_DEEP_SUS VCCMPHYAON_1P0
C269 1U/6.3V_4X AA1 +VCCATS_1.8V R655 *0_6_S
VCCATS_1P8 +1.8V_DEEP_SUS
N15 +VCCPGPPE R205 *0_4_S
N16 VCCMPHYGT_1P0_N15 AK17 +VCCRTCPRIM_3.3V R259 *0_6_S
VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3 +3V_DEEP_SUS
+1.0V_DEEP_SUS N17 1.714A +VCCPGPPG R229 *0_4_S
C202 1U/6.3V_4X P15 VCCMPHYGT_1P0_N17 AK19 +VCCRTC R286 *0_4_S
VCCMPHYGT_1P0_P15 VCCRTC_AK19 +3V_RTC_2
C177 47U/6.3V_8 P16 BB14
VCCMPHYGT_1P0_P16 VCCRTC_BB14
R202 *0_4_S +VCCAMPHYPLL_1P0 K15 BB10 DCPRTC C768 0.1U/16V/X7R_4 +1.8V_DEEP_SUS
+1.0V_DEEP_SUS VCCAMPHYPLL_1P0 DCPRTC
C285 *1U/6.3V_4X L15
VCCAMPHYPLL_1P0 A14 +VCCCLK1 R150 *0_6_S
VCCCLK1 +1.0V_DEEP_SUS
C
+1.0V_DEEP_SUS L12 HCB1608KF-221T20_2A +VCCAPLL_1.0V V15 0.03A +VCCPGPPF R681 *0_4_S C
C289 0.1U/16V/X7R_4 VCCAPLL_1P0 K19 +VCCCLK2 R161 *0_4_S
R221 *0_6_S +VCCPRIM AB17 VCCCLK2
+1.0V_DEEP_SUS VCCPRIM_1P0_AB17
R215 *0_6_S Y18 L21 +VCCCLK3 R673 *0_6_S
VCCPRIM_1P0_Y18 VCCCLK3
+3VS5 R226 *0_4_S AD17 N20 +VCCCLK4 R201 *0_4_S

C354 *1U/6.3V_4X AD18 VCCDSW_3P3_AD17 VCCCLK4 +VCCCLK2 C220 *10U/6.3V_4
VCCDSW_3P3_AD18 0.09A
C389 0.1U/16V/X7R_4 AJ17 L19 +VCCCLK5 R167 *0_4_S +VCCCLK4 C295 *10U/6.3V_4
C388 *0.1P/50V_4 VCCDSW_3P3_AJ17 VCCCLK5 +VCCCLK5 C247 *10U/6.3V_4
+V3.3DX_1.5DX_ADO_R AJ19 A10 +VCCCLK6 R157 *0_6_S +VCCAMPHYPLL_1P0 C286 *10U/6.3V_4
+V3.3DX_1.5DX_ADO VCCHDA VCCCLK6 C196 *1U/6.3V_4X
R260 *0_6_S +VCCSPI AJ16 AN11 CORE_VID0
+3V_DEEP_SUS VCCSPI GPP_B0/CORE_VID0 TP14
AN13 CORE_VID1
GPP_B1/CORE_VID1 TP10
AF20
R232 *0_6_S +VCCSRAM_1.0V AF21 VCCSRAM_1P0
+1.0V_DEEP_SUS VCCSRAM_1P0
C315 *1U/6.3V_4X T19
T20 VCCSRAM_1P0
VCCSRAM_1P0
R258 *0_6_S +VCCPRIM_3.3V AJ21
+3V_DEEP_SUS VCCPRIM_3P3_AJ21
R682 *0_6_S +VCCPRIM_1.0V AK20
+1.0V_DEEP_SUS VCCPRIM_1P0_AK20
+1.0V_DEEP_SUS R198 *0_6_S +VCCAPLLEBB N18
VCCAPLLEBB
1U/6.3V_4X C279
15 OF 20
SKL_ULT
REV = 1 ?
B B
+VCCATS_1.8V +VCCRTC +VCCRTCPRIM_3.3V
+V3.3DX_1.5DX_ADO +3V +1.0V_DEEP_SUS +3VS5 +3V_DEEP_SUS C745 C405 C411 C396 C395
1U/6.3V_4X 0.1U/16V/X7R_4 1U/6.3V_4X 1U/6.3V_4X 0.1U/16V/X7R_4
R194 *0_6_S
L13 HCB1608KF-221T20_2A
R230 *0_6_S
C213 C190
*1U/6.3V_4X *22U/6.3V/X5R_6
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C398 C756 C291

*1U/6.3V_4X *1U/6.3V_4X 1U/6.3V_4X
A A

PROJECT : LV6
1A
SKYPAKE 14/15(PCH POWER)
5 4 3 2 1
5 4 3 2 1
<DDR> (Memory Down)

16
{3,6,17,50} +1.2V_SUS
{17,50} +2.5V_SUS
{17,50} +0.6V_DDR_VTT
BYTE2_16-23
BYTE3_24-31
U19 U17 U18 U16
{3} M_A_DQ[63:0]
{3} M_A_A[13:0] +SMDDR_VREF_DIMM M_A_DQ61 +SMDDR_VREF_DIMM M_A_DQ16 +SMDDR_VREF_DIMM M_A_DQ45 +SMDDR_VREF_DIMM M_A_DQ5
D M1 G2 M1 G2 M1 G2 M1 G2 D
B1 VREFCA DQL0 F7 M_A_DQ59 B1 VREFCA DQL0 F7 M_A_DQ18 B1 VREFCA DQL0 F7 M_A_DQ43 B1 VREFCA DQL0 F7 M_A_DQ3
+2.5V_SUS VPP DQL1 M_A_DQ56 +2.5V_SUS VPP DQL1 M_A_DQ17 +2.5V_SUS VPP DQL1 M_A_DQ41 +2.5V_SUS VPP DQL1 M_A_DQ0
R9 H3 R9 H3 R9 H3 R9 H3
VPP DQL2 H7 M_A_DQ63 VPP DQL2 H7 M_A_DQ22 VPP DQL2 H7 M_A_DQ47 VPP DQL2 H7 M_A_DQ6
DQL3 H2 M_A_DQ60 DQL3 H2 M_A_DQ20 DQL3 H2 M_A_DQ44 DQL3 H2 M_A_DQ4
DQL4 H8 M_A_DQ62 DQL4 H8 M_A_DQ23 DQL4 H8 M_A_DQ46 DQL4 H8 M_A_DQ7
M_A_A0 P3 DQL5 J3 M_A_DQ57 M_A_A0 P3 DQL5 J3 M_A_DQ21 M_A_A0 P3 DQL5 J3 M_A_DQ40 M_A_A0 P3 DQL5 J3 M_A_DQ1
M_A_A1 P7 A0 DQL6 J7 M_A_DQ58 M_A_A1 P7 A0 DQL6 J7 M_A_DQ19 M_A_A1 P7 A0 DQL6 J7 M_A_DQ42 M_A_A1 P7 A0 DQL6 J7 M_A_DQ2
M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7
M_A_A3 N7 A2 M_A_A3 N7 A2 M_A_A3 N7 A2 M_A_A3 N7 A2
M_A_A4 N3 A3 A3 M_A_DQ48 M_A_A4 N3 A3 A3 M_A_DQ25 M_A_A4 N3 A3 A3 M_A_DQ36 M_A_A4 N3 A3 A3 M_A_DQ13
M_A_A5 P8 A4 DQU0 B8 M_A_DQ54 M_A_A5 P8 A4 DQU0 B8 M_A_DQ31 M_A_A5 P8 A4 DQU0 B8 M_A_DQ34 M_A_A5 P8 A4 DQU0 B8 M_A_DQ15
M_A_A6 P2 A5 DQU1 C3 M_A_DQ53 M_A_A6 P2 A5 DQU1 C3 M_A_DQ24 M_A_A6 P2 A5 DQU1 C3 M_A_DQ37 M_A_A6 P2 A5 DQU1 C3 M_A_DQ8
M_A_A7 R8 A6 DQU2 C7 M_A_DQ55 M_A_A7 R8 A6 DQU2 C7 M_A_DQ26 M_A_A7 R8 A6 DQU2 C7 M_A_DQ38 M_A_A7 R8 A6 DQU2 C7 M_A_DQ14
M_A_A10 M3 A9 DQU5 D3 M_A_DQ52 M_A_A10 M3 A9 DQU5 D3 M_A_DQ29 M_A_A10 M3 A9 DQU5 D3 M_A_DQ32 M_A_A10 M3 A9 DQU5 D3 M_A_DQ9
M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ50 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ30 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ35 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQ11
M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7
M_A_A13 T8 A12/BC +1.2V_SUS M_A_A13 T8 A12/BC +1.2V_SUS M_A_A13 T8 A12/BC +1.2V_SUS M_A_A13 T8 A12/BC +1.2V_SUS
M_A_WE# L2 A13 M_A_WE# L2 A13 M_A_WE# L2 A13 M_A_WE# L2 A13
{3} M_A_WE# M_A_CAS# M8 WE_n/A14 B3 M_A_CAS# M8 WE_n/A14 B3 M_A_CAS# M8 WE_n/A14 B3 M_A_CAS# M8 WE_n/A14 B3
{3} M_A_CAS# M_A_RAS# L8 CAS_n/A15 VDD#B3 B9 M_A_RAS# L8 CAS_n/A15 VDD#B3 B9 M_A_RAS# L8 CAS_n/A15 VDD#B3 B9 M_A_RAS# L8 CAS_n/A15 VDD#B3 B9
{3} M_A_RAS# RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1
VDD#D1 G7 VDD#D1 G7 VDD#D1 G7 VDD#D1 G7
VDD#G7 J1 VDD#G7 J1 VDD#G7 J1 VDD#G7 J1
M_A_BS#0 N2 VDD#J1 J9 M_A_BS#0 N2 VDD#J1 J9 M_A_BS#0 N2 VDD#J1 J9 M_A_BS#0 N2 VDD#J1 J9
{3} M_A_BA#0 M_A_BS#1 N8 BA0 VDD#J9 L1 M_A_BS#1 N8 BA0 VDD#J9 L1 M_A_BS#1 N8 BA0 VDD#J9 L1 M_A_BS#1 N8 BA0 VDD#J9 L1
{3} M_A_BA#1 M_A_BG#0 M2 BA1 VDD#L1 L9 M_A_BG#0 M2 BA1 VDD#L1 L9 M_A_BG#0 M2 BA1 VDD#L1 L9 M_A_BG#0 M2 BA1 VDD#L1 L9
{3} M_A_BG#0 BG0 VDD#L9 R1 BG0 VDD#L9 R1 BG0 VDD#L9 R1 BG0 VDD#L9 R1
VDD#R1 T9 VDD#R1 T9 VDD#R1 T9 VDD#R1 T9
VDD#T9 VDD#T9 VDD#T9 VDD#T9
M_A_CLKP0 K7 A1 M_A_CLKP0 K7 A1 M_A_CLKP0 K7 A1 M_A_CLKP0 K7 A1
{3} M_A_CLKP0 M_A_CLKN0 K8 CK_t VDDQ#A1 A9 M_A_CLKN0 K8 CK_t VDDQ#A1 A9 M_A_CLKN0 K8 CK_t VDDQ#A1 A9 M_A_CLKN0 K8 CK_t VDDQ#A1 A9
{3} M_A_CLKN0 M_A_CKE0 K2 CK_c VDDQ#A9 C1 M_A_CKE0 K2 CK_c VDDQ#A9 C1 M_A_CKE0 K2 CK_c VDDQ#A9 C1 M_A_CKE0 K2 CK_c VDDQ#A9 C1
C {3} M_A_CKE0 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1 C
D9 D9 D9 D9
VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2
M_A_ODT0 K3 VDDQ#F2 F8 M_A_ODT0 K3 VDDQ#F2 F8 M_A_ODT0 K3 VDDQ#F2 F8 M_A_ODT0 K3 VDDQ#F2 F8
{3} M_A_ODT0_CPU M_A_CS#0 L7 ODT VDDQ#F8 G1 M_A_CS#0 L7 ODT VDDQ#F8 G1 M_A_CS#0 L7 ODT VDDQ#F8 G1 M_A_CS#0 L7 ODT VDDQ#F8 G1
{3} M_A_CS#0 CS VDDQ#G1 G9 CS VDDQ#G1 G9 CS VDDQ#G1 G9 CS VDDQ#G1 G9
M_A_DQSP7 G3 VDDQ#G9 J2 M_A_DQSP2 G3 VDDQ#G9 J2 M_A_DQSP5 G3 VDDQ#G9 J2 M_A_DQSP0 G3 VDDQ#G9 J2
{3} M_A_DQSP7 M_A_DQSP6 B7 DQSL_t VDDQ#J2 J8 {3} M_A_DQSP2 M_A_DQSP3 B7 DQSL_t VDDQ#J2 J8 {3} M_A_DQSP5 M_A_DQSP4 B7 DQSL_t VDDQ#J2 J8 {3} M_A_DQSP0 M_A_DQSP1 B7 DQSL_t VDDQ#J2 J8
{3} M_A_DQSP6 DQSU_t VDDQ#J8 {3} M_A_DQSP3 DQSU_t VDDQ#J8 {3} M_A_DQSP4 DQSU_t VDDQ#J8 {3} M_A_DQSP1 DQSU_t VDDQ#J8
M_A_DQSN7 F3 B2 M_A_DQSN2 F3 B2 M_A_DQSN5 F3 B2 M_A_DQSN0 F3 B2
{3} M_A_DQSN7 M_A_DQSN6 A7 DQSL_c VSS#B2 E1 {3} M_A_DQSN2 M_A_DQSN3 A7 DQSL_c VSS#B2 E1 {3} M_A_DQSN5 M_A_DQSN4 A7 DQSL_c VSS#B2 E1 {3} M_A_DQSN0 M_A_DQSN1 A7 DQSL_c VSS#B2 E1
{3} M_A_DQSN6 DQSU_c VSS#E1 {3} M_A_DQSN3 DQSU_c VSS#E1 {3} M_A_DQSN4 DQSU_c VSS#E1 {3} M_A_DQSN1 DQSU_c VSS#E1
E9 E9 E9 E9
VSS#E9 G8 VSS#E9 G8 VSS#E9 G8 VSS#E9 G8
VSS#G8 K1 VSS#G8 K1 VSS#G8 K1 VSS#G8 K1
VSS#K1 K9 VSS#K1 K9 VSS#K1 K9 VSS#K1 K9
E7 VSS#K9 M9 E7 VSS#K9 M9 E7 VSS#K9 M9 E7 VSS#K9 M9
+1.2V_SUS DML_n/DBIL_n VSS#M9 +1.2V_SUS DML_n/DBIL_n VSS#M9 +1.2V_SUS DML_n/DBIL_n VSS#M9 +1.2V_SUS DML_n/DBIL_n VSS#M9
E2 N1 E2 N1 E2 N1 E2 N1
DMU_n/DBIU_n VSS#N1 T1 DMU_n/DBIU_n VSS#N1 T1 DMU_n/DBIU_n VSS#N1 T1 DMU_n/DBIU_n VSS#N1 T1
VSS#T1 VSS#T1 VSS#T1 VSS#T1
DDR4_DRAMRST# P1 A2 DDR4_DRAMRST# P1 A2 DDR4_DRAMRST# P1 A2 DDR4_DRAMRST# P1 A2

{3,17} DDR4_DRAMRST# RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2
R377 240/F_4 M_A1_ZQ0 F9 A8 R380 240/F_4 M_A2_ZQ0 F9 A8 R376 240/F_4 M_A3_ZQ0 F9 A8 R375 240/F_4 M_A4_ZQ0 F9 A8
N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9
TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2
VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8
DDR0_ALERT# P9 VSSQ#D8 E3 DDR0_ALERT# P9 VSSQ#D8 E3 DDR0_ALERT# P9 VSSQ#D8 E3 DDR0_ALERT# P9 VSSQ#D8 E3
{3} M_A_ALERT# DDRA_ACT# ALERT_n VSSQ#E3 DDRA_ACT# ALERT_n VSSQ#E3 DDRA_ACT# ALERT_n VSSQ#E3 DDRA_ACT# ALERT_n VSSQ#E3
L3 E8 L3 E8 L3 E8 L3 E8
{3} M_A_ACT# DDR0_PAR ACT_n VSSQ#E8 DDR0_PAR ACT_n VSSQ#E8 DDR0_PAR ACT_n VSSQ#E8 DDR0_PAR ACT_n VSSQ#E8
T3 F1 T3 F1 T3 F1 T3 F1
{3} M_A_PARITY PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1
H1 H1 H1 H1
VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9
T7 VSSQ#H9 T7 VSSQ#H9 T7 VSSQ#H9 T7 VSSQ#H9
NC NC NC NC
96-BALL 96-BALL 96-BALL 96-BALL
DDR4 DDR4 DDR4 DDR4
B MT40A512M16HA-083E:A MT40A512M16HA-083E:A MT40A512M16HA-083E:A MT40A512M16HA-083E:A B
+0.6V_DDR_VTT Place these Caps near Channel A
+1.2V_SUS +0.6V_DDR_VTT +2.5V_SUS

+0.6V_DDR_VTT
C487 1U/6.3V_4X
M_A_BS#0 R393 36/F_4 C516 1U/6.3V_4X C528 1U/6.3V_4X +1.2V_SUS
M_A_BS#1 R396 36/F_4 C481 1U/6.3V_4X
M_A_BG#0 R391 36/F_4 C479 C530 1U/6.3V_4X C533 1U/6.3V_4X
M_A_CKE0 R364 36/F_4 0.01U/50V/X7R_4 C478 1U/6.3V_4X
M_A_CS#0 R369 36/F_4 C522 1U/6.3V_4X C527 10U/6.3V_4 R371
M_A_A0 R397 36/F_4 M_A_CLKP0 R362 36/F_4 +DDR_VTT_RUN_A C488 1U/6.3V_4X 1.8K/F_4
M_A_A1 R402 36/F_4 M_A_CLKN0 R361 36/F_4 C531 1U/6.3V_4X C526 10U/6.3V_4
M_A_A2 R415 36/F_4 C506 1U/6.3V_4X R372 2.7/F_6 +SMDDR_VREF_DIMM
M_A_A3 {3} SM_VREF_CA
R388 36/F_4 C514 10U/6.3V/X5R_6X
M_A_A4 R384 36/F_4 C482 1U/6.3V_4X
M_A_A5 R409 36/F_4 1023 change cap from
M_A_A6 R405 36/F_4 C504 1U/6.3V_4X R382
0.2pF to 3.3pF
1
M_A_A7 R416 36/F_4 1.8K/F_4
M_A_A8 R420 36/F_4 C503 1U/6.3V_4X +SMDDR_VREF_DIMM C486
M_A_A9 R414 36/F_4 M_A_CLKP0 C477 3.3p/50V_4 M_A_CLKN0 0.022U/16V/X7R_4
R366
2
M_A_A10 R385 36/F_4 C480 10U/6.3V/X5R_6X C511 *0.1U/16V/X7R_4
M_A_A11 R424 36/F_4 C502 10U/6.3V/X5R_6X
A M_A_A12 A
R387 36/F_4 C494 *2.2U/6.3V_4
M_A_A13 R426 36/F_4 +1.2V_SUS C492 10U/6.3V/X5R_6X
M_A_WE# R370 36/F_4 C501 10U/6.3V/X5R_6X 24.9/F_4
M_A_CAS# R389 36/F_4 +1.2V_SUS
M_A_RAS# R373 36/F_4 R413 C510 10U/6.3V/X5R_6X
M_A_ODT0 R363 36/F_4 49.9/F_4 C505 10U/6.3V/X5R_6X
DDR0_PAR R411 36/F_4 EC22 E@120P/50V_4N
DDRA_ACT# R367 36/F_4 C483 10U/6.3V/X5R_6X EC23 E@120P/50V_4N
DDR0_ALERT# C484 10U/6.3V/X5R_6X EC26 E@120P/50V_4N
+0.6V_DDR_VTT
EC20
EC25
E@120P/50V_4N
E@120P/50V_4N
EC27 E@120P/50V_4N
C529 *0.1U/16V/X7R_4 DDR4_DRAMRST# EC28 E@120P/50V_4N EC24 E@120P/50V_4N
PROJECT : LV6
EC29 E@120P/50V_4N EC21 E@120P/50V_4N Size Document Number Rev
1A
DDR4 MEMORY DOWN
5 4 3 2 1
5 4 3 2 1
<DDR> (STD)
17
{3,6,16,50} +1.2V_SUS
{2,4,10,11,12,13,14,15,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
{16,50} +2.5V_SUS
{3} M_B_A[13:0] M_B_DQ[63:0] {3} {16,50} +0.6V_DDR_VTT
CON1A {4,10,11,14,15} +3V_DEEP_SUS
M_B_A0 144 8 M_B_DQ12
M_B_A1 133 A0 DQ0 7 M_B_DQ8
M_B_A2 132 A1 DQ1 20 M_B_DQ11
M_B_A3 131 A2 DQ2 21 M_B_DQ15
M_B_A4 128 A3 DQ3 4 M_B_DQ13 CON1B
M_B_A5 126 A4 DQ4 3 M_B_DQ9 111
M_B_A6 127 A5 DQ5 16 M_B_DQ10 112 VDD1
M_B_A7 122 A6 DQ6 17 M_B_DQ14 2250mA 117 VDD2
M_B_A8 125 A7 DQ7 28 M_B_DQ1 118 VDD3 255
D M_B_A9 121 A8 DQ8 29 M_B_DQ4 123 VDD4 VDDSPD +3V D
A9 DQ9 +1.2V_SUS VDD5
M_B_A10 146 41 M_B_DQ7 124
M_B_A11 120 A10/AP DQ10 42 M_B_DQ2 129 VDD6 257
M_B_A12 119 A11 DQ11 24 M_B_DQ0 130 VDD7 VPP1 259 +2.5V_SUS 0.5A
M_B_A13 158 A12 DQ12 25 M_B_DQ5 135 VDD8 VPP2
151 A13 DQ13 38 M_B_DQ3 136 VDD9
{3} M_B_WE# 156 A14/WE# DQ14 37 M_B_DQ6 141 VDD10 258
{3} M_B_CAS# 152 A15/CAS# DQ15 50 M_B_DQ21 142 VDD11 VTT +0.6V_DDR_VTT 600mA
{3} M_B_RAS# A16/RAS# DQ16 49 M_B_DQ19 147 VDD12
162 DQ17 62 M_B_DQ23 148 VDD13
TP25 165 S2#/C0 DQ18 63 M_B_DQ17 153 VDD14 164 VREF_CA_DIMM1
TP24 S3#/C1 DQ19 46 M_B_DQ16 154 VDD15 VREF_CA
DQ20 45 M_B_DQ20 159 VDD16
114 DQ21 58 M_B_DQ22 160 VDD17
{3} M_B_ACT# 143 ACT# DQ22 59 M_B_DQ18 163 VDD18
{3} M_B_PARITY 116 PARITY DQ23 70 M_B_DQ24 VDD19
{3} M_B_ALERT# M_B_EVENT# 134 ALERT# DQ24 71 M_B_DQ29
DDR4 SODIMM 260 PIN

108 EVENT# DQ25 83 M_B_DQ30 1 2
+3V {3,16} DDR4_DRAMRST# RESET# DQ26 VSS1 VSS48
84 M_B_DQ31 5 6
DDR4 SODIMM 260 PIN

DQ27 66 M_B_DQ25 9 VSS2 VSS49 10
DQ28 67 M_B_DQ28 15 VSS3 VSS50 14
R341 240/F_4 M_B_EVENT# DQ29 79 M_B_DQ26 19 VSS4 VSS51 18
+1.2V_SUS DQ30 M_B_DQ27 VSS5 VSS52
80 23 22
DQ31 174 M_B_DQ33 27 VSS6 VSS53 26
R351 R352 R359 DQ32 173 M_B_DQ32 31 VSS7 VSS54 30
*10K_4 10K_4 *10K_4 DQ33 187 M_B_DQ34 35 VSS8 VSS55 36
DQ34 186 M_B_DQ35 39 VSS9 VSS56 40
CHB_SA0 CHB_SA1 CHB_SA2 DQ35 170 M_B_DQ37 43 VSS10 VSS57 44
DQ36 169 M_B_DQ36 47 VSS11 VSS58 48
R350 R353 R360 DQ37 183 M_B_DQ39 51 VSS12 VSS59 52
10K_4 *10K_4 10K_4 DQ38 182 M_B_DQ38 57 VSS13 VSS60 56
DQ39 195 M_B_DQ41 61 VSS14 VSS61 60
150 DQ40 194 M_B_DQ40 65 VSS15 VSS62 64
(260P)
{3} M_B_BA#0 145 BA0 DQ41 207 M_B_DQ42 69 VSS16 VSS63 68
{3} M_B_BA#1 115 BA1 DQ42 208 M_B_DQ47 73 VSS17 VSS64 72
(260P)
{3} M_B_BG#0 113 BG0 DQ43 191 M_B_DQ44 77 VSS18 VSS65 78
C {3} M_B_BG#1 BG1 DQ44 VSS19 VSS66 C
190 M_B_DQ45 81 82
149 DQ45 203 M_B_DQ43 85 VSS20 VSS67 86
{3} M_B_CS#0 157 S0# DQ46 204 M_B_DQ46 89 VSS21 VSS68 90
{3} M_B_CS#1 109 S1# DQ47 216 M_B_DQ48 93 VSS22 VSS69 94
{3} M_B_CKE0 110 CKE0 DQ48 215 M_B_DQ53 99 VSS23 VSS70 98
{3} M_B_CKE1 CKE1 DQ49 228 M_B_DQ54 103 VSS24 VSS71 102
137 DQ50 229 M_B_DQ50 107 VSS25 VSS72 106
{3} M_B_CLKP0 139 CK0 DQ51 211 M_B_DQ52 167 VSS26 VSS73 168
{3} M_B_CLKN0 138 CK0# DQ52 212 M_B_DQ49 171 VSS27 VSS74 172
{3} M_B_CLKP1 140 CK1 DQ53 224 M_B_DQ51 175 VSS28 VSS75 176
{3} M_B_CLKN1 CK1# DQ54 225 M_B_DQ55 181 VSS29 VSS76 180
155 DQ55 237 M_B_DQ56 +1.2V_SUS 185 VSS30 VSS77 184
{3} M_B_ODT0_CPU 161 ODT0 DQ56 236 M_B_DQ61 189 VSS31 VSS78 188
{3} M_B_ODT1_CPU ODT1 DQ57 249 M_B_DQ58 193 VSS32 VSS79 192
253 DQ58 250 M_B_DQ63 197 VSS33 VSS80 196
{10,27} SMB_RUN_CLK 254 SCL DQ59 232 M_B_DQ60 201 VSS34 VSS81 202
R335
{10,27} SMB_RUN_DAT SDA DQ60 233 M_B_DQ57 205 VSS35 VSS82 206
DQ61 240/F_4 VSS36 VSS83
CHB_SA0 256 245 M_B_DQ59 209 210
CHB_SA1 260 SA0 DQ62 246 M_B_DQ62 213 VSS37 VSS84 214
CHB_SA2 166 SA1 DQ63 M_B_DQSP[7:0] {3} M_B_DQSP8 217 VSS38 VSS85 218
SA2 13 M_B_DQSP1 223 VSS39 VSS86 222
M_B_CB0 92 DQS0 34 M_B_DQSP0 +1.2V_SUS 227 VSS40 VSS87 226
R344 240/F_4 CB0 DQS1 VSS41 VSS88
R333 240/F_4 M_B_CB1 91 55 M_B_DQSP2 231 230
M_B_CB2 101 CB1 DQS2 76 M_B_DQSP3 235 VSS42 VSS89 234
R346 240/F_4 CB2 DQS3 VSS43 VSS90
R347 240/F_4 M_B_CB3 105 179 M_B_DQSP4 239 238
+1.2V_SUS M_B_CB4 CB3 DQS4 M_B_DQSP5 VSS44 VSS91
R345 240/F_4 88 200 243 244
M_B_CB5 87 CB4 DQS5 221 M_B_DQSP6 R334 247 VSS45 VSS92 248
R332 240/F_4 CB5 DQS6 VSS46 VSS93
R348 240/F_4 M_B_CB6 100 242 M_B_DQSP7 240/F_4 251 252
M_B_CB7 104 CB6 DQS7 97 M_B_DQSP8 VSS47 VSS94
R349 240/F_4 CB7 DQS8 M_B_DQSN8
12 11 M_B_DQSN1 M_B_DQSN[7:0] {3}
33 DM0 DQS#0 32 M_B_DQSN0 261
54 DM1 DQS#1 53 M_B_DQSN2 GND 262
75 DM2 DQS#2 74 M_B_DQSN3 GND
178 DM3 DQS#3 177 M_B_DQSN4
+1.2V_SUS DM4 DQS#4 M_B_DQSN5
B 199 198 B
DM8 DQS#8
+1.2V_SUS
Place these Caps near So-Dimm1
EC19 *E@3.3P/50V/C0G_4
C442 1U/6.3V_4X
+0.6V_DDR_VTT
VREF CA DIMM1 Solution C441 1U/6.3V_4X
C470 *3.3P/50V/C0G_4
C458 1U/6.3V_4X
+1.2V_SUS C475 *10U/6.3V_4 +2.5V_SUS
C463 1U/6.3V_4X
+3V_DEEP_SUS C469 *10U/6.3V_4
DDR4 SODIMM ODT GENERATION +1.2V_SUS {3} SM_VREF_DQ1
C443 10U/6.3V_4 C437 1U/6.3V_4X
C471 1U/6.3V_4X
C440 10U/6.3V_4 C447 1U/6.3V_4X
R354 C472 1U/6.3V_4X
R357
U45 R707 1K/F_4 C444 10U/6.3V_4 C446 10U/6.3V_4
*0_4_S C473 1U/6.3V_4X
10K_4
1 5 C457 10U/6.3V_4 C448 10U/6.3V_4
1.2V Level NC VCC C474 1U/6.3V_4X
1
C449 E@100P/50V_4
R686 *0_4_S 2 C771
{3} DDR_PG_CTRL A 0.1U/16V/X7R_4 VREF_CA_DIMM1 C462 10U/6.3V_4
2
R356 2/F_4
3 4 C439 E@100P/50V_4
GND Y DDR_PG {50} +3V
2
C461 10U/6.3V_4 VREF_CA_DIMM1 EC18 *E@3.3P/50V/C0G_4

C455
74AUP1G07GW R355
R708 0.022U/16V/X7R_4
1
1K/F_4 C459 10U/6.3V_4 C464 *0.047U/10V_4 C450 0.1U/16V/X7R_4
A C460 1U/6.3V_4X C466 0.1U/16V/X7R_4 C467 2.2U/6.3V/X5R_4 A

*2M_4 R343
(to power on VTT)
24.9/F_4 C445 1U/6.3V_4X C465 2.2U/6.3V/X5R_4
C438 1U/6.3V_4X
C456 1U/6.3V_4X

PROJECT : LV6
1A
DDR4 DIMM1-RVS
5 4 3 2 1
18
U34A
PEG_TXP0 AF30 AH30 C_PEG_RXP0 C716 EV@0.22U/10V_4X

{12} PEG_TXP0 PEG_TXN0 PCIE_RX0P PCIE_TX0P C_PEG_RXN0 PEG_RXP0 {12}
AE31 AG31 C713 EV@0.22U/10V_4X
{12} PEG_TXN0 PCIE_RX0N PCIE_TX0N PEG_RXN0 {12}
PEG_TXP1 AE29 AG29 C_PEG_RXP1 C712 EV@0.22U/10V_4X

{12} PEG_TXP1 PEG_TXN1 AD28 PCIE_RX1P PCIE_TX1P AF28 C_PEG_RXN1 PEG_RXP1 {12}
C710 EV@0.22U/10V_4X
PEG_TXP2 AD30 AF27 C_PEG_RXP2 C699 EV@0.22U/10V_4X

AC31 AF26 C704 EV@0.22U/10V_4X
PEG_TXP3 AC29 AD27 C_PEG_RXP3 C707 EV@0.22U/10V_4X

AB28 AD26 C709 EV@0.22U/10V_4X
AB30 AC25
AA31 PCIE_RX4P PCIE_TX4P AB25
PCIE_RX4N PCIE_TX4N
AA29 Y23
PCIE_RX5P PCIE_TX5P
PCI EXPRESS INTERFACE

Y28 Y24
PCIE_RX5N PCIE_TX5N
Y30 AB27
W31 PCIE_RX6P PCIE_TX6P AB26
PCIE_RX6N PCIE_TX6N
W29 Y27
V28 PCIE_RX7P PCIE_TX7P Y26
PCIE_RX7N PCIE_TX7N
V30 W24
U31 NC#V30 NC#W24 W23
NC#U31 NC#W23
U29 V27
T28 NC#U29 NC#V27 U26
NC#T28 NC#U26
T30 U24
R31 NC#T30 NC#U24 U23
NC#R31 NC#U23
R29 T26
P28 NC#R29 NC#T26 T27
NC#P28 NC#T27
P30 T24
N31 NC#P30 NC#T24 T23
NC#N31 NC#T23
N29 P27
M28 NC#N29 NC#P27 P26
NC#M28 NC#P26
M30 P24
L31 NC#M30 NC#P24 P23
NC#L31 NC#P23
L29 M27
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26
CLOCK
AK30
{13} CLK_PCIE_VGAP AK32 PCIE_REFCLKP
{13} CLK_PCIE_VGAN PCIE_REFCLKN
CALIBRATION
Y22 SUN_PCIE_CALRP R162 EV@1.69K/F_4
PCIE_CALR_TX +0.95V_VGA
R164 EV@1K_4 TEST_PG N10 AA22 SUN_PCIE_CALRN R168 EV@1K/F_4
TEST_PG PCIE_CALR_RX
PERST#_BUF AL27
PERSTB
C294 EV@100P/50V_4
EV@100-CG2633(216-0867030)
dGPU power enable
+3V
R214
+3V *EV@1K_4
C3A
C339 E@0.1U/16V/X7R_4
D7 *EV@DB2J40600L R208 *EV@0_4 DGPU_PWR_EN
{4,36} SUSB# DGPU_PWR_EN {14,56}
5
U8
{14} DGPU_HOLD_RST# 2
4 PERST#_BUF
{4,28,30,31,33,36,37} PLTRST# 1
EV@TC7SH08FU(F) R209
3
*EV@100K_4

PROJECT : LV6
1A
JET_S3_PCIE_Interface
The SMBus slave ID is default 0x41 U34G
19
U34B DP POWER NC/DP POWER
+3V_VGA
AG15 AE11
AG16 NC_DP_VDDR#1 NC#AE11 AF11
+3V_VGA R191 AF2 AF16 NC_DP_VDDR#2 NC#AF11 AE13
EV@47K_4 NC#AF2 AF4 AG17 NC_DP_VDDR#3 NC#AE13 AF13
DVO NC#AF4 +1.8V_VGA NC_DP_VDDR#4 NC#AF13
AG18 AG8
NC_DP_VDDR#5 NC#AG8
2
N9 AG3 AG19 AG10
L9 DBG_DATA16 NC#AG3 AG5 AF14 NC_DP_VDDR#6 NC#AG10
DGPUT_DATA DBG_DATA15 DPA NC#AG5 DP_PVDD
{10,36,37,42} MBDATA_THRM 6 1 AE9
Y11 DBG_DATA14 AH3
Q19A AE8 DBG_DATA13 NC#AH3 AH1 C265 C300 C284
EV@2N7002KDW AD9 DBG_DATA12 NC#AH1 M1@0.1U/16V/X7R_4 EV@10U/6.3V/X5R_6XEV@1U/10V/X5R_4
+3V_VGA AC10 DBG_DATA11 AK3
AD7 DBG_DATA10 NC#AK3 AK1 AG20 AF6
+3V_VGA AC8 DBG_DATA9 NC#AK1 AG21 NC_DP_VDDC#1 NC#AF6 AF7
R186 AC7 DBG_DATA8 AK5 +0.95V_VGA AF22 NC_DP_VDDC#2 NC#AF7 AF8
EV@47K_4 AB9 DBG_DATA7 NC#AK5 AM3 AG22 NC_DP_VDDC#3 NC#AF8 AF9
AB8 DBG_DATA6 NC#AM3 AD14 NC_DP_VDDC#4 NC#AF9
DBG_DATA5 DP_VDDC
5
AB7 AK6
AB4 DBG_DATA4 NC#AK6 AM5
3 4 DGPUT_CLK AB2 DBG_DATA3 NC#AM5 C664 C272 C259
{10,36,37,42} MBCLK_THRM DBG_DATA2 DPB
Y8 AJ7 M1@10U/10V_8X EV@1U/10V/X5R_4 EV@0.1U/16V/X7R_4AG14 AE1
Q19B Y7 DBG_DATA1 NC#AJ7 AH6 AH14 NC_DP_VSSR#1 NC#AE1 AE3
EV@2N7002KDW DBG_DATA0 NC#AH6 AM14 NC_DP_VSSR#2 NC#AE3 AG1
DGPU_OPP# AK8 AM16 NC_DP_VSSR#3 NC#AG1 AG6
NC#AK8 AL7 AM18 NC_DP_VSSR#4 NC#AG6 AH5
PU/PD D3A NC#AL7 AF23 NC_DP_VSSR#5 NC#AH5 AF10
+3V_VGA AG23 NC_DP_VSSR#6 NC#AF10 AG9
NC_DP_VSSR#7 NC#AG9
3
Q17 W6 DPC AM20 AH8
R185 V6 NC#W6 AM22 NC_DP_VSSR#8 NC#AH8 AM6
R184 EV@10K_4 DGPU_OPP# NC#V6 V4 AM24 NC_DP_VSSR#9 NC#AM6 AM8
DGPU_OPP 2 NC#V4 U5 AF19 NC_DP_VSSR#10 NC#AM8 AG7
OCP_L {36} DGPU_OPP NC#U5 NC_DP_VSSR#11 NC#AG7
R178 *EV@10K_4 *EV@10K_4 AC5 AF20 AG11
AC6 NC#AC5 AE14 NC_DP_VSSR#12 NC#AG11
R562 *EV@10K_4 DGPU_TDI EV@2N7002K N#CAC6 V2 DP_VSSR
NC#V2
1
R560 *EV@10K_4 DGPU_TMS Y4
AA5 NC#Y4 W5
R556 *EV@10K_4 DGPU_TDO AA6 NC#AA5 NC#W5 AF17 AE10
NC#AA6 NC_UPHYAB_DP_CALR NC#AE10
R156 *EV@10K_4 DGPU_TRSTB Y2
NC#Y2 J8
R567 EV@10K_4 PEX_CLKREQ# R585 M2@10K_4 U1 NC#J8 EV@100-CG2633(216-0867030)
+1.8V_VGA NC#U1/BP_0 AA1
VGA_ALERT NC#AA1/PLL_ANALOG_IN TP41
R171 EV@10K_4 R584 M2@10K_4 U3 AA3
R155 Y6 NC#U3/BP_1 NC#AA3/PLL_ANALOG_OUT
R159 *EV@5.1K/F_4 TESTEN NC#Y6
R604 SVC SVD Output Voltage
EV@1K_4 M2@16.2K/F_4
R563 EV@10K_4 TEMP_FAIL R571 *EV@10K_4 R1 PLL_ANALOG_OUT: Provide a pull-down

+3V_VGA SCL resistor on the PCB (DNI).FOR TOPAZ ONLY
0 0 1.1 Volts
R572 *EV@10K_4 R3 I2C
R561 *EV@10K_4 DGPU_TCK SDA
AM26 0 1 1.0 Volts
GENERAL PURPOSE I/O DCM/NC_R AK26 +3V_VGA
U6 NC_AVSSN#AK26
GPIO_0 AL25 R644 PCIeR Optimized Buffer Flush/Fill (OBFF)
NC_G on WAKEB FOR TOPAZ ONLY
1 0 0.9 Volts R16M Boot
AJ25 *M2@10K_4
DGPUT_DATA U8 NC_AVSSN#AJ25
DGPUT_CLK U7 SMBDATA AH24
DGPU_OPP# SMBCLK NC_B 1 1 0.8 Volts
T9 AG25 R645
GPIO_5_AC_BATT NC_AVSSN#AG25
2
R179 *EV@1K/F_4 GPU_GPIO6 T8 EV@4.7K_4
{52} OCP_L PCC/GPIO_6
T7 DAC1 AH26 Q20
P10 NC_GPIO_7 NC_HSYNC AJ27 PCIE_WAKE#_GPU 1 3 PCIE_WAKE#
GPIO_8_ROMSO NC_VSYNC/WAKEb PCIE_WAKE# {4,30,33}
C264 P4
*EV@0.1U/16V/X7R_4 P2 GPIO_9_ROMSI *EV@2N7002K
N6 GPIO_10_ROMSCK
NC_GPIO_11 NC_RSET
AD22 Level Shift
N5 R639
N3 NC_GPIO_12 AG24
{36,37,55} SYS_SHDN# *EV@10K_4
NC_GPIO_13 NC_AVDD AE22 +1.8V_VGA +1.8V_VGA +3V_VGA +1.8V_VGA
GPU_GPIO15 N1 NC_AVSSQ U37 +3V_VGA
GPIO_15_PWRCNTL_0
3
Q14 M4 AE23
*EV@2N7002K VGA_ALERT R6 GPIO_16 NC_VDD1DI AD23 C230 1 6
GPIO_17_THERMAL_INT NC_VSS1DI VCCA VCCB
2 TEMP_FAIL M2 M1@0.1U/16V/X7R_4 R610 R197 R573 R166
GPU_GPIO20 P8 GPIO_19_CTF AM12 *M2@10K_4 *M1@10K_4 GPU_SVD_R 3 4 GPU_GPIO15
M2@10K_4 M1@10K_4
P7 GPIO_20_PWRCNTL_1 NC A B +1.8V_VGA
+3V_VGA N8 GPIO_21
AK10 GPIO_22_ROMCSB AK12 R616 M2@0_4 GPU_SVD_R GPU_SVD_R GPU_GPIO15 2 5 R607 M1@10K_4
1
AM10 GPIO_29 NC_SVI2#1/GPIO_SVD AL11 GPU_SVT GND OE

PEX_CLKREQ# N7 GPIO_30 NC_SVI2#2/GPIO_SVT AJ11 R621 M2@0_4 GPU_SVC_R
DGPU_TRSTB L6 CLKREQB NC_SVI2#3/GPIO_SVC GPU_SVC_R GPU_GPIO20 M1@G2129TL1U
JTAG_TRSTB +1.8V_VGA U7 +3V_VGA
2
DGPU_TDI L5 AL13 R605 R193 R566 R172 1 6

3 1 DGPU_TCK L3 JTAG_TDI NC_GENLK_CLK AJ13 M2@10K_4 M1@10K_4 VCCA VCCB
{13} PCIE_CLK_VGA_REQ# NC_GENLK_VSYNC *M2@10K_4 *M1@10K_4
DGPU_TMS L1 JTAG_TCK +3V_VGA
Q16 DGPU_TDO K4 JTAG_TMS GPU_SVC_R 3 4 GPU_GPIO20
*EV@2N7002K TESTEN K7 JTAG_TDO C258 A B
TESTEN DAC2
AF24 AG13
NC#AF24 NC_SWAPLOCKA AH12 M1@0.1U/16V/X7R_4 2 5
NC_SWAPLOCKB GPU_SVT R622 *M2@SHORT_4 GND OE
GPU_SVD_R GPU_SVT_R {52}
GPU_SVC_R GPU_SVD_R {52}
W8 M1@G2129TL1U
NC_GENERICB PS_0 GPU_SVC_R {52}
AC19
W7 PS_0
AD10 NC_GENERICD AD19 PS_1
AJ9 NC_GENERICE_HPD4 PS_1
AL9 NC#AJ9 AE17 PS_2
DBG_CNTL0 PS_2 R16M-M1-30 R16M-M2-50
PS_3
PS_3[3:1] Vendor Type Vendor P/N R3pu R3pd
AE20
PS_3
AB16 AE19
PS0[5:1] 11001 11001
PX_EN TS_A 011 Samsung- 2G 256Mx16 *4, 900Mhz K4W4G1646E-BC1A 6.98K 4.99K
TP5
R630 PS1[5:1] 11001 11001
AC16 *EV@0_4 100 Hynix- 2G 256Mx16 *4, 900Mhz H5TC4G63CFR-N0C 4.53K 4.99K
C728 EV@8.2P/50V_4 EVGA-XTALI NC_DBG_VREFG
DDC/AUX
PS2[5:1] 11000 11000
101 Micro- 2G 256Mx16 *4, 900Mhz MT41J256M16LY-091G:N 3.24K 5.62K
AE6
NC_DDC1CLK
2
1
PLL/CLOCK AE5 PS3[5:1] 11xxx 11xxx

R623 NC_DDC1DATA
Y4 EV@1M/F_4 AD2
EV@27MHZ_10 NC_AUX1P AD4
NC_AUX1N
3
4
EVGA-XTALI AM28
EVGA-XTALO AK28 XTALIN +1.8V_VGA
C717 EV@8.2P/50V_4 EVGA-XTALO XTALOUT +1.8V_VGA +1.8V_VGA
BIT[5:4] C ( nF)
AD13
R170 EV@10K_4 AC22 NC_AUX2P AD11
R165 EV@10K_4 AB22 XO_IN NC_AUX2N
XO_IN2 00 680
R629
R641 R638 *EV@0_4
EV@8.45K/F_4 EV@8.45K/F_4 01 82
AE16 PS_2
Ra GPU_THERMDA NC#AE16 PS_0 PS_1
T4 AD16
TP32 GPU_THERMDC DPLUS NC#AD16
+3V_VGA R575 *M1@10K_4 T2 THERMAL 10 10
TP33 DMINUS AC1
NC_DDCVGACLK TP43
Rb AC3 R628 C725
GPU_GPIO28 NC_DDCVGADATA TP42
R574 M1@10K_4 R5 R640 C733 R637 C730 EV@4.75K/F_4 *EV@0.082U/16V_4X 11 NC
L11 EV@HCB1608KF-121T20_2A +1.8V_TSVDD AD17 GPIO28_FDO EV@2K/F_4 *EV@0.082U/16V_4X EV@2K/F_4 *EV@0.01U/50V_4X
+1.8V_VGA TSVDD
AC17
TSVSS
1.8V(5mA TSVDD)
C271 C283
C311 BIT[3:1] Rpu Rpd
M1@10U/6.3V/X5R_6X M1@0.1U/16V/X7R_4 M2@1U/10V/X5R_4
000 NC 4750
EV@100-CG2633(216-0867030)
+1.8V_VGA +1.8V_VGA +1.8V_VGA
001 8450 2000
010 4530 2000

R219
M1 MLPS setting R210 R213 H2G@4.53K/F_4
S2G@6.98K/F_4 M2G@3.24K/F_4 011 6980 4990
M2 no mount PS_3
PS_3 PS_3
M1 ONLY: stuff Ra=> disable MLPS 100 4530 4990
stuff Rb=> enable MLPS R224
R204 R206 C282 H2G@4.99K/F_4 101 3240 5620
S2G@4.99K/F_4 M2G@5.62K/F_4 *EV@680P/50V_4X
110 3400 10000
111 4750 NC

PROJECT : LV6
1A
JET_S3_Main/DP PWR/Strap
U34E
U34F
20
AA27 A3
AB24 PCIE_VSS#1 GND#1 A30
AB32 PCIE_VSS#2 GND#2 AA13
AC24 PCIE_VSS#3 GND#3 AA16 LVDS CONTROL
AC26 PCIE_VSS#4 GND#4 AB10
AC27
AD25
PCIE_VSS#5
PCIE_VSS#6
GND#5
GND#6
AB15
AB6
All the ASIC supplies must reach their respective
AD32
AE27
PCIE_VSS#7
PCIE_VSS#8
GND#7
GND#8
AC9
AD6
nominal voltages within 20 ms of the start of the
AF32
AG27
PCIE_VSS#9
PCIE_VSS#10
GND#9
GND#10
AD8
AE7 NC_UPHYAB_TMDPA_TX0N
AL15
AK14
ramp-up sequence, though a shorter ramp-up
AH32
K28
PCIE_VSS#11
PCIE_VSS#12
GND#11
GND#12
AG12
AH10
NC_UPHYAB_TMDPA_TX0P
AH16
duration is preferred. The maximum slew rate on
PCIE_VSS#13 GND#13 NC_UPHYAB_TMDPA_TX1N
K32
L27 PCIE_VSS#14 GND#14
AH28
B10 NC_UPHYAB_TMDPA_TX1P
AJ15 all rails is 50 mV/µs.
M32 PCIE_VSS#15 GND#15 B12 AL17
N25 PCIE_VSS#16 GND#16 B14 NC_UPHYAB_TMDPA_TX2N AK16
N27 PCIE_VSS#17
PCIE_VSS#18
GND#17
GND#18
B16 NC_UPHYAB_TMDPA_TX2P It is recommended that the 3.3-V rail ramp up first
P25 B18 AH18
P32 PCIE_VSS#19 GND#19 B20 NC_UPHYAB_TMDPA_TX3N AJ17
R27
T25
PCIE_VSS#20
PCIE_VSS#21
GND#20
GND#21
B22
B24
NC_UPHYAB_TMDPA_TX3P
AL19
The 3.3-V, 1.8-V, and 1.0-V rails must reach their
T32
U25
PCIE_VSS#22
PCIE_VSS#23
GND#22
GND#23
B26
B6
NC_TXOUT_L3P
NC_TXOUT_L3N
AK18 ready state at least 10 µs before VDDC, VDDCI,
U27
V32
PCIE_VSS#24
PCIE_VSS#25
GND#24
GND#25
B8
C1 TMDP
and VMEMIO start to ramp up.
W25 PCIE_VSS#26 GND#26 C32
W26
W27
PCIE_VSS#27
PCIE_VSS#28
GND#27
GND#28
E28
F10 NC_UPHYAB_TMDPB_TX0N
AH20
AJ19
For power down, reversing the ramp-up sequence is
Y25
Y32
PCIE_VSS#29
PCIE_VSS#30
GND#29
GND#30
F12
F14
NC_UPHYAB_TMDPB_TX0P
AL21
recommended.
PCIE_VSS#31 GND#31 F16 NC_UPHYAB_TMDPB_TX1N AK20
GND#32 F18 NC_UPHYAB_TMDPB_TX1P
GND#33 F2 AH22
GND#34 F20 NC_UPHYAB_TMDPB_TX2N AJ21
M6 GND#35 F22 NC_UPHYAB_TMDPB_TX2P
N11 GND#56 GND#36 F24 AL23
GND#57 GND#37 F26 NC_UPHYAB_TMDPB_TX3N AK22
N13
N16 GND#58
GND#38
GND#39
F6
F8
NC_UPHYAB_TMDPB_TX3P
AK24
Power Up/Down Sequence
N18
N21
GND#59
GND#60
GND#61
GND GND#40
GND#41
GND#42
G10
G27
NC_TXOUT_U3P
NC_TXOUT_U3N
AJ23
P6 G31
P9 GND#62 GND#43 G8
R12 GND#63 GND#44 H14
R15 GND#64 GND#45 H17 EV@100-CG2633(216-0867030)
R17 GND#65 GND#46 H2
R20 GND#66 GND#47 H20
+3V_VGA
T13 GND#67 GND#48 H6
T16 GND#68 GND#49 J27
T18 GND#69 GND#50 J31
T21 GND#70 GND#51 K11
T6 GND#71 GND#52 K2
+1.8V_VGA
U15 GND#72 GND#53 K22
U17 GND#73 GND#54 K6
U20 GND#74 GND#55 T11
U9 GND#75 GND#84 R11
V13 GND#76 GND#85 +1.0V_VGA
V16 GND#77
V18 GND#78
Y10 GND#79
Y15 GND#80
Y17 GND#81 A32
+1.35V_VGA
Y20 GND#82 VSS_MECH#1 AM1
AA11 GND#83 VSS_MECH#2 AM32
M12 GND#86 VSS_MECH#3
GND#87 10us
V11
GND#88
+VGA_CORE
EV@100-CG2633(216-0867030) 20ms
20ms

PROJECT : LV6
1A
JET_S3_GND/LVDS
21
U34D +1.8V_VGA
+1.35V_VGA PCIE_VDDR : 1.8V @ 100mA
Power VMEMIO MEM I/O
PCIE_PVDD
PCIE
AM30
1.35V ( DDR3, MVDDQ = 1.35V@1.2A)
H13 AB23
H16 VDDR1#1 NC#AB23 AC23 C280 C281 C313 C288
H19 VDDR1#2 NC#AC23 AD24 EV@1U/10V/X5R_4 M1@10P/50V_4C EV@10U/6.3V/X5R_6X M1@0.1U/16V/X7R_4
C624 C623 C176 C155 C640 C166 C128 C167 J10 VDDR1#3 NC#AD24 AE24
EV@10U/6.3V/X5R_6X M1@10U/6.3V/X5R_6X *EV@4.7U/6.3V_6X M1@0.1U/16V/X7R_4 EV@2.2U/6.3V/X5R_4 M1@0.1U/16V/X7R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 J23 VDDR1#4 NC#AE24 AE25
J24 VDDR1#5 NC#AE25 AE26
J9 VDDR1#6 NC#AE26 AF25
K10 VDDR1#7 NC#AF25 AG26
K23 VDDR1#8 NC#AG26 +0.95V_VGA
K24 VDDR1#9
VDDR1#10 PCIE_VDDC : 0.95V @ 2.5A (GEN3.0)
K9 L23
C112 C111 C132 C165 C174 C131 C168 C163 L11 VDDR1#11 PCIE_VDDC#1 L24
*EV@4.7U/6.3V_6X M1@10U/6.3V/X5R_6X M1@0.1U/16V/X7R_4 EV@2.2U/6.3V/X5R_4 M1@0.1U/16V/X7R_4 *EV@10P/50V_4C *EV@10P/50V_4C M1@0.1U/16V/X7R_4 L12 VDDR1#12 PCIE_VDDC#2 L25
L13 VDDR1#13 PCIE_VDDC#3 L26 C681 C205 C212 C210 C687 C692 C211 C221 C192
L20 VDDR1#14 PCIE_VDDC#4 M22 M1@10U/6.3V/X5R_6X M1@1U/10V/X5R_4EV@1U/10V/X5R_4 EV@1U/10V/X5R_4 EV@1U/10V/X5R_4 EV@1U/10V/X5R_4 EV@1U/10V/X5R_4 EV@1U/10V/X5R_4 EV@10U/6.3V/X5R_6X
L21 VDDR1#15 PCIE_VDDC#5 N22
L22 VDDR1#16 PCIE_VDDC#6 N23
VDDR1#17 PCIE_VDDC#7 N24
PCIE_VDDC#8 R22
C142 C133 C140 C164 PCIE_VDDC#9 T22
*EV@10P/50V_4C EV@2.2U/6.3V/X5R_4 EV@10P/50V_4C M1@0.1U/16V/X7R_4 +1.8V_VGA VDD_GPIO18 @13mA LEVEL
TRANSLATION
PCIE_VDDC#10
PCIE_VDDC#11
U22
V22
Power VDDC
AA20 PCIE_VDDC#12 +VGA_CORE
AA21 VDD_CT#1
VDD_CT#2
VDDC+VDDCI:0.85~1.1V(14.2A peak )( Ripple < 87.2mV)
AB20 AA15
C257 C248 AB21 VDD_CT#3 CORE VDDC#1 N15
EV@1U/10V/X5R_4 M1@0.1U/16V/X7R_4 VDD_CT#4 VDDC#2 N17
VDDC#3 R13 C189 C201 C266 C249 C267 C197 C200 C206
VDDC#4
POWER
I/O R16 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 M1@0.1U/16V/X7R_4
AA17 VDDC#5 R18
+3V_VGA AA18 VDDR3#1 VDDC#6 Y21
AB17 VDDR3#2 VDDC#7 T12
VDD_GPIO33@25mA VDDR3#3 VDDC#8
AB18 T15
VDDR3#4 VDDC#9 T17
V12 VDDC#10 T20
C251 C231 C228 Y12 NC_VDDR4#1 VDDC#11 U13
M1@1U/10V/X5R_4 M1@1U/10V/X5R_4 EV@1U/10V/X5R_4 U12 NC_VDDR4#2 VDDC#12 U16
NC_VDDR4#3 VDDC#13 U18
VDDC#14 V21
VDDC#15 V15 C184 C244 C183 C226 C268 C250 C198 C199
VDDC#16 V17 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 EV@2.2U/6.3V/X5R_4 M2@2.2U/6.3V/X5R_4
VDDC#17 V20
VDDC#18 Y13
VDDC#20 Y16
VDDC#21 Y18
L10 EV@BLM15PX181SN1D MPV18 VDDC#22 AA12
+1.8V_VGA VDDC#23 M11
VDDC#24 N12
Memory Phase Lock Loop Power : VDDC#25
1.8V @ 90mA C216 C215 C223 C224 U11
M2@1U/10V/X5R_4 M1@0.1U/16V/X7R_4 EV@10U/6.3V/X5R_6X EV@10U/6.3V/X5R_6X VDDC#26 AB11 C327 C335 C320 C746 C747 C328
VDDC/VARY_BL AB12 M2@10U/6.3V/X5R_6X M2@10U/6.3V/X5R_6X EV@10U/6.3V/X5R_6X EV@10U/6.3V/X5R_6X M2@10U/6.3V/X5R_6X EV@10U/6.3V/X5R_6X
VDDC/DIGON AB13
VDDC/GENERICA W9
PLL VDDC/GENERICC AC11
VDDC/DDC2CLK AC13
VDDC/DDC2DATA AC14
VDDC/HPD1 U10
L8 EV@HCB1608KF-121T20_2A SPV18 MPV18 L8 VDDC/GPIO_1 T10
+1.8V_VGA MPLL_PVDD VDDC/GPIO_2 W10
VDDC/GPIO_18 Y9
C162 C161 C157 VDDC/GPIO_14_HPD2
Engine Phase Lock Loop Power :
analog power pin for engine PLL EV@1U/10V/X5R_4 M1@0.1U/16V/X7R_4 EV@10U/6.3V/X5R_6X R21
SPV18 H7 BIF_VDDC_1 U21
1.8V @ 75mA SPLL_PVDD BIF_VDDC_2 +0.95V_VGA +VGA_CORE
M13 0.95V~1.1V(2A VDDCI)
ISOLATED VDDCI#1 M15
CORE I/O VDDCI#2 M16
L9 EV@HCB1608KF-121T20_2A +0.95V_VGA_SPV10 H8 VDDCI#3 M17
+0.95V_VGA SPLL_VDDC VDDCI#4 M18 C234 C217 C233 C232 C254 C214 C732 C336
VDDCI#5 M20 M2@2.2U/6.3V/X5R_4 M1@0.1U/16V/X7R_4 EV@1U/10V/X5R_4 EV@1U/10V/X5R_4 EV@1U/10V/X5R_4 M1@0.1U/16V/X7R_4 EV@10U/6.3V/X5R_6X EV@10U/6.3V/X5R_6X
Engine Phase Lock Loop Power : VDDCI#6
digital power pin for engine PLL C178 C172 C173 J7 M21
M1@10U/6.3V/X5R_6X EV@0.1U/16V/X7R_4 EV@1U/10V/X5R_4 SPLL_PVSS VDDCI#7 N20
0.95V @ 100mA VDDCI#8
W1 R589 *M2@SHORT_4
NC#W1/FB_VDDCI +VGA_CORE
W3 R593 *M2@SHORT_4
NC#W3/FB_VSS
AC20 R181 *M2@SHORT_4
NC#FB_VDDC AD20 VDDC_SEN {52}
R183 *M2@SHORT_4
NC#FB_VSS VDDC_RTN {52}
EV@100-CG2633(216-0867030)

PROJECT : LV6
1A
JET_S3_Power
22
U34C
VMA_DQ0 K27 K17 VMA_MA0

VMA_ODT0 VMA_DQ1 J29 DQA0_0 MAA0_0 J20 VMA_MA1
{23,24} VMA_ODT0 VMA_ODT1 VMA_DQ2 DQA0_1 MAA0_1 VMA_MA2
H30 H23
{23,24} VMA_ODT1 VMA_DQ3 DQA0_2 MAA0_2 VMA_MA3
H32 G23
VMA_RAS0# VMA_DQ4 G29 DQA0_3 MAA0_3 G24 VMA_MA4
{23,24} VMA_RAS0# VMA_RAS1# VMA_DQ5 DQA0_4 MAA0_4 VMA_MA5
{23,24} VMA_RAS1# F28 H24
From GPU
VMA_DQ6 F32 DQA0_5 MAA0_5 J19 VMA_MA6
VMA_CAS0# VMA_DQ7 F30 DQA0_6 MAA0_6 K19 VMA_MA7
{23,24} VMA_CAS0# VMA_CAS1# VMA_DQ8 DQA0_7 MAA0_7 VMA_MA13
{23,24} VMA_CAS1# C30 G20 25mm (max) 5mm (max) 25mm (max)
VMA_DQ9 F27 DQA0_8 MAA0_8 L17
MEMORY INTERFACE
VMA_WE0# VMA_DQ10 A28 DQA0_9 MAA0_9
{23,24} VMA_WE0# VMA_WE1# VMA_DQ11 DQA0_10 VMA_MA8 DRAM_RST
C28 J14 R140 EV@10/F_4
{23,24} VMA_WE1# VMA_DQ12 DQA0_11 MAA1_0 VMA_MA9 DRAM_RST_M {23,24}
E27 K14 R141 EV@51_4
VMA_CS00# VMA_DQ13 G26 DQA0_12 MAA1_1 J11 VMA_MA10
{23} VMA_CS00# VMA_CS01# VMA_DQ14 DQA0_13 MAA1_2 VMA_MA11
D26 J13
{24} VMA_CS01# VMA_DQ15 DQA0_14 MAA1_3 VMA_MA12
F25 H11 R139 C152
VMA_CS10# VMA_DQ16 A25 DQA0_15 MAA1_4 G11 VMA_BA2 EV@4.99K/F_4 EV@120P/50V_4N
{23} VMA_CS10# VMA_CS11# VMA_DQ17 DQA0_16 MAA1_5 VMA_BA0
C25 J16
{24} VMA_CS11# VMA_DQ18 DQA0_17 MAA1_6 VMA_BA1
E25 L15
VMA_CKE0 VMA_DQ19 D24 DQA0_18 MAA1_7 G14 VMA_MA14
{23,24} VMA_CKE0 VMA_CKE1 VMA_DQ20 DQA0_19 MMA1_8
{23,24} VMA_CKE1 E23 L16
VMA_DQ21 F23 DQA0_20 MAA1_9
VMA_CLK0 VMA_DQ22 D22 DQA0_21 E32 VMA_DM0
{23,24} VMA_CLK0 VMA_CLK0# VMA_DQ23 DQA0_22 WCKA0_0 VMA_DM1
{23,24} VMA_CLK0# F21 E30
VMA_DQ24 E21 DQA0_23 WCKA0B_0 A21 VMA_DM2
VMA_CLK1 VMA_DQ25 D20 DQA0_24 WCKA0_1 C21 VMA_DM3
{23,24} VMA_CLK1 DQA0_25 WCKA0B_1 Place all these components very close to GPU (Within
VMA_CLK1# VMA_DQ26 F19 E13 VMA_DM4
{23,24} VMA_CLK1# VMA_DQ27 A19 DQA0_26 WCKA1_0 D12 VMA_DM5 25mm) and keep all component close to each Other (within
VMA_WDQS[7..0] VMA_DQ28 D18 DQA0_27 WCKA1B_0 E3 VMA_DM6 5mm) except Rser2
{23,24} VMA_WDQS[7..0] VMA_DQ29 F17 DQA0_28 WCKA1_1 F4 VMA_DM7
VMA_RDQS[7..0] VMA_DQ30 A17 DQA0_29 WCKA1B_1
{23,24} VMA_RDQS[7..0] This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
VMA_DQ31 C17 DQA0_30 H28 VMA_RDQS0
DQA0_31 EDCA0_0
Capacitors and Resistor values are an example only. The Series R and
VMA_DM[7..0] VMA_DQ32 E17 C27 VMA_RDQS1
{23,24} VMA_DM[7..0] DQA1_0 EDCA0_1 || Cap values will depend on the DRAM load and will have to be
VMA_DQ33 D16 A23 VMA_RDQS2
VMA_DQ[63..0] VMA_DQ34 DQA1_1 EDCA0_2 VMA_RDQS3
calculated for different Memory ,DRAM Load and board to pass Reset
F15 E19 Signal Spec.
{23,24} VMA_DQ[63..0] VMA_DQ35 DQA1_2 EDCA0_3 VMA_RDQS4
A15 E15
VMA_MA[14..0] VMA_DQ36 D14 DQA1_3 EDCA1_0 D10 VMA_RDQS5
{23,24} VMA_MA[14..0] VMA_DQ37 DQA1_4 EDCA1_1 VMA_RDQS6
F13 D6
VMA_DQ38 A13 DQA1_5 EDCA1_2 G5 VMA_RDQS7
VMA_BA0 VMA_DQ39 C13 DQA1_6 EDCA1_3
{23,24} VMA_BA0 VMA_BA1 VMA_DQ40 DQA1_7 VMA_WDQS0
{23,24} VMA_BA1 E11 H27
VMA_BA2 VMA_DQ41 A11 DQA1_8 DDBIA0_0 A27 VMA_WDQS1
{23,24} VMA_BA2 VMA_DQ42 C11 DQA1_9 DDBIA0_1 C23 VMA_WDQS2
VMA_DQ43 F11 DQA1_10 DDBIA0_2 C19 VMA_WDQS3
VMA_DQ44 A9 DQA1_11 DDBIA0_3 C15 VMA_WDQS4
support 1Gbit DQA1_12 DDBIA1_0
VRAM ( 64M X 16 ) VMA_DQ45 C9 E9 VMA_WDQS5
VMA_DQ46 F9 DQA1_13 DDBIA1_1 C5 VMA_WDQS6
VMA_DQ47 D8 DQA1_14 DDBIA1_2 H4 VMA_WDQS7
VMA_DQ48 E7 DQA1_15 DDBIA1_3
VMA_DQ49 A7 DQA1_16 L18 VMA_ODT0
VMA_DQ50 C7 DQA1_17 ADBIAO K16 VMA_ODT1
VMA_DQ51 F7 DQA1_18 ADBIA1
VMA_DQ52 A5 DQA1_19 H26 VMA_CLK0
VMA_DQ53 E5 DQA1_20 CLKA0 H25 VMA_CLK0#
VMA_DQ54 C3 DQA1_21 CLKA0B
VMA_DQ55 E1 DQA1_22 G9 VMA_CLK1
VMA_DQ56 G7 DQA1_23 CLKA1 H9 VMA_CLK1#
+1.35V_VGA VMA_DQ57 G6 DQA1_24 CLKA1B
VMA_DQ58 G1 DQA1_25 G22 VMA_RAS0#
VMA_DQ59 G3 DQA1_26 RASA0B G17 VMA_RAS1#
VMA_DQ60 J6 DQA1_27 RASA1B
VMA_DQ61 J1 DQA1_28 G19 VMA_CAS0#
R147 VMA_DQ62 J3 DQA1_29 CASA0B G16 VMA_CAS1#
EV@40.2/F_4 VMA_DQ63 J5 DQA1_30 CASA1B
DQA1_31 H22 VMA_CS00#
MVREFD K26 CSA0B_0 J22 VMA_CS01#
J26 MVREFDA CSA0B_1
+1.35V_VGA MVREFSA G13 VMA_CS10#
J25 CSA1B_0 K13 VMA_CS11#
C170 R148 R143 EV@120/F_4 K25 NC CSA1B_1
EV@1U/6.3V_4X EV@100/F_4 MEM_CALRP0 K20 VMA_CKE0
Rd CKEA0 J17 VMA_CKE1
CKEA1
R144 G25 VMA_WE0#
EV@40.2/F_4 DRAM_RST L10 WEA0B H10 VMA_WE1#
DRAM_RST WEA1B
MVREFS CLKTESTA K8
CLKTESTB L7 CLKTESTA
CLKTESTB
C159 R145
EV@1U/6.3V_4X EV@100/F_4 EV@100-CG2633(216-0867030)
C191 C672
*EV@0.1U/16V/X7R_4 *EV@0.1U/16V/X7R_4
R151 R564
*EV@51.1/F_4 *EV@51.1/F_4
route 50ohms
single-ended/100ohms diff
and keep short

PROJECT : LV6
1A
JET_S3_MEM_Interface
{22,24} VMA_DQ[63..0]
{22,24} VMA_WDQS[7..0]
{22,24} VMA_RDQS[7..0]
{22,24} VMA_MA[14..0]
VMA_DQ[63..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
VMA_MA[14..0]
VMA_DM[7..0]
Channel A _Rank0: 2Gb/4Gb gDDR3L 23
{22,24} VMA_DM[7..0]
U32 U30 U33 U31
VREFC_U2004 M8 E3 VMA_DQ16 VREFC_U2005 M8 E3 VMA_DQ11 VREFC_U2006 M8 E3 VMA_DQ32 VREFC_U2007 M8 E3 VMA_DQ58
VREFD_U2004 H1 VREFCA DQL0 F7 VMA_DQ22 VREFD_U2005 H1 VREFCA DQL0 F7 VMA_DQ12 VREFD_U2006 H1 VREFCA DQL0 F7 VMA_DQ36 VREFD_U2007 H1 VREFCA DQL0 F7 VMA_DQ63
VREFDQ DQL1 F2 VMA_DQ17 VREFDQ DQL1 F2 VMA_DQ8 VREFDQ DQL1 F2 VMA_DQ33 VREFDQ DQL1 F2 VMA_DQ59
VMA_MA0 N3 DQL2 F8 VMA_DQ23 VMA_MA0 N3 DQL2 F8 VMA_DQ14 VMA_MA0 N3 DQL2 F8 VMA_DQ39 VMA_MA0 N3 DQL2 F8 VMA_DQ60
VMA_MA1 P7 A0 DQL3 H3 VMA_DQ19 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ10 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ35 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ57
VMA_MA3 N2 A2 DQL5 G2 VMA_DQ18 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ9 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ34 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ56
VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7
VMA_MA6 R8 A5 VMA_MA6 R8 A5 VMA_MA6 R8 A5 VMA_MA6 R8 A5
VMA_MA7 R2 A6 D7 VMA_DQ7 VMA_MA7 R2 A6 D7 VMA_DQ28 VMA_MA7 R2 A6 D7 VMA_DQ47 VMA_MA7 R2 A6 D7 VMA_DQ52
VMA_MA8 T8 A7 DQU0 C3 VMA_DQ3 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ24 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ42 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ48
VMA_MA9 R3 A8 DQU1 C8 VMA_DQ5 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ29 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ46 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ51
VMA_MA10 L7 A9 DQU2 C2 VMA_DQ0 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ26 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ43 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ49
VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ4 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ31 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ44 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ53
VMA_MA12 N7 A11 DQU4 A2 VMA_DQ1 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ27 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ40 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ50
VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ6 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ30 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ45 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ55
VMA_MA14 T7 A13 DQU6 A3 VMA_DQ2 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ25 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ41 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ54
M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7
A15 +1.35V_VGA A15 +1.35V_VGA A15 +1.35V_VGA A15 +1.35V_VGA
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2

{22,24} VMA_BA0 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9
{22,24} VMA_BA1 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7
{22,24} VMA_BA2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
VMA_CLK0 J7 VDD#N1 N9 VMA_CLK0 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
{22,24} VMA_CLK0 VMA_CLK0# K7 CK VDD#N9 R1 VMA_CLK0# K7 CK VDD#N9 R1 VMA_CLK1# K7 CK VDD#N9 R1 {22,24} VMA_CLK1 VMA_CLK1# K7 CK VDD#N9 R1
{22,24} VMA_CLK0# VMA_CKE0 K9 CK VDD#R1 R9 VMA_CKE0 K9 CK VDD#R1 R9 VMA_CKE1 K9 CK VDD#R1 R9 {22,24} VMA_CLK1# VMA_CKE1 K9 CK VDD#R1 R9
{22,24} VMA_CKE0 CKE VDD#R9 +1.35V_VGA CKE VDD#R9 +1.35V_VGA CKE VDD#R9 +1.35V_VGA {22,24} VMA_CKE1 CKE VDD#R9 +1.35V_VGA
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_ODT1 K1 A1 VMA_ODT1 K1 A1

{22,24} VMA_ODT0 VMA_CS00# L2 ODT VDDQ#A1 A8 VMA_CS00# L2 ODT VDDQ#A1 A8 VMA_CS10# L2 ODT VDDQ#A1 A8 {22,24} VMA_ODT1 VMA_CS10# L2 ODT VDDQ#A1 A8
{22} VMA_CS00# VMA_RAS0# J3 CS VDDQ#A8 C1 VMA_RAS0# J3 CS VDDQ#A8 C1 VMA_RAS1# J3 CS VDDQ#A8 C1 {22} VMA_CS10# VMA_RAS1# J3 CS VDDQ#A8 C1
{22,24} VMA_RAS0# VMA_CAS0# K3 RAS VDDQ#C1 C9 VMA_CAS0# K3 RAS VDDQ#C1 C9 VMA_CAS1# K3 RAS VDDQ#C1 C9 {22,24} VMA_RAS1# VMA_CAS1# K3 RAS VDDQ#C1 C9
{22,24} VMA_CAS0# VMA_WE0# L3 CAS VDDQ#C9 D2 VMA_WE0# L3 CAS VDDQ#C9 D2 VMA_WE1# L3 CAS VDDQ#C9 D2 {22,24} VMA_CAS1# VMA_WE1# L3 CAS VDDQ#C9 D2
{22,24} VMA_WE0# WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9 {22,24} VMA_WE1# WE VDDQ#D2 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMA_RDQS2 F3 VDDQ#F1 H2 VMA_RDQS1 F3 VDDQ#F1 H2 VMA_RDQS4 F3 VDDQ#F1 H2 VMA_RDQS7 F3 VDDQ#F1 H2
VMA_WDQS2 G3 DQSL VDDQ#H2 H9 VMA_WDQS1 G3 DQSL VDDQ#H2 H9 VMA_WDQS4 G3 DQSL VDDQ#H2 H9 VMA_WDQS7 G3 DQSL VDDQ#H2 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
VMA_DM2 E7 A9 VMA_DM1 E7 A9 VMA_DM4 E7 A9 VMA_DM7 E7 A9

VMA_DM0 D3 DML VSS#A9 B3 VMA_DM3 D3 DML VSS#A9 B3 VMA_DM5 D3 DML VSS#A9 B3 VMA_DM6 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VMA_RDQS0 C7 VSS#G8 J2 VMA_RDQS3 C7 VSS#G8 J2 VMA_RDQS5 C7 VSS#G8 J2 VMA_RDQS6 C7 VSS#G8 J2
VMA_WDQS0 B7 DQSU VSS#J2 J8 VMA_WDQS3 B7 DQSU VSS#J2 J8 VMA_WDQS5 B7 DQSU VSS#J2 J8 VMA_WDQS6 B7 DQSU VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
DRAM_RST_M T2 VSS#P1 P9 DRAM_RST_M T2 VSS#P1 P9 DRAM_RST_M T2 VSS#P1 P9 DRAM_RST_M T2 VSS#P1 P9
{22,24} DRAM_RST_M RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
VMA_U2004 L8 VSS#T1 T9 VMA_U2005 L8 VSS#T1 T9 VMA_U2006 L8 VSS#T1 T9 VMA_U2007 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R551 VSSQ#B9 D1 R523 VSSQ#B9 D1 R524 VSSQ#B9 D1 R508 VSSQ#B9 D1
Should be 240 VSSQ#D1 Should be 240 VSSQ#D1 VSSQ#D1 Should be 240 VSSQ#D1
Ohms +-1% EV@243/F_4 D8 Ohms +-1% EV@243/F_4 D8 Should be 240 EV@243/F_4 D8 Ohms +-1% EV@243/F_4 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
VSSQ#E2 VSSQ#E2 Ohms +-1% VSSQ#E2 VSSQ#E2
J1 E8 J1 E8 J1 E8 J1 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA) EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA) EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA) EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
MEM Reference Voltage 1 MEM Reference Voltage 2 MEM Reference Voltage 3 MEM Reference Voltage 4
+1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA
R549 R519 R531 R505 R532 R552 R506 R528

EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4
VREFC_U2004 VREFD_U2004 VREFC_U2005 VREFD_U2005 VREFC_U2006 VREFD_U2006 VREFC_U2007 VREFD_U2007
R550 C651 R518 C643 R530 C646 R504 C604 R533 C647 R553 C652 R507 C612 R527 C645
EV@4.99K/F_4 EV@0.1U/16V/X7R_4 EV@4.99K/F_4 EV@0.1U/16V/X7R_4 EV@4.99K/F_4 EV@0.1U/16V/X7R_4 EV@4.99K/F_4 EV@0.1U/16V/X7R_4 EV@4.99K/F_4 EV@0.1U/16V/X7R_4 EV@4.99K/F_4 EV@0.1U/16V/X7R_4 EV@4.99K/F_4 EV@0.1U/16V/X7R_4 EV@4.99K/F_4 EV@0.1U/16V/X7R_4
VRAM De-Coupling VRAM De-Coupling

+1.35V_VGA
CLK-A0 Termaination +1.35V_VGA
VMA_CLK0
R120 C113 C146 C115 C148 C147 C114

C145 C144 C108 C110 C109 C143 EV@80.6/F_4 EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X
EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X
C138
R554
VMA_CLK0_COMM
EV@162/F_4 +1.35V_VGA
EV@0.01U/50V/X7R_4
+1.35V_VGA R121
EV@80.6/F_4
C106 C124 C122 C130 C105 C129

VMA_CLK0# EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
C119 C89 C87 C94 C93 C91 C126
EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
+1.35V_VGA
CLK-A1 Termaination +1.35V_VGA
VMA_CLK1
R526 C101 C100 C102 C96 C125 C103 C97

C118 C86 C95 C127 C99 C88 EV@80.6/F_4 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
C644
R555
VMA_CLK1_COMM +1.35V_VGA
EV@162/F_4
+1.35V_VGA R525 EV@0.01U/50V/X7R_4

EV@80.6/F_4
C98 C104 C123
M1@0.1U/16V/X7R_4 M1@0.1U/16V/X7R_4 EV@0.1U/16V/X7R_4
VMA_CLK1#
C121 C90 C120
EV@0.1U/16V/X7R_4 M1@0.1U/16V/X7R_4 M1@0.1U/16V/X7R_4
PROJECT : LV6
1A
JET_S3_VRAM_DDR3 BGA96
{22,23} VMA_DQ[63..0]
{22,23} VMA_WDQS[7..0]
{22,23} VMA_RDQS[7..0]
{22,23} VMA_MA[14..0]
VMA_DQ[63..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
VMA_MA[14..0]
VMA_DM[7..0]
Channel A _Rank1: DR@2Gb/4Gb gDDR3L 24
{22,23} VMA_DM[7..0]
U5 U3 U6 U4
VREFC_U2008 M8 E3 VMA_DQ22 VREFC_U2009 M8 E3 VMA_DQ12 VREFC_U2010 M8 E3 VMA_DQ36 VREFC_U2011 M8 E3 VMA_DQ63
VREFD_U2008 H1 VREFCA DQL0 F7 VMA_DQ16 VREFD_U2009 H1 VREFCA DQL0 F7 VMA_DQ11 VREFD_U2010 H1 VREFCA DQL0 F7 VMA_DQ32 VREFD_U2011 H1 VREFCA DQL0 F7 VMA_DQ58
VREFDQ DQL1 F2 VMA_DQ23 VREFDQ DQL1 F2 VMA_DQ14 VREFDQ DQL1 F2 VMA_DQ39 VREFDQ DQL1 F2 VMA_DQ60
VMA_MA0 N3 DQL2 F8 VMA_DQ17 VMA_MA0 N3 DQL2 F8 VMA_DQ8 VMA_MA0 N3 DQL2 F8 VMA_DQ33 VMA_MA0 N3 DQL2 F8 VMA_DQ59
VMA_MA3 N2 A2 DQL5 G2 VMA_DQ20 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ13 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ37 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ62
VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7
VMA_MA6 R8 A5 VMA_MA6 R8 A5 VMA_MA6 R8 A5 VMA_MA6 R8 A5
VMA_MA7 R2 A6 D7 VMA_DQ3 VMA_MA7 R2 A6 D7 VMA_DQ24 VMA_MA7 R2 A6 D7 VMA_DQ42 VMA_MA7 R2 A6 D7 VMA_DQ48
VMA_MA8 T8 A7 DQU0 C3 VMA_DQ7 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ28 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ47 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ52
VMA_MA9 R3 A8 DQU1 C8 VMA_DQ0 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ26 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ43 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ49
VMA_MA10 L7 A9 DQU2 C2 VMA_DQ5 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ29 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ46 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ51
VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ2 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ25 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ41 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ54
VMA_MA12 N7 A11 DQU4 A2 VMA_DQ6 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ30 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ45 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ55
VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ1 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ27 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ40 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ50
VMA_MA14 T7 A13 DQU6 A3 VMA_DQ4 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ31 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ44 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ53
M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7
A15 +1.35V_VGA A15 +1.35V_VGA A15 +1.35V_VGA A15 +1.35V_VGA
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2

{22,23} VMA_BA0 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9
{22,23} VMA_BA1 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7
{22,23} VMA_BA2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
VMA_CLK0 J7 VDD#N1 N9 VMA_CLK0 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
{22,23} VMA_CLK0 VMA_CLK0# K7 CK VDD#N9 R1 VMA_CLK0# K7 CK VDD#N9 R1 VMA_CLK1# K7 CK VDD#N9 R1 {22,23} VMA_CLK1 VMA_CLK1# K7 CK VDD#N9 R1
{22,23} VMA_CLK0# VMA_CKE0 K9 CK VDD#R1 R9 VMA_CKE0 K9 CK VDD#R1 R9 VMA_CKE1 K9 CK VDD#R1 R9 {22,23} VMA_CLK1# VMA_CKE1 K9 CK VDD#R1 R9
{22,23} VMA_CKE0 CKE VDD#R9 +1.35V_VGA CKE VDD#R9 +1.35V_VGA CKE VDD#R9 +1.35V_VGA {22,23} VMA_CKE1 CKE VDD#R9 +1.35V_VGA
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_ODT1 K1 A1 VMA_ODT1 K1 A1

{22,23} VMA_ODT0 VMA_CS01# L2 ODT VDDQ#A1 A8 VMA_CS01# L2 ODT VDDQ#A1 A8 VMA_CS11# L2 ODT VDDQ#A1 A8 {22,23} VMA_ODT1 VMA_CS11# L2 ODT VDDQ#A1 A8
{22} VMA_CS01# VMA_RAS0# J3 CS VDDQ#A8 C1 VMA_RAS0# J3 CS VDDQ#A8 C1 VMA_RAS1# J3 CS VDDQ#A8 C1 {22} VMA_CS11# VMA_RAS1# J3 CS VDDQ#A8 C1
{22,23} VMA_RAS0# VMA_CAS0# K3 RAS VDDQ#C1 C9 VMA_CAS0# K3 RAS VDDQ#C1 C9 VMA_CAS1# K3 RAS VDDQ#C1 C9 {22,23} VMA_RAS1# VMA_CAS1# K3 RAS VDDQ#C1 C9
{22,23} VMA_CAS0# VMA_WE0# L3 CAS VDDQ#C9 D2 VMA_WE0# L3 CAS VDDQ#C9 D2 VMA_WE1# L3 CAS VDDQ#C9 D2 {22,23} VMA_CAS1# VMA_WE1# L3 CAS VDDQ#C9 D2
{22,23} VMA_WE0# WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9 {22,23} VMA_WE1# WE VDDQ#D2 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMA_RDQS2 F3 VDDQ#F1 H2 VMA_RDQS1 F3 VDDQ#F1 H2 VMA_RDQS4 F3 VDDQ#F1 H2 VMA_RDQS7 F3 VDDQ#F1 H2
VMA_WDQS2 G3 DQSL VDDQ#H2 H9 VMA_WDQS1 G3 DQSL VDDQ#H2 H9 VMA_WDQS4 G3 DQSL VDDQ#H2 H9 VMA_WDQS7 G3 DQSL VDDQ#H2 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
VMA_DM2 E7 A9 VMA_DM1 E7 A9 VMA_DM4 E7 A9 VMA_DM7 E7 A9

VMA_DM0 D3 DML VSS#A9 B3 VMA_DM3 D3 DML VSS#A9 B3 VMA_DM5 D3 DML VSS#A9 B3 VMA_DM6 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VMA_RDQS0 C7 VSS#G8 J2 VMA_RDQS3 C7 VSS#G8 J2 VMA_RDQS5 C7 VSS#G8 J2 VMA_RDQS6 C7 VSS#G8 J2
VMA_WDQS0 B7 DQSU VSS#J2 J8 VMA_WDQS3 B7 DQSU VSS#J2 J8 VMA_WDQS5 B7 DQSU VSS#J2 J8 VMA_WDQS6 B7 DQSU VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
DRAM_RST_M T2 VSS#P1 P9 DRAM_RST_M T2 VSS#P1 P9 DRAM_RST_M T2 VSS#P1 P9 DRAM_RST_M T2 VSS#P1 P9
{22,23} DRAM_RST_M RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
VMA_U2008 L8 VSS#T1 T9 VMA_U2009 L8 VSS#T1 T9 VMA_U2010 L8 VSS#T1 T9 VMA_U2011 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R109 VSSQ#B9 D1 R89 VSSQ#B9 D1 R136 VSSQ#B9 D1 R114 VSSQ#B9 D1
Should be 240 VSSQ#D1 Should be 240 VSSQ#D1 VSSQ#D1 Should be 240 VSSQ#D1
Ohms +-1% DR@243/F_4 D8 Ohms +-1% DR@243/F_4 D8 Should be 240 DR@243/F_4 D8 Ohms +-1% DR@243/F_4 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
VSSQ#E2 VSSQ#E2 Ohms +-1% VSSQ#E2 VSSQ#E2
J1 E8 J1 E8 J1 E8 J1 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA) DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA) DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA) DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
MEM Reference Voltage 1 MEM Reference Voltage 2 MEM Reference Voltage 3 MEM Reference Voltage 4
+1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA
R111 R138 R91 R104 R134 R119 R113 R92

DR@4.99K/F_4 DR@4.99K/F_4 DR@4.99K/F_4 DR@4.99K/F_4 DR@4.99K/F_4 DR@4.99K/F_4 DR@4.99K/F_4 DR@4.99K/F_4
VREFC_U2008 VREFD_U2008 VREFC_U2009 VREFD_U2009 VREFC_U2010 VREFD_U2010 VREFC_U2011 VREFD_U2011
R110 C135 R137 C141 R90 C92 R105 C134 R135 C139 R118 C137 R112 C136 R93 C107
DR@4.99K/F_4 DR@0.1U/16V/X7R_4 DR@4.99K/F_4 DR@0.1U/16V/X7R_4 DR@4.99K/F_4 DR@0.1U/16V/X7R_4 DR@4.99K/F_4 DR@0.1U/16V/X7R_4 DR@4.99K/F_4 DR@0.1U/16V/X7R_4 DR@4.99K/F_4 DR@0.1U/16V/X7R_4 DR@4.99K/F_4 DR@0.1U/16V/X7R_4 DR@4.99K/F_4 DR@0.1U/16V/X7R_4
VRAM De-Coupling VRAM De-Coupling

+1.35V_VGA
+1.35V_VGA
R100 EV@100/F_4 VMA_MA0 R515 EV@100/F_4 C653 C627 C625 C626 C655 C654
C622 C649 C650 C621 C648 C620 R123 EV@100/F_4 VMA_MA1 R538 EV@100/F_4 DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X
DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X DR@4.7U/6.3V_6X R98 EV@100/F_4 VMA_MA2 R513 EV@100/F_4
R126 EV@100/F_4 VMA_MA3 R541 EV@100/F_4
R128 EV@100/F_4 VMA_MA4 R543 EV@100/F_4
R129 EV@100/F_4 VMA_MA5 R544 EV@100/F_4 +1.35V_VGA
R94 EV@100/F_4 VMA_MA6 R509 EV@100/F_4
+1.35V_VGA R96 EV@100/F_4 VMA_MA7 R511 EV@100/F_4
R102 EV@100/F_4 VMA_MA8 R517 EV@100/F_4
R97 EV@100/F_4 VMA_MA9 R512 EV@100/F_4
R133 EV@100/F_4 VMA_MA10 R548 EV@100/F_4 C642 C609 C637 C636 C635 C615
R95 EV@100/F_4 VMA_MA11 R510 EV@100/F_4 DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X
C630 C603 C602 C600 C605 C607 C608 R125 EV@100/F_4 VMA_MA12 R539 EV@100/F_4
DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X R131 EV@100/F_4 VMA_MA13 R546 EV@100/F_4
R130 EV@100/F_4 VMA_MA14 R545 EV@100/F_4
+1.35V_VGA
+1.35V_VGA R127 EV@100/F_4 VMA_BA0 R542 EV@100/F_4
+1.35V_VGA VMA_BA1
R99 EV@100/F_4 R514 EV@100/F_4
R132 EV@100/F_4 VMA_BA2 R547 EV@100/F_4
R108 EV@100/F_4 VMA_CKE0 R522 EV@100/F_4 C641 C616 C618 C611 C610 C619 C617
C629 C639 C638 C601 C606 C628 R101 EV@100/F_4 VMA_CKE1 R516 EV@100/F_4 DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X
DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X DR@1U/6.3V_4X
R103 EV@100/F_4 VMA_ODT0 R520 EV@100/F_4
R115 EV@100/F_4 VMA_ODT1 R535 EV@100/F_4 +1.35V_VGA
R122 EV@100/F_4 VMA_RAS0# R521 EV@100/F_4

+1.35V_VGA R116 EV@100/F_4 VMA_RAS1# R537 EV@100/F_4
R106 EV@100/F_4 VMA_CAS0# R534 EV@100/F_4 C613 C614 C634

R117 EV@100/F_4 VMA_CAS1# R536 EV@100/F_4 DR@0.1U/16V/X7R_4 DR@0.1U/16V/X7R_4 DR@0.1U/16V/X7R_4
C631 C632 C633 R107 EV@100/F_4 VMA_WE0# R529 EV@100/F_4

DR@0.1U/16V/X7R_4 DR@0.1U/16V/X7R_4 DR@0.1U/16V/X7R_4 R124 EV@100/F_4 VMA_WE1# R540 EV@100/F_4
PROJECT : LV6
1A
JET_S3_Dual Rank VRAM
5 4 3 2 1
{13,29,36,38,39} VSTBY_FSPI
{2,4,10,11,12,13,14,15,17,18,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
25
{42,43,44,45,46,47,48,49,50,51,52,56} +VIN
{29} +V3.3DX_AUDIO
{4,10,12,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56} +3VS5
+3V {4,34,35,38,39,41,42,44,45,48,50,51,53,54,56} +5VS5
eDP only
LCDVCC
R498 *100K_4 EDP_AUXN_C
+3V R497 *100K_4 EDP_AUXP_C
+LCDVCC_L +LCDVCC
80mil
D D
C72 80mil
U29
1U/6.3V_4X 2 8
VIN1 VOUT2
3 7 F10 0_6 C76 10U/6.3V/X5R_6X
VIN VOUT1
R72 10K_4 5 6 C590 *0.01U/50V/X7R_4
+3V FLG# VOUT
4 1 C593 0.1U/16V/X7R_4
{2} PCH_LCDVCC_EN EN GND
G547E1P81U
C581 R486 CN7
100K/F_4 30
*0.1U/16V/X7R_4 +LCDVCC 29 30
+LCDVCC 29
28
27 28 32
C594 0.1U/16V/X7R_4 EDP_AUXP_C 26 27 32
{2} INT_EDP_AUXP EDP_AUXN_C 26
C596 0.1U/16V/X7R_4 25
{2} INT_EDP_AUXN 25
24
C598 0.1U/16V/X7R_4 EDP_TXP0_C 23 24
{2} INT_EDP_TXP0 EDP_TXN0_C 23
C599 0.1U/16V/X7R_4 22
{2} INT_EDP_TXN0 22
21
C595 0.1U/16V/X7R_4 EDP_TXP1_C 20 21
{2} INT_EDP_TXP1 EDP_TXN1_C 20
C597 0.1U/16V/X7R_4 19
{2} INT_EDP_TXN1 19
18
EDP_HPD 17 18
{2} EDP_HPD 16 17
DISPON
VADJ_PWM 15 16
14 15
13 14
+V3.3DX_CAMERA 12 13
Back light VSTBY_FSPI +3V +V3.3DX_CAMERA
{12} USBP9-_CCD
USBP9-_CCD
USBP9+_CCD
11
10
12
11
{12} USBP9+_CCD 10
9
R86 600_0.3A DMIC_GND 8 9
R66 R502 600_0.3A DMIC_DATA1 7 8
{29} DMIC_DATA1_C DMIC_CLK1 7
R70 *4.7K_4 R503 600_0.3A 6
{29} DMIC_CLK1_C 6
C 10K_4 5 C
F4 *SHORT_8 +V3.3DX_AUDIO_E 4 5 31
+V3.3DX_AUDIO 4 31
D1 DB2J40600L D2 DB2J40600L DISPON 3
{36} EC_LID# 3
C3A 2
GFX_PWR_SRC 1 2
GFX_PWR_SRC 1
C71 R78 C75 51540-03001-V01

100K_4
0.1U/16V/X7R_4 *47P/50V/NPO_4
{2} PCH_LVDS_BLON R75 2.2K_4

3
R80 C73 Q11
2
LCD_BK_OFF {14}
*1U/10V/X7R_6
100K_4
*LTC044EUBFS8TL
1
DMIC_DATA1
For ESD
SC7 ESD@PESD5V0V1BL
SC4 *ESD@0.1U/16V/X7R_4
C77 2.2U/10V/X7R_6 DMIC_CLK1

+LCDVCC
SC8 ESD@PESD5V0V1BL
B B
CAMERA VCC Control +V3.3DX_CAMERA

GFX_PWR_SRC +CAM_VCC USBP9-_CCD
+VIN GFX_PWR_SRC Max Current : 800mA +3V
+V3.3DX_CAMERA USBP9+_CCD
40mil
EC34 ESD@RCLAMP0551P.TST
EC33 ESD@RCLAMP0551P.TST
EC2
F5 FUSE 2A
1
ESD@RCLAMP0551P.TST
C85
C117 C116 R85
*10U/25V/X6S_12 0.1U/50V/X7R_6 0.1U/50V/X7R_6 10K_4
2
1
F3
Q12 FUSE 1A
AO3413
R83 100K_4 2
3
Q13
3
2
{14} CCD_EN +V3.3DX_CAMERA_R
R88 *0_4_S VADJ_PWM
{2} PCH_DPST_PWM
LU1L002SNFS8
1
C81 C79
0.01U/50V/X7R_4 0.1U/16V/X7R_4
C84 R87
A *47P/50V/NPO_4 100K_4 A

PROJECT : LV6
1A
LCD/CAMERA/MIC
5 4 3 2 1
A B C D E
HDMI Conn <HDM>

26
{2,4,10,11,12,13,14,15,17,18,25,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
TX0_HDMI+ TX0_HDMI+_R1 {27,29,31,37,39,52,53} +5V
{2} IN_D0 C778 0.1U/16V/X7R_4 R325 470/F_4 U14
C777 0.1U/16V/X7R_4 TX0_HDMI- R321 470/F_4 TX0_HDMI-_R1 TX2_HDMI+ 6 5 TX2_HDMI+
{2} IN_D0# NC CH4
4 TX1_HDMI+ TX1_HDMI+_R1 TX2_HDMI- TX2_HDMI- 4
C780 0.1U/16V/X7R_4 R331 470/F_4 7 4
{2} IN_D1 TX1_HDMI- TX1_HDMI-_R1 NC CH3
{2} IN_D1# C779 0.1U/16V/X7R_4 R327 470/F_4
3
C782 0.1U/16V/X7R_4 TX2_HDMI+ R339 470/F_4 TX2_HDMI+_R1 GND C3A
{2} IN_D2 TX2_HDMI- TX2_HDMI-_R1 TX1_HDMI+ TX1_HDMI+
{2} IN_D2# C781 0.1U/16V/X7R_4 R337 470/F_4 9 2
NC CH2
{2} IN_CLK C776

C775
0.1U/16V/X7R_4
0.1U/16V/X7R_4
TXC_HDMI+
TXC_HDMI-
R320
R317
470/F_4
470/F_4
TXC_HDMI+_R1
TXC_HDMI-_R1
TX1_HDMI- 10
NC CH1
1 TX1_HDMI- EMI reserve for HDMI
{2} IN_CLK#
ESD@PUSB3FR4
U13 TX2_HDMI+
TX0_HDMI+ 6 5 TX0_HDMI+
NC CH4 R338
TX0_HDMI- 7 4 TX0_HDMI- E@120/F_4
+3V_HDMI NC CH3
3 TX2_HDMI-
GND
TXC_HDMI+ 9 2 TXC_HDMI+ TX1_HDMI+
NC CH2
TXC_HDMI- 10 1 TXC_HDMI- R330
3
NC CH1
E@120/F_4
HDMI-passive level shift <HDM> ESD@PUSB3FR4
U12 TX1_HDMI-
2 HDMI_SDATA 6 5 HDMI_SDATA
NC CH4 TX0_HDMI+
Q27 HDMI_SCLK 7 4 HDMI_SCLK
2N7002K NC CH3 R324
R340 3 E@120/F_4
1
100K_4 GND
HDMIC_5V 9 2 HDMIC_5V TX0_HDMI-
NC CH2
HDMI_HPD 10 1 HDMI_HPD TXC_HDMI+
NC CH1
ESD@PUSB3FR4 R319
E@120/F_4
TXC_HDMI-
3
+3V +3V_HDMI
For ESD Layout note:Place close to HDMI Conn 3
R336 *0_6_S
B2A
CN16
20
TX2_HDMI+ R769 *0_4_S TX2_HDMI+_C 1 SHELL1
2 D2+
TX2_HDMI- R770 *0_4_S TX2_HDMI-_C 3 D2 Shield
TX1_HDMI+ R771 *0_4_S TX1_HDMI+_C 4 D2-
5 D1+
TX1_HDMI- R772 *0_4_S TX1_HDMI-_C 6 D1 Shield
TX0_HDMI+ R773 *0_4_S TX0_HDMI+_C 7 D1-
8 D0+
TX0_HDMI- R774 *0_4_S TX0_HDMI-_C 9 D0 Shield 23
+3VS5 +3V_HDMI TXC_HDMI+ R775 *0_4_S TXC_HDMI+_C 10 D0- GND
11 CK+ 22
TXC_HDMI- R776 *0_4_S TXC_HDMI-_C 12 CK Shield GND
13 CK-
14 CE Remote
R298 R315 HDMI_SCLK 15 NC
HDMI_SDATA 16 DDC CLK
*2.2K_4 2.2K_4 DDC DATA
17
GND
5
FUSE1.1A_8V_POLY F11 HDMIC_5V 18

D20 +5V HDMI_HPD +5V
19
R316 *0_4_S HDMI_SCLK HP DET
{2} SDVO_CLK 4 3 R310 2.2K_4 +5V 21
SHELL2
DB2J40600L 96-0026-01
C426
Q26A HDMIC_5V 0.1U/16V/X7R_4
SSM6N48FU
2 2
EC15 *ESD@RCLAMP0551P.TST
EC16 ESD@PESD5V0V1BL
HDMI_HPD
+3VS5 +3V_HDMI +3VS5 +3V_HDMI
R299 R308 R283 R284

*2.2K_4 2.2K_4 *1M_4 1M_4
2
2
Q24 2N7002K
D19
R296 *0_4_S 1 6 HDMI_SDATA R279 *0_4_S 1 3 HDMI_HPD
{2} SDVO_DATA R307 2.2K_4 +5V {2} PCH_HDMI_HPD
DB2J40600L
Q26B R301
SSM6N48FU 20K_4
1 1

PROJECT : LV6
1A
HDMI CONN
A B C D E
A B C D E
CRT Conn <CRT>

+5V {26,29,31,37,39,52,53}
+3V {2,4,10,11,12,13,14,15,17,18,25,26,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
27
+5V CRT_VCC_R
2 1 CRT_VCC_R
F6
Layout Note: FUSE1.1A_8V_POLY
4 Setting R,G,B trace C175 4
impedance to 50 ohm. 0.1U/16V/X7R_4
CRT_R L22 BLM15BB470SN1D CRT_R1
16
CRT_G L21 BLM15BB470SN1D CRT_G1
6
1 11
CRT_B L20 BLM15BB470SN1D CRT_B1 7
2 12 VGA_DDC_DAT_RT C706 *470P/50V_4
8
R28 R23 R22 3 13 CRTHSYNC C695 33P/50V_4N
75/F_4 75/F_4 75/F_4 C42 C33 C26 C708 C714 C719 CRT_VCC_R 9
22P/50V/NPO_4 22P/50V/NPO_4 22P/50V/NPO_4 22P/50V/NPO_4 22P/50V/NPO_4 22P/50V/NPO_4 4 14 CRTVSYNC C686 33P/50V_4N
TP31 10
5 15 VGA_DDC_CLK_RT C680 *470P/50V_4
17
DHR4U-15K1202
CN10
+3V +CRT_VDDA33
L17 FCM1608KF-102T01
C566 C560 U36 CRT_VCC_R

3 3
*0.1U/16V/X7R_4*2.2U/6.3V_4 CRT_R1 1 6 CRT_G1
2 IO1 IO4 5
CRT_B1 3 GND REF 4
IO2 IO3
ESD@SRV05-4HTG
VGA_SDA +3V
VGA_SLK C51 0.1U/16V/X7R_4

U35 CRT_VCC_R
VCCK_V12 VGA_DDC_DAT_RT 1 6 CRTHSYNC
{40} VGA_DDI1_HPD IO1 IO4
2 5
CRTVSYNC 3 GND REF 4 VGA_DDC_CLK_RT
R25 C46 C50 IO2 IO3
0.1U/16V/X7R_4 2.2U/6.3V/X5R_4 ESD@SRV05-4HTG
100K_4
33
32
31
30
29
28
27
26
25
U1
EPAD
HPD
EXT1.2V_CTRL
SMB_SCL
PVCC_33
VCCK_12
XI
SMB_SDA
LDO_RSTB
+CRT_VDDA33
1
AVCC_33 24
C40 0.1U/16V/X7R_4 VGA_DP_AUXP_C 2 GND
{40} VGA_DP_AUXP AUX_P 23 CRT_R
C37 0.1U/16V/X7R_4 VGA_DP_AUXN_C 3 RED_P
{40} VGA_DP_AUXN AUX_N 22 CRT_G
C30 0.1U/16V/X7R_4 VCCK_V12 4 GREEN_P +CRT_VDDA33
{40} VGA_DDI2_TXP0_L
C29 0.1U/16V/X7R_4 VGA_DDI2_TXP0_L_C 5
AVCC_12
LANE0_P
RTD2166 VDD_DAC_33
BLUE_P
21
20
CRT_B
C27 0.1U/16V/X7R_4 VGA_DDI2_TXN0_L_C 6

{40} VGA_DDI2_TXN0_L LANE0_N 19 33_4 R14 CRTHSYNC
C25 0.1U/16V/X7R_4 VGA_DDI2_TXP1_L_C 7 HSYNC
{40} VGA_DDI2_TXP1_L LANE1_P 18 33_4 R9 CRTVSYNC C21
C22 0.1U/16V/X7R_4 VGA_DDI2_TXN1_L_C 8 VSYNC
2 {40} VGA_DDI2_TXN1_L LANE1_N 0.1U/16V/X7R_4 2
17
POL1/SPI_CEB
HVSYNC_PWR CRT_VCC_R
VGA_SDA
VGA_SCL
SPI_CLK
VCC_33
SPI_SO
SPI_SI
C550 C551
POL2
0.1U/16V/X7R_44.7U/6.3V_6X
9
10
11
12
13
14
15
16
RTD2166-CG
R15 4.7K_4 VGA_DDC_DAT_RT

+3V
R11 4.7K_4 VGA_DDC_CLK_RT
TP2 TP1 TP3 +3V
+5V +5V
+CRT_VDDA33 R458 *4.7K_4

R32 *0_4 VGA_SDA
{10,17} SMB_RUN_DAT
R12 R13
2.2K_4 2.2K_4
+CRT_VDDA33 R459 *4.7K_4

R33 *0_4 VGA_SLK
{10,17} SMB_RUN_CLK
VGA_DDC_DAT_RT
VGA_DDC_CLK_RT
1 1

PROJECT : LV6
1A
DP to CRT(RTD2166-CG)
A B C D E
A B C D E
TPM <TPM> {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}

{4,10,12,15,26,30,32,33,35,36,41,42,44,49,51,53,54,56}
+3V
+3VS5
28
4 4
+VCC_TPM +VCC_TPM
+3VS5 +VCC_TPM
R267 *TPM@0_4_S
D3A
3 3
R255 R262
TPM@10K_4 TPM@10K_4
U11 C394 TPM@0.1U/16V/X7R_4
R254 TPM@33_4 SPI_TPM_CLK_R 19 1 C400 TPM@10U/6.3V_4

{10} PCH_SPI1_CLK SCLK VDD
R261 TPM@33_4 PCH_SPI_CS2#_TPM_M 20 8
{10} PCH_SPI_CS2#_TPM CS# VDD
R269 TPM@33_4 SPI_TPM_SO_R 24 22 C399 TPM@0.1U/16V/X7R_4
{10} PCH_SPI1_SO MISO VDD
R265 TPM@33_4 SPI_TPM_SI_R 21
{10} PCH_SPI1_SI MOSI C403 TPM@0.1U/16V/X7R_4
2
18 GND 9
{12} TPM_INT# PIRQ GND
{4,18,30,31,33,36,37} PLTRST# R249 *TPM@0_4_S 17 TPM@ST33HTPM2E32AAD8 23
C397 TPM@100P/50V_4 RST# GND 32
GND 33
R263 *TPM@4.7K_4 6 Thermal pad
+VCC_TPM GPIO
7 TPM_PP
PP
2 R252 2
+VCC_TPM R256 TPM@4.7K_4
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
*TPM@0_4
3
4
5
10
11
12
13
14
15
16
25
26
27
28
29
30
31
1 1

PROJECT : LV6
1A
TPM
A B C D E
5 4 3 2 1
HPOUT_R
HPOUT_L
Codec (ALC3240) <ADO> C577 1U/6.3V_4X
C63
LINE1-VREFO
MIC2_VREFO
1U/6.3V_4X AGND
{26,27,31,37,39,52,53} +5V
{2,4,10,11,12,13,14,15,17,18,25,26,27,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
{25} +V3.3DX_AUDIO
29
AVDD2 C67 4.7U/6.3V_6X AGND
C574 4.7U/6.3V_6X
C56 1U/6.3V_4X
CODEC 5V POWER
+V5DX_AUDIO_AVDD
+5V +V5DX_AUDIO +V5DX_AUDIO_AVDD
30
29
28
27
26
25
24
23
22
21
U2 C69 C70
2A
D 2.2U/6.3V/X5R_4 L1 0_8
20mil L5 BLM15PX181SN1D D
Analog
CPVDD
CBN
HP-OUT-R
CBP
CPVEE
LDO1-CAP
VREF
HP-OUT-L
LINE1-VREFO-L
MIC2-VREFO
0.1U/16V/X7R_4
+V5DX_AUDIO_PVDD
Digital
L2 BLM15PX181SN1D
AGND 31 20 AGND AGND

AVSS2 AVDD1
AGND C48 4.7U/6.3V_6X 32 19 AGND
LDO2-CAP AVSS1
AVDD2
AGND C45 4.7U/6.3V_6X 33 18 LINE1-L
+V5DX_AUDIO_PVDD AVDD2 LINE1-L
40mil +V5DX_AUDIO_PVDD 34 17 LINE1-R
PVDD1 LINE1-R C38 C31
AUD_SPK_L+
C34 C36
AUD_SPK_L-
35
36
SPK-L+
SPK-L-
ALC3240 VD33STB
MIC2-CAP
16
15 C74 4.7U/6.3V_6X
+V3.3DX_AUDIO
AGND
10U/6.3V/X5R_6X 0.1U/16V/X7R_4
10U/6.3V/X5R_6X 0.1U/16V/X7R_4 close U2004

AUD_SPK_R- 37 14 MIC2_R_C Trace: 40mil +V3.3DX_AUDIO
SPK-R- SLEEVE/MIC2-R
AUD_SPK_R+ 38 13 MIC2_L_C R484 100K/F_4
+V5DX_AUDIO_PVDD SPK-R+ RING2/MIC2-L
40mil +V5DX_AUDIO_PVDD 39 12 R488 200K/F_4 SENSE_HP Analog
GPIO0/DMIC-DATA12
PVDD2 HP/LINE1-JD(JD1)
NB_MUTE# 40 11
GPIO1/DMIC-CLK
C32 C35
{36} NB_MUTE# PDB PCBEEP
Digital
*10U/6.3V/X5R_6X 0.1U/16V/X7R_4 R464 DB2J40600L D16
SDATA-OUT
BEEP {36}
LDO3-CAP
41
SDATA-IN
*100K_4
DVDD-IO
GND BEEP_C BEEP_R BEEP_D
BIT-CLK
DC DET
DVDD
SYNC
C68 0.1U/16V/X7R_4 R69 20K_4
D15 ACZ_SPKR {11,14}
DB2J40600L
R76
10
10K_4
+3.3V_AUDIO_CODEC
Max Current : 419mA
DVDD
+V3.3DX_AUDIO +3V +V3.3DX_AUDIO
C R469 10K_4 NB_MUTE# C567 C568 +V3.3DX_AUDIO R474 *0_6_S C
1U/6.3V_4X 0.1U/16V/X7R_4
C576 C579
Place close to pin 1 *10U/6.3V/X5R_6X 0.1U/16V/X7R_4 C572

0.1U/16V/X7R_4
Place close to pin 8

{25} DMIC_DATA1_C
{25} DMIC_CLK1_C ACZ_SYNC_AUDIO

ACZ_SYNC_AUDIO {14}
HDA_SDIN0_R R47 33_4 ACZ_SDIN0 {14}
C60
4.7U/6.3V_6X
ACZ_SDOUT_AUDIO
ACZ_SDOUT_AUDIO {14} +1.8V_AUDIO
BIT_CLK_AUDIO AVDD2
BIT_CLK_AUDIO {14}
L16 BLM15PX181SN1D
C55 +3V
22P/50V/NPO_4
DVDD
U27
C571
1 5 R460 *0_4
2.2U/6.3V/X5R_4 VIN VOUT
2
BIT_CLK_AUDIO GND +V3.3DX_AUDIO
ACZ_SYNC_AUDIO 3 4
ACZ_SDOUT_AUDIO SC2 ON/OFF NC
SC3
SC1 +3V G9090-180T11U C563 C562 L18 BLM15PX181SN1D
*ESD@SURGE SUP
B MIC2_VREFO B
*ESD@SURGE SUP
*0.1U/16V/X7R_4 1U/6.3V_4X
*ESD@SURGE SUP
LINE1-VREFO
R472 R44 R492 R491

4.7K_4 4.7K_4 2.2K_4 2.2K_4
For ESD
MIC2_R_C L7 0_4 MIC2_R

MIC2_R {35}
HPOUT_L R34 47/F_4 HP-OUT-L_1 L4 0_4 HP-OUT-L_2
HP-OUT-L_2 {35}
HPOUT_R R466 47/F_4 HP-OUT-R_1 L19 0_4 SENSE_HP

HP-OUT-R_2 SENSE_HP {35}
INT Speaker
MIC2_L_C MIC2_L HP-OUT-R_2 {35}
L6 0_4
MIC2_L {35}
C452
C468
C454
C453
LINE1-R C573 1U/6.3V_4X

*UCLAMP0511P.TCT
*UCLAMP0511P.TCT
*UCLAMP0511P.TCT
*UCLAMP0511P.TCT
LINE1-L C57 1U/6.3V_4X R467 R35
R463 *0_4_S *22K_4 *22K_4

R465 *0_4_S
B2B C3A CN4
R480 *0_4_S 50278-00401-001
R479 *0_4_S AUD_SPK_R+ R21 BLM18SG221TN1D SPK_R+_OUT
AUD_SPK_R- R16 BLM18SG221TN1D SPK_R-_OUT 1 6
AUD_SPK_L- R8 BLM18SG221TN1D SPK_L-_OUT 2
AGND AUD_SPK_L+ R3 BLM18SG221TN1D SPK_L+_OUT 3
AGND 4 5
HP-OUT-R_1
*680P/50V/X7R_4
*680P/50V/X7R_4
*680P/50V/X7R_4
*680P/50V/X7R_4
*680P/50V/X7R_4
*680P/50V/X7R_4
*680P/50V/X7R_4
*680P/50V/X7R_4
For EMI
AGND
Grounding circuit for combo jack MIC R/L pin VSTBY_FSPI

C591 0.1U/16V/X7R_4
R24 0_4
MIC2_R_C R461 0_4 HP-OUT-L_2 HP-OUT-R_2 SENSE_HP
C15
C19
C28
C11
C20
C24
A A
C1
C4
R493 R476 0_4
*1M_4 R81 *0_4
SC5
3
5 Q36A L15 L14

Q35 *SSM6N48FU *0.047uH *0.047uH
For ESD For EMI
3
*ESD@UCLAMP0511P.TCT
AGND
4
*2N7002K C592 0.1U/16V/X7R_4
EC_PWROK R482 *1K_4 2 AGND MIC2_L_C R82 *0_4

{4,36,37} EC_PWROK
6
R36 0_4 C476 C451

C580 2 Q36B *UCLAMP0511P.TCT *UCLAMP0511P.TCT
*0.1U/16V/X7R_4 *SSM6N48FU R31 0_4 Quanta Computer Inc.
1
PROJECT : LV6
AGND AGND AGND AGND Size Document Number Rev
1A
Audio(ALC3240)
5 4 3 2 1
5 4 3 2 1
LAN LDO <LAN>
VDD10
C361 *10P/50V/COG_4
TP8
B2B
30
R233 2.49K/F_4 RSET C359 10P/50V_4C
RJ45_ACTIVITY#
XTAL2
XTAL1
10 mils
RJ45_LINKUP#
+3VS5 {4,10,12,15,26,28,32,33,35,36,41,42,44,49,51,53,54,56}
C355 *10P/50V/COG_4 XTAL2
2
1
+LANVCC
Y2
25MHZ +-30PPM
4
3
XTAL1
D3A
32
31
30
29
28
27
26
25
D D
U10
C360 10P/50V_4C
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
RSET
LED1/GPO
LED2(LED1)
33 +3V
GND
+3VS5 +LANVCC
LANVCC
40 mils (Iout=1A) 40 mils (Iout=1A) MDI_0+ 1 24 R245
MDI_0- MDIP0 REGOUT REGOUT
1 3 2 23 VDDREG/VDD33 1K_4
3 MDIN0 VDDREG(VDD33) 22
VDD10 MDI_1+ AVDD10(NC) DVDD10(NC) VDD10 LAN_WAKE#
Q22 4 21
AO3413 MDI_1- 5 MDIP1 LANWAKEB 20
2
MDI_2+ 6 MDIN1 ISOLATEB 19

MDI_2- MDIP2(NC) RTL8111H-CG PERSTB GPP_TX5N_LAN PLTRST# {4,18,28,31,33,36,37}
C834 0.01U/50V/X7R_4 C835 *0.01U/50V/X7R_4 7 18 C391 0.1U/16V/X7R_4
8 MDIN2(NC) HSON 17 GPP_TX5P_LAN PCIE_RXN5_LAN# {12}
C390 C393 VDD10 C392 0.1U/16V/X7R_4 R675
AVDD10 HSOP PCIE_RXP5_LAN {12}
0.1U/16V/X7R_4 10U/6.3V/X5R_6X *15K_4
AVDD33(NC)
R793 C767
REFCLK_N
MDIN3(NC)
MDIP3(NC)
REFCLK_P
CLKREQB
3.01K/F_4 100P/50V_4
HSIN
HSIP
R268
+3VS5
9
10
11
12
13
14
15
16
3
+LANVCC +LANVCC
4.7K_4
2 Q23
C401
*0.01U/50V/X7R_4 MDI_3+
LTC044EUBFS8TL MDI_3-
1
R240
C3A 10K_4
2
LANVCC CLK_PCIE_LAN# {13}
R272 0_4 3 1 LAN_WAKE#
C CLK_PCIE_LAN {13} {4,19,33} PCIE_WAKE# C
Trace width>60mil, +LANVCC
Trace length<200mil {13} PCIE_CLK_LAN_REQ#
PCIE_TXN5_LAN# {12}
PCIE_TXP5_LAN {12} R271 *0_4 2N7002K
{33,36} SIO_WAKE_SCI#
Q21
R292 0_4
LAN_POWER {36}
+LANVCC
40 mils (Iout=1A) VDDREG/VDD33 REGOUT
40 mils (Iout=1A) VDD10
R667 *0_8_S 40 mils (Iout=1A) 40 mils (Iout=1A)
C358 R668 *0_8_S
C380 C381
0.1U/16V/X7R_4
*0.1U/16V/X7R_4 *4.7U/6.3V_6X C753 C757 C765 C764 C766
0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4
Tramsformer Reserve for Surge

Line to Line TVS
B B
ESD@PESD5V0V1BL
ESD@PESD5V0V1BL
U42
1 8 RJ45 Connector
2 1 8 7
3 2 7 6
4 3 6 5
U40 +LANVCC 4 5
MDI_0+ 1 6 MDI_0- *ESD@UCLAMP2512T.TCT
2 IO1 IO4 5 U41
GND REF EMI:close RJ45 B2A C3A
MDI_1- 3 4 MDI_1+ MDI_3- 12 13 LAN_MX3-
IO2 IO3 TD4- MX4- C402
MDI_3+ LAN_MX3+
RV1
RV3
ESD@SRV05-4HTG 11 14 *0.1U/16V/X7R_4 CN14 2RJ1684-020111F
TD4+ MX4+
10 15 LAN_MCT0 R257 75/F_12 LANCT3
D3A
TCT4 MCT4 GREEN LED
U43 +LANVCC 9 16 LAN_MCT1 R250 75/F_12 R270 510_4 LAN_GLED 9
MDI_2+ MDI_2- TCT3 MCT3 +LANVCC
1 6
2 IO1 IO4 5 MDI_2- 8 17 LAN_MX2- RJ45_LINKUP# 10
MDI_3- 3 GND REF 4 MDI_3+ TD3- MX3-
IO2 IO3 MDI_2+ 7 18 LAN_MX2+ LAN_MX0+ 1
ESD@SRV05-4HTG TD3+ MX3+ LAN_MX0- 2
MDI_1- 6 19 LAN_MX1- LAN_MX1+ 3
10/100 non-stuff TD2- MX2- LAN_MX2+ 4
MDI_1+ 5 20 LAN_MX1+ LAN_MX2- 5
TD2+ MX2+ LAN_MX1- 6
Reserve for Surge 4 21 LAN_MCT2 LAN_MX3+ 7
R235 75/F_12
Line to GND TVS TCT2 MCT2 LAN_MX3- 8
3 22 LAN_MCT3 R228 75/F_12
TCT1 MCT1 R273 510_4 LAN_OLED 11
MDI_0- LAN_MX0- +LANVCC RJ45_ACTIVITY#
2 23 12 13
TD1- MX1- 14
MDI_0+ LAN_MX0+
RV2
RV4
1 24 Amber LED
TD1+ MX1+
U39 NA0069R LF
1 8 C410
2 1 8 7
ESD@PESD5V0V1BL
ESD@PESD5V0V1BL
C734 *0.1U/16V/X7R_4
3 2 7 6 10P/3KV/NPO_1808
A 3 6 EMI:close RJ45 A
4 5
4 5
*ESD@UCLAMP2512T.TCT
D18
R264 Reserve for Surge
EC12 EC11 EC10 *BS201N-LV_1206
E@0.01U/50V/X7R_4 E@0.01U/50V/X7R_4 E@0.01U/50V/X7R_4 1M_8 Line to Line TVS

Reserve for EMI PROJECT : LV6
1A
LAN and Switch(TS3L500AE)
5 4 3 2 1
1
SATA HDD <HDD>

{2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,34,36,37,38,40,41,42,45,49,52,53,54} +3V
31
SATA ODD <ODD>
B2A
CN11
CN19
14
23 GND14
GND 1
1 GND1 2 SATA_TXP7_ODD_C C723 ODD@0.01U/50V/X7R_4
GND1 RXP SATA_TXP7_ODD {12}
2 SATA_TXP_1ST_HDD_C C784 HDD@0.01U/50V/X7R_4 3 SATA_TXN7_ODD#_C C720 ODD@0.01U/50V/X7R_4
RXP SATA_TXP8_HDD {12} RXN SATA_TXN7_ODD# {12}
3 SATA_TXN_1ST_HDD#_C C785 HDD@0.01U/50V/X7R_4 4
RXN SATA_TXN8_HDD# {12} GND2 SATA_RXN7_ODD#_C
4 5 C718 ODD@0.01U/50V/X7R_4
GND2 SATA_RXN_1ST_HDD#_C TXN SATA_RXP7_ODD_C SATA_RXN7_ODD# {12}
5 C791 HDD@0.01U/50V/X7R_4 6 C715 ODD@0.01U/50V/X7R_4
TXN SATA_RXP_1ST_HDD_C SATA_RXN8_HDD# {12} TXP SATA_RXP7_ODD {12}
6 C792 HDD@0.01U/50V/X7R_4 7
TXP SATA_RXP8_HDD {12} GND3
7
GND3
8
8 DP 9
3.3V +5V +5V_ODD
1.5A
9 10 +5V
3.3V 10 R722 *HDD@0_4 +5V 11
3.3V DEVSLP1_HDD {12} MD
11 12
GND 12 GND 13 C204 C236
GND 13 GND
GND +5V_HDD1
1A
14 R754 *SHORT_8 +5V 15 ODD@0.1U/16V/X7R_4
*ODD@10U/6.3V/X5R_6X
5V 15 GND15
5V 16 ODD@RV14@6030D-13G39
5V 17 C799 C813 + C815
GND 18
RSVD 19 *HDD@0.1U/16V/X7R_4 *HDD@10U/6.3V/X5R_6X *HDD@100U/6.3V_3528P_E45b CN12
GND 20 19
12V 21 GND19
12V 22 18
12V GND 17 SATA_TXP7_ODD_C
24 RXP 16 SATA_TXN7_ODD#_C
GND RXN 15
HDD@C166KF-122H9-L GND 14 SATA_RXN7_ODD#_C
TXN 13 SATA_RXP7_ODD_C
TXP 12
GND
D21 *HDD@AZ5725-01F SATA_TXP_1ST_HDD_C D23 *HDD@AZ5725-01F SATA_RXN_1ST_HDD#_C 11

D22 *HDD@AZ5725-01F SATA_TXN_1ST_HDD#_C D24 *HDD@AZ5725-01F SATA_RXP_1ST_HDD_C N.C 10
+5V 9
+5V 8
+5V 1.5A
GND GND 7
+5V 6 +5V_ODD
+5V +5V
5
NC 4
GND B2A
3 C218 C711
GND
2 ODD@0.1U/16V/X7R_4
*ODD@10U/6.3V/X5R_6X
ODD_DA 1
RRSNT 20
GND20
ODD@RV15@51625-01801-001
A A
SSD M.2 <HDD>

CN13
1
NGFF- Key M 2
60 mil 1.5A
{36} HDD_DETECT# GND_PRESENCE_IND 3.3Vaux +V3DX_HDD
3 4
5 GND 3.3Vaux 6
7 PERn3 N/C 8
9 PERp3 N/C 10
11 GND DAS/DSS/LED#1(OD) 12
13 PETn3 3.3Vaux 14
PETp3 3.3Vaux +V3DX_HDD
15 16
17 GND 3.3Vaux 18
19 PERn2 3.3Vaux 20
R643 21
*SSD@0_4_S PERp2 N/C 22
23 GND N/C 24
25 PETn2 N/C 26
27 PETp2 N/C 28
C742 SSD@0_4 PCIE_RXN11_SSD_C 29 GND N/C 30
{12} PCIE_RXN11_SSD PCIE_RXP11_SSD_C PERn1 N/C
C741 SSD@0_4 31 32
{12} PCIE_RXP11_SSD PERp1 N/C
33 34
C740 SSD@0.22U/25V/X7R_4 PCIE_TXN11_SSD_C 35 GND N/C 36
{12} PCIE_TXN11_SSD C739 SSD@0.22U/25V/X7R_4 PCIE_TXP11_SSD_C 37 PETn1 N/C 38 R615 *SSD@0_4_S
{12} PCIE_TXP11_SSD PETp1 DEVSLP DEVSLP2_SSD {12}
39 40
SATA_RXP_SSD C738 SSD@0_4 SATA_RXP_SSD_C 41 GND N/C 42
{12} SATA_RXP_SSD SATA_RXN_SSD# C737 SATA_RXN_SSD#_C PERn0/SATA-R+ N/C
SSD@0_4 43 44
{12} SATA_RXN_SSD# PERp0/SATA-R- N/C
45 46 C385 SSD@100P/50V_4
SATA_TXN_SSD# C736 SSD@0.22U/25V/X7R_4 SATA_TXN_SSD#_C 47 GND N/C 48
{12} SATA_TXN_SSD# SATA_TXP_SSD SATA_TXP_SSD_C PETn0/SATA-T- N/C SSD_PLTRST#
C735 SSD@0.22U/25V/X7R_4 49 50 R243 *SSD@0_4_S
{12} SATA_TXP_SSD PETp0/SATA-T+ PERST# PLTRST# {4,18,28,30,33,36,37}
51 52 R241 *SSD@0_2_S
GND CLKREQ# PCIE_CLK_SSD_REQ# {13}
53 54
{13} CLK_PCIE_SSDN 55 REFCLKn PEWAKE# 56
{13} CLK_PCIE_SSDP 57 REFCLKp NC 58
59 GND NC 60
{12} SSD_PEDET# Key Key
61 62
Key Key
3
63 64
R225 SSD@10K_4 65 Key Key 66
+3V Key Key
Q18 67 68
2 69 N/C SUSCLK(32kHz) 70 PCH_SUSCLK {13}
SSD@2N7002K 71 PEDET_OC-PCIE/GND-SATA 3.3Vaux 72
GND 3.3Vaux +V3DX_HDD
73 74
75 GND 3.3Vaux
GND
1
SSD@NASM0-S6701-TSH4
DC Current rating: 3 A (MAX)

+V3DX_HDD
60 mil 1.5A
+3V R231 *SSD@0_8_S C357 SSD@10U/6.3V/X5R_6X
C384 SSD@0.1U/16V/X7R_4 PROJECT : LV6

C356 *SSD@10U/6.3V/X5R_6X 1A
HDD/ODD/SSD
1
5 4 3 2 1
Card Reader(RTS5170) <CRD>

32
D D
TP62
TP61 TP59
SD_D2/MS_D5
SD_D3/MS_D4
CN2
C803 1U/10V/X5R_4
SD_W P/MS_D1 11
WP
XD_D7
SD_CDZ 10 16
SP14
SP11
SD_D2/MS_D5 9 CD NC 17
V18
SD_D1/MS_D7 8 DATA2 NC
SD_D0/MS_D6 7 DATA1
6 DATA0
24
23
22
21
20
19
U50 SD_CLK R425 *short_4 SD_CLK_R 5 VSS2
VCC_XD 4 CLK
V18
XD_D7
SP14
SP13
SP12
SP11
3 VDD
R736 6.2K/F_4 RREF 1 18 SD_CMD SD_CMD 2 VSS1
GND
GND
GND
GND
+3V_CR 2 RREF SP10 17 GPIO0 TP56 SD_D3/MS_D4 1 CMD
{12} USBP7-_Card DM GPIO0 CD/DATA3
3 RTS5170 SP9 16 SP9 TP57
+3V_CR {12} USBP7+_Card DP SD_CLK
4 15 156-1001902608
12
13
14
15
VCC_XD 5 3V3_IN SP8 14 SP7 TP58
SDREG 6 CARD_3V3 SP7 13 SD_CDZ C532
SDREG SP6
XD_CD#
C525
C808 C807 C806 4.7U/6.3V_6X 0.1U/16V/X7R_4
SP1
SP2
SP3
SP4
SP5
4.7U/6.3V_6X 0.1U/16V/X7R_4 1U/10V/X5R_4
25 GND
7
SD_WP/MS_D1 8
9
SD_D1/MS_D7 10
SD_D0/MS_D6 11
12
C C
R403 C508
*0_4 0.1U/16V/X7R_4
XD_CD#
SP2
SP5
TP64TP63 TP60
D3A
CR VCC Control
+3VS5 +3V_CR
40 mils (Iout=1A)
1 3
B B
Q31
AO3413
2
C842 0.01U/50V/X7R_4 C843 *0.01U/50V/X7R_4

C515 C841
0.1U/16V/X7R_4 10U/6.3V/X5R_6X
R404
3.01K/F_4
R398
+3VS5
3
4.7K_4
2 Q29
C512
*0.01U/50V/X7R_4
LTC044EUBFS8TL
1
A A
R794 0_4
CR_EN# {14}

PROJECT : LV6
1A
Card Reader
5 4 3 2 1
1 2 3 4 5 6 7 8
NGFF WiFi/BT connector

M.2 2230 <WIF>
CN6
+3.3V_NGFF_WLAN
{4,10,12,15,26,28,30,32,35,36,41,42,44,49,51,53,54,56}
{13,25,29,36,38,39}
+3VS5
VSTBY_FSPI
33
1
NGFF-KEY-E 2
3 GND 3.3Vaux 4
{12} USBP8+_BT USB_D+ 3.3Vaux
A 5 6 A
{12} USBP8-_BT USB_D- LED#1 (OD)
7 8
9 GND PCM_CLK (0/1.8V) 10
11 SDIO CLK(O)(0/1.8V) PCM_SYNC (0/1.8V) 12
13 SDIO CMD(IO)(0/1.8V) PCM_IN (0/1.8V) 14
15 SDIO DAT0(IO)(0/1.8V) PCM_OUT (0/1.8V) 16
17 SDIO DAT1(IO)(0/1.8V) LED#2 (OD) 18
19 SDIO DAT2(IO)(0/1.8V) GND 20
21 SDIO DAT3(IO)(0/1.8V) UART W ake(0/3.3V) 22
23 SDIO W ake(I)(0/1.8V) UART Rx (0/1.8V) 24
25 SDIO Reset(O)(0/1.8V) Key 26
27 Key Key 28
29 Key Key 30
31 Key Key 32
33 Key UART Tx (0/1.8V) 34
35 GND UART CTS (0/1.8V) 36
{12} PCIE_TXP6_WLAN 37 PETp0 UART RTS (0/1.8V) 38 R57 *0_4_S
{12} PCIE_TXN6_WLAN# 39 PETn0 RESERVED 40 R67 *0_4_S CL_RST# {10}
41 GND RESERVED 42 R73 *0_4_S CL_DATA {10}
{12} PCIE_RXP6_WLAN 43 PERp0 RESERVED 44 CL_CLK {10}
{12} PCIE_RXN6_WLAN# 45 PERn0 COEX3(?)(0/1.8V) 46
47 GND COEX2(?)(0/1.8V) 48
{13} CLK_PCIE_WLANP 49 REFCLKP0 COEX1(?)(0/1.8V) 50 WLANSUSCLK
{13} CLK_PCIE_WLANN 51 REFCLKN0 SUSCLK(32kHz)(0/3.3V) 52 TP30
PLTRST#
53 GND PERST0#(0/3.3V) 54 BT_OFF_R# PLTRST# {4,18,28,30,31,36,37}
{13} PCIE_CLK_WLAN_REQ# MINICARD_PME# CLKREQ0#(0/3.3V) W _Disable#2(0/3.3V) WLAN_OFF_R#
55 56
57 PEW ake0#(0/3.3V) W _Disable#1(0/3.3V) 58 C78 100P/50V_4
59 GND I2C DATA(0/3.3) 60
61 Reserved/PETp1 I2C CLK(0/3.3) 62
B 63 Reserved/PETn1 ALERT(0/3.3) 64 LPC_LAD0_R R494 *NMP@0_4_S B
GND RESERVED LPC_LAD1_R LPC_LAD0 {10,36}
65 66 R495 *NMP@0_4_S
Reserved/PERp1 RESERVED LPC_LAD2_R LPC_LAD1 {10,36}
67 68 R496 *NMP@0_4_S
Reserved/PERn1 RESERVED LPC_LAD3_R LPC_LAD2 {10,36}
69 70 R499 *NMP@0_4_S
DEBUG_LCLKOUT_L GND RESERVED LPC_LAD3 {10,36}
*NMP@0_4_S R500 71 72
{10} DEBUG_LCLKOUT *NMP@0_4_S R501 LPC_LFRAME#_R 73 RESERVED 3.3Vaux 74
{10,36} LPC_LFRAME# RESERVED 3.3Vaux
75
GND
NASE0-S6701-TS48
+3.3V_NGFF_WLAN +3.3V_NGFF_WLAN
R79 10K_4 +3.3V_NGFF_WLAN

R39
C3A 10K_4 R77 10K_4
2
R54 0_4 3 1 MINICARD_PME# D3 DB2J40600L WLAN_OFF_R#

{4,19,30} PCIE_WAKE# {12} WLAN_OFF#
R60 *0_4 2N7002K D6 BT_OFF_R#

{30,36} SIO_WAKE_SCI# {14} BT_RADIO_DIS# DB2J40600L
Q7
C C
D3A
+3VS5 +3.3V_ NGFF_WLAN +3.3V_NGFF_WLAN

Max Current : 1000mA +3.3V_NGFF_WLAN Place caps close to connector.
40 mils (Iout=1A) 40 mils (Iout=1A)
1 3
Q6
AO3413
2
C39 C83 C44 C43 C52

C58 0.01U/50V/X7R_4 C836 *0.01U/50V/X7R_4 0.1U/16V/X7R_4 0.047U/25V/X7R_4 0.1U/16V/X7R_4 0.047U/25V/X7R_4 4.7U/6.3V_6X
C47 C838
0.1U/16V/X7R_4 10U/6.3V/X5R_6X
R55
3.01K/F_4
R68
{4} SLP_WLAN# D4 DB2J40600L +3VS5

3
D 4.7K_4 D
D5 *DB2J40600L 2 Q8
{36} EC_WLAN_EN
C66
*0.01U/50V/X7R_4
LTC044EUBFS8TL Quanta Computer Inc.
1
PROJECT : LV6
1A
Wifi/BT NGFF
1 2 3 4 5 6 7 8
A B C D E
USB 3.0 R-side <UB3> Near {4,35,38,39,41,42,44,45,48,50,51,53,54,56} +5VS5
USBP1-_D
R728
WIN7@0_2
USBP1-_DL
R381
WIN7@0_2
34
R729 NWIN7@0_4 USB3.0 PORT0
+5VS5 USB3PWR
CML4
U47 60 mils (Iout=1.5A) USBP1-_R1 4 3
D {12} USBP1-_R1 USBP1+_R1 USB3PWR D
2 8 1 2
VIN1 OUT3 {12} USBP1+_R1
3 7
4 VIN2 OUT2 6 *E@DLW21SN121SQ2L CN18
C786 C787 1 EN OUT1 5 C789 C788 + C783 C790 R724 NWIN7@0_4 1
GND OC USBP1-_R 2 1 VBUS
USBP1+_R 3 2 D-
ESD@PESD5V0V1BL 1U/10V/X7R_6 BD82047FVJ-GE2 0.1U/16V/X7R_4 0.1U/16V/X7R_4 150U/6.3V/ESR25_3528 0.1U/16V/X7R_4
R725 R374 4 3 D+
USB30_RX1-_C 5 4 GND
WIN7@0_2 WIN7@0_2 5 SSRX-
USB30_RX1+_C 6
7 6 SSRX+
USBP1+_D USBP1+_DL 8 7 GND
9 8 SSTX-
9 SSTX+
13
12
11
10
R716 *0_4_S USB_Normal_OC0#_R
{35,36} USB_Normal_EN# USB_Normal_OC0#_R {12} Near
13
12
11
10
LOW ACTIVE
USB3PWR
R723 *0_4_S 2UB4008-370101F
C3A
EC39
CML3
R783 USB30_RX1-_R1_R
*0_2_S 4 3
{12} USB30_RX1-_R1 USB30_RX1+_R1_R 1 2
R784 *0_2_S
{12} USB30_RX1+_R1
*E@DLW21SN121SQ2L
ESD@0.1U/16V/X7R_4
C821 C822 R721 *0_4_S
*1.6P/50V_4C *1.6P/50V_4C Close to connector
R718 *0_4_S
For ESD
U48 CML2
USB30_RX1-_C 6 5 USB30_RX1-_C R785 USB30_TX1-_R1_R C794
*0_2_S 0.1U/16V/X7R_4USB30_TX1-_M 4 3 USB30_TX1-_C
NC CH4 {12} USB30_TX1-_R1 USB30_TX1+_R1_R C793
C R786 *0_2_S 0.1U/16V/X7R_4USB30_TX1+_M 1 2 USB30_TX1+_C C
USB3PWR USB30_RX1+_C USB30_RX1+_C {12} USB30_TX1+_R1
7 4
U49 NC CH3 *E@DLW21SN121SQ2L
USBP1-_R 2 4 3 C823 C824 R717 *0_4_S
USBP1+_R 3 IO1 VIN 1 GND *1.6P/50V_4C *1.6P/50V_4C
IO2 GND USB30_TX1-_C 9 2 USB30_TX1-_C
ESD@CM1224-02SR NC CH2 USB3.0 PORT1
USB30_TX1+_C 10 1 USB30_TX1+_C
NC CH1
ESD@PUSB3FR4
C3A
R743 *0_4_S
*E@DLW21SN121SQ2L USB3PWR
{12} USBP2-_R2
1 2
{12} USBP2+_R2
4 3
CN20
For ESD CML7 C804 150U/6.3V/ESR25_3528 1
USBP2-_C 1 VBUS
U52 R744 *0_4_S 2
+
USB30_RX2-_C USB30_RX2-_C USBP2+_C 2 D-
6 5 3
NC CH4 4 3 D+
USB3PWR USB30_RX2+_C 7 4 USB30_RX2+_C R735 *0_4_S USB30_RX2-_C 5 4 GND
U53 NC CH3 C3A USB30_RX2+_C 6 5 SSRX-
USBP2+_C 2 4 3 CML6 7 6 SSRX+
USBP2-_C 3 IO1 VIN 1 GND R787 USB30_RX2-_R2_R
*0_2_S 4 3 8 7 GND
IO2 GND USB30_TX2-_C 9 2 USB30_TX2-_C {12} USB30_RX2-_R2 USB30_RX2+_R2_R 8 SSTX-
R788 *0_2_S 1 2 9
NC CH2 {12} USB30_RX2+_R2 9 SSTX+
ESD@CM1224-02SR
13
12
11
10
USB30_TX2+_C 10 1 USB30_TX2+_C *E@DLW21SN121SQ2L
NC CH1 C825 C826 R734 *0_4_S
13
12
11
10
ESD@PUSB3FR4 *1.6P/50V_4C *1.6P/50V_4C
B R733 *0_4_S B
CML5 2UB4008-370101F
R789 USB30_TX2-_R2_R C798
*0_2_S 0.1U/16V/X7R_4USB30_TX2-_M 4 3 USB30_TX2-_C
{12} USB30_TX2-_R2 USB30_TX2+_R2_R C797
R790 *0_2_S 0.1U/16V/X7R_4USB30_TX2+_M 1 2 USB30_TX2+_C
{12} USB30_TX2+_R2
*E@DLW21SN121SQ2L
C827 C828 R732 *0_4_S
*1.6P/50V_4C *1.6P/50V_4C
USB3PWR
EC40
UART for DEBUG <W7D>
*ESD@RCLAMP0551P.TST
U15 Close to connector
USBP1-_D 6 1 USBP1+_DL
USBP1+_D 7 HSD2- D+ 2 USBP1-_DL
8 HSD2+ D- 3
R365 *WIN7@0_4_S 9 OE GND 4 UART2_RXD
+3V VCC HSD- UART2_RXD {14}
10 5 UART2_TXD
{14} GPP_A16 SEL HSD+ UART2_TXD {14}
+3V R368 WIN7@10K_4
TP26
A
WIN7@FSUSB42UMX TP27 A
C485
WIN7@0.1U/16V/X7R_4

PROJECT : LV6
1A
USB3x2
A B C D E
A B C D E
USB Sleep&Charger <UBC> <UB2>

USB0PWR
{4,34,38,39,41,42,44,45,48,50,51,53,54,56}
{4,10,12,15,26,28,30,32,33,36,41,42,44,49,51,53,54,56}
+5VS5
+3VS5
35
+5VS5
D D
C489 C495
C513 R@4.7U/10V/X5R_6 0.1U/16V/X7R_4 0.1U/16V/X7R_4
C509 R@0.1U/16V/X7R_4
IC current limit is 1.6A
+3VS5
R392
80 mils (Iout=1.6A)
U20
1 12
IN OUT USB0PWR USB3.0 ( with AOU5)
R@10K_4
15 R@2M/F_4 R394
ILIM_LO 16 R@33K/F_4 R399
ILIM_HI
9
{36} USB_STATUS# STATUS
R390 R@0_4 13 17
{12} USB_SC_OC2# FAULT PAD
+3VS5 R406 R@10K_4 4 14
ILIM_SEL GND
USBCHR_ON 5 11 BUSBP1-
{36} USBCHR_ON EN DM_IN 10 BUSBP1+
6 DP_IN BUSBP1-
{36} USB_CTL1 CTL1 USBP4-_L1
7 2 USBP4-_L1 {12} BUSBP1+
8 CTL2 DM_OUT 3 USBP4+_L1 CN17
{36} USB_CTL3 CTL3 DP_OUT USBP4+_L1 {12}
R@TPS2546RTER 20 22
C
19 21 C
R401 R@10K_4 18
+3VS5 {36} Novo_Button# 17
R395 R@10K_4 USB1PWR 16
15
USB0PWR 14
USBP4-_L1 R407 V@0_2 USBP4-_LR R378 V@0_2 BUSBP1- 13
USBP4+_L1 R408 V@0_2 USBP4+_LR R379 V@0_2 BUSBP1+ USBP5-_L2 12
USB2.0 Power SW <UB2> {12} USBP5-_L2
{12} USBP5+_L2
USBP5+_L2 11
10
9
8
HP-OUT-L_2 7
{29} HP-OUT-L_2 HP-OUT-R_2 6
{29} HP-OUT-R_2 SENSE_HP 5
{29} SENSE_HP MIC2_L 4
+3VS5 +5VS5 {29} MIC2_L MIC2_R 3
{29} MIC2_R 2
AGND R342 0_6
1
51519-02041-001
R422
C519 USB0PWR
*V@10K_4 U22 2A
V@1U/6.3V_4X 2 8
3 VIN1 OUT3 7
USB_Normal_EN# 4 VIN2 OUT2 6
{34,36} USB_Normal_EN# EN OUT1 5
1 C498
GND OC
V@BD82031FVJ-GE2 *V@470P/50V_4X
C520
B B
ESD@0.1U/16V/X7R_4
USB_Normal_OC3#_L2
{12} USB_Normal_OC3#_L2
C499
ESD@0.1U/16V/X7R_4
USB2.0 Power SW <UB2>

+3VS5 +5VS5
R421
C517 USB1PWR
*R@10K_4 U21 2A
R@1U/6.3V_4X 2 8
3 VIN1 OUT3 7
USB_Normal_EN# 4 VIN2 OUT2 6
1 EN OUT1 5 C496
A
GND OC A
R@BD82031FVJ-GE2 *R@470P/50V_4X
C518
ESD@0.1U/16V/X7R_4
USB_Normal_OC3#_L2 Quanta Computer Inc.

PROJECT : LV6
C497 Size Document Number Rev
1A
ESD@0.1U/16V/X7R_4 S&C/ USB2 (AOU5)
A B C D E
5 4 3 2 1
EC <KBC>
VSTBY_FSPI +3VPCU
VSTBY_FSPI
For EMI, Close EC. pin74

L23 10_6
ITE_AVCC
ITE_VSTBY ACDC_ID
MBCLK_THRM
MBDATA_THRM
W RST_8512#
{2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,37,38,40,41,42,45,49,52,53,54} +3V
{13,25,29,38,39} VSTBY_FSPI 36
SC6
SC13
SC14
SC9
R719 *0_8_S VSTBY_FSPI
C800 C801 C802
HDD_DETECT# R740 100K_4
*100P/50V/NPO_4 1000P/50V/X7R_4 1U/6.3V_4X L25 FCM1005VF-121T05
For ESD S5_ON R738 10K_4
*ESD@220P/50V/X7R_4
*ESD@SURGE SUP
*ESD@SURGE SUP
*ESD@SURGE SUP
VSTBY_FSPI MBCLK_THRM
SMBCLK0 R753 4.7K_4
ITE_VSTBY
C816 SMBDAT0 MBDATA_THRM R752 4.7K_4
(For PLL Power) SMBCLK0 R741 4.7K_4
SC12
SC11
L24 FCM1005VF-121T05 0.1U/16V/X7R_4 SMBDAT0 R742 4.7K_4
TEMP_MBAT1 R727 *100K_4
Layout Note: TEMP_MBAT2 R731 *100K_4
D VSTBY_FSPI
For ESD Novo_Button# D
VSTBY_FSPI_R Place all capacitors close to IT8512. +3V R386 4.7K_4
VSTBY_FSPI_R VSTBY_FSPI_RR
*ESD@180P/50V/NPO_4
*ESD@180P/50V/NPO_4
R720
R745 R756
C491 C507 C812 C536 C537 C818 *0_4_S
*0_6_S EC_RTC_RST {13} B2A
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4 0.1U/16V/X7R_4 BL/C# BL/C# {42} +3V
*0_4_S
EC_LID# {25}
+3.3V_RUN_EC C820 *100P/50V_4 HW PG R739 *10K_4
VSTBY_FSPI_R
VSTBY_FSPI_RR
C814 SW _DOCK R730 10K_4
{40} SW _DOCK
0.1U/16V/X7R_4 Novo_Button# C490 1000P/50V/X7R_4
SUSON_EC BATLED_AMBER_LED_EC {38}
EC_LPCCLK PLTRST#
C809
114
121
106
127
U51
11
26
50
92
74
84
83
82
19
20
15P/50V/NPO_4 C805
100P/50V_4 10
IT8886HE/AX
110 NBSW ON#_R EC Reset (reserve) R431 *22/F_4
VCC(1.8/3.3)
VHSPI (1.8V/3.3V)
VSTBY(PLL)
EGCLK/GPE3(Dn)
EGCS#/GPE2(Dn)
EGAD/GPE1(Dn)
L80HLAT/BAO/GPE0(Dn)
L80LLAT/GPE7(Up)
AVCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
{10,33} LPC_LAD0 LAD0/GPM0(X) PW RSW /GPB3 VSTBY_FSPI
9 111
{10,33} LPC_LAD1 8 LAD1/GPM1(X) XLP_OUT/GPB4
EMI suggestion: {10,33} LPC_LAD2 LAD2/GPM2(X)
Add a 15p bypass 7 87 SMBCLK0
{10,33} LPC_LAD3 22 LAD3/GPM3(X) SMCLK0/GPF2 88 SMBCLK0 {42,43}
PLTRST# SMBDAT0
CAP on CLK_PCI_8512 {4,18,28,30,31,33,37} PLTRST# 13 LPCRST#/W UI4/GPD2(Up) SMDAT0/GPF3 115 MBCLK_THRM SMBDAT0 {42,43}
SM BUS MBCLK_THRM {10,19,37,42} C534 *4.7U/6.3V/X5R_4
{10} EC_LPCCLK 6 LPCCLK/GPM4(X) SMCLK1/GPC1(X) 116 MBDATA_THRM
{10,33} LPC_LFRAME# HDD_DETECT# LFRAME#/GPM5(X) SMDAT1/GPC2(X) EC_PECI_L MBDATA_THRM {10,19,37,42}
17 117 R751 43_4
{31} HDD_DETECT# TXD/SOUT0/LPCPD#/GPE6(Dn) SMCLK2/PECI/GPF6(Up) EC_PECI {2}
76 118
{10} CLKRUN# CLKRUN#/GPH0/ID0 SMDAT2/PECIRQT#/GPF7(Up) DOCK_ATTACHED_3VPCU# {57}
R428
R746 *0_4_S 126 85 *10K/F_4
{4} SYS_PW ROK GA20/GPB5(X) PS2CLK0/TMB0/CEC/GPF0(Up) D/C# {42} U24
5 86 HW PG
{10} EC_IRQ_SERIRQ SERIRQ/GPM6(X) PS2DAT0/TMB1/GPF1(Up) HW PG {4,49,50}
RSMRST# D11 DB2J40600L 15 PS/2 89 1 6
{10} SIO_EXT_SMI# ECSMI#/GPD4(Up) PS2CLK2/GPF4(Up) TP_PS2_CLK {38} MRDLY VCC
LID# D25 DB2J40600L 23 90
{14} SIO_EXT_SCI# W RST_8512# 14 ECSCI#/GPD3(Up) LPC PS2DAT2/GPF5(Up) TP_PS2_DAT {38} 2 5 R427 *0_4 W RST_8512#
W RST# GPIO GND RESET#
SC15 SC10 4 93
{57} ADAPTER_ID KBRST#/GPB6(X) HMOSI/GPH6/ID6 USB_STATUS# {35} NBSW ON#_R
SUSC# 16 94 3 4 NBSW ON# R418 *0_4_S
{4} SUSC# RXD/SIN0/PW UREQ#/BBO/SMCLK2ALT/GPC7(Up) TACH2/HDIO2/GPJ0 ESC# {38} CD MR#
HSPI 95
*ESD@SURGE SUP
*ESD@SURGE SUP
HDIO3/GPJ1 USBCHR_ON {35}

C 96 C523 C521 *G677L308A31U C
HSCE#/GPH3/ID3(Dn) 97 USB_CTL1 {35}
NBSW ON# {39}
For ESD
{29} NB_MUTE#
{34,35} USB_Normal_EN#
{4,29,37} EC_PW ROK
122
119
123
CTX1/SOUT1/SMDAT3/GPH2/ID2
CRX1/SIN1/SMCLK3/GPH1/ID1
CTX0/TMA0/GPB2(Dn) CIR
ITE8886H HSCK/GPH4/ID4(Dn)
HMISO/GPH5/ID5(Dn)
98 DGPU_OPP {19}
USB_CTL3 {35}
*0.1U/16V/X7R_4 *0.1U/16V/X7R_4 R410
*10K_4
113 24
{42} BAT_LV_ALEART# CRX0/GPC0 PW M0/GPA0(Up) 25 VRON_EC PW RON_LED {39}
PW M1/GPA1(Up) 28
D3A C3A PW M2/GPA2(Up) 29 FAN_PW M_R {37} VSTBY_FSPI
PW M3/GPA3(Up) S5_PW R_PG {44,51}
PWM 30 Delay time(ms)=88000 x CMR(uF)
PW M4/GPA4(Up) MAINON {50,53}
RSMRST# 33 31
{4} RSMRST# GINT/CTS0#/GPD5(Up) PW M5/GPA5(Up) 32 BEEP {29}
109 PW M6/SSCK/GPA6(Up) 34 SIO_W AKE_SCI# {30,33}
{39} LID# LID_SW #/GPB1 PW M7/RIG1#/GPA7(Up) PM_BATLOW _N_EC {4}
108 47
{43} ACAV_IN AC_IN#/GPB0 TACH0A/GPD6(Dn) H_PROCHOT_EC FANSIG_R {37}
48
Novo_Button# 35 TACH1A/TMA1/GPD7(Dn) 120
{35} Novo_Button# PCH_SLP_S0# R791 107 RTS1#/W UI5/GPE5(Dn) TMRI0/GPC4(Dn) 124 EC_W LAN_EN {33} H_PROCHOT#
*0_2
GPE4/BTN# TMRI1/GPC6(Dn) IMVP_PW RGD {45} H_PROCHOT# {2,42,43,45}
125
LAN_POW ER {30}
3
C3A SSCE1#/GPG0 77 S5_ON
SSCE0#/GPG2 S5_ON {44,51,53,56}
FOR EC auto load code RI1#/GPD0(Up)
18 SUSB#
TP65
SUSB# {4,18}
Q28
21 D9 H_PROCHOT_EC 2
RI2#/GPD1(Up) EN_OVERRIDE {11}
2N7002K
DB2J40600L
99
S5_ON {50} SUSON_DDR25 FDIO3/DSR0#/GPG6
100 112 R757 *0_4_S
{42} M/A# 8512_SCE# FDIO2/DTR1#/SBUSY/GPG1/ID7 VSTBY0 VSTBY_FSPI
101
1
8512_SI 102 FSCE# R383
8512_SO FMOSI EXTERNAL SERIAL FLASH
103 FSPI 100K_4
8512_SCK 105 FMISO 66
FSCK ADC0/GPI0(X) ACDC_ID_DOCK {39,57}
R737 67
ADC1/GPI1(X) 68 ACDC_ID {57}
*100K_4 ADC2/GPI2(X) AD_ID {43}
MY16 56 69 R726 *DK@0_4_S
57 KSO16/SMOSI/GPC3(Dn) ADC3/GPI3(X) 70 DOCK_DETECT1 {39}
MY17 SPI ENABLE
KSO17/SMISO/GPC5(Dn) ADC4/GPI4(X) 71 SW _DOCK TEMP_MBAT1 {42}
D/A ADC5/DCD1#/W
UI29/GPI5(X) 72
A/D ADC6/DSR1#/W UI30/GPI6(X) TEMP_MBAT2 {42} +3VS5
73 R400 *DK@0_4_S
ADC7/CTS1#/W UI31/GPI7(X) 78 DOCK_DETECT2 {39} +3VS5
36 DAC2/TACH0B/GPJ2(X) 79 DC_IN_LED_EC {39}
B MY0 DOCK_PW RON# {39}
B
MY1 37 KSO0/PD0 DAC3/TACH1B/GPJ3(X) 80 DNBSW ON#_R D10 DB2J40600L
KSO1/PD1 DAC4/DCD0#/GPJ4(X) DNBSW ON# {4} tPLT17 and tPLT18
5
MY2 38 81 U23
AC_PRESENT_EC {4} tPLT15
5
MY3 39 KSO2/PD2 DAC5/RIG0#/GPJ5(X) SUSB# 2 U25
MY4 40 KSO3/PD3 R779 *0_4 4 VRON SUSC# 2
KSO4/PD4 KBMX VRON_EC
VRON {45,49}
MY5 41 1 4 SUSON SUSON {50,56}
MY6 42 KSO5/PD5 SUSON_EC 1
MY7 43 KSO6/PD6 C3A TC7SH08FU(F)
3
MY8 44 KSO7/PD7 TC7SH08FU(F)
3
MY9 45 KSO8/ACK#
MY10 46 KSO9/BUSY 2
51 KSO10/PE GPJ7 3 DOCK_ATTACHED_3V# {39}
MY11 D26 DB2J40600L
KSO11/ERR# GPH7 EC_RCIN# {10}
MY12 52 CLOCK 128 R412 *0_4
KSO12/SLCT GPJ6 BATLED_GREEN_LED_EC {38}
KSI3/SLIN#
KSI1/AFD#
KSI0/STB#
53
KSI2/INIT#
MY13 R423 *0_4

MY14 54 KSO13
VCORE
KSO14
AVSS
MY15 55
KSI4
KSI5
KSI6
KSI7
VSS
VSS
VSS
VSS
VSS
KSO15
{38} MY[0..17]
+3VS5 tCPU27 for KABY LAKE
58
59
60
61
62
63
64
65
1
27
49
91
104
75
12
MX0
MX1
5
MX2 U54
MX3 PCH_SLP_S0# 2
{4} PCH_SLP_S0# 4 VRON_Q
MX4 VRON_Q {56}
MX5 C810 C811 VRON 1
MX6
MX7 *1U/6.3V_4X 0.1U/16V/X7R_4 *TC7SH08FU(F)
3
{38} MX[0..7]
POWER SWITCH
R781 0_4
VSTBY_FSPI C3A
Thermal reset function +3V VSTBY_FSPI
TP28
A Auto Load Code R755 A
Close to EEPROM R417 R430 10K_4
*4.7K_4 100K_4
8512_SI R749 33_4
8512_SO PCH_SPI1_SI_R {10} W RST_8512# NBSW ON#_R
R748 33_4 PCH_SPI1_SO_R {10}
8512_SCE# R750 33_4
8512_SCK PCH_SPI_CS0#_R {10}
R747 33_4 PCH_SPI1_CLK_R {10}
2
R429 C524 C817

D8 *DB2J40600L 1 3
{2} PM_THRMTRIP#
*METR3904-G 1U/6.3V_4X 0.1U/16V/X7R_4
Q30 Quanta Computer Inc.
*0_4_S
PROJECT : LV6
SPI NOR FLASH {19,37,55} SYS_SHDN#
1A
KBC IT8886
5 4 3 2 1
1
FAN CONN {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,38,40,41,42,45,49,52,53,54} +3V

{26,27,29,31,39,52,53} +5V
37
+5V
+3V +3V_THR
R146 *0_6_S +5V_FAN Thermal Sensor

R609 *0_4_S
C160 C153
1U/10V/X7R_6 0.1U/16V/X7R_4
Placed near FAN NOTE:

Place near IC Pin
THS_FAN+ Placed near charger circuit.
3
+3V METR3904-G
Q44 C363
2 U9
2200P/50V/X7R_4
R142 1 8 SMB_THRM_CLK
10K_4 D1+ SCLK +3V_THR
1
THS_FAN- 2 7 SMB_THRM_DAT
D1- SDA
CN9 THS_SSD+ 3 6
D2+ VDD
FANSIG_R 1 6 4 5
{36} FANSIG_R 2 D2- GND
3
+5V_FAN METR3904-G
FAN_PWM_R 3 Q43 C364 C287
{36} FAN_PWM_R 4 5 2 W83773G 10U/6.3V/X5R_6X C310
2200P/50V/X7R_4 0.1U/16V/X7R_4
50281-0040N-001
C151 *ESD@RCLAMP0551P.TST
C156 ESD@PESD5V0V1BL
1
THS_SSD-
Placed near SSD ADDRESS: 98H
A A
CPU PTC circuit
+3V
SYS_SHDN-1#
+3V
R152 R433 0_4 +3V_THR
EC_PWROK {4,29,36}
10K_4 Q40
R435 *0_4 R612 4.7K_4
(110 degree setting) PLTRST# {4,18,28,30,31,33,36} +3V_THR
5
R432
18.7K/F_4 SMB_THRM_DAT 4 3
MBDATA_THRM {10,19,36,42}
3
2 Q15
PMST3904
SYS_SHDN-1# +3V_THR
R613 4.7K_4 2 To EC
1 3 D12 DB2J40600L SYS_SHDN# {19,36,55}
1
SMB_THRM_CLK 1 6
MBCLK_THRM {10,19,36,42}
2
R160 Q32
C225 470_6_PTC 2N7002K
0.1U/16V/X7R_4 SSM6N48FU
1
Placed back of CPU

PROJECT : LV6
1A
Thermal
1
5 4 3 2 1
INT KeyBoard <KBC>

38
{2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,40,41,42,45,49,52,53,54} +3V
TP Control <TPD> {26,27,29,31,37,39,52,53}
{4,34,35,39,41,42,44,45,48,50,51,53,54,56}
+5V
+5VS5
{13,25,29,36,39} VSTBY_FSPI
{4,10,12,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56} +3VS5
Touch pad
VSTBY_FSPI R318 10K_4
33
CN1 +3V normal Current : 1mA +3V_TP +3V
C434 *180P/50V_4 C3A
33
R323 *0_4_S KB_G 32 FUSE 1A F9 R758 4.7K_4
R329 33_4 NBSWON#_C 31 32 R761 4.7K_4 +3V_TP
{36} ESC# NUM_LED# 31 TP_PS2_CLK_R
30 CN22
{14} NUM_LED# 30
+3V R328 150_4 VCC_3V_LED_N 29 1
MY17 28 29 C542 C543 TP_PS2_DAT_R
{36} MY17 28 TP_PS2_CLK_R
MY16 27 0.1U/16V/X7R_4 0.047U/25V/X7R_4 R759 *0_4_S 2 7
{36} MY16 27 {36} TP_PS2_CLK BTN_L
MX1 26
D {36} MX1 26 TP_PS2_DAT_R D
MX7 25 R760 *0_4_S 3
{36} MX7 25 {36} TP_PS2_DAT BTN_R
MX6 24
{36} MX6 24
MY9 23 4
{36} MY9 23
MX4 22
{36} MX4 22 BTN_L
MX5 21 5
{36} MX5 21
MY0 20 8
{36} MY0 20 BTN_R
MX2 19 6
{36} MX2 19
MX3 18
{36} MX3 18
MY5 17 04 6811 606 090 846+
{36} MY5 17
MY1 16
{36} MY1 16
MX0 15
{36} MX0 15
MY2 14
{36} MY2 14
MY4 13
{36} MY4 13
MY7 12
{36} MY7
MY8 11 12 SW1
VR-15 SW2
{36} MY8 11 BTN_L BTN_R
MY6 10 1 2 1 2
{36} MY6 10
MY3 9 3 4 3 4
{36} MY3 9
MY12 8 5 5
{36} MY12 8
MY13 7 RV15@TME-533B-Q-T/R 6 RV15@TME-533B-Q-T/R 6
{36} MY13 7
MY14 6
{36} MY14 6
MY11 5
{36} MY11 5
MY10 4
{36} MY10
MY15 3 4 V-14 SW3
{36} MY15 CAP_LOCK_LED# 3 BTN_R
2 1 2
{14} CAP_LOCK_LED# VCC_3V_LED 2
R326 150_4 1 3 4
34
+3V 1 5
V14@TME-533B-Q-T/R 6
34
6782K-Y32N-00L
SW5
R-14 SW4
BTN_L 1 2 BTN_R 1 2
3 4 3 4
5 5
RV14@TME-533B-Q-T/R 6 R14@TME-533B-Q-T/R 6
For EMI request
CA4 CA1 CAP_LOCK_LED#
220PX4 220PX4 NUM_LED#
MX0 1 2 7 8 MY15
MY1 3 4 5 6 MY10
MY5 5 6 3 4 MY11
C436
C435
C MX3 7 8 1 2 MY14 C
Finger Print <FPD>

*10P/50V/COG_4
*10P/50V/COG_4
CA2 CA5
220PX4 220PX4
MY13
MY12
1
3
2
4
1
3
2
4
MX4
MX5
USB INTERFACE
MY3 5 6 5 6 MY0
MY6 7 8 7 8 MX2 CN15
+3V +3V_FP 1
CA3 CA6 F7 *SHORT_8 +3V_FP 2 7

220PX4 220PX4 R678 *FP@0_4_S
MY8 1 2 1 2 MX1 C3A 3
MY7 3 4 3 4 MX7 CML1
MY4 5 6 5 6 MX6 C422 C419 USBP6-_FP 4 3 USBP6-_FP_C 4
{12} USBP6-_FP
MY2 7 8 7 8 MY9 FP@0.1U/16V/X7R_4 FP@0.047U/10V_4 1 2
USBP6+_FP USBP6+_FP_C 5
+3V_FP {12} USBP6+_FP
*FP@DLW21SN121SQ2L 8
U44 R677 *FP@0_4_S +3V_FP 6
USBP6-_FP_C 2 4
USBP6+_FP_C 3 IO1 VIN 1 FP@04 6811 606 090 846+
IO2 GND
MY16 C796 220P/50V_4 ESD@CM1224-02SR
MY17 C795 220P/50V_4
LED <UIF>
For 14
B Battery LED3 B
BATLED_GREEN_LED# R443 200_6 BATLED_GREEN_LED_C 2
C2 3
GREEN A +5VS5
BATLED_AMBER_LED# R444 200_6 BATLED_AMBER_LED_C 1
C1
ORANGE
RV14@LTST-S326KGKFKT
For 15
*680P/50V/X7R_4
*680P/50V/X7R_4
LED1
BATLED_GREEN_LED_C 2
C2 3
GREEN A +5VS5
BATLED_AMBER_LED_C 1 BATLED_GREEN_LED#
C1
ORANGE
RV15@LTST-S326KGKFKT
3
C546
C545
R438 300_4 2 Q33
{36} BATLED_GREEN_LED_EC
METR3904-G
1
For 14
LED4
HDD SATA_LED#_R R440 510_4 SATA_LED#_C 1 2
{12} SATA_LED#_R +3V
RV14@LTST-S320KGKT BATLED_AMBER_LED#
For 15
LED2
*680P/50V/X7R_4
SATA_LED#_C 1 2 +3V
3
R439 300_4 2 Q34
RV15@LTST-S320KGKT {36} BATLED_AMBER_LED_EC
METR3904-G
1
F3A
C547
A A

PROJECT : LV6
1A
KB/TP/FP/LED
5 4 3 2 1
A B C D E
Prolink <DOK>
{13,25,29,36,38} VSTBY_FSPI
{26,27,29,31,37,52,53} +5V
{2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
{4,34,35,38,41,42,44,45,48,50,51,53,54,56}
+3V
+5VS5
DP HPD SENSE +5V
Power board w LED <UIF>
+3VPCU
R29
DOCK-PWR20-IN
CN5
14
13
39
{57} DOCK-PWR20-IN 12
100K_4 11
10
2
Q3 DK@2N7002K
9
{36} LID# 8
1 3 DOCK_HPD_L
DOCK_DETECT1 {40} RE_DOCK_DP_HPD {36} PWRON_LED 7
VSTBY_FSPI R450 20K_4 {36} NBSWON#
R449 20K_4 DOCK_DETECT2 R10 DC_IN_LED# 6
VSTBY_FSPI 5
R7
C3A 4
+3VPCU 3
CN3 DK@100K_4 R6 *DK@0_4 DK@100K_4 2
USBP3-_DOCK +5VPCU 1
{12} USBP3-_DOCK
30
4 USBP3+_DOCK 29 30 51625-01401-001 4
{12} USBP3+_DOCK 29
28
USB30_TX3-_DOCK 27 28 32
{12} USB30_TX3-_DOCK USB30_TX3+_DOCK 27 32 DC_IN_LED#
{12} USB30_TX3+_DOCK 26
25 26
USB30_RX3-_DOCK 24 25 VSTBY_FSPI
{12} USB30_RX3-_DOCK USB30_RX3+_DOCK 24
{12} USB30_RX3+_DOCK 23
22 23
22
3
DOCK_DDI2_TXN3_L 21
{40} DOCK_DDI2_TXN3_L DOCK_DDI2_TXP3_L 21
20 R42 300_4 2 Q5
{40} DOCK_DDI2_TXP3_L 20 {36} DC_IN_LED_EC
{43} DOCK_PWR_CONSUM 19 R447 METR3904-G
DOCK_DDI2_TXN2_L 18 19 100K_4
{40} DOCK_DDI2_TXN2_L
1
DOCK_DDI2_TXP2_L 17 18
{40} DOCK_DDI2_TXP2_L DOCK_DETECT2 17
{36} DOCK_DETECT2 16
DOCK_DDI2_TXN1_L 15 16
{40} DOCK_DDI2_TXN1_L DOCK_DDI2_TXP1_L 15 DOCK_ATTACHED_3V#
{40} DOCK_DDI2_TXP1_L 14
14 {36} DOCK_ATTACHED_3V#
{36} DOCK_PWRON# R448 *DK@0_4_S 13
DOCK_DDI2_TXN0_L 12 13
{40} DOCK_DDI2_TXN0_L DOCK_DDI2_TXP0_L 12
{40} DOCK_DDI2_TXP0_L 11
DOCK_ATTACHED_3V# R446 *DK@0_4_S DOCK_PWRGOOD# 10 11
DOC_DP_AUXN 9 10
{40} DOC_DP_AUXN DOC_DP_AUXP 9
{40} DOC_DP_AUXP 8
F1 DK@FUSE 2A +5VS5_DOCK 7 8
+5VS5 DOCK_HPD_L 7
6
5 6
DOCKED2 4 5 31
{57} DOCKED2 4 31
3
ACDC_ID_DOCK 2 3
{36,57} ACDC_ID_DOCK DOCK_DETECT1 2
{36} DOCK_DETECT1 1
1
CN8
DK@51540-03001-V01
DC_IN_LED# 1
2
3
+5VPCU 4
RV15@51579-00401-V01
3 3
C3A
2 2
1 1

PROJECT : LV6
1A
Prolink
A B C D E
5 4 3 2 1
DP SWITCH <DPP> +3V_VCC +3V_VCC

{2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,41,42,45,49,52,53,54} +3V
40
C62 C54
+3V +3V_VCC DK@0.1U/16V/X7R_4 DK@0.1U/16V/X7R_4
DPSW_CFG0
DPSW_PC10
DPSW_PC11
DPSW_PC20
DPSW_PC21
L3 DK@HCB1608KF-221T20_2A
DPSW_PI0
+3V_VCC
C59
D C41 I2C_CTRL_EN R65 *DK@4.7K_4 D
C49
DK@0.47UF/10V_X5R_4 DK@1U/10V/X5R_4 DK@0.01U/50V/X7R_4 R490 DK@0_4
U28 DK@PS8338BQFN60GTR-A1
60
59
58
57
56
55
54
53
52
51
PI0/SDA_CTL
CFG0
CFG1
VDD334
PC10
PC11
PC20
PC21
GND2
VDD333
DPSW_PI1 1 50 VGA_DDI2_TXP0_L
PI1/SCL_CTL OUT1_D0P VGA_DDI2_TXP0_L {27}
I2C_CTRL_EN 2 49 VGA_DDI2_TXN0_L
I2C_CTL_EN OUT1_D0N VGA_DDI2_TXN0_L {27}
PCH_DOCK_DP_HPD_R 3 48 R26 VGA_DDI1_HPD
*DK@0_4_S
IN_HPD OUT1_HPD VGA_DDI1_HPD {27}
From CPU side IN_CA_DET 4 47 VGA_DDI2_TXP1_L
IN_CA_DET OUT1_D1P VGA_DDI2_TXP1_L {27}
+3V_VCC VGA_DDI2_TXN1_L
DK@0.1U/16V/X7R_4
C65 5 46
DP_D3N_C VDD33 OUT1_D1N VGA_DDI2_TXN1_L {27}
DK@0.1U/16V/X7R_4 C582
{2} DOCK_DDI2_TXN3 DP_D0P_C 6 45
TO VGA
DK@0.1U/16V/X7R_4 C583 DP_D3P_C IN_D0P OUT1_D2P
{2} DOCK_DDI2_TXP3 DP_D0N_C 7 44
IN_D0N OUT1_D2N
DK@0.1U/16V/X7R_4 C588 DP_D2N_C DPSW_PEQ 8 43 OUT2_CA_DET R452 DK@1M_4
{2} DOCK_DDI2_TXN2 PEQ OUT1_CA_DET
DK@0.1U/16V/X7R_4 C589 DP_D2P_C DP_D1P_C 9 42
{2} DOCK_DDI2_TXP2 IN_D1P OUT1_D3P
DP_D1N_C 10 41
DOCK_DDI2_TXN1 0.1U/16V/X7R_4 C584 DP_D1N_C IN_D1N OUT1_D3N
{2} DOCK_DDI2_TXN1 DOCK_DDI2_TXP0_R
11 40 DK@0.1U/16V/X7R_4
C559
DOCK_DDI2_TXP1 DP_D1P_C GND OUT2_D0P DOCK_DDI2_TXP0_L {39}
{2} DOCK_DDI2_TXP1 0.1U/16V/X7R_4 C585
DP_D2P_C 12 39 DOCK_DDI2_TXN0_R DK@0.1U/16V/X7R_4
C558
IN_D2P OUT2_D0N DOCK_DDI2_TXN0_L {39}
DOCK_DDI2_TXN0 0.1U/16V/X7R_4 C586 DP_D0N_C DP_D2N_C 13 38
{2} DOCK_DDI2_TXN0 IN_D2N OUT2_HPD RE_DOCK_DP_HPD {39}
DOCK_DDI2_TXP0 0.1U/16V/X7R_4 C587 DP_D0P_C 14 37 DOCK_DDI2_TXP1_R DK@0.1U/16V/X7R_4
C565
{2} DOCK_DDI2_TXP0 PD OUT2_D1P DOCK_DDI2_TXP1_L {39}
DP_D3P_C 15 36 DOCK_DDI2_TXN1_R DK@0.1U/16V/X7R_4
C564
IN_D3P OUT2_D1N DOCK_DDI2_TXN1_L {39} TO Onelink+
DP_D3N_C 16 35 DOCK_DDI2_TXP2_R DK@0.1U/16V/X7R_4
C557
IN_D3N OUT2_D2P DOCK_DDI2_TXP2_L {39}
DK@2.2U/6.3V_6C64 17 34 DOCK_DDI2_TXN2_R DK@0.1U/16V/X7R_4
C556
CEXT OUT2_D2N DOCK_DDI2_TXN2_L {39}
C 18 33 OUT1_CA_DET R451 DK@1M_4 C
{36} SW_DOCK SW OUT2_CA_DET
19 32 DOCK_DDI2_TXP3_R DK@0.1U/16V/X7R_4
C555
GND1 OUT2_D3P DOCK_DDI2_TXP3_L {39}
DK@4.99K/F_4 R48 20 31 DOCK_DDI2_TXN3_R DK@0.1U/16V/X7R_4
C554
REXT OUT2_D3N DOCK_DDI2_TXN3_L {39}
61 73
62 THERMAL_PAD THERMAL_PAD12 72
63 THERMAL_PAD1 THERMAL_PAD11 71
SW_DOCK Display Priority 64 THERMAL_PAD2
THERMAL_PAD3
THERMAL_PAD10
THERMAL_PAD9
70
65 69
66 THERMAL_PAD4 THERMAL_PAD8 68
THERMAL_PAD5 THERMAL_PAD7
OUT1_AUXN_SDA
OUT2_AUXN_SDA
OUT1_AUXP_SCL
OUT2_AUXP_SCL
67
Low VGA THERMAL_PAD6
IN_DDC_SDA
IN_DDC_SCL
IN_AUXN
IN_AUXP
VDD331
VDD332
High Docking Station
21
22
23
24
25
26
27
28
29
30
+3V_VCC +3V_VCC
DPSW_PEQ R50 DK@4.7K_4 DPSW_PC10 R46 DK@4.7K_4 +3V_VCC +3V_VCC
R49 DK@4.7K_4 R477 DK@4.7K_4 PCy0

+3V_VCC +3V_VCC
DP_AUXN_SDA_R
DP_AUXP_SCL_R
DPSW_PI1 R56 *DK@4.7K_4 DPSW_PC11 R45 *DK@4.7K_4 C61 C53
IN_DDC_SDA
IN_DDC_SCL
R487 *DK@4.7K_4 R473 *DK@4.7K_4 DK@0.1U/16V/X7R_4 DK@0.1U/16V/X7R_4
+3V_VCC
+3V_VCC +3V_VCC
DOC_DP_AUXN_R R30 DK@100K_4
DPSW_PI0 R53 DK@4.7K_4 DPSW_PC20 R40 *DK@4.7K_4 DOC_DP_AUXP_R
B R37 DK@100K_4 B
R485 *DK@4.7K_4 R470 *DK@4.7K_4
+3V_VCC +3V_VCC DOC_DP_AUXN_R DK@0.1U/16V/X7R_4

C569
DOC_DP_AUXN {39}
DPSW_CFG0 R51 DK@4.7K_4 DPSW_PC21 R38 *DK@4.7K_4 DOC_DP_AUXP_R DK@0.1U/16V/X7R_4
C570
DOC_DP_AUXP {39}
R481 *DK@4.7K_4 R468 *DK@4.7K_4
VGA_DP_AUXN
VGA_DP_AUXN {27}
VGA_DP_AUXP
VGA_DP_AUXP {27}
B2A
+3V_VCC
R61 *0_4_S PCH_DOCK_DP_HPD_R VGA_DP_AUXN R777 DK@100K_4

{2} PCH_DOCK_DP_HPD VGA_DP_AUXP
L 11.5dB (Default) R778 DK@100K_4
PEQ H 14.5dB
R489
M 8.5dB 100K_4
L Automatic EQ enable (deafault)
PI0
H Automatic EQ disable DOCK_DDI2_TXP0 R63 NDK@0_2 VGA_DDI2_TXP0_M R456 NDK@0_2VGA_DDI2_TXP0_L
L Auto test disable & input offset cancellation enable(default) DOCK_DDI2_TXN0 R62 NDK@0_2 VGA_DDI2_TXN0_M R455 NDK@0_2VGA_DDI2_TXN0_L
PI1 H Auto test enable & input offset cancellation enable DOCK_DDI2_TXP1 R59 NDK@0_2 VGA_DDI2_TXP1_M R454 NDK@0_2VGA_DDI2_TXP1_L
M Auto test enable & input offset cancellation enable DOCK_DDI2_TXN1 R58 NDK@0_2 VGA_DDI2_TXN1_M R453 NDK@0_2VGA_DDI2_TXN1_L
+3V_VCC +3V_VCC +3V_VCC
L Control Switching Mode (Default) PCH_DOCK_DP_HPD_R R64 NDK@0_2 VGA_DDI1_HPD_M R27 NDK@0_2VGA_DDI1_HPD
CFG0
H Automatic Switching Mode R71 DOCK_DDI2_AUXP R475 NDK@0_2 VGA_DP_AUXP_M R43 NDK@0_2VGA_DP_AUXP
R52 R74
L Link training (Default) *DK@4.7K_4
DOCK_DDI2_AUXN R471 NDK@0_2 VGA_DP_AUXN_M R41 NDK@0_2VGA_DP_AUXN
A PCy0 *DK@10K_4 *DK@10K_4
A
(AUX Interception) H 800mV/ 0db Hybrid DDC/AUX
M 400mV/ 0db
1
3
L Default *DK@AO3413_3A *DK@AO3413_3A Q37
PCy1
(Swing) H +20% {2} DOCK_DDI2_AUXP
DOCK_DDI2_AUXP C578 DP_AUXP_SCL_R
0.1U/16V/X7R_4 2 2 2 IN_CA_DET
M -16.7% {2} DOCK_DDI2_AUXN

DOCK_DDI2_AUXN C575 DP_AUXN_SDA_R
0.1U/16V/X7R_4
Q10 Q9 *DK@2N7002K
3
1
R483 *DK@0_4 IN_DDC_SCL
R478 *DK@0_4 IN_DDC_SDA

PROJECT : LV6
1A
DP SW(PS8338B)
5 4 3 2 1
5 4 3 2 1
HOLE
41
D
B2A F3A D
H6 H7 H10 H11 H8 H3 H19 H20 H22 H23

*H-TC197iBC146D146PT *H-TC197iBC146D146PT *H-TC197iBC146D146PT *H-TC197iBC146D146PT *H-TC197iBC146D146PT *H-TC197iBC146D146PT *SPAD-C197 *SPAD-C197 *H-TC197iBC146D146PT
*H-TC197iBC146D146PT
1
H15 H2 H14 H1 H16 H12
7 6 7 6 7 6 *H-LV6-2 *h-c236i118d98p2 7 6
8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4
1
2
3
1
2
3
1
2
3
1
2
3
1
1
*HG-C236D98P2 *HG-TC268BC236D98P2 *HG-TC268BC236D98P2 *HG-LV6-3
C C
C3A C3A
H17 H18 H13 H21
H4 H5 H9 5032HB25-4011WC1 SSD@4515HB25-3511WC1 *H-C83D83N *h-o102x94d102x94n
7 6 7 6 7 6
8 5 8 5 8 5
9 4 9 4 9 4
1
2
3
1
2
3
1
2
3
1
*hg-tc268ic268bc315d142p2 *HG-LV6-1 *HG-C236D98P2
B2A C3A C3A C3A
B <EMC> B
+5VS5 +3VS5
+3VS5 +5VS5
C3A
C539 *1U/6.3V_4X C847 ESD@0.1U/16V/X7R_4 C493 *1U/6.3V_4X
+5VPCU
C538 *22U/6.3V/X5R_6 C848 ESD@0.1U/16V/X7R_4 C418 *1U/6.3V_4X
C3A
C535 *1U/6.3V_4X C849 ESD@0.1U/16V/X7R_4 C80 1U/6.3V_4X C832 0.1U/16V/X7R_4
C540 *22U/6.3V/X5R_6 C850 ESD@0.1U/16V/X7R_4 C829 0.1U/16V/X7R_4 C833 0.1U/16V/X7R_4
C727 *1U/6.3V_4X C851 ESD@0.1U/16V/X7R_4 C830 0.1U/16V/X7R_4
C500 *22U/6.3V/X5R_6 C852 ESD@0.1U/16V/X7R_4 C831 0.1U/16V/X7R_4
C853 ESD@0.1U/16V/X7R_4
C854 *ESD@0.1U/16V/X7R_4
+3V
C855 *ESD@0.1U/16V/X7R_4
+5VS5
A A
C774 *1U/6.3V_4X
C82 *1U/6.3V_4X C544 *1U/6.3V_4X
C149 *1U/6.3V_4X
F3A C263 *1U/6.3V_4X Quanta Computer Inc.
C541 *1U/6.3V_4X
PROJECT : LV6
1A
EMC/Screw Hole
5 4 3 2 1
5 4 3 2 1
PJP5 BAT-R BAT-V
42
PJP2
C51113-10839-L Remove PQ3,PQ4,PQ5,PR5,PR6
PF2 2 1
fuse-10A-32VF_1206 PL2
1 MBAT 1 2 MBAT+
PWR1 2 HCB2012KF-800T50 PC7 *SHORTPAD
PWR2 3 SMC_1 PR28 0.01U/50V/X7R_4
I2C_CLK
1
4 SMD_1 PL1 100K/F_4 +3VS5 +VIN +5VS5 +3VS5
I2C_DATA 5 PC4
TS 6 HCB2012KF-800T50 PC105
PQ36 PQ39
2
RTC 7 0.1U/50V/X7R_6 0.1U/16V/X7R_4
GND2 TPCC8131 TPCC8131
D 8 PQ7 MDISCHG_1 D
GND2
1
PR14 PR15 LTC044EUBFS8TL 1 1 PR182
200/F_4 200/F_4 PQ9 2 5 5 2 PD14 +3VS5 47K_4
5
ADISCHG 2 IMD2AT108 3 3 PR183 DA2J10100L PR180
20K/F_4 95.3K/F_4 1
+
SMBDAT0 SMBCLK0 4
{36,43} SMBDAT0 SMBCLK0 {36,43}
2
PQ8 3
-
3
LTC044EUBFS8TL PU6
4
1
1
Battery mode = 6V G1363T11U
2
PD5 PD6 2MDISCHG PR178
+3VPCU PDZ5.6B PDZ5.6B PR181 100K/F_4
115K/F_4
3
ACHG
2
5
PR19 2 BL/C#
PR16 10K/F_4 Vincent 1/28 D PQ41
10K/F_4 +3V
4 PR25 *SHORT_4 2N7002K
1
TEMP_MBAT1 PQ37 BAT-V PC5394
TEMP_MBAT1 {36}
2
TPCC8131
0.1U/16V/X7R_4
2
PR24 PC5398 PC5397
1
2
3
PC3 PJP1 100K/F_4 0.1U/25V/X5R_4 *100P/50V_4
0.1U/16V/X7R_4 *SHORTPAD PQ11 PR3202
5
C C
LTC044EUBFS8TL 348K/F_4
1
+VIN PR3201 0.9V 1
+
2 MCHG 2M/F_4 4
+1.8V_DEEP_SUS PR3199 3
-
2
PC5 10K/F_4 PU25
0.01U/50V/X7R_4 PR22 +3V PR3198 G1363T11U
2
1
2
3
2B@100K/F_4 *10K/F_4
BL/C# D/C# M/A# Status 2B@TPCC8131
PQ38
Set +VIN=5.97~6.18V
0 0 0 Chareg A batt
1
4 PQ13 PR3200 PC5396
0 0 1 Charge M batt
3
2B@LTC044EUBFS8TL 10K/F_4 0.1U/16V/X7R_4
0 1 0 Diccharge A batt PR21
0 1 1 Discharge M batt *SHORT_4 2 ACHG
1 0 0 Free Dicharge Vincent 1/28 D
5
1 0 1 Free Dicharge
1 1 0 Free Dicharge +3V
1
1 1 1 Free Dicharge BAT-R ADISCHG PR3205
+3VS5 1 2
+3VPCU *0_4/S
PQ42 PQ40 PR3191 H_PROCHOT# {2,36,43,45}
PD32
PJP7 10K/F_4
2B@TPCC8105 2B@TPCC8105
6
2B@BTS1L-7K8040 PC6 1 2
2
9 PF4 1 1 2B@0.01U/50V/X7R_4 PR3195 2 PQ71B
16
15
14
13
12
11
10
GND2
9
7
2B@fuse-10A-32VF_1206 PL4 2 5 5 2 PC1 10K/F_4
1ABAT 1 2 ABAT+ 3 3 DA2J10100L
2N7002KDW
0.1U/50V/X7R_6
B B
VDD
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
1
1
PWR1
3
2 2B@HCB2012KF-800T50
PWR2 3 SMC_2 PR3192 4.7M_4 5 PQ71A
I2C_CLK
1
4 SMD_2 PL3 PU1
4
I2C_DATA 5 CD74HC237PWR
2N7002KDW
GND
4
TEMP 6 2B@HCB2012KF-800T50 PC5395 PR3203
GL
G1
G2
2
GND2
C
A
B
7 PR75 PC11 PR26 100K/F_4
GND2
1
3
2B@200/F_4 PR66 2B@0.1U/50V/X7R_6 PQ14 2B@100K/F_4
1
2
3
6
5
8
3
8 2B@200/F_4 2B@LTC044EUBFS8TL 0.01U/50V/X7R_4

GND2 ADISCHG_1
MDISCHG 2 PR3194
+3V
MBDATA_THRM MBCLK_THRM PQ17 PR3196
{10,19,36,37} MBDATA_THRM MBCLK_THRM {10,19,36,37} *10K/F_4
1 2
BAT_LV_ALEART# {36}
2B@IMD2AT108 PR29 BL/C# *0_4/S
BL/C# {36}
1
4
1
2B@20K/F_4 D/C# D/C# {36}
6
PD13 PD12 M/A# M/A# {36}
2B@PDZ5.6B 2B@PDZ5.6B PQ15 PR3197 2 PQ73B
+3V
3
+3VPCU 2B@LTC044EUBFS8TL *10K/F_4
MCHG PR32
*2N7002KDW
2
1
3
2B@10K/F_4 2
PR3193 5 PQ73A PR3204
*75K/F_4 *100K/F_4
*2N7002KDW
1
4
PR101
10K/F_4 SI-2 modify 4/15
A B2B A
TEMP_MBAT2
TEMP_MBAT2 {36}

PC53
2B@0.1U/16V/X7R_4
PROJECT : LV6
1A
BATTERY SELECTOR
5 4 3 2 1
5 4 3 2 1
43
Vincent 12/30 C
+VAD PQ18 PQ16 +BAT_DIS
For EMI
TPCA8065-H +PRWSRC +VIN TPCA8A10-H C3A
PR35 +PRWSRC
D 3 0.01/1206/1%/1W 3 D
5 2 1 2 5 2
1 1
EC5 EC4 EC6 EC3

PC8 1U/25V_4 1U/25V_4 1U/25V_4 1U/25V_4
4
PC9 PC10 0.01U/50V/X7R_4
BQACN_N
PR31
2200P/50V/X7R_4 0.1U/50V/X7R_6 PR34 PR36 BQBATDRV
*0_2/S *0_2/S 4.02K/F_4
BATDIS_G PC20 PC15
0.1U/25V/X5R_4 PC18 0.1U/25V/X5R_4
Place this ZVS close to

0.1U/25V/X5R_4
Do Not add test pad on Far-Far away +VIN
BATDIS_G signal
PR38
PR39 10/F_4
10/F_4
PR47 PR43 PR37

DOCK_PWR_CONSUM {39}
4.02K/F_4 4.02K/F_4 1K/F_2
PC16
1 BQACN
2 BQACP
REGN6V
*0.1U/25V/X5R_4 +VIN
PD9 For ISN
UDZVTE-178.2B
C PU2 1 2 C
Vincent 12/30 C
ACP
ACN
PC112 PC107 PC108 PC113 EC17 EC8
5
PC111
*10U/25V_8
*10U/25V_8
BQCMSRC 3 24
2200P/50V/X7R_4
PQ44
0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
CMSRC REGN TPCC8067-H
Vsystem +VAD 2.2U/10V/X7R_6
BQACDRV 4 26 BQHIDRV 4
PC14 ACDRV HIDRV
2
Vincent 1/28 D
PD10 BQ24780SRUYR PC13
3
2
1
PR200 PR190 1U/25V/X7R_6 BQVCC 28 0.047U/25V/X7R_4
*1N4448WS-7-F +VAD VCC
430K/F_2 25 BQB_2PR33 *0_6S BQB_1 +BAT_DIS BAT-V
10/F_8 BTST PL5 PR186
1
ACDET=16.83V BQACDET 6 3.3UH-PCMC063T3R3MN-6A 0.01/1206/1%/1W

ACDET 27 BQPHASE 1 2
PR63 PHASE
1
*430K/F_2 PC26
PR59 *1000P/50V_4
71.5K/F_2 Vincent 1/28 D PQ43 PR184 PC109 PC110 PC12 PD8
TPCC8067-H 2.2_6
23 BQLODRV 4
10U/25V/X5R_8
10U/25V/X5R_8
*RB501V-40
PR185 PR187
0.1U/25V/X5R_4
2
SMBDAT0 PR55 *0_2/S BQDATA 11 LODRV *0_2/S *0_2/S
{36,42} SMBDAT0 SDA 22
SMBCLK0 PR50 *0_2/S BQCLK 12 GND PC106
{36,42} SMBCLK0
3
2
1
SCL 29 2200P/50V/X7R_4
H_PROCHOT# PR54 *0_2/S BQPROCHOT 10 PAD
{2,36,42,45} H_PROCHOT# PROCHOT
+3VPCU PR46 *100K/F_2 BQBATPRES 15 17 BQBATSRCPR192 10/F_6

PR48 BATPRES BATSRC PC17
B *0_2/S
BQTB_STAT 16
B
+3VPCU PR45 *100K/F_2
TB_STAT 0.1U/25V/X5R_4
20 BQSRP PR40 *0_6S CSOP
PR49 SRP
REGN6V
100K/F_2 PC19
ACAV_IN 5 19 BQSRN PR41 *0_6S 0.1U/25V/X5R_4 CSON
{36} ACAV_IN ACOK SRN
PR196
PC21
18 BQBATDRV
100K/F_2 BATDRV
AD_ID BQIADP 7 30
{36} AD_ID IADP PAD 31 0.1U/25V/X5R_4
PR197 PAD 32
CMPOUT
PC104 10/F_2 PC117 BQIBAT 8 PAD 33

CMPIN
IDCHG PAD
PMON
0.01U/50V/X7R_4 100P/50V_2 34
PAD
PAD
PAD
PAD
ILIM
35
PAD
21
13
14
38
37
36
Place this cap

BQILIM
close to EC PR194
PR198 *0_2/S
10/F_2
PMON PMON {45}
PR189
100K/F_2 PR199
PC116 PC114 *0_2/S PC115
VIDCHG = 8 or 16 × (VSRN – VSRP) +3VPCU
0.01U/50V/X7R_4 100P/50V_2 *100P/50V_2
*23.2K/F_4
PR193
A PR191 A
43.2K/F_4
Place this cap
close to EC

PROJECT : LV6
1A
+VBATA - BQ24780SRUYR
5 4 3 2 1
5 4 3 2 1
+VIN
44
PJP15
1 2 +V3P3A_VIN PR3024
*0R_6/S PC3048
PC3047 PC3057 V3P3A_BOOT_R
D *SHORTPAD PC3049 PC3055 +3VPCU D
0.1U/25V/X5R_4 3.3 Volt +/- 5%
10U/25V/X5R_8
10U/25V/X5R_8
PR3031
2200P/50V/X7R_4
0.1U/25V/X5R_4
*2.2_6 TDC : 4.702A
PEAK : 6.27A
+V3P3A_LX_R
Width : 200mil
PR3025
{36,51,53,56} S5_ON 1 2 PC3051
*0_4/S *150p/50V_4
PR3023 PC3050 V3P3A_BOOT

1M_4 *0.1U/16V/X7R_4
+3VS5
10
1
{36,51} S5_PWR_PG PL3002
VIN
BOOT
PJP16
2.2uH_7X7X3
V3P3A_EN 13 8 +V3P3A_LX +V3P3A_OUT 1 2
PR3027*0_4_S EN SW1
S5_PWR_PG 1 2 V3P3A_PWRGD 4 9
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
PGOOD SW2 + PC3046 *SHORTPAD
PC3040
PC3041
PC3056
PC3044
PC3043
PC3053
PR3026 PC3054
V3P3A_VBYP 3 15
+5VS5 VBYP PU3002 SW3
0.1U/16V/X7R_4
*150U/6.3V_3528
5.1_6 V3P3A_ENLDO 12 RT7290AGQUF 16
ENLDO SW4 PR3028
PC3060 6 7 V3P3A_VOUT 1 2
C +3VPCU LDO VOUT +5VS5
C
2.2U/6.3V/X5R_4
PR3033 PR329 *0R_6/S 14 2 *0_4/S
V3P3A_CLK
AGND PGND
*0_4
VCC
CLK
PC3042
PC3045 *0.1u/10V_4
4.7U/10V/X5R_6
11
PR3019
0_4
PR3020
V3P3A_CLK
+VCC_V3P3A
+V3P3A_LDO
Maximum current = 100mA 0_4
PR330
PC3058
*0_4 PC3036 PC3038
1U/10V/X5R_4
+5VPCU 0.1U/50V/X7R_6 0.1U/50V/X7R_6
+VIN 5 Volt +/- 5% PD24
LDO=5V/100mA TDC : 7.35A 1PS302
3
+5VPCU PJP14
PU3001 SY8288CRAC
2 5VPCU_VIN 2 1 PEAK : 9.8A PD23
VIN
VL 15
LDO VIN
3
4
Width : 300mil 1PS302
2200P/50V/X7R_4
10U/25V/X5R_8
10U/25V/X5R_8
10U/25V/X5R_8
0.1U/25V/X5R_4
0.1U/25V/X5R_4
VIN *SHORTPAD
2
5
PC3017
PC3018
PC3019
PC3020
PC3021
PC3059
Double check value PR3021
PC3016 VIN +5VS5 *0R_6/S
with vendor
4.7U/6.3V/X5R_4 7
GND +15VPCU
B B
S5_PWR_PG PR3011 0_4 SY8288CPG 9 PC3037 PC3035

PGOOD
2
PR3013 0.1U/50V/X7R_6 0.1U/50V/X7R_6
*0R_6/S PC3023 PJP10
1 SY8288CBST SY8288CBST_S
Vih=0.8V 11 BST *SHORTPAD
+VIN PL3001
1
EN2 0.1U/25V/X5R_4 1.5uH_7X7X3
PR3012 6 SY8288CSW +5VPCU_SRC
499K/F_4 PR3014 SW 19
150K/F_4 SW 20
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
0.1U/16V/X7R_4
*22U/6.3V_8
*22U/6.3V_8
SW
PC3024
PC3025
PC3026
PC3027
PC3028
PC3029
PR3015 Idc=9A
*4.7_6
10
S5_ON SY8288CEN 12 NC 16 PR3017
EN1 NC {25,42,43,45,46,47,48,49,50,51,52,56} +VIN
0_4 {36,39,42,43,57} +3VPCU
PR3016 PC3030 {4,10,12,15,26,28,30,32,33,35,36,41,42,49,51,53,54,56} +3VS5
0_4 *680p/50V_6 {4,34,35,38,39,41,42,45,48,50,51,53,54,56} +5VS5
PC3031 {55,56} +15VPCU
*0.1U/16V/X7R_4 {39,41} +5VPCU
14 SY8288CVOUT
VOUT
17
VCC
13 SY8288CFB PR3018 PC3032
FB 1K/F_4 470P/50V/X7R_4
GND
GND
GND
A PC3033 A
2.2U/6.3V/X5R_4
8
18
21
VCC=3.3V
Freq=600KHZ
PROJECT : LV6
Do Not add test pad on VCC & LDO pin 1A
3/5VS5 - TPS51225B
5 4 3 2 1
5 4 3 2 1
45
Vincent 12/24 C
PC59 PR98 Place close to
PR235
1000P/50V/X7R_4 3.65K/F_4 VCORE Inductor
Vincent 1/28 D 2 1
0.01U/50V/X7R_4
PR109 *0_2/S 100K/F_4 NTC
PC58
VCC_SENSE PR99 PC55 PR107
{5} VCC_SENSE
VSS_SENSE PC60 3.65K/F_4 0.022U/16V/X7R_4 14K/F_4
{5} VSS_SENSE
1000P/50V/X7R_4 PR110
PR108 *0_2/S PR100 SWN_CORE
SWN_CORE {46}
+VCCSTPLL 1K/F_2 7.5K/F_2 PR228 HG_CORE_L
D HG_CORE_L {46} D
PC57 PC50 1_6
3300P/50V/X7R_4
PC142 0.22U/25V/X7R_6 SW_CORE

PR222 SW_CORE {46}
PR103 PR104 PR105 PR102 PC61
100/F_4 *110/F_4 45.3/F_4 *75/F_4 0.1U/16V/X7R_4 2K/F_2
1500P/50V/X7R_4
PC140
VR_SVID_DATA 15P/50V_2
VR_SVID_ALERT# LG_CORE
VR_SVID_CLK LG_CORE {46}
Vincent 12/24 C
H_PROCHOT#
PC1451000P/50V/X7R_4
100K/F_2
PR220
57.6K/F_2
0.1U/16V/X7R_4
PC41 11K/F_4
1000P/50V/X7R_4
Vincent 1/28 D
PC141
470P/50V/X7R_4
PR88
PC146
TSENSE_CORE
PR85 *0_2/S
IOUT_CORE
COMP_CORE
2.61K/F_4 PR244
CSN_CORE
VSN_CORE
CSP_CORE
VSP_CORE
BST_CORE
ILIM_CORE
VCCSA_SENSE HG_GT1 HG_GT1_L
PR224
PR226
HG_CORE
{6} VCCSA_SENSE VSSSA_SENSE HG_GT1_L {47}
PC38 1_6
{6} VSSSA_SENSE
1000P/50V/X7R_4
PR86 *0_2/S PR87
1K/F_4
34
31
27
30
29
28
32
33
25
26
24
23
15
C CSN_SA PC42 C
IOUT_1a
ILIM_1a
TSENSE_1ph
COMP_1a
VSN_1a
VSP_1a
CSN_1a
CSP_1a
HG3
BST3
SW3
LG3/ICCMAX_1b
HG1
{48} CSN_SA
2200P/50V/X7R_4 PC37
1 2 14 BST_GT1
PC44 VSP_SA 49 BST1
Place close to VSP_1b 16 SW_GT1
2200P/50V/X7R_4
VCCSA Inductor PR229 0.22U/25V/X7R_6 SW_GT1 {47}

100K/F_4 NTC VSN_SA 48 SW 1
PR89 PC45 VSN_1b 17 PR212 LG_GT1
CSN_SA LG1/ROSC LG_GT1 {47}
14K/F_4 0.018U/16V/X7R_4 45
CSN_1b PR237
PR227 14K/F_4
SWN_SA CSP_SA 44 21 HG_GT2 HG_GT2_L
{48} SWN_SA CSP_1b HG2 HG_GT2_L {47}
7.5K/F_2 PC43 1_6
PC133 PR216 34K/F_4 ILIM_SA 46 22 BST_GT2
15P/50V_2 ILIM_1b PU4 BST2 SW_GT2
PR213 COMP_SA 47 SW_GT2 {47}
PC136 1000P/50V/X7R_4 20 0.22U/25V/X7R_6
PC131 COMP_1b NCP81206 SW 2
1.5K_2
0.01U/50V/X7R_4 PC139 IOUT_SA 43 19 LG_GT2
IOUT_1b LG2/ICCMAX_1a LG_GT2 {47}
Vincent 12/24 C 470P/50V/X7R_4 PR215 22.6K/F_4
PR221 105K/F_4
DIFFOUT_2ph/IccMax_2ph
PWM_SA 40 10 CSP_GT1 +3V {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,49,52,53,54}
{48} PWM_SA PW M/ADDR_VBOOT CSP1_2ph +VIN {25,42,43,44,46,47,48,49,50,51,52,56}
PR92 51.1K/F_4
CSREF_GT +5VS5 {4,34,35,38,39,41,42,44,48,50,51,53,54,56}
DRON 39 8
{48} DRON DRON CSREF_2ph +VCCSA {6,48}
H_PROCHOT# VR_HOT# CSP_GT2 +VCCGT {7,47}
PR94 75/F_2 35 9
{2,36,42,43} H_PROCHOT#
CSCOMP_2ph
VR_HOT# CSP2_2ph +VCCSTPLL {2,4,5,6,9,53,56}
TSENSE_2ph
VR_SVID_DATA PR95 10/F_2 SDIO 36 PC127

{5} VR_SVID_DATA SDIO +VCC_CORE {5,46}
COMP_2ph
VR_SVID_ALERT# PR96 *0_2/S ALERT# 37 7 CSSUM_GT 0.1U/25V/X5R_4
IOUT_2ph
{5} VR_SVID_ALERT#
VSN_2ph
CSN_CORE {46}
VSP_2ph
ALERT# CSSUM_2ph
ILIM_2ph
VR_RDY
VR_SVID_CLK PR97 49.9/F_2 SCLK 38

{5} VR_SVID_CLK SCLK FB_2ph SWN_GT1 {47}
EPAD
12 18
PSYS
PR208 1K/F_4 VRMP

+VIN
VCC
VRMP PVCC SWN_GT2 {47}
PR78 PR67
EN
Vincent 1/28 D 4.75K/F_2 73.2K/F_4

PC125 SWN_GT1
42
41
50
11
51
52
53
13
B
0.01U/50V/X7R_4 PR72 +5VS5 B
2.2_6 PC119
PR111 10K/F_4 0.047U/25V/X7R_4 PR252
VR_RDY
VR_EN
PMON
TSENSE_GT
VSP_GT
VSN_GT
IOUT_GT
DIFFOUT_GT
FB_GT
COMP_GT
ILIM_GT
CSCOMP_GT
+3V
10/F_2
IMVP_PWRGD PR91 0_2 CSN_GT1
{36} IMVP_PWRGD CSN_GT1 {47}
VRON PR93 10K/F_4 PC36 PC132
{36,49} VRON
PMON 1U/6.3V_4X
2.2U/6.3V/X5R_4
{43} PMON
PR253
Vincent 12/7 B PC268 PR214 20K/F_2 PC126 10/F_2
0.1U/16V/X7R_4 0.1U/16V/X7R_4 PC123 CSN_GT2
CSN_GT2 {47}
PC134 *100P/50V_2 0.047U/25V/X7R_4
PR80 PR69 Place close to

PR209 *0_2/S 4.75K/F_2 73.2K/F_4 GT1 Inductor
SWN_GT2
VCCGT_SENSE PR207
{7} VCCGT_SENSE VSSGT_SENSE PR68
PC121 PR206 15K/F_2
{7} VSSGT_SENSE
1000P/50V/X7R_4 1.27K/F_2 165K/F_4
2
PR204 *0_2/S PR242
470P/50V_2
220K/F_4 NTC
Vincent 1/28 D PC32 PC35 PR240
1000P/50V/X7R_4 *390P/50V_4 75K/F_2
TSENSE_GT TSENSE_CORE PC122
1
3300P/50V/X7R_4
PR211
PC128
PR246 PR217 24K/F_2

*0_2/S *0_2/S
A A
2
PR245 PR247 PR219 PR223

61.9K/F_2
61.9K/F_2
100K/F_4 NTC
100K/F_4 NTC
PC31
PR77
PC33 15P/50V_2
49.9/F_2
1
470P/50V_2
PR79 604/F_4 PR73
3.65K/F_4
place close to place close to PR83 154K/F_2 PC28 PROJECT : LV6
GT MOSFET VCORE MOSFET 3300P/50V/X7R_4 Size Document Number Rev
program IccMax_2ph 1A
CPU VR IC - NCP81206
Vincent 12/24 C
5 4 3 2 1
5 4 3 2 1
D
46 D
Vincent 12/24 C
+VIN_VCC_CORE PG2 +VIN
HCB2012KF-800T50
PC137 PC143 PC49 PC52

PC54 PC56 PC124
4
2200P/50V/X7R_4 0.1U/25V/X5R_4
0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
+VCC_CORE
TDC : 21A
{45} HG_CORE_L
HG_CORE_L 1 ICC_MAX :29A
SW_CORE 2 PL8 +VCC_CORE
C {45} SW_CORE C
5 0.15UH-PCME064T-R15MS0R667-36A DCR=0.66m ohm
6 1 2
7
330U/2V/5X4.2/ESR=10/VLPB
PR106
1
2.2_6
LG_CORE 8 +
PC149
{45} LG_CORE
Vincent 1/7 C
2
PQ49 PC62
2200P/50V/X7R_4
10
NTMFD4C86NT1G
B B
CSN_CORE
CSN_CORE {45}
SWN_CORE
SWN_CORE {45}
A
Quanta Computer Inc. A
PROJECT : LV6
1A
VCCORE
5 4 3 2 1
5 4 3 2 1
47
D D
+VIN_VCCGT +VIN
PG6
Vincent 12/24 C HCB2012KF-800T50
1
PC180 PC181 PC72 PC73 PC186 PC213
*47U/25V/6X6.1/NCC/ESR30/APXF_NEO
PC71 PC70 PC148 + +
*47U/25V/6X6.1/NCC/ESR30/APXF_NEO
4
2200P/50V/X7R_4
0.1U/25V/X5R_4
0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
+VCCGT
2
PQ51
NTMFD4C86NT1G TDC :A
{45} HG_GT1_L
HG_GT1_L 1
+VCCGT
ICC_MAX :64A
SW_GT1 2 PL10
{45} SW_GT1
5 0.15UH-PCME064T-R15MS0R667-36A
6 1 2
7
3
4
PR124
1
LG_GT1 8 2.2_6
C {45} LG_GT1 C
PC182
+
Vincent 1/7 C
2
10
PC74
2200P/50V/X7R_4
CSN_GT1
CSN_GT1 {45}
SWN_GT1
SWN_GT1 {45}
+VIN_VCCGT_R +VIN
PG4
Vincent 12/24 C HCB2012KF-800T50
B B
PC156 PC151 PC63 PC64
PC66 PC68 PC177
4
2200P/50V/X7R_4
0.1U/25V/X5R_4
0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
PQ50
NTMFD4C86NT1G
HG_GT2_L 1
{45} HG_GT2_L +VCCGT
SW_GT2 2 PL11
{45} SW_GT2
5 0.15UH-PCME064T-R15MS0R667-36A
6 1 2
7
3
4
PR121
1
LG_GT2 8 2.2_6
{45} LG_GT2
PC190
+
Vincent 1/7 C
2
10
PC75
2200P/50V/X7R_4
A A
CSN_GT2
CSN_GT2 {45}
SWN_GT2
SWN_GT2 {45}
PROJECT : LV6
1A
VCCGT
5 4 3 2 1
5 4 3 2 1
VCCSA 48
D D
+VIN_VCCSA +VIN
PG1
HCB2012KF-800T50
PC138 PC48 PC47 PC46 PC120

2200P/50V/X7R_4 0.1U/25V/X5R_4
0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
VCCSA
5
PQ46
TPCC8067-H TDC:3.7A
EDP:4.5A
HG_SA PR210 *0_6S HG_SA_L 4
C C
8
Vincent 12/30 C PU7 Vincent 1/28 D
3
2
1
PC34 +VCCSA
DRVH DCR=4.2m ohm
PR201 0.1U/25V/X5R_4
*SHORT_4 1VGTA_BST1 PR74 *0_6S PL7
PWM_SA 2 BST 0.47UH-PCMC063T-R47MN-17.5A
{45} PWM_SA PWM SW_SA
7
DRON 3 SW
{45} DRON EN
5
NCP81253
*SHORT_4 PQ48
PR202 TPCC8065-H PR90 PR231 PR233 PC171 PC170 PC163 PC167 PC160 PC154
4 2.2_6 *0_2/S *0_2/S
GND
+5VS5
PAD
VCC 5 LG_SA 4
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
22U/6.3V/X5R_6
DRVL
PC118
9
6
2.2U/6.3V/X5R_4
3
2
1
PR203 PC51
B B
100K/F_4 2200P/50V/X7R_4
CSN_SA
CSN_SA {45}
SWN_SA
SWN_SA {45}
+VIN {25,42,43,44,45,46,47,49,50,51,52,56}
+5VS5 {4,34,35,38,39,41,42,44,45,50,51,53,54,56}
+VCCSA {6}
A A
PROJECT : LV6
1A
VCCSA - NCP81253
5 4 3 2 1
5 4 3 2 1
+3VS5
PR263
+VCCOPC Power only for 2+3e CPU 49
Vincent 12/30 C *SHORT_4
D D
PC172 +VCCOPC
GT3@1U/10V/X5R_4 TDC : 4.5A
PG5 PEAK : 6A
10
GT3@HCB2012KF-800T50
+VCCOPC_VIN 1 Vincent 1/28 D
Width : 200mil
3V3
+VIN VIN
GT3@2200P/50V/X7R_4
GT3@10U/25V/X5R_8
*GT3@10U/25V/X5R_8
GT3@0.1U/25V/X5R_4
PC157
PC166
PC67
PC69
PR129 PC176 GT3@0.1U/50V/X7R_6
9 +VCCOPC_VBST
BST
*0_6S PL12
GT3@0.68UH-PCMC063T-R68MN-15.5A
8 +VCCOPC_SW
1000P/50V/X7R_4
PR269 *Short_8
+VCCOPC_EN SW +VCCOPC
VRON PR259 1K_4 5
{36,45} VRON EN PR270 *Short_8
+3VS5 +VCCOPC_MODE +VCCEOPIO
7 PU9 12 PR256 GT3@10/F_4
*100K/F_4
GT3@0.1U/16V/X7R_4
GT3@22U/6.3V/X5R_6
GT3@22U/6.3V/X5R_6
GT3@22U/6.3V/X5R_6
MODE GT3@NB681GD-Z
VOUT
PR123
PC184
PC187
PC183
PC185
GT3@100K/F_4
C C
PR125
PC3062
Vincent 1/28 D
Vincent 1/28 D
PR127 2 +VCCOPC_SRC
PGND +VCCOPC_SRC {5}
GT3@10K_4
LPM_ZVM_N PR126 *0_4 PR260 *SHORT_4 +VCCOPC_LP# 6 3 VCCOPC_VID1_C PR248 *SHORT_4VCCOPC_VID1

{9} LPM_ZVM_N LP# C1
4 VCCOPC_VID0_C PR254 *SHORT_4VCCOPC_VID0
C0
AGND
HWPG PR250 *SHORT_4 13
{4,36,50} HWPG PG
PR261 Vincent 12/30 C +3VS5
GT3@100K/F_4
Vincent 12/30 C *0_6S
11
PR251
Vincent 12/30 C PR118 PR120

GT3@10K_4 *GT3@10K_4
+3V 681_AGND
B 681_AGND {5} B
VCCOPC_VID0
VCCOPC_VID1
Mode VR Rail LP# C1 C0 Vo

PR116 PR119
*GT3@10K_4 GT3@10K_4
0 ohm VCCIO 0 X X 0V
Floating PRIMCORE 1 0 0 0.8V(MSM)
100K EDRAM/EOPIO 1 0 1 0.95V

VCCEDRAM
150K Other 1 1 0 1.0V
1 1 1 1.05V
A A
{5} +VCCOPC
{25,42,43,44,45,46,47,48,50,51,52,56} +VIN
{2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,52,53,54} +3V PROJECT : LV6
{4,10,12,15,26,28,30,32,33,35,36,41,42,44,51,53,54,56} +3VS5
1A
+VCCOPC (NB681GD-Z)
5 4 3 2 1
5 4 3 2 1
Fsw=500kHz
VR PAGE: +VDDQ
{25,42,43,44,45,46,47,48,49,51,52,56} +VIN
50
{4,34,35,38,39,41,42,44,45,48,51,53,54,56} +5VS5
{2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54} +3V
HWPG
{4,36,49} HWPG {3,6,16,17} +1.2V_SUS
{16,17} +0.6V_DDR_VTT
Vincent 1/28 D
D
{36,56} SUSON SUSON PR290 *SHORT_4 D
PC211 *0.1U/16V/X7R_4
Vincent 1/28 D
DDR_PG PR296 *SHORT_4
{17} DDR_PG
PR303
MAINON PR297 *0_4 191K/F_4 Place these CAPs +VIN_VDDQ +VIN
{36,53} MAINON
VDDQ_CS
close to FETs
VDDQ_S3
VDDQ_S5
PR298 PG9
PC212 *0.1U/16V/X7R_4 620K/F_4 HCB2012KF-800T50
VDDQ_TON
Vincent 12/30 C
10
13
7
5
PQ58
+VDDQ_VTT_OUT PC222 PC223 PC220 PC221 PC224
S3
S5
CS
PGOOD
TON
PJP9 TPCC8067-H 2200P/50V/X7R_4 0.1U/25V/X5R_4 10U/25V/X5R_8 10U/25V/X5R_8 0.1U/25V/X5R_4
*SHORTPAD
2 1 20 Vincent 1/28 D 4
+0.6V_DDR_VTT VTT 17 VDDQ_DRVH
2 UGATE
VTTSNS PC219
PC217 PR304
3
2
1
10U/6.3V/X5R_6X 18 VDDQ_VBST VDDQ_VBST_R1 2
BOOT1 +1.2V_SUS_P +1.2V_SUS
1 PL15 PJP12
VTTGND *0_6S 1UH-PCMC063T-1R0MN-11A *SHORTPAD
PR299 16 +VDDQ_LX 0.1U/50V/X7R_6 1 2
PU12 PHASE
100/F_4 RT8231BGQW
+VDDQ_VTTREF 4 15 VDDQ_DRVL
*330U/2V/5X4.2/ESR=10/VLPB
DDR_VTTREF VTTREF LGATE B2A
1
19 12 +VDDQ_V5IN PR306
VLDOIN VDD +5VS5
PC243
PC214 PC215 2.2_8 + PC245 PC248
C C
0.1U/25V/X5R_4 0.033u/50V/X7R_6 PR302 PQ59
4
22U/6.3V/X5R_6
0.1U/25V/X5R_4
*SHORT_4 TPCC8065-H
2
PC216
DDR2
+1.2V_SUS
VDDQ
PGND
LPMB
1U/6.3V_4X
PAD
VID
FB
+1.2V_SUS_P TDC:3.44A
3
2
1
Vincent 12/30 C
PC225
EDP:5.5A
3
11
14
21
PC218
+VDDQ_VTT 10U/6.3V/X5R_6X PR301 2200P/50V/X7R_4
*SHORT_4
VDDQ_LPMB
VDDQ_VID
VDDQ_REFIN
Imax_VTT = 200mA
PR300
B2B
*SHORT_4 VDDQ_VDDQSNS
Vincent 12/30 C
+5VS5
Vincent 12/30 C PR294 PR293

7.68K/F_4 *SHORT_4
PR295
R1
10K/F_4
R2 VID hi REF=0.675V low REF=0.75V
Vout =0.675(1+R1/R2) =1.1934V
B B
PU13
RT8068A PL17
PR309 2.2UH-PHT25201B-2R2MS-1.85A PJP11 +2.5V_SUS
0_4 *SHORTPAD
HWPG +2.5V_PG 4 1 +2.5V_LX 1 2 +2.5V_P 1 2
PG NC
9 2 FB_+2.5V
PVIN LX
Vincent 12/30 C
+2.5V_PVIN 10 3 PR308
PVIN LX PR313 *0_2/S
PR317 PR316 7 PC231 47.5K/F_4
*0_6S 10_6 NC 100P/50V_4
R1 +2.5V +/- 5%
+2.5V_SVIN 8 6 PC227 PC229 PC228
+5VS5 SVIN FB
Vincent
TDC:1A
+2.5V_EN 12/08 B 0.1U/16V/X7R_4
10U/6.3V/X5R_6X
10U/6.3V/X5R_6X
11 5
GND EN PR312 EDP:2A
PC236
PC246 PC244 15K/F_4
1U/10V/X5R_4
4.7U/6.3V_6X 0.1U/16V/X7R_4 PC230 R2

0.1U/16V/X7R_4
EC-DV-29
PR311
A A
*0_4
SUSON
PR310 Vout =0.6(1+R1/R2)
0_4 =2.5V
SUSON_DDR25
{36} SUSON_DDR25

PROJECT : LV6
1A
VDDQ - TPS51716
5 4 3 2 1
5 4 3 2 1
V1P0A (RT8237CZQW) 51
D D
+5VS5
+VIN_1VS5 +VIN
PG3
PR62 HCB2012KF-800T50
*0_6S Vincent 12/30 C
PC130 PC129
PC39 PC40 PC135
2200P/50V/X7R_4 0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
0.1U/25V/X5R_4
+3VS5 PC27
+1V_S5
5
1U/10V/X5R_4 PQ45
TPCC8067-H
TDC : 9.1A
PR82 PEAK : 10A
100K/F_2 51211V_DRVH 4
C C
7
Vincent 12/30 C
Vincent 1/28 D
V5IN
3
2
1
S5_PWR_PG PR81 *0_2/S 1 9 PC30 +1.0V_DEEP_SUS
{36,44} S5_PWR_PG PGOOD DRVH PR84 0.1U/50V/X7R_6
S5_ON 51211V_EN 3 10 51211V_VBST PL6 PJP3
{36,44,53,56} S5_ON EN VBST 1UH-PCMC063T-1R0MN-11A *SHORTPAD
PR71 20K/F_2 51211V_TRIP 2 PU3 8 51211V_SW *0_6S +1V_SRC 1 2
PR76 124K/F_2 TRIP RT8237CZQW SW
51211V_TST 5 6 51211V_DRVL
TST DRVL
5
PC29 PR70 PR57 470K/F_2
0.1U/16V_2 *100K/F_2 12 11 PQ47 PC269 PR65
GND GND TPCC8065-H PR225 100P/50V_4 4.3K/F_4
GND
GND
GND
GND
330u/2V_7343
4.7_6
FB
PC147
4 Vincent 12/07 B + PC153 PC158
22U/6.3V/X5R_6 22U/6.3V/X5R_6
13
14
15
16
150P/50V/NPO_4
PC165
PC144
0.1U/50V/X7R_6
3
2
1
PR64 Vincent 12/08 B
OCP=A 10K/F_4
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
B =1.555A B
Vtrip=10-(1.555/2)*14mohm
=115.12mV 51211V_FB VFB=0.7V
Rlimit=115.12mV/10uA*8=92.09Kohm
A A

PROJECT : LV6
1A
+1V_DS - RT8237CZQW
5 4 3 2 1
5 4 3 2 1
VGA-CORE 52
+5V
2
PR281 ( Near by IC side) PG7
PR150
PC97 *0_6S PC205 EV@HCB2012KF-800T50
EV@1_6 GPUVIN_L
EV@1U/6.3V_4X EV@1U/6.3V_4X +VIN
1
D D
EV@2200P/50V/X7R_6
EV@10U/25V/X5R_8
EV@10U/25V/X5R_8
EV@0.1U/25V/X5R_4
PC92
5
PC200
PC199
PC91
PQ56
EV@TPCA8064-H
PR169 UGATE_2_GPU 4
1 2 VDDIO_SVI2
+3V_VGA +VGA_CORE
1
2
3
*EV@0R_4
PR151
PC95
EV@0.22U/25V/X7R_6
TDC : 35A
BOOT_2_GPU PEAK : 53A
EV@2.2_6 PL13
OCP : 60A
+3V EV@0.24UH_PCME064T-R24MS1R007
PHASE_2_GPU PHASE_2_GPU
+VGA_CORE
36
37
38
25
26
40
39
5
PQ54
EV@2200P/50V/X7R_6
EV@0.1U/25V/X5R_4
PC85
PR153 EV@TPCA8A10-H PR146 + PC191 + PC195
VDD
COMP_NB
FB_NB
VSEN_NB
VDDP
ISUMP_NB
ISUMN_NB
PC83
EV@10K/F_4
LGATE_2_GPU 4 *EV@2.2R/F_6
EV@330u/2V_7343
EV@330u/2V_7343
PR156
EV@10K/F_4
1
2
3
PR158 *EV@0R_4 35 34 PC89
PGOOD_NB LGATE_NB *EV@1000P/50V/X7R_4 PR275 PR276
*EV@0R_2/S *EV@0R_2/S
DGPU_PWROK PR154 *SHORT_4 20 33
{14} DGPU_PWROK PGOOD PHASE_NB PR155
EV@10K/F_4 PR291 PR163
GPU_SVC_R 3 32 EV@10K/F_4 *EV@10K/F_4
{19} GPU_SVC_R SVC UGATE_NB GFX_ISEN2 GFX_ISEN1
OCP_L PR166 1 2 *EV@0R_4 CORE_PWM_PROCHOT# 4 31

{19} OCP_L VR_HOT_L BOOT_NB +5V
PR292
GPU_SVD_R PR167 *SHORT_4 5 30 BOOT_2_GPU EV@3.65K/F_6
{19} GPU_SVD_R SVD BOOT2 VSUM+_GPU
C C
PR168 *SHORT_4 VDDIO_SVI2 6 29 UGATE_2_GPU VSUM-_GPU
+1.8V_VGA VDDIO UGATE2
PU5 PR162
GPU_SVT_R PR170 *SHORT_4 7 EV@ISL62771HRTZ-T 28 PHASE_2_GPU EV@1_6
{19} GPU_SVT_R SVT PHASE2
VGA1V35PG PR171 *SHORT_4 8 27 LGATE_2_GPU

{54} VGA1V35PG ENABLE LGATE2
( Near by IC side)
DGPU_PWROK PR172 *SHORT_4 9 24 LGATE_1_GPU
PWROK LGATE1
Vincent 1/28 D PG8
NTC_MVDDQ 1 23 PHASE_1_GPU EV@HCB2012KF-800T50
NTC_NB PHASE1 GPUVIN_R
+VIN
EV@0.1U/25V/X5R_4
NTC_GPU 11 22 UGATE_1_GPU
EV@2200P/50V/X7R_6
EV@10U/25V/X5R_8
EV@10U/25V/X5R_8
NTC UGATE1
PC94
PQ57
PC202
PC201
PC93
PR160
EV@100K/F_4 PR278 IMON_MVDDQ 2 21 BOOT_1_GPU EV@TPCA8064-H ( Near by IC side)
EV@470K_4/NTC PR279 IMON_NB BOOT1 UGATE_1_GPU 4
EV@27.4K/F_4
IMON_GPU 10 41
1
2
3
IMON EP
ISUMN
ISUMP
COMP
ISEN1
ISEN2
VSEN
Add 9 GND VIAs PC96
EV@0.1U/16V/X7R_4
RTN
1
PC102
EV@133K/F_4
FB PR152 EV@0.22U/25V/X7R_6
*EV@0.1U/16V/X7R_4
for thermal pad

1
PR161 BOOT_1_GPU
PC101
PR173
PR280
EV@100K/F_4
19
18
16
17
15
14
13
12
EV@9.76K/F_4 EV@2.2_6 PL14
2
EV@0.24UH_PCME064T-R24MS1R007
PHASE_1_GPU PHASE_1_GPU
62771_FB_GPU
+VGA_CORE
ISUMN_GPU
Place NTC close to the
MVDDQ Hot-Spot. GFX_ISEN2
VDDC_SEN
VDDC_RTN
Place NTC close to the
5
62771_COMP_GPU GFX_ISEN1 PQ55 PR149 PC192 PC196
GPUCORE Hot-Spot. EV@TPCA8A10-H *EV@2.2R/F_6 + +
PC206
EV@330u/2V_7343
*EV@330u/2V_7343
EV@100P/50V_4 PC103 LGATE_1_GPU 4
B B
PC100 EV@0.22U/25V/X7R_6
EV@0.22U/25V/X7R_6 PC90
1
2
3
*EV@1000P/50V/X7R_4
PR283 PC203 PR282 VSUM-_GPU
*EV@0R_4 EV@390P/50V/X7R_4 EV@37.4K/F_4 PR277 PR274
*EV@0R_2/S *EV@0R_2/S
VSUM+_GPU
PC204 PR284
EV@680P/50V/X7R_4 EV@2K/F_4
PR289 PR164
EV@10K/F_4 *EV@10K/F_4
PR287 GFX_ISEN1 GFX_ISEN2
+VGA_CORE PC207 PR285 EV@2.61K/F_4
EV@0.047U/25V/X7R_4
EV@1000P/50V/X7R_4 EV@301R/F_4
EV@0.15U/10V/X5R_4
PC209
PC210
PR159
EV@11K/F_4
2
PR288
PR132 PC208 PR286 PR273 EV@3.65K/F_6
M1@10_4 EV@330P/50V/X7R_4 EV@1.15K/F_4 EV@NTC_10K_4 VSUM+_GPU
PR157 VSUM-_GPU
1
Load line setting EV@560/F_4

VDDC_SEN VSUM-_GPU PR165
{21} VDDC_SEN
EV@1_6
1Phase
1
VDDC_RTN PC99
{21} VDDC_RTN OCP 1Phase EV@0.1U/16V/X7R_4
RC time ( Near by IC side)
2
2
constant
Close to the GPU side.
PR133 PC98
BOM option: M1@10_4 EV@0.01U/50V/X7R_4
1
For JET stuff 0 ohm resister.

For Topaz stuff 10 ohm resister.
A A

PROJECT : LV6
1A
GPU_CORE (ISL62771)
5 4 3 2 1
5 4 3 2 1
+3VS5 +5VS5
53
Imax=1.58A
Imax=5.26A PC263 PC262
D 0.1U/16V/X7R_4 0.1U/16V/X7R_4 1.8V_S5 D
7
+3V PR324 +3V_S2 +5V_S2 +5V
+3VS5 TDP:167mA
VIN1
VIN1
VIN2
VIN2
*Short_8 PR322
13 8 +1.8V_DEEP_SUS
14 VOUT1 OUT2 9 *0_6S PU11
VOUT1 OUT2 PC193
PC256 PC260 PC258 PC254 1 5 1.8V_P PR271 *0_6S
*10U/6.3V/X5R_6X
0.1U/16V/X7R_4 11 0.1U/16V/X7R_4 *10U/6.3V/X5R_6X 2.2U/6.3V/X5R_4 VIN VOUT
Vincent 12/30 C GND
PU15 2
RT9740AGQW 15 GND
GND Vincent 12/30 C
+5VS5 4 Vincent 12/30 C PR272 3 4
PC265 VBIAS *SHORT_4 ON/OFF NC
S5_ON
{36,44,51,56} S5_ON
1
PR336 G9090-180T11U PC197 PC194
0.1U/16V/X7R_4 *SHORT_4 PC198
MAINON 3 5 MAINON *0.1U/16V/X7R_4 *0.1U/16V/X7R_41U/6.3V_4X
2
{36,50} MAINON ON1 ON2
CT1
CT2
PR337 Vincent 12/30 C
*SHORT_4 PC266 PC264
12
10
*0.1U/16V/X7R_4 *0.1U/16V/X7R_4
PC252 PC253
Vincent 12/30 C 1000P/50V/X7R_4 1000P/50V/X7R_4
C C
+1.0V_DEEP_SUS
PC80
0.1U/16V/X7R_4
<= 65usec full

+1.0V_DEEP_SUS PQ30 load ready Vincent 1/28 D
3
TPCC8067-H PJP4 +VCCIO AO3404
1 *SHORTPAD PR138 PQ29
5 2 1 2 *SHORT_4
3 +VCCIO SUSOND 2 <= 65usec full
{56} SUSOND
PC82 PC86 PC87
TDC : 2A PC81 load ready
1U/6.3V_4X 0.1U/16V/X7R_4
*10U/6.3V/X5R_6X PEAK : 3.8A TDC:0.16A
4
B Vincent 1/28 D 1000P/50V/X7R_4 B
1
PR141 PR135 +VCCSTPLL
PR142 *SHORT_4 *0_6S
*SHORT_4
VRON_G
{56} VRON_G
Vincent 12/30 C
PC78 PC77
PC84 0.1U/16V/X7R_4 *10U/6.3V/X5R_6X
*0.1U/16V/X7R_4 Vincent 12/30 C
A A

PROJECT : LV6
1A
+1.0V/+3V/+5V SW
5 4 3 2 1
5 4 3 2 1
+1.8V_VGA(G9090-180T11U) 54
+1.35V_VGA(RT8068A)
D D
+1.8V_VGA
MAX:208mA
Vincent 12/30 C +3V_VGA +3VS5
Max: 0.025A Max:2A
+3V +3V_VGA +1.0V_DEEP_SUS PQ52 +1.8V_VGA
EV@TPCC8067-H PR255 +0.95V_VGA PU10 PR266
1 *0_6S PC189 *0_6S
5 2 PR339 1 5 1.8V_R
3 EV@15K/F_4 EV@2.2U/6.3V/X5R_4 VIN VOUT
3 1 2
PC168 PC169 PC164 GND
EV@1U/6.3V_4X EV@0.1U/16V/X7R_4
*EV@10U/6.3V_6X 3 4 Vincent 12/30 C
4
PQ27 PR268 *SHORT_4 ON/OFF NC
2
EV@AO3404
*SHORT_4
1
PR131 PR262 EV@G9090-180T11U PC178 PC179
*SHORT_4 PR338 PC188
{56} DGPU_PWR_ENG EV@0.1U/16V/X7R_4 *EV@0.1U/16V/X7R_4
EV@1U/6.3V_4X
2
PC76 0.95V_PWR_ENG EV@10K/F_4 C3A
{56} 0.95V_PWR_ENG Vincent 12/30 C
*EV@1000P/50V/X7R_4 Vincent 12/30 C
Vincent 1/28 D PR265
C C
*SHORT_4 PC175
*EV@1000P/50V/X7R/5%
Vincent 1/28 D
+3V_VGA +1.35V_VGA +/- 5%

TDC:1A
Vincent 12/30 C EDP:2A
PR258
EV@1K/F_4 PU8
EV@RT8068A PL9 +1.35V_VGA
PR257 EV@2.2UH-PHT25201B-2R2MS-1.85A PJP8
*SHORT_4 *EV@SHORTPAD
VGA1V35PG +1.35V_PG 4 1 +1.35V_LX 1 2 +1.35V_P 1 2
{52} VGA1V35PG PG NC
9 2 FB_+1.35V PR243
PVIN LX
*EV@0_2/S
Vincent 12/30 C +1.35V_PVIN 10 3
PVIN LX PC155 PR236
B
PR232 PR241 7 EV@22P/50V/NPO_4
R1 EV@15K/F_4
B
*0_6S EV@10_6 NC
+1.35V_SVIN 8 6 PC173
+5VS5 SVIN FB PC174 PC159
EV@10U/6.3V/X5R_6X
11 5 +1.35V_EN
EV@10U/6.3V/X5R_6X
EV@0.1U/16V/X7R_4
GND EN
PC152 PR234
PC150 PC161 EV@12K/F_4
EV@1U/10V/X5R_4
EV@4.7U/6.3V_6X EV@0.1U/16V/X7R_4
R2
+1.8V_VGA
PR249 EV@10K_4 Vout =0.6(1+R1/R2)

=1.35V
PC162
EV@0.1U/16V/X7R_4
A A

PROJECT : LV6
1A
+1.8V/+1.35V/+3V_VGA
5 4 3 2 1
5 4 3 2 1
55
C3A
D D
PD20
*R@DA2J10100L
1 2
{19,36,37} SYS_SHDN# Vsystem
2
1 2
PD21 +15VPCU
Vincent 2/1 D
R@DA2J10100L PD19
PR335 R@DA2J10100L
R@10K_6
1
PR334
R@100K_6 PR333
R@560K/F_4
Batt IN VIN ACIN Charger V1P0A VCCSA

C PR179 PR195 PR188 PR205 PR218 C
R@PMST3906 1 2 1 2 1 2 1 2 2 1 2 1
PQ64
R@470_6_PTC PR238 R@470_6_PTC R@470_6_PTC R@470_6_PTC R@470_6_PTC
R@470_6_PTC
3
PQ63 2
R@PMST3904
1
PC255
R@1U/25V/X5R_6
1
1 2 1 2 1 2
B B
PR305 PR239 PR230

R@470_6_PTC R@470_6_PTC R@470_6_PTC
+1.2V_SUS VCCGT VCC
A A
PROJECT : LV6
1A
PTC Circuit
5 4 3 2 1
5 4 3 2 1
DISCHARGE
+VCCIO +15VPCU
56
+VIN
+0.95V_VGA +15VPCU
+VIN
D PR145 D
PR143 1M_4 +3V_VGA
PR148 22_6
1M_4 VRON_G {53} PR128
PR343 EV@22_6 PR340
DIS1
C3A EV@1M_4 EV@1M_4
PQ33 VRON_R VRON_G
LTC044EUBFS8TL PR345 DIS6
3
PQ68 0.95V_PWR_ENG
6
0.95V_PWR_ENG {54}
PR147 EV@10K/F_4 EV@LTC044EUBFS8TL
6
VRON_Q 2 PR144
{36} VRON_Q *1M_4
3.3M/F_4 PC88 PR342
*2200P/50V/X7R_4 2
EV@3.3M/F_4 PC270
PQ32
1
EV@2200P/50V/X7R_4
2N7002KDW
PR346 PQ66
1
EV@100K/F_4 EV@2N7002KDW
1
+1.35V_VGA +3V_VGA +1.8V_VGA
+VIN +15VPCU
C PR117 C
PR122 PR130
PR112 EV@22_6 EV@300_6
EV@22_6 PR113
EV@1M_4 EV@1M_4
DIS4
DIS5
PQ23 DGPU_PWR_ENG
DGPU_PWR_ENG {54}
EV@LTC044EUBFS8TL
3
6
5
6
PR115
DGPU_PWR_EN 2
{14,18} DGPU_PWR_EN PC65
EV@3.3M/F_4
*EV@2200P/50V/X7R_4
PQ24
PQ25
1
EV@2N7002KDW
EV@2N7002KDW
1
4
+VCCSTPLL +15VPCU
+1.0V_DEEP_SUS +1.8V_DEEP_SUS +3VS5 +VIN

B +5VS5 B
+VIN
PR137
PR134 1M_4
PR140 22_6
PR264 PR267 PR174 PR177 1M_4
22_6 300_6 SUSOND {53}
PR176 22_6 300_6
DIS3
1M_4
DIS_+VDDQ SUSOND
DIS12
DIS14
DIS11
DIS15
PQ35 S5_ON_R
6
3
LTC044EUBFS8TL
3
PR139 PR136
5
PR175 SUSON 2 1M_4 PC79

S5_ON {36,50} SUSON
2 3.3M/F_4 *2200P/50V/X7R_4
{36,44,51,53} S5_ON
3.3M/F_4
PQ28
PQ31
2N7002KDW
1
LTC044EUBFS8TL
PQ53 PQ34
1
1
2N7002KDW 2N7002KDW
4
A A

PROJECT : LV6
1A
Discharge
5 4 3 2 1
5 4 3 2 1
For Dock For System

57
DOCK-PWR20-IN PQ2
D DOCK-PWR20_P +VAD AD-PWR20-IN PQ20 PQ19 D
DK@TPCC8131 Vsystem SVAD +VAD
EL1 C3A TPCA8109
TPCC8131
PF1 DK@HCB2012KF-800T50 1 DC-IN EL4
1 2 DOCK-PWR20-IN2 5 2 PF3 HCB2012KF-800T50 1 1
3 1 1 2 ADPIN2 Vsystem 5 2 2 5
DK@0466005.NRHF 2 3 3
1
EL2 3 0466005.NRHF
EC7
DK@HCB2012KF-800T50 PR4 4 EL3
PR42
4.7K/F_8
*0.1U/25V/X5R_4
4
DK@0.22U/25V/X7R_4
EC1 DK@4.7K/F_8 5 HCB2012KF-800T50 PR53
PC24
PC22
*0.1U/25V/X5R_4
*0.1U/25V/X5R_4
*0.1U/25V/X5R_4
*0.1U/25V/X5R_4
*0.1U/25V/X5R_4
4
4
DK@1000P/50V/X7R_4 PD3 PD16 100K_4 PC23
EC50
EC51
EC52
EC53
PC25
1000P/50V/X7R_4
DK@P4SMAFJ22A SMAJ22A 0.1U/25V/X5R_4
IDEA_GD_R
IDEA_GD
PJP6
+VAD
PR11 System Adaptor SVAD
PQ10 DK@1M_4 PR61
2
4 3 PQ22 1M_4
Q2
PR17 4 3 PR60
Q2
5 6 PR58 100K/F_4
ACDC_ID 5 6
DK@220K_4 +3VPCU +VAD
2 1 DOCK-PWR20_P 220K_4
1
Q1
{39} DOCKED2 DOCKED2 PR13 2 1 Vsystem
Q1
DK@220K_4 DK@MMDT2907A PR12 PR51
3
DK@1K_6 220K_4 MMDT2907A PR56
PR20 1K_6 PR44
C C
DK@DA2J10100L
PD2 750_6 0_4
1 2 DOCK_ATTACHED_3VPCU# PR30 2 DOCK_ATTACHED_BT_OP#
DOCK_ATTACHED_3VPCU# {36}
PR18 1M_4
DK@1M_4 PR52
PQ12A ADAPTER_ID_P 1M_4 PQ21
+3VPCU
SSM6N15FU 2N7002K
1
3
PR3 PR23
100K_4 *0_4 5
B2B
6
ACDC_ID
{36} ACDC_ID 2 ADAPTER_ID
ADAPTER_ID {36}
PR27
1
1M_4 PQ12B
DOCK-PWR20_P
1
PD7 SSM6N15FU +3VPCU
VPORT0402L331V05
2
DOCK_ATTACHED_BT_OP#
PR2
PR7 150K/F_4 Vsystem
1 2 DK@750_6
1
B B
Priority: Dock > DC_IN
3
3
PR9 PR8 51K/F_4 PQ1
DK@150K/F_4 DK@2N7002K
PR1
2
DOCK_ATTACHED 2 Case1 Case2 Case3 Case4 Case5 Case6 Case7 Case8 Case9 Case10 *DK@0_4 2 ADAPTER_ID_P
PQ6
DK@2N7002K
PR10 Cable Dock 0 1 0 1 1 0 1 1 1 1
PC2 DK@51K/F_4
1
1
*DK@1000P/50V_4 ACDC_ID_DOCK
{36,39} ACDC_ID_DOCK
AD on Dock 0 0 0 1 0 0 1 1 0 1
AD on Sys 0 0 1 0 1 1 1 0 1 1
1
DK@VPORT0402L331V05
PD1
2
Power Source Batt Batt AD on AD on AD on AD on AD on AD on AD on AD on
Sys Dock Sys Sys Dock Dock Sys Dock
A A

PROJECT : LV6
1A
Power Source In Gate
5 4 3 2 1
5 4 3 2 1
+3V_RTC
G3 to S0 S0 S0 to S3 S4/S5
58
SRTC_RST#
RTC_RST#
T1
D D
9 ms
EC-GPO S5_ON
+3VS5
+5VS5
+3V_DEEP_SUS(as +3VS5)
+1.8V_DEEP_SUS
+1.0V_DEEP_SUS
EC-GPI S5_PWR_PG >10mS
EC-GPO RSMRST#
C
Tied together C
EC-GPO DSWROK_EC(Ignored in non-DS)
tPCH03
>10ms
EC-GPO EC_SUSACK#(Ignored in non-DS)
EC-GPI NBSWON#
EC-GPI SUSC#
EC-GPO SUSON
+1.35VSUS
+VCCSTPLL
B B
EC-GPI SUSB#
EC-GPO MAINON
tPCH28 >30 us
+3V +5V +0.65V_DDR_VTT
+1.0V(VCCIO)
EC-GPI HWPG
EC-GPO VRON
+VCORE
+VCCGT
A
EC-GPI IMVP_PWRGD A
EC-GPO EC_PWROK
tPCH33
99 ms
PLTRST# Quanta Computer Inc.
PROJECT : LV6
1A
Power sequence2
5 4 3 2 1
5 4 3 2 1
59
EC PART
NO. PG. DATE DESCRIPTION
REFERENCE
D D
2015
B2A 2 12/7 R780 Reserve PU 10K for
4 12/7 R763 Add PU Res 10K for LAN_WAKE#.
4 12/7 R764 Add PU Res 10K for VRALERT#.
5 12/7 C819 Add Cap 1U for VCCSTG_G20.
14 12/7 R768, R767 Add Board ID for SKYLAKE/ KABYLAKE.

SDV-STAGE
26 12/7 、R770、
R769、、R771、
、R772、
、R773、
、R774 Add ohm for HDMI test
、R775、
、R776
C C
30 12/7 CN14 Modify LAN connect pin define for LED
31 12/7 CN19 Remove GND of stand pin for HDD connect
31 12/7 CN12 Modify ODD connect to match FFC pin define
B2B
(R310) 30 12/18 CN14 Modify LAN connect pin define for LED
4, 36 12/18 、R779、
D10、、R780 Reserve DNBSWON# PU to +3VS5 and short 0 ohm
B B
13, 30 12/25 、C763、

C755、、C359、
、C360 RTC CAP tuning
29 12/25 、R16、
R21、、R3、
、R8 FOR EMI
A A

PROJECT : LV6
1A
EC list 1
5 4 3 2 1
5 4 3 2 1
EC PART
2015
NO.
C3A
PG.
4
DATE
1/8 R780
REFERENCE
DESCRIPTION
Reserve PU 10K for DNBSWON#

60
D
4 1/8 、R781
U54、 Reserve PCH_SLP_S0# for power sequence D
、C3、
C2、、C5、
、C6、、C7、
、C8、、C9、
、C10、、C12
、13
12、 1/8 、C13、
、C14、
、C16、
、C17、、C18、
、C23、
、C549
Remove DOCK LAN
、39 、C552、
、C553、
、C561、
、Q1、
、Q2、、Q4、
、R1、、
、R4、
R2、、R5、
、R17、、R18、
、R19、
、R20、
、R445
、R457、
、R462、
、TP29、
、U26、
、Y3、、C700、
、C701
、32、
25、、 1/8 、F4、
F2、、F7、
、F8 Change fuse to short pad
、38
33、
30 1/8 CN14 Modify LED control signal

SIV-STAGE
、C822、
C821、、C823、
、C824、
、R783、
、R784 Reserve EMI request
34 1/8 、R785、
、R786、
、C825、
、C826、、C827、
、C828
C
、R787、
、R788、
、R789、
、R790 C
36 1/8 R779 Reserve 0 ohm to jump diode for DNBSWON#
38 1/8 、R329
R323、 Mount keyboard RES
39 1/8 CN3 Change connect from 40 pin to 30 pin that remove DOCK LAN
14 1/8 No memory down config
41 1/8 、C830、
C829、、C831、
、C832、
、C833 Add CAP for EMI request
43 1/8 、EC4、
EC3、、EC5、
、EC6 Add CAP for EMI request
B B
A A

PROJECT : LV6
1A
EC list 2
5 4 3 2 1
5 4 3 2 1
EC PART
2015
NO.
PG. DATE
REFERENCE
DESCRIPTION
61
D D
SIT-STAGE
C C
B B
A A

PROJECT : LV6
1A
EC list 3
5 4 3 2 1

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1 2 3 4 5 6 7 8

Intel Skylake-U Platform Block Diagram (Windows) 01

DDR4 SO-DIMM X1 MB 1866-2133 MT/s PCIE Gen3*4 R16M-M1-30 A

HD Camera USB2.0 (480Mb/s)

SATA Gen3 (6Gb/s)

USB2.0 (480Mb/s) NGFF Slot WLAN+BT

TPM 1.2 24MHz 32.768KHz

( 1local +2 remote) W83773G

CPU PTC Circuit T/P

U38A SKL_ULT ? Need apply PN

{40} DOCK_DDI2_TXN3 D51 F50 R199

PM_THRMTRIP#_R R583 1K_4

Quanta Computer Inc.

SkyLake ULT Processor (DDR4)

AU53 M_A_CLKN0 {16}

Quanta Computer Inc.

EC13 EC9 EC38

EXT_PWR_GATE# R251 1K_4

RSMRST# R285 *0_4_S DSWROK_EC_R

+VCCIO +5VS5 +3VS5

B PLTRST# R591 R582 B

SYS_PWROK R190 *0_4 EC_PWROK

Quanta Computer Inc.

VR_SVID_CLK_R R600 *0_4_S VR_SVID_CLK {45}

H_CPU_SVIDDAT R578 *0_4_S VR_SVID_DATA {45}

Quanta Computer Inc.

Under CPU +VCCIO

CPU POWER 3 OF 4 Under CPU Close CPU

Under CPU Close CPU

+VCCSTG +VCCPLL_OC +VCCSTPLL +VCCPLL

C203 C379 C187 C293

Close A18 Ball

Quanta Computer Inc.

Under CPU +VCCGT

Quanta Computer Inc.

A5 AL65 AT63 BA49

Quanta Computer Inc.

Quanta Computer Inc.

GPIO Pull UP PCH SPI ROM(CLG)

EC_IRQ_SERIRQ R714 10K_4 SMB_PCH_CLK R650 2.2K_4 PCH_SPI_CS0#_R

PCI_SERR# R624 10K_4 SMB_ME0_CLK R647 1K_4

SMB_ME0_DAT R649 1K_4

+3VS5 R713 *0_4_S

3 4 SMB_ME1_CLK PCH_SPI_IO2 R685 33_4 BIOS_WP# PCH_SPI_IO3

{10} SML0ALERT# SML0ALERT#

Quanta Computer Inc.

PCI-E Port Mapping Table PDC

CLK_REQ/Strap Pin(CLG) CSI-2

10K_4 R705 PCIE_CLK_SSD_REQ# B31 CSI2_DN6 AP2

VSTBY_FSPI +3V_RTC_2 External Crystal and Green Clock

C763 15P/50V/NPO_4 RTC_X1 R294

Y5 RTC_RST# C242 12P/50V_4

C755 15P/50V/NPO_4 RTC_X2 D14 DB2J40600L R300 1M_4 24MHZ +-30PPM

R436 1U/6.3V_4X 1U/6.3V_4X R309

EV@10K_4 R281 DGPU_PWR_EN

Sku Model BOARD_ID0 BOARD_ID1 BOARD_ID2

BOARD_ID5 Hi = wo 2nd Battery Lo = w 2nd Battery 7 OF 20

BOARD_ID7 Hi = wo SSD Lo = w SSD

+3VS5 R226 *0_4_S AD17 N20 +VCCCLK4 R201 *0_4_S

+VCCATS_1.8V +VCCRTC +VCCRTCPRIM_3.3V

+VCCPGPPB +VCCPGPPC +VCCPGPPE

C398 C756 C291

Quanta Computer Inc.

+3VS5 R226 0_4_S AD17 N20 +VCCCLK4 R201 0_4_S