ABSTRACT
This project aims to develop a device that informs the control station if the
vehicle in which the device is fitted, met with a severe accident. This project is
implemented using an accelerometer sensor, which works using MEMS technology along
with GSM and GPS.The device has a micro controller connected to an Accelerometer
sensor, GPS module and GSM module. The software that is embedded in the micro
controller controls the various operations of the device.
The micro controller monitors the waveform from the accelerometer
sensor.The GPS module calculates the geographical position of the module. This helps in
detecting the location/longitude of the module. The GPS system functions on the basis of
NEMA protocol.
The device monitors the vibrations due to impact from the sensors that are
received as analog values. The user can feed the tolerance level of impact. If the level is
above the tolerance level (in case of accident), the device sends alert messages (SMS)
along with the location data from GPS module to the control station or to hospital using
the GSM module.The control station or hospital receives the message from the vehicle
through the GSM module, which helps to initiate the appropriate action.
1. INTRODUCTION
Embedded Systems are also known as Real time Systems since they respond to an input
or event and produce the result within the guaranteed time period. This time period can
be a few microseconds to days or months.
Embedded Systems Development:
In the development of Embedded System application the hardware and software
must go in hand in hand. The software created by the software engineers must be burnt
into or micro coded into the hardware or the micro controller produced by the VLSI
engineers. The micro controller and the software micro coded in it together form the
system for the particular application.
The software program for real time system is written either in assembly or high-
level language such as C. The assembly language is used in the case of tome critical
applications. Now day’s high-level languages replace most of the assembly language
constructs.
2. OVERVIEW
GPS data along with a message of accident to the GSM module connected to the device.
The GSM module then sends this message to another GSM mobile phone whose number
is given by the user in the software.
3. BLOCK DIAGRAM
MEMS
IC PIC
LCD
MMA 16F877
2260D
GSM
LOGIC
USART
NAND
MAX232 GPS
GATES
4. REQUIREMENTS
Basic requirements for the project are hardware components and software to
control the overall functioning.
4.1 HARDWARE REQUIREMENTS
Hardware requirements includes,
• A GPS device to locate the vehicle on earth
• An accelerometer sensor to detect the occurrence of the accident
• A GSM modem to transmit the message to the rescuer’s handset
• A microcontroller which controls the overall working of the device incorporating
all
these components.
4.2 SOFTWARE REQUIREMENTS
For the proper functioning of the device, the microcontroller is programmed using
MPLAB IDE v5.2 Compiler software. The software for the device according to the
program flow is written, compiled and simulated on C in MPLAB C-compiler.
5. CIRCUIT DIAGRAM
The circuit operations are controlled by the PIC 16F877 microcontroller. It also consists
of an accelerometer which is the MMA 2260D MEMS. The tracking is done by the GPS
receiver and a GSM module is also connected in order to send and receive messages. The
MAX 232 is the interfacing IC used in this circuit. Also an LCD controller and driver
HD44780U is used for the Display purposes. All these sections are explained below. The
power supply section consists of LM7805, diodes and capacitors. The GPS section is
powered with separate input. All the other ICs are powered from the same power supply
unit.
The PIC 16F877 uses a 20MHz crystal. The PIC16F87X can be operated in four different
oscillator modes. The user can program two configuration bits (FOSC1 and FOSC0) to
select one of these four modes
• LP Low Power Crystal
• XT Crystal/Resonator
• HS High Speed Crystal/Resonator
• RC Resistor/Capacitor
In XT, LP or HS modes a crystal or ceramic resonator is connected to the OSC1/CLKIN
and OSC2/CLKOUT pins to establish oscillation. The PIC16F87X Oscillator design
requires the use of a parallel cut crystal. Use of a series cut crystal may give a frequency
out of the crystal manufacturers specifications. When in XT, LP or HS modes, the device
can have an external clock source to drive the OSC1/CLKIN pin.The VDD pin is
connected to +5V. the capacitor C1 is used bypass ac to ground.
The PIC has used in half duplex synchronous mode since the reception and transmission
are not done at the same baud rate. It receives data continuously from GPS receiver at a
baud rate of 9600 and data is transmitted to GSM at a baud rate 115200 if required. Both
of these are connected to the PIC through pin no.26 (RC7) using MAX 232 as interfacing
IC. Therefore to switch from reception (GPS) to transmission (GSM) we use a logic
circuit made of 4 NAND gates. Depending on the state of pin no. 37(RB4) any one of
these are connected and data transfer takes place. The GSM and the GPS receiver is
connected to the interfacing IC.
G-Mouse is a total solution GPS receiver (G-Mouse instead below), designed based on
most high sensitivity. This positioning application meets strict needs such as car
navigation, mapping, surveying, security, agriculture and so on. Only clear view of sky
and certain power supply are necessary to the unit. It communicates with other electronic
utilities via compatible dual-channel through MAX-232 or TTL and saves critical
satellite data by built–in backup memory. With low power consumption, the G-Mouse
tracks up to 8 satellites at a time, re-acquires satellite signals in 1 sec and updates position
data every second. 4 power saving mode allows the unit operates with ultra low power
request.
The GSM Module is a simple internal circuit of a mobile which can insert a sim in itself
and send messages. In this particular project the usage can be with a GSM module or
even a mobile handset. For convenience we are using a mobile handset with a data cable.
6. GPS
6.1 INTRODUCTION TO GPS
GPS, the Global Positioning System, is the only system today able to show you
your exact position on Earth at any time, any where, and in any weather. GPS satellites
orbit 11,000 nautical miles above Earth. They are monitored continuously at ground
stations located around the world. The satellites transmit signals that can be detected by
anyone with a GPS receiver.
The first GPS satellite was launched in 1978. The first 10 satellites launched were
developmental satellites, called Block I. From 1989 to 1997, 28 production satellites,
called Block II, were launched; the last 19 satellites in the series were updated versions,
called Block IIA. The launch of the 24th GPS satellite in 1994 completed the primary
system. The third-generation satellite, Block IIR, was first launched in 1997. These
satellites are being used to replace aging satellites in the GPS constellation. The next
generation, Block IIF, is scheduled for its first launch in late 2005.
6.2 ELEMENTS OF GPS
GPS has three parts: the space segment, the user segment, and the control
segment. The space segment consists of a constellation of 24 satellites plus some spares,
each in its own orbit 11,000 nautical miles above Earth. The user segment consists of
receivers, which user can hold in his hand or mount in a vehicle, like car, bus, etc. The
control segment consists of ground stations (five of them, located around the world) that
make sure the satellites are working properly. The master control station at Schriever Air
Force Base, near Colorado Springs, Colorado, runs the system.
6.4 RECEIVERS
GPS receivers can be carried in your hand or be installed on aircraft, ships, tanks,
submarines, cars, and trucks. These receivers detect, decode, and process GPS satellite
signals. More than 100 different receiver models are already in use. The typical hand-
held receiver is about the size of a cellular telephone, and the newer models are even
smaller. The commercial hand-held units distributed to U.S. armed forces personnel
during the Persian Gulf War weighed only 28 ounces (less than two pounds). Since then,
basic receiver functions have been miniaturized onto integrated circuits that weigh about
one ounce.
6.4.1 GROUND STATION
The GPS control segment consists of several ground stations located around the
world:
• A master control station at Schriever Air Force Base in Colorado
• Five unstaffed monitor stations: Hawaii and Kwajalein in the Pacific Ocean; Diego
Garcia in the Indian Ocean; Ascension Island in the Atlantic Ocean; and Colorado
Springs, Colorado.
• Four large ground-antenna stations that send commands and data up to the satellites
and collect telemetry back from them.
positioning system fixed data, Geographic position latitude/longitude, GNSS DOP and
active satellites, GNSS satellites in view and recommended minimum specific GNSS
data.
The protocol of G-Mouse is designed base on NMEA(National Marine Electronics
Association) 0183 ASCII format. The full protocol is defined in “NMEA 0183, Version
3.01” and “RTCM (Radio Technical Commission for Maritime Services). Through this
protocol, GPS gives the latitude and longitude position of the GPS module. Several
output messages are provided by the module in which we select Recommended Minimum
Specific GNSS Data (RMC).
An example format for the output message according to NMEA protocol will be as
shown.
$GPRMC,161229.487,A,3723.2475,N,12158.3416,W,0.13,309.62,120598, ,*10
In our project we receive the GPRMC data from the GPS module and stores in an
array by the software. Then by counting the number of bit positions, we store the latitude
and longitude values separately and attach with the message to be send by the GSM.
7. GSM
7.1 INTRODUCTION TO GSM
The Global System for Mobile Communications (GSM) is the most popular
standard for Mobile phones in the world. GSM service is used by over 1.5 billion people
across more than 210 countries and territories. The ubiquity of the GSM standard makes
international roaming very common between mobile phone operators, enabling
subscribers to use their phones in many parts of the world. GSM differs significantly
from its predecessors in that both signaling and speech channels are digital, which means
that it is considered a second generation (2G) mobile phone system. This fact has also
meant that data communication was built into the system from very early on. GSM is an
open standard which is currently developed by the 3GPP.
From the point of view of the consumer, the key advantage of GSM systems has
been higher digital voice quality and low cost alternatives to making calls such as text
messaging. The advantage for network operators has been the ability to deploy equipment
from different vendors because the open standard allows easy inter-operability. Also, the
standards have allowed network operators to offer roaming services which mean
subscribers can use their phone all over the world.
the network. The Mobile Station and the Base Station Subsystem communicate across
the Um interface, also known as the air interface or radio link. The Base Station
Subsystem communicates with the Mobile service Switching Center across the A
interface.
The Base Transceiver Station houses the radio transceivers that define a cell and
handles the radio link protocols with the Mobile Station. In a large urban area, there will
potentially be a large number of BTSs deployed. The requirements for a BTS are
ruggedness, reliability, portability, and minimum cost.
The Base Station Controller manages the radio resources for one or more BTSs.
It handles radio channel setup, frequency hopping, and handovers, as described below.
The BSC is the connection between the mobile and the Mobile service Switching Center
(MSC). The BSC also translates the 13 kbps voice channel used over the radio link to the
standard 64 kbps channel used by the Public Switched Telephone Network or ISDN.
The Home Location Register (HLR) and Visitor Location Register (VLR),
together with the MSC, provide the call routing and (possibly international) roaming
capabilities of GSM. The HLR contains all the administrative information of each
subscriber registered in the corresponding GSM network, along with the current location
of the mobile. The current location of the mobile is in the form of a Mobile Station
Roaming Number (MSRN) which is a regular ISDN number used to route a call to the
MSC where the mobile is currently located. There is logically one HLR per GSM
network, although it may be implemented as a distributed database.
simplifying the signaling required. Note that the MSC contains no information about
particular mobile stations - this information is stored in the location registers.
The other two registers are used for authentication and security purposes. The
Equipment Identity Register (EIR) is a database that contains a list of all valid mobile
equipment on the network, where each mobile station is identified by its International
Mobile Equipment Identity (IMEI). An IMEI is marked as invalid if it has been reported
stolen or is not type approved. The Authentication Center is a protected database that
stores a copy of the secret key stored in each subscriber's SIM card, which is used for
authentication and ciphering of the radio channel.
Since radio spectrum is a limited resource shared by all users, a method must be
devised to divide up the bandwidth among as many users as possible. The method
chosen by GSM is a combination of Time and Frequency Division Multiple Access
(TDMA/FDMA). The FDMA part involves the division by frequency of the total 25
MHz bandwidth into 124 carrier frequencies of 200 kHz bandwidth. One or more carrier
frequencies are then assigned to each base station. Each of these carrier frequencies is
then divided in time, using a TDMA scheme, into eight time slots. One time slot is used
for transmission by the mobile and one for reception. They are separated in time so that
the mobile unit does not receive and transmit at the same time, a fact that simplifies the
electronics.
Indoor coverage is also supported by GSM and is achieved by using power
splitters to deliver the radio signal from the antenna outdoors to a separate indoor antenna
distribution system. This is typically deployed when a lot of call capacity is needed
indoors, for example in shopping centers or airports. However, this is not a pre-requisite,
since indoor coverage is also provided by in-building penetration of the radio signal.
The modulation used in GSM is Gaussian minimum shift keying (GMSK), a kind of
continuous-phase frequency shift keying. In GMSK, the signal being modulated is
smoothened with a Gaussian low-pass filter prior to being fed to a frequency modulator,
which greatly reduces the interference to neighboring channels.
In this project GSM module is used to send the message containing the accident
information along with the latitude and longitude position of the module at the time of
accident. For that we use an ordinary GSM mobile hand set. The GSM module can be
controlled by certain commands called AT commands. Through our software we control
the GSM modem to generate and transmit text messages on to another GSM modem
specified in the program.
Example for the AT command are,
AT :- Sends to the module for detecting the proper working of the module.
ATE0 :- Command for turn off the echo.
AT+CMGF=1 :-Command for shifting module into text mode
AT+CMGS=”+91……….” :- Command for connecting to another module.
After sending the AT the module will return an OK message to show the proper
functioning of the module. If OK received then we will send the command ATE0
to the module to turn off the echoing of the commands. Then the command
AT+CMGF=1 shifts the module to the text mode. The module now returns
“>”.Then AT+CMGS = ”+91**********” command to select the number.
If “>” is received from the GSM module, type the SMS data and give Ctrl+Z.
This will send the SMS.
microfabrication technology. While the electronics are fabricated using integrated circuit
(IC) process sequences (e.g., CMOS, Bipolar, or BICMOS processes), the
micromechanical components are fabricated using compatible "micromachining"
processes that selectively etch away parts of the silicon wafer or add new structural layers
to form the mechanical and electromechanical devices.
8.1.1 ACCELEROMETERS
The g-cell beams form two back--to--back capacitors (Figure). As the central
mass moves with acceleration, the distance between the beams change and each
capacitor’s value will change, (C = NAε /D). Where A is the area of the facing side of
the beam, ε is the dielectric constant, D is the distance between the beams, and N is the
number of beams. The CMOS ASIC uses switched capacitor techniques to measure the
g--cell capacitors and extract the acceleration data from the difference between the two
capacitors. The ASIC also signal conditions and filters (switched capacitor) the signal,
providing a high level output voltage that is ratio-metric and proportional to acceleration.
Program
Program Data Memory
Memory Memory &
CPU CPU Data
Memory
9.2.2 PERIPHERALS
Peripherals are the features that add a differentiation from microprocessors. This
is in interfacing to the external world (such as general purpose I/O LCD drivers, A/D
inputs, and PWM outputs), and internal tasks such as keeping different time bases (such
as timers). The peripherals that are discussed are:
1.LCD
2.TIMER0
3.TIMER1
4. I/O PORTS
5.USART
6.ADC
The midrange PIC Micro MCUs offer several features that help to achieve these goals.
The special features discussed are:
1. Device configuration bit.
2. On-chip Power-On Reset (POR).
3. Brown-out Reset (BOR) logic.
4. Watch dog timer.
5. Low power mode (sleep).
9.4 OSCILLATOR
The PIC16F87X can be operated in four different oscillator modes. The user can
program two configuration bits (FOSC1 and FOSC0) to select one of these four modes:
• LP Low Power Crystal
• XT Crystal/Resonator
• HS High Speed Crystal/Resonator
• RC Resistor/Capacitor
In XT, LP or HS modes a crystal or ceramic resonator is connected to the
OSC1/CLKIN and OSC2/CLKOUT pins to establish oscillation .
9.5 RESET
9.5.1 POWER ON RESET (POR)
A power on reset pulse is generated on chip when VDD rise is detected to take
advantage of the POR, just tie the MCLR pin directly (or through a resistor) to VDD.
This will eliminate external RC components usually needed to create a Power On Reset.
A minimum rise time for VDD is required. When the device exits the reset condition
(begins normal operation), the device operating parameters (voltage, frequency,
temperature etc.) must be within their operating ranges, otherwise the device will not
function correctly. Ensure the delay is long enough to getting all parameters within
specification.
Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are
reserved for the Special Function Registers. Above the Special Function Registers are
General Purpose Registers, implemented as static RAM. All implemented banks contain
special function registers. Some “high use” special function registers from one bank may
be mirrored in another bank for code reduction and quicker access.
STATUS Register
clearing/setting the control bits in the ADCON1 register (A/D Control Register1). The
TRISA register controls the direction of the RA pins, even when they are being used as
analog inputs. The user must ensure the bits in the TRISA register are maintained set
when using them as analog inputs.
Working
During this time the LCD won’t take any data. There is a busy signal given by the LCD.
Busy signal is MSB of the data bus. So the user has to call the data bus to see that busy is
low before sending next data. For reliable Performance LCD has to be initialized. At
power on microcontroller sends some commands to LCD for proper initialization.
The commands for LCD initialization are
38- Two row 8-bit interface.
01-clear display. It clears DDRAM
0C-turns off display cursor
06- Increment the cursor position automatically
LCD accepts any command or data only if it is enabled. The EN signal has to be
made high and then send data or command and then disable it.
In this mode, the USART uses standard non-return-tozero (NRZ) format (one start
bit, eight or nine data bits, and one stop bit). The most common data format is 8 bits. An
on-chip, dedicated, 8-bit baud rate generator can be used to derive standard baud rate
frequencies from the oscillator. The USART transmits and receives the LSb first. The
USART’s transmitter and receiver are functionally independent, but use the same data
format and baud rate. The baud rate generator produces a clock either x16 or x64 of the
bit shift rate, depending on bit BRGH (TXSTA<2>). Parity is not supported by the
hardware, but can be implemented in software (and stored as the ninth data bit).
Asynchronous mode is stopped during SLEEP. Asynchronous mode is selected by
clearing bit SYNC (TXSTA<4>).The USART Asynchronous module consists of the
following important elements:
• Baud Rate Generator
• Sampling Circuit
• Asynchronous Transmitter
• Asynchronous Receiver
( PIE1<4>). Flag bit TXIF will be set, regardless of the state of enable bit TXIE and
cannot be cleared in software. It will reset only when new data is loaded into the TXREG
register. While flag bit TXIF indicates the status of the TXREG register, another bit
TRMT (TXSTA<1>) shows the status of the TSR register. Status bit TRMT is a read
only bit, which is set when the TSR register is empty. No interrupt logic is tied to this bit,
so the user has to poll this bit in order to determine if the TSR register is empty.
Transmission is enabled by setting enable bit TXEN(TXSTA<5>). The actual
transmission will not occur until the TXREG register has been loaded with data and the
baud rate generator (BRG) has produced a shift clock (Figure 10-2). The transmission can
also be started by first loading the TXREG register and then setting enable bit TXEN.
Normally, when transmission is first started, the TSR register is empty. At that point,
transfer to the TXREG register will result in an immediate transfer to TSR, resulting in an
empty TXREG. A back-to-back transfer is thus possible Clearing enable bit TXEN
during a transmission will cause the transmission to be aborted and will reset the
transmitter. As a result, the RC6/TX/CK pin will revert to hi-impedance.In order to select
9-bit transmission, transmit bit TX9 (TXSTA<6>) should be set and the ninth bit should
be written to TX9D (TXSTA<0>). The ninth bit must be written before writing the 8-bit
data to the TXREG register.This is because a data write to the TXREG register can result
in an immediate transfer of the data to the TSR register (if the TSR is empty). In such a
case, an incorrect ninth data bit may be loaded in the TSR register.
1. Initialize the SPBRG register for the appropriate baud rate. If a high speed baud rate is
desired, set bit BRGH
2. Enable the asynchronous serial port by clearing bit SYNC and setting bit SPEN.
3. If interrupts are desired, then set enable bit TXIE.
4. If 9-bit transmission is desired, then set transmit bit TX9.
5. Enable the transmission by setting bit TXEN, which will also set bit TXIF.
6. If 9-bit transmission is selected, the ninth bit should be loaded in bit TX9D.
7. Load data to the TXREG register (starts transmission).
register are inhibited, so it is essential to clear error bit OERR if it is set. Framing error
bit FERR (RCSTA<2>) is set if a stop bit is detected as clear. Bit FERR and the 9th
receive bit are buffered the same way as the receive data. Reading the RCREG will load
bits RX9D and FERR with new values, therefore it is essential for the user to read the
RCSTA register before reading RCREG register in order not to lose the old FERR and
RX9D information.
Steps to follow when setting up an Asynchronous Reception:
1. Initialize the SPBRG register for the appropriate baud rate. If a high speed baud rate is
desired, set bit BRGH.
2. Enable the asynchronous serial port by clearing bit SYNC and setting bit SPEN.
3. If interrupts are desired, then set enable bit RCIE.
4. If 9-bit reception is desired, then set bit RX9.
5. Enable the reception by setting bit CREN.
6. Flag bit RCIF will be set when reception is complete and an interrupt will be generated
if enable bit RCIE is set.
7.Read the RCSTA register to get the ninth bit (if enabled) and determine if any error
occurred during reception.
8. Read the 8-bit received data by reading the RCREG register.
9. If any error occurred, clear the error by clearing enable bit CREN.
10. SOFTWARE
Start
Give the
name of
project on
LCD
Switch to GPS
receiver.Read data
from GPS receiver and
store the required data.
10.2 PROGRAM
11. CONCLUSION
ADVANTAGES
Information can be send to the control station immediately.
Tracks the position of the vehicle.
Saves life.
Device is compact in size.
DRAWBACKS
Needs thorough knowledge about complex low level language.
Expensive GPS module.
APPENDIX
CLRF Clear f
CLRW Clear W
COMF Complement f
Status Affected: Z
Description: Contents of register ‘f’ is complemented. If ‘d’ is 0 result is stored in W,
if ‘d’ is 1 result is stored back in ‘f’
DECF Decrement f
Status Affected: Z
Description: Decrement registers ‘f’. If‘d’ is 0 result is stored in W, if ‘d’ is 1 result is
stored back in ‘f’
INCF Increment f
.
INCFSZ Increment f, skip if 0
Status Affected: Z
Status Affected: Z
Description: Inclusive OR W with ‘f’. If‘d’ is 0 result is stored in W, if ‘d’ is 1 result is
stored back in ‘f’. .
MOVF Move f
Status Affected: Z
Description: Contents of ‘f’ is moved to a destination dependant up on status of ‘d’. If
‘d’ is 0 destination is W, if ‘d’ is 1 destination is ‘f’.
.
MOVWF Move W to f
Operands: 0≤f≤127
Operation: (W) → f
Status Affected: None
Description: Contents of ‘W’ is moved to ‘f’.
.
NOP No operation
Status Affected: C
Description: The contents of register ‘f’ are rotated one bit to the left through the Carry
Flag. If‘d’ is 0 destination is W, if ‘d’ is 1 destination is ‘f’.
C Register f
C Register f
.
XORWF Exclusive OR W with f
Status Affected: Z
Description: Exclusive OR contents of W register with register ‘f’. If‘d’ is 0 result is
stored in W, if ‘d’ is 1 result is stored back in ‘f’.
.
BSF Bit Set f
Operation: 1 → f<b>
Operation: 0 → f<b>
.
BTFSC Bit Test, Skip if Clear.
.
BTFSS Bit Test, Skip if Set.
Description: If bit ‘b’ in register ‘f’ is ‘1’ then the next instruction is skipped.
Description: Call subroutine. First 13-bit return address is pushed on to the stack.11-bit
immediate address is loaded in to the PC bits<10:0>.The upper bits of the PC are loaded
from PCLATH<4:3>.
1→ TO
1→ PD
TO, PD
Status Affected:
Description: CLRWDT instruction clears the Watchdog Timer. It also clears the
prescaler count of the WDT. Status bits TO and PD are set.
.
IORLW Inclusive OR Literal with W
Operation: (W).OR. k → W
Status Affected: Z
Description: The content of the W register is OR’ed with the eight bit literal ‘k’. The
result is stored in W.
Operation: k→W
Status Affected: None
Description: The eight bit literal ‘k’ is loaded into W register. The don’t cares will
assemble as 0’s.
Operation: k → W;
TOS → PC,
Status Affected: None
Description: The eight bit literal ‘k’ is loaded into W register. The program counter is
loaded 13 bit address at the Top Of Stack (TOS), the return address. This is a two cycle
instruction.
Description: Return from Subroutine. The stack is POPed and the Top Of Stack (TOS)
is loaded in the PC. This is a two cycle instruction.
SLEEP
1→ TO
1→ PD
TO, PD
Status Affected:
PD
Description: The power-down status bit, is cleared. Timer-out status bit,
TO is set. Watchdog Timer and its prescaler count are
cleared.
The processor is put into SLEEP mode with the oscillator stopped.
Description: The W register is subtracted(2’s complement method) from the eight bit
literal ‘k’ and the result is placed in the W register.
*******