IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 57, NO.
2, FEBRUARY 2010
A CMOS Active-RC Low-Pass Filter With
Simultaneously Tunable High- and Low-Cutoff
Frequencies for IEEE 802.22 Applications
Hyunchol Shin, Member, IEEE, and Youngcho Kim, Student Member, IEEE
Abstract—An active resistor–capacitor low-pass filter with
simultaneously programmable high-end and low-end cutoff fre-
quencies is presented for IEEE 802.22 cognitive radio trans-
mitter applications. Transfer function analysis shows that the
integrator frequency of a dc offset cancellation block should be
tuned inversely proportional to the open-loop gain to maintain
the low-end cutoff frequency at a constant value. Realized in a
0.18-μm complementary metal–oxide–semiconductor, the low-end
cutoff frequency is successfully tuned between 740 Hz and 10 kHz
over the 30-dB gain variation. Measured results show that the
gain is tuned from −16.3 to +13.9 dB, and the high-end cutoff
frequency is tuned from 2.1 to 6.04 MHz, while drawing 4.5 mA
from a 1.8-V supply.
Index Terms—Active resistor–capacitor (RC) filter, cognitive
radio (CR), complementary metal–oxide–semiconductor (CMOS),
IEEE 802.22, low-pass filter (LPF).
I. I NTRODUCTION
C OGNITIVE radio (CR) is an emerging wireless com-
munication system that intelligently detects and utilizes
a temporarily unoccupied spectrum band on a noninterfering
basis while ensuring coexistence with higher priority users
[1]. The IEEE 802.22 working group has been developing a
standard for the CR system, aiming at its deployment in the
worldwide television (TV) band between 54 and 862 MHz [2].
In November 2008, the Federal Communications Commission
has also approved the unlicensed radio transmission in the TV
band for white space device applications.
In this brief, we present an active-RC low-pass filter (LPF)
that is developed as part of our TV-band CMOS transmitter for
IEEE 802.22 CR applications [3]. According to the physical-
layer specifications of IEEE 802.22, CR transceivers must
support variable channel bandwidths of 5, 6, 7, and 8 MHz.
Hence, the filter’s high-end cutoff frequency fH needs to be
tunable from 2.5 to 4 MHz. In addition, the low-end cutoff
frequency fL is also necessarily tunable for the following two
reasons. First, when the LPF is adopted in a direct conversion
receiver, fast settling of dc offset cancellation (DCOC) loop is
Manuscript received April 10, 2009; revised July 22, 2009 and
November 4, 2009. First published January 22, 2010; current version published
February 26, 2010. This work was supported in part by the University IT
Research Center Program (IITA-2009-C1090-0902-0038) and in part by the IT
R&D Program (2009-F-010-01). This paper was recommended by Associate
Editor A. I. Karsilayan.
The authors are with the Department of Radio Science and Engineering,
Kwangwoon University, Seoul 139-701, Korea (e-mail: hshin@kw.ac.kr).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TCSII.2009.2037994
1549-7747/$26.00 © 2010 IEEE
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85
wanted, and this can be achieved by dynamically adjusting the
low-end cutoff frequency of the LPF [4]. Second, according to
the physical-layer specifications of IEEE 802.22, the modula-
tion method is the orthogonal frequency-division modulation
(OFDM) with variable subcarrier spacing. In order not to lose
any energy of low-end subcarrier signals while sufficiently
suppressing the dc offset components, fL needs to be adjusted
according to the given system requirements. Hence, we need
an LPF that is capable of simultaneously tuning fH and fL .
However, recent studies on the baseband filters have been
focused mostly on the wide and flexible tuning scheme of fH
for multistandard and/or software-defined radio applications
[5]–[10]. The fL tuning scheme, although it is a critical design
issue, has not been addressed in the literature and usually not
even recognized as a design issue. In this brief, we present the
design and implementation results of an active-RC LPF whose
fH and fL are simultaneously programmable. Although the
filter in this work is described for transmitter applications, the
same approach can be adopted for a receiver filter design as
demonstrated in one of the authors’ recent works [11].
II. C IRCUIT D ESIGN
The LPF in this work is designed for an IEEE-802.22-
based CMOS transmitter [3]. In a typical transmitter’s analog
baseband block, a low-pass channel reconstruction filter is
placed after a digital-to-analog converter (DAC) to smoothen
a signal waveform and remove the residual quantization noise
generated by the DAC [8]. A sixth-order Chebyshev-II type is
chosen to meet the stop-band attenuation and the in-band ripple
requirements. The gain control range is determined to be from
−15 to +15 dB for the transmitter’s output power control. The
high-end cutoff frequency fH needs to cover 2.5–4 MHz to
cover all the worldwide TV channel bandwidths of 5–8 MHz.
The fL tuning range is required to be from 1 to 10 kHz to
ensure a fast DCOC settling time (less than 200 μs) and in-
significant loss of low-end OFDM subcarrier signals at around
1–10 kHz. Linearity is one of the most stringent requirements
in transmitter applications [8]. A link budget analysis has been
performed to find an optimal distribution of gain, noise, and
linearity over the transmitter’s full chain. For achieving less
than 2% error vector magnitude with 64-quadratic-amplitude
modulation OFDM signals, it is found that the output-referred
third-order intercept point (OIP3 ) of the transmitter full chain
is required to be +20 dBm, and the LPF’s OIP3 should be
86 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 57, NO. 2, FEBRUARY 2010
Fig. 1. Active-RC LPF. (a) Top-level structure. (b) Detailed block diagram.
Fig. 2. Biquad.
greater than +15 dBm so that the LPF’s contribution to the
transmitter’s total OIP3 can be maintained below 13%.
The architecture of the active-RC LPF is shown in Fig. 1(a).
It comprises two variable gain amplifiers VGA1 and VGA2 for
gain tuning, three-stage biquads for fH tuning, and a DCOC
block for fL tuning. A detailed block diagram, including the
circuit schematics of VGA1 , VGA2 , and DCOC, is given in
Fig. 1(b). Although our design uses fully differential circuits,
Fig. 1(b) is drawn in a single-ended form for the sake of sim-
plicity. The three-stage biquads at the center of the LPF provide
a sixth-order Chebyshev-II type characteristic. The schematic
of a single biquad is depicted in Fig. 2, and its transfer function
is given by
Cn s2 + Cn Cb1R1 R2
T (s) = · .
Cb s2 + s QC1b R1 + C 21R2
b 1
It is a low-pass notch filter, of which the low-frequency
gain is R1 /R2 , the stop-band
√ attenuation is Cn /Cb , the notch
frequency fn is 1/(2π R1 R2 Cb Cn ), and the high-end cutoff
frequency fH is 1/(2πR1 Cb ). fH is designed to be tunable
from 2.1 to 6.5 MHz in 64 steps by 6-bit switching of Cb
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Fig. 3. Two-stage opamp.
array bank in the range of 2.5–7.3 pF, while R1 is fixed at
10 kΩ. In accordance with the Cb switching, Cn is also 6-bit-
switched between 0.3 and 0.9 pF to maintain the overall stop-
band attenuation below 60 dB. The biquad Q is set to 1.9 so that
the in-band gain ripple can be suppressed below 0.5 dB. Due
to the low Q-value, a Q-control circuit is not adopted in this
work. The Q-value, gain, and stop-band attenuation are affected
by the resistor and capacitor ratios. Thus, their variations are
minimized by setting the component sizes only at a multiple of
a unit size as much as possible. Also, the component matching
of the capacitors and the resistors within and among stages is
attained by adopting symmetric and common-centroid layout
as much as possible.
As shown in Fig. 1(b), VGA1 is an opamp-based low-pass
inverting amplifier. The gain and the bandwidth are given by
R4 /R3 and 1/(2πC4 R4 ), respectively. The gain is tuned by
2-bit switching of R3 , whereas R4 and C4 are fixed. The gain
of VGA1 is controlled from 0 to 6 dB in a 2-dB step. VGA2 is
designed as a two-stage amplifier for achieving a higher gain.
It provides a gain control range from −15 to +9 dB with an
8-dB step by utilizing 2-bit switching of R5 . Meanwhile, the
three-stage biquad provides a 1-bit gain control between −1 and
0 dB by utilizing 1-bit switching of R2 . As a result, the filter’s
overall gain is tuned from −16 to +15 dB with a 1-dB step by
the total 5-bit switching code.
Opamp is a fundamental building block for this LPF. The
schematic of the opamp and its common-mode feedback circuit
is given in Fig. 3. A total of ten opamps is used in this filter,
of which six are used for three biquads, one for VGA1 , two
for VGA2 , and one for DCOC. The opamp is a two-stage fully
differential amplifier. R8 and C8 are adopted for frequency
compensation. Stability is ensured by making the phase margin
typically over 65◦ and at least 58◦ over the entire process and
temperature corners. The output common-mode voltage is set to
1 V by VCM . The current consumption is minimized to 407 μA
while achieving the gain bandwidth product of 350 MHz.
The cascade connection of the three biquads and two VGAs
provides the desired LPF characteristics with the bandwidth and
(1) gain-tuning capability. Let us denote this open-loop transfer
function by A(s). For implementing the fL tuning capability,
an integrator-based tunable DCOC block is added in the feed-
back path, as shown in Fig. 1(b). The transfer function of the
integrator is given by
ωd 1
β(s) = , where ωd = . (2)
s Cd Rd
SHIN AND KIM: CMOS ACTIVE-RC LPF WITH SIMULTANEOUSLY TUNABLE HIGH- AND LOW-CUTOFF FREQUENCIES 87

Fig. 5. Simulated low-end cutoff frequency (fL ) tuning characteristics at a

constant gain condition.

Fig. 4. Low-end cutoff frequency (fL ) tuning scheme. (a) ωL tuning at a

constant open-loop gain A. (b) ωL tuning at a variable open-loop gain A.

With the open-loop gain A(s) and the feedback gain β(s),
the closed-loop transfer function Af (s) of the filter is then
expressed by
s
A(s)
Af (s) = = A(s) · ωL s (3)
1 + A(s)β(s) 1 + ωL

where

ωL = A · ωd . (4)

Equation (4) shows that the low-end cutoff frequency fL (=

ωL /2π) is determined by the product of the open-loop gain A
and the integrator frequency fd (= ωd /2π). This leads us to two
design implications in regard to the fL tuning scheme. First, as
illustrated in Fig. 4(a), when the open-loop gain A is fixed at a
constant value, fL will be solely determined by the integrator
frequency fd . Hence, at the constant gain condition, fL can be
tuned simply by tuning fd . For this, 3-bit switching of Cd is
implemented to tune it between 0.6 and 9.1 pF, and as a result,
fL is tuned from 0.65 to 10 kHz. Fig. 5 shows the simulated fL
tuning capability at the constant gain condition.
On the other hand, when the open-loop gain A varies as
illustrated in Fig. 4(b), (4) indicates that fL will vary in a linear Fig. 6. (a) Simulated fL tuning characteristics at a variable gain condition
with fL of 0.65 kHz and fH of 3.5 MHz. (b) fL variation across the total gain
proportion to A. Thus, if we want to keep fL at a constant range when fL is set to 0.65 kHz. (c) fL variation across the total gain range
value under the variable gain condition, fd must be controlled when fL is set to 3.3 and 10 kHz.
inversely proportional to A to compensate the A variation. For
this, 2-bit switching of Rd is implemented to tune it between 91 although not wanted, is due to the particular fL tuning scheme
and 6370 kΩ. Fig. 6(a) shows the simulated gain response when implemented in this work. Two most significant bits among
fL is set to the lowest 0.65 kHz. Notice that fL is maintained the five gain-tuning bits are directly tied with the two control
almost at a constant value over the entire gain variation range. bits of Rd in the DCOC block. Thus, the total gain range is
Fig. 6(b) gives a closer look at the variation of fL across the divided into four subregions, and Rd is adjusted accordingly
total gain variation range. As can be seen, fL varies like a saw- for each subregion. The next two significant bits of the five
tooth waveform between 570 and 740 Hz. This sawtooth-like gain-tuning bits, which are applied to the two switching bits
slight variation, which is acceptable for practical applications of R3 in VGA1 , do not affect fL since the VGA1 gain control

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88 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 57, NO. 2, FEBRUARY 2010
TABLE I
T UNING C ODE A SSIGNMENT
Fig. 7. Chip micrograph.
is out of the feedback loop. As can be seen in Fig. 1(b), R3
is indeed not in the feedback loop. Finally, the remaining least
significant 1-bit among the five gain-tuning bits, which is used
for the biquad gain control, is still within the feedback loop;
thus, it causes the sawtooth-type ripple of fL . The tuning code
assignment scheme explained thus far is summarized in Table I.
The sawtooth variation effects are also observed in different
settings of fL . Fig. 6(c) shows the simulated fL when fL is set
to a median 3.3 kHz and the highest 10 kHz. The slight variation
of fL across the total gain variation range will be acceptable and
practically not cause any system-level problem as long as the fL
value remains below the lowest OFDM subcarrier frequency.
The simulation results demonstrate that the fL tuning scheme
presented in this work is effective for wide gain-tuning LPFs.
III. M EASUREMENT R ESULTS
The active-RC LPF is fabricated in a 0.18-μm CMOS
process. Fig. 7 shows the chip micrograph. It occupies 1500 ×
570 μm2 . The chip is packaged in a 40-pin leadless plastic chip
carrier and tested on a printed circuit board. It draws 4.5 mA
from a 1.8-V supply. A serial peripheral interface is used for
the manual open-loop tuning of the filter’s gain, fH , and fL .
Fig. 8 shows the measured gain with respect to the 5-bit gain-
tuning code. The gain is tuned from −16.3 to +13.9 dB with a
1-dB step. The total gain control range is 30.2 dB, which agrees
well with the simulated result. It is observed that the maximum
gain is slightly shifted downward by about 1 dB compared with
the simulation, which is accounted for by the process variation
of resistors and capacitors. Fig. 9(a) shows the frequency re-
sponse measured by using an Agilent network analyzer 8753ES
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Fig. 8. Measured gain tuning characteristics.
Fig. 9. Measured high-end cutoff frequency (fH ) tuning characteristics.
(a) Frequency response with fH tuning at the maximum gain. (b) fH versus
64 tuning codes.
at the maximum gain condition. It demonstrates that the cutoff
frequency fH is successfully tuned across the target range of
2.5–4 MHz. The stop-band attenuations at 1.25 and 2 times
of 1-dB corner frequencies are measured to be 18 and 66 dB,
respectively. Fig. 9(b) shows the measured fH with respect to
the 6-bit bandwidth tuning code. As can be seen, fH is tuned
from 2.1 to 6.04 MHz. The frequency tuning range is found to
be almost the same across the total gain control range. Thus,
this LPF can successfully cover the worldwide TV bandwidths
from 2.5 to 4 MHz with sufficient margin.
As discussed on the fL tuning scheme in Section II, fL
should remain constant under both constant and variable gain
conditions. The tuning range of fL is measured to be from
740 Hz to 10 kHz at the constant gain condition. fL is tuned
in eight steps through the 3-bit switching of Cd . Four selective
measured results when fL is 9, 3, 1.5, and 0.7 kHz are plotted
in Fig. 10, in which the gain is set to 7 dB. The fL tuning
characteristics are also measured at a variable gain condition.
Fig. 11(a) and (b) shows the gain response when fL is set to
9.8 and 0.9 kHz, respectively, for which the gain varies from
SHIN AND KIM: CMOS ACTIVE-RC LPF WITH SIMULTANEOUSLY TUNABLE HIGH- AND LOW-CUTOFF FREQUENCIES
Fig. 10. Measured low-end cutoff frequency (fL ) tuning characteristics at a
constant gain condition.
Fig. 11. Measured low-end cutoff frequency (fL ) tuning characteristics at a
variable gain condition. (a) fL = 9.8 kHz. (b) fL = 0.9 kHz.
TABLE II
M EASURED LPF P ERFORMANCE S UMMARY
−16.3 to +13.9 dB. The measured characteristics agree well
with the simulation. It should be pointed out that the network
analyzer used for the gain measurement in Fig. 9 could not be
used for these low-frequency measurements because the lowest
frequency range of the network analyzer was only 30 kHz.
Hence, a signal generator and an Agilent spectrum analyzer
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89
E4440A were used for these measurements. Unfortunately,
however, due to the dynamic range limitations of the spectrum
analyzer in the low-frequency region, measurements could not
be carried out in a sufficiently low-frequency region; thus,
measured data below certain frequencies were not acquired.
Nevertheless, the measured results of the filter itself, as well as
its successful operation in a transmitter [3], clearly demonstrate
that the filter’s fL is maintained at a constant level across
the wide gain control range. Meanwhile, the filter’s OIP3 is
measured to be +19 dBm. The measured performance of the
LPF is summarized in Table II.
IV. C ONCLUSION
An active-RC LPF with simultaneously tunable fH and fL
has been presented for IEEE 802.22 CR transmitter applica-
tions. The integrator frequency fd of the DCOC block is tuned
inversely proportional to the open-loop gain A to maintain fL
at a constant value at the variable gain condition. Realized in a
0.18-μm CMOS, the gain is tuned from −16.3 to +13.9 dB,
and fH is tuned from 2.1 to 6.04 MHz. The low-end cutoff
frequency fL is successfully tuned from 740 Hz to 10 kHz over
the 30-dB gain variation range.
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