Definition of: Northbridge

The high-speed part of a common chipset architecture in a computer. The Northbridge is the controller that interconnects the CPU
to memory via the frontside bus (FSB). It also connects peripherals via high-speed channels such as AGP and PCI Express. The
Northbridge may include a display controller, obviating the need for a separate display adapter.

The Southbridge controller handles the remaining I/O, including the PCI bus, parallel and Serial ATA drives (IDE), USB, FireWire,
serial and parallel ports and audio ports. Earlier chipsets supported the ISA bus in the Southbridge. Starting with Intel's 8xx
chipsets, Northbridge and Southbridge were changed to Memory Controller and I/O Controller (see Intel Hub Architecture).

Northbridge Connects CPU to:

RAM
AGP bus
PCI Express bus
Built-in display Adapter
Southbridge Connects CPU to:
ATA (IDE) Drives
USB bus
FireWire bus
Serial port
Parallel port
Built-in audio
ISA bus (earlier PCs)

System and Peripheral Buses

This illustration shows how chips, memory and peripherals in a PC interconnect via the system bus (top) and peripheral buses (AGP, PCI and PCI Express).

The north bridge, also known as the memory controller hub (MCH) in Intel systems
(AMD, IA, SiS and others usually use 'northbridge'), is traditionally one of the two chips in the
core logic chipset on a PC motherboard, the other being the southbridge. Separating the chipset
into northbridge and southbridge is common, although there are rare instances where these two
chips have been combined onto one die when design complexity and fabrication processes
permit it.

The northbridge typically handles communications between the CPU, RAM, AGP or PCI
Express, and the southbridge. Some northbridges also contain integrated video controllers, which
are also known as a Graphics and Memory Controller Hub (GMCH). Because different
processors and RAM require different signalling, a northbridge will typically work with only one
or two classes of CPUs and generally only one type of RAM. There are a few chipsets that
support two types of RAM (generally these are available when there is a shift to a new standard).
For example, the northbridge from the NVIDIA nForce2 chipset will only work with Socket A
processors combined with DDR SDRAM, the Intel i875 chipset will only work with systems
using Pentium 4 processors or Celeron processors that have a clock speed greater than 1.3 GHz
and utilize DDR SDRAM, and the Intel i915g chipset only works with the Intel Pentium 4 and
the Celeron, but it can use DDR or DDR2 memory

[edit] Etymology
The name is derived from drawing the architecture in the fashion of a map. The CPU would be at
the top of the map at due north. The CPU would be connected to the chipset via a fast bridge (the
northbridge) located north of other system devices as drawn. The northbridge would then be
connected to the rest of the chipset via a slow bridge (the southbridge) located south of other
system devices as drawn

[edit] Importance
The northbridge on a particular system's motherboard is the most prominent factor in dictating
the number, speed, and type of CPU(s) and the amount, speed, and type of RAM that can be
used. Other factors such as voltage regulation and available number of connectors also play a
role. Virtually all consumer-level chipsets support only one processor series, with the maximum
amount of RAM varying by processor type and motherboard design. Pentium-era machines often
had a limitation of 128 MB, while Pentium 4 machines have a limit of 4 GB. Since the Pentium
Pro, the Intel architecture can accommodate physical addresses larger than 32 bits, typically 36
bits, which gives up to 64 GB of addressing, though motherboards that can support that much
RAM are rare because of other factors (operating system limitations and expense of RAM).

A north bridge typically will only work with one or two different southbridge ASICs; in this
respect, it affects some of the other features that a given system can have by limiting which
technologies are available on its southbridge partner.