module ha(c,s,x,y);
input x,y;
output s, c ;
and(c,x,y);
xor(s,x,y);
endmodule
module full(s,c,x,y,cin,);
input x,y,cin;
output s,c;
ha a1(w2,w1,x,y);
ha x2(w3,s,cin,w1);
or (c,w2,w3);
endmodule
module fbit(s,c,x,y,cin);
input cin;
output [3:0] s;
output c;
wire cin2,cin3,cin4;
full M1 (s[0],cin2,x[0],y[0],cin);
full M2 (s[1],cin3,x[1],y[1],cin2);
full M3 (s[2],cin4,x[2],y[2],cin3);
full M4 (s[3],c,x[3],y[3],cin4);
endmodule
module stim();
reg [3:0]x,y;
reg cin;
wire [3:0]s;
wire c;
fbit s1(s,c,x,y,cin);
initial
begin
end
endmodule