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FAN7554
Versatile PWM Controller
Features Description
• Current Mode Control The FAN7554 is a fixed frequency current mode PWM
• Pulse by Pulse Current Limiting controller. It is specially designed for off-line and DC to DC
• Low External Components converter applications with minimal external components.
• Under Voltage Lockout(UVLO): 9V/15V These integrated circuits feature a trimmed oscillator for
• Stand-by Current: Typ. 100uA precise duty cycle control, a temperature compensated
• Power Saving Mode Current: Typ. 200uA reference, an ON/OFF control, a high gain error amplifier, a
• Operating Current: Typ. 7mA current sensing comparator, and a high current totem-pole
• Soft Start output. The FAN7554 has various protection functions such
• On/Off Control as an over load protection, an over current protection, and
• Over Load Protection(OLP) the over voltage protection, which include built-in auto
• Over Voltage Protection(OVP) restart circuit. The FAN7554 is available in the 8-DIP
• Over Current Protection(OCP) package as well as the 8-SOP package.
• Over Current Limit(OCL)
• Operating Frequency up to 500kHz 8-DIP
• 1A Totem-Pole Output Current
Applications 1
• Off-Line & DC-DC Converter 8-SOP
Rev. 1.0.2
©2002 Fairchild Semiconductor Corporation
FAN7554
Vref Offset(0.1V)
Vcc 3 IS
5uA
OCL
+ OLP +
S
6V _ Q _ 2V
OVP-out R
OCL-out UVLO-out 5 GND
Note:
1. Junction -to -air thermal resistance test environments.
-. Pneumatic heat sink fixture.
-. Clamping pressure 60psi through 12mm diameter cylinder.
-. Thermal grease applied between PKG and heat sink fixture
2
FAN7554
Temperature Characteristics
( -25°C ≤ Ta ≤ 85°C )
PIN Array
YWW
FA N7554
1 2 3 4
FB S/S IS Rt/Ct
PIN Definitions
3
FAN7554
Electrical Characteristics
(Ta = 25°C, Vcc=16V, Rt=10kΩ, Ct=3.3nF unless otherwise specified)
4
FAN7554
Note:
1. These parameters, although guaranteed, are not 100% tested in production.
5
FAN7554
10000.0 100.000
1000.0
0.33n 1K
100.0 1.1n 2K
3.3n 5K
11n 10K
10.0
33n 20K
1.000
50K
1.0 100K
0.1 0.100
1 10 100 0.1 1 10 100
Rt[Kohm] Ct[nF]
800
95.0
700
85.0
600
75.0 1K
2K 500
Time [nsec]
Duty [%]
65.0 5K
Tr
10K 400
55.0 Tf
20K
45.0 50K 300
100K
35.0 200
25.0 100
15.0 0
0.1 1 10 100 1 10 100
Ct [nF] Cload [ nF]
6
FAN7554
Figure 5. Temperature vs. Start-up Current Figure 6. Temperature vs. Operating Supply Current
Figure 7. Temperature vs. Reference Voltage Figure 8. Temperature vs. Oscillation frequency
Figure 9. Temperature vs. Start Threshold Voltage Figure 10. Temperature vs. Min. Operating Voltage
7
FAN7554
Operation Description
The FAN7554 has all the basic features of the current mode SMPS control IC. Its basic configuration includes the UVLO with
6V hysteresis, a band gap reference, the oscillator that can oscillate up to 500kHz according to Rt/Ct (connected externally), a
PWM logic circuit , a gate driver, and the feedback circuit that has the current source and soft start function. The FAN7554 has
various functions such as an over load protection, an over current protection, and an over voltage protection. The over load
protection forces the FAN7554 to stop its operation if the load current is higher than the preset value. The protection circuit
can also be prevented from operating during transient states by ensuring that a certain amount of the time passes before the
protection circuit operates. The shutdown circuit is configured for an auto-restart, so the FAN7554 automatically restarts when
Vcc drops to 9V (stop voltage).
Start-Up
The start-up circuit is made up of an under voltage lock out (UVLO), the protection for low voltage conditions, and the 5V
reference (Vref), which supplies bias voltage to the control circuit after start-up. The start voltage of the UVLO is 15V , and
the stop voltage after turn on is 9V. It has a 6V hysteresis. The minimum operating current for start-up threshold is typically
100uA, and this can reduce the power dissipation on the start-up resistor. The Vref is composed of the band gap reference
circuit with its superior temperature characteristics and supplies power to all the FAN7554 circuits and Rt/Ct, with the
exceptions of the ULVO circuit and ON/OFF control circuit.
DC Link Icc(mA)
VCC 7.0
7
UVLO
5V Internal bias
Vref Good logic
0.01
15V/9V Vcc (V)
FAN7554 9 15
Figure 11. Low Current Start-Up & Bandgap Reference Circuit Figure 12. Start-Up & Circuit Characteristics
Soft Start
The SMPS output load usually contains a capacitive load component. During initial start-up, the output voltage increases at a
fixed time constant because of this component. If the feedback loop, which controls the output voltage, was to start without
the soft start circuit, the feedback loop would appear to be open during initial start-up , so, at start-up, the feedback voltage
applied to the PWM comparator’s inverting input (-) reaches its maximum value(1V).
During this time, the peak value of the drain current would stay at the maximum value, and the maximum power would be
delivered to the secondary load side from the start. When the maximum power is delivered to the secondary side for this initial
fixed time, the entire circuit is seriously stressed. The use of a soft start can avoid such stresses. At start-up, the soft start
capacitor Cs is charged by 1mA and 100uA current sources.
The voltage of the inverting terminal of the PWM comparator increases to 1/3 of the Cs voltage at a fixed time constant.
Subsequently, the drain peak current is limited by the gradual increase in the Cs voltage and this causes the output voltage to
increase smoothly. When the Cs voltage becomes greater than 3V, the diode Ds turns off consequently, the feedback capacitor
Cfb is charged by 1mA and 5uA current sources. This charge voltage determines the comparator’s inverting voltage. Then, Cs
voltage charges to 5V by 100uA current source. The soft start capacitor Cs is discharged when the UVLO good logic starts, so
the soft start is repeated at re-start.
8
FAN7554
S/S
2
100uA
5V
Ds
2R
Output drive
1mA R
Cs Cfb
5uA 5V
Vcc
FAN7554
1
FB
Oscillator
As shown in figure14, the oscillator frequency is programmed by values selected for timing components Rt and Ct. Capacitor
Ct is charged to almost 2.8V through resistor Rt from the 5V reference and discharged to 1.2V by an internal current source.
The oscillator generates the clock signal while the timing capacitor Ct is discharged. The gate drive output becomes low during
the clock time. Rt and Ct selection determine the oscillator frequency and maximum duty cycle. Charge and discharge times
can be calculated through the equations below.
Charging time : tc = 0.55×Rt×Ct
Vhigh(2.8V)
Vref
Sawtooth waveform
8
Clock [ Rt > 5kΩ]
Rt + Vlow(1.2V)
CT tc td
Discharge -
Ct 4
Gate Drive
Ct Internal clock
Discharge
Vhigh(2.8V)
2.8V
Sawtooth waveform
/1.2V
Figure 14. Oscillator Circuit Figure 15. Sawtooth & Clock Waveform
9
FAN7554
Feedback
As shown in figure16, the internal oscillator clock turns on the MOSFET. The feedback comparator operates to turn it off
again, when the MOSFET current reaches a set value proportional to Vfb. The feedback capacitor Cfb is charged by the inter-
nal current sources , 1mA and 5uA, and is discharged by the secondary side photo-coupler to control the output voltage.
DRIN
OUT
OSC
6
Vfb 2R Vfb/3 S Q
R
1mA R
Cfb
IS Vsense
5uA 5V 3
Vcc
Rs
FAN7554
1
FB
Delayed Shutdown
During the normal operation, the feedback voltage is between 0~3V. If the output terminal overloads or an error happens to
the feedback loop, the delayed shutdown circuit operates. When the feedback voltage is less than 3V, the feedback capacitor is
charged by current sources, 1mA and 5uA; when the feedback voltage becomes greater than 3V, the capacitor is charged by the
5uA current source because diode D1 turns off. When the feedback voltage is less than 3V, the charge slope becomes an expo-
nential function and, when it is greater than 3V, the charge slope becomes linear. When the feedback voltage reaches almost
6V, the FAN7554 shuts down. The shut down circuit is configured for
auto-restart, so it automatically restarts when Vcc reaches the under voltage 9V.
FB
1
DRIN
5uA OUT
OSC
Vcc 6
2R S Q
D1 R
1mA R
Cfb
IS
5V 3
Rs
Over Current
Comparator S Q Shutdown
R
6V
FAN7554
UVLO - out
10
FAN7554
Vfb
6V
3V
t1
t2 t
Gate Driver
The gate drive circuit has the totem-pole output configuration. The output has 1A peak current and 200mA average current
drive ability.
7 DRAIN
Clock
OUT
Q 6
Shutdown
FAN7554
ON/OFF Control
The FAN7554 is able to use the feedback pin for ON/OFF control by placing NPN transistor between the cathode of the
KA431 and ground as shown in figure 19. When the transistor turns on, the current flows through the photo diode and
saturates the photo transistor. As a result, the feedback voltage is dropped to zero. When the feedback voltage is below 0.3V,
the soft start voltage starts to discharge by connecting the internal resistor 1kΩ in parallel with the external capacitor Cs. When
the soft start voltage becomes less than 1.5V, all the blocks in the FAN7554 are turned off , with the exceptions of the UVLO
block and ON/OFF control block. The operation current is about 200uA. So the stand-by power is reduced and SMPS
efficiency is improved. When the feedback voltage exceeds 0.3V, the FAN7554 normally operates by turning on Vref block.
11
FAN7554
VCC
Vref
7
3.5V
S R
Q
100uA UVLO
OFF
S/S PWR 5V
2 ON
/
Vref
SAVE
1.5V
1K Ω 15V/9V
0.3V
Good logic
Vo FB
Cs 1
Internal bias
Cfb
5uA
Vcc
FAN7554
Remote control
Vref Icc
5V 4.5mA
0.2mA
t
VS/S
Slope (dv/dt) = 100uA / Cs
5V Slope (dv/dt) = 1kΩ * Cs
3V
Slope (dv/dt) = (1mA +100uA) / Cs
1.5V
t
Vfb
Slope (dv/dt) = (1mA +5A) / Cfb
0.3~3V
OFF Signal
Slope (dv/dt) = (5uA) / Cfb
ON Signal
0.3V
12
FAN7554
Protection Circuits
The FAN7554 has many built-in protection circuits that do not need additional components, providing reliability without cost
increase. These protection circuits have the auto-restart configuration. In this configuration, the protection circuits reset when
Vcc is below UVLO stop threshold (9V) and restarts when Vcc is above UVLO start threshold voltage (15V)
6V
S Q Shutdown
R
OSC
1mA 2R
Cfb S Q
5uA 5V
R R
Vcc
FAN7554
1
KA431 FB
6V
3V
t2 t
5uA = (Cfb *3V)/t2
13
FAN7554
LF101 R202
R201
C101 IC301
D102 Q101
R106
R105
R205 C203
TNR
FUSE IC201
D103 R108
8 7 6 5
Vref Vcc OUT GND
14
FAN7554
15
FAN7554
Transformer Specification
3 9
8 NB
11 NP
N12V N12V
4 7
NB NP
6 bottom top
5
Winding Specification
No. Pin(S → F) Wire Turns Winding Method
NP 1→3 0.35φ × 1 44 -
N12V 7 → 11 0.35φ × 4 12 -
NP 1→3 0.35φ × 1 44 -
NB 5→4 0.35φ × 1 13 -
Electrical Characteristic
Closure Pin Spec. Remarks
Inductance 1-3 400uH ±10% 100kHz, 1V
Leakagel 1-3 10uH MAX . 2nd All short
16
FAN7554
BD D201 L201
T101 +12V/2A
C201 C202
R105 C102
D102
C301 C302
D202
+5V/3A
L101
R106 C103 R107 D103
L202
D104 R201
C101 C105
C203 C204
R101
R202
IC2 R108
R102 8 7 6 5 Q101
FUSE Vref Vcc OUT GND
R113
R110
FAN7554
D101 C106
RT101 F/B S/S IS Rt/Ct R203
1 3
R109
2 4
C205
IC201
17
FAN7554
18
FAN7554
Transformer specification
Winding Specification
No. Pin(S → F) Wire Turns
NP 1→3 0.65 φ × 1 32
NS, 5 8 → 11 0.65 φ × 4 4
NS, 12 4→9 0.65 φ × 4 5
NP 1→3 0.65 φ × 1 32
NVCC 7→6 0.65 φ × 1 5
Core : Powder 27 pi 16grade
5V : 12T ( 1 φ × 2 )
12V : 27T ( 1.2 φ × 1 )
19
FAN7554
Mechanical Dimensions
Package
Dimensions in millimeters
8-SOP
20
FAN7554
8-DIP
21
FAN7554
Ordering Information
Product Number Package Operating Temperature
FAN7554 8-DIP
-25°C ~ 85°C
FAN7554D 8-SOP
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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