ALU
Design
Louisiana State University 7- Arithmetic / Logic Unit – ALU Design - 1 CSC3501 S07
Overview
1-Bit ALU
Full Adder
32-Bit ALU
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Different Implementations
Not easy to decide the “best” way to build something
Don't want too many inputs to a single gate
a
cout = a b + a cin + b cin
Sum
sum = a xor b xor cin
b
CarryOut
How could we build a 1-bit ALU for add, and, and or?
How could we build a 32-bit ALU?
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32-bit ALU
logical or function
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A 1-Bit ALU
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A Full Adder
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A Full Adder
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A Full Adder
Sum=(a⋅b⋅CarryIn)+(a⋅b⋅CarryIn)+(a⋅b⋅CarryIn)+(a⋅b⋅CarryIn)
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Functioning of 32-bit ALU
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Designing 32-bit ALU: Principles
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32-bit Adder
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32-bit ALU With 3 Functions
CarryOut
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32-bit Subtractor
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32-bit Adder / Subtractor
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2’s Complement Overflow
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Set Less Than (slt) Function
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Zero
A–B=0 ⇒A=B
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Faster Addition: Carry Lookahead
CarryIn1=(b0⋅CarryIn0)+(a0⋅CarryIn0)+ (a0⋅b0)
And
C2=(a1⋅a0⋅b0)+(a1⋅a0⋅c0)+(a1⋅b0⋅c0) +
+(b1⋅a0⋅b0)+(b1⋅a0⋅c0)+(b1⋅b0⋅c0)+(a1⋅b1)
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Carry-lookahead Adder
ci+1 = (bi⋅ci) + (ai⋅ci) + (ai⋅bi) =
= (ai⋅bi) + (ai+ bi) ⋅ ci
Generate (gi) and propagate (pi)
gi = ai ⋅ bi
pi = ai + bi
ci+1 = gi + pi ⋅ ci
If gi = 1. That is, the adder generates a CarryOut (ci+1)
independent of the value of CarryIn (ci)
ci+1 = gi + pi ⋅ ci = 1
If gi = 0 and pi = 1
ci+1 = gi + pi ⋅ ci = 0 + 1 ⋅ ci = ci
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Carry-lookahead Adder
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Carry-lookahead Adder
A plumbing analogy for
carry lookahead for 1
bit, 2 bits, and 4 bits
using water pipes and
valves.
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Fast Carry Using the Second
Level of Abstraction
To go faster, we’ll need carry lookahead at a higher level.
For the four 4-bit adder blocks:
That is, the “super” propagate signal for the 4-bit abstraction
(Pi) is true only if each of the bits in the group will propagate a
carry.
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Fast Carry Using the Second
Level of Abstraction
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Example
For carry lookahead, the carry out of the most
significant bit is just C4, defined in the example. It
takes two levels of logic to specify C4 in terms of Pi
and Gi (the OR of several AND terms). Pi is specified
in one level of logic (AND) using pi, and Gi is specified
in two levels using pi and gi, so the worst case for this
next level of abstraction is two levels of logic. pi and
gi are each one level of logic, defined in terms of ai
and bi. If we assume one gate delay for each level of
logic in these equations, the worst case is 2 + 2 + 1 = 5
gate delays.
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NOR
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32-bit ALU with 6 Functions
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Summary
1-Bit ALU
Full Adder
32-Bit ALU
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