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HAMRADIOINDIA
HAMRADIOINDIA

Direct Digital
Synthesizer for
Amateur Bands

1
HAMRADIOINDIA

DDS VFO for Amateur Bands

 HAMRADIOINDIA
contact@hamradioindia.org
www.hamradioindia.org
H A M R A D I O I N D I A

Chapter

Direct Digital Synthesizer


VFO for Amateur Bands
A stable multi band HF transceiver is a dream of every ham. The first step to this
is to make a multi band stable VFO. But it is very difficult to get stability in
ordinary LC VFO at higher frequencies. The Advanced DDS technology helps
you to become your dream true. This project used a PIC microcontroller – A
range of microcontroller produced by Microchip Inc. in this application,
PIC16F628 and AD9851 “a complete DDS synthesizer chip” from Analog Devices.

PIC
The PIC16F628 is an 18-Pin microcontroller with 2K byte program memory, it
is a FLASH-based and a member of the versatile PIC16CXX family of low-
cost, high-performance, CMOS, fully-static, 8-bit microcontrollers. PIC16F62X
devices have special features to reduce external components, thus reducing
system cost, enhancing system reliability and reducing power consumption.

DDS
The AD9851 is a highly integrated device that uses advanced DDS technology
to form a digitally programmable frequency synthesizer. AD9851 generates a
stable frequency and phase-programmable digitized analog output sine wave.
This sine wave can be used directly as a frequency source with an output
tuning resolution of approximately 0.04 Hz with a 180 MHz system clock. The
AD9851 contains 6 X REFCLK Multiplier circuit that eliminates the need for a
high frequency reference oscillator.

Figure 1. Basic DDS Block Diagram

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The basic block diagram is shown in Figure 1. The frequency out put can be
calculated using the following formulae

Fout = (∆ Phase X System Clock)/ 2 ^ 32

Where:
∆ Phase = decimal value of 32 bit tuning word

System Clock = REFCLK frequency in MHz or 6 X REFCLK frequency


(in MHz) if the 6 X REFCLK Multiplier is enabled

Fout = Output frequency of DDS in MHz

The DDS circuitry is basically a digital frequency divider function whose


incremental resolution is determined by the frequency of the system clock,
and N (number of bits in the tuning word). The phase accumulator is a
variable-modulus counter that increments the number stored in it each time it
receives a clock pulse. When the counter reaches full-scale it wraps around,
making the phase accumulator’s output phase-continuous. The frequency
tuning word sets the modulus of the counter, which effectively determines the
size of the increment (∆Phase) that will be added to the value in the phase
accumulator on the next clock pulse. The larger the added increment, the
faster the accumulator wraps around, which results in a higher output
frequency.

Figure 2. Output Spectrum of DDS

In the example shown in Figure 2, the system clock is 100 MHz and the output
frequency set to 20 MHz. A low pass filter is essential to remove unwanted
images. A good rule-of-thumb is limiting the output frequency to 1/3rd of
System Clock frequency. One can use the other images also with help of a
good band pass filter. Note that these images are not harmonics and it keeps a
1:1 relation with the fundamental frequency, i.e. if fundamental frequency
increased 1 Hz then the image frequency also shifted 1 Hz.

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H A M R A D I O I N D I A

Operational Features
1. Dual VFO, i.e. VFO A and VFO B facilities.
2. Up to 20 RX frequency storage on memory
3. The Software allows 2 modes of operation,
a. VFO mode
b. Memory mode
4. Keypad frequency entry
5. Step size can be changed from 1Hz to MHz range.
6. RIT facility.
7. Save to any MEM and copy to any VFO from MEM is possible.
8. LSB/USB/CW modes
9. Allows -Ve and +Ve IF OFFESTS
10. Calibration screen for changing all the setup screens including Chip
type and System Clock Frequency.
11. Signal Generator mode.
12. Time out function for ignoring any wrong entry
13. Low cost mechanical encoder is used
14. A 2 x 16 line LCD display used for display freq and other messages

Construction notes.
The opto-coupler 4N35 is isolating the PTT from the circuit. To change
frequency of the DDS, Keypad and Mechanical Rotary encoder are provided.
Another six push button switches are used for managing other functions of
the VFO. An ordinary keypad used in telephones, which is easily available
from the local market is used. If the Mechanical encoder is not available one
can use the encoder found in the “Scroll Mouse”. The scroll mouse contains
two optical sensors and one mechanical encoder inside it. You can easily
remove the mechanical encoder from the mouse and fit it to the front panel of
your radio.

DDS Chip AD9851BRS/AD9850BRS comes with SSOP package, it is


somewhat difficult to solder for a home brewer. Seek the help of a service
people to solder this chip to board is an alternative. May be one can try the
method Peter Rhodes, G3XJP, in his article AN557 (www.analog.com). He
solders this chip to a 24DIP socket using a short wire leads. But this method is
not supported by the PCB design shown here. Or one can contact the local
mobile phone servicing people to get the chip soldered to PCB.

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H A M R A D I O I N D I A

Figure 3. Dimensions of AD9851BRS

A 2 line x 16 LCD with or without R/W pin (software use delays rather
than busy checks) is used to display VFO frequency and other messages. The
LCD contrast can be adjusted using R7 (10K pot). Commonly available LCD
display (using Hitachi HD44780 controller) is used in this circuit
After assembling double check all wiring and check for any dry solder,
loose connections etc. PCB may be cleaned with isopropyl. Note that higher
than 5 V will damage both DDS and PIC chips. Always use a good IC socket
for the PIC16F628, this will helps if you need to re-program the chip.
The MODE SELECT output (from 74LS139) are used to switch crystals
and other operations while changing the modes (i.e. CW/LSB/USB etc.). One
of the out put will be low and all other are high of 74LS139. one of the Band
select out put will be low in the following conditions.
1. Frequency less than 10 MHz – used for selecting 40 M
2. Frequency less than 17 MHz – used for selecting 20 M
3. Frequency less than 25 MHz – used for selecting 15 M
4. Frequency greater than 25 MHz – used for selecting 10 M

Figure 4. LCD display on TX mode.

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H A M R A D I O I N D I A

Calibration and setup screens


By pressing down the CAL button for one second, you can enter the
calibration screen; here you can change the followings.

1. Enable 6 X REFCLK Enable or Disable internal multiplier


2. DDS_SYSTEM_CLK. Range 30 MHz to 190 MHz for AD9851
3. MAX_DDS_FREQ. Range 0MHz o 45% of DDS_SYSTEM_CLK
4. MIN_RX_DDS_FREQ >= Max RIT Freq +Tx Offset frequency
5. MAX_RX_DDS_FREQ <= MAX_DDS_FREQ –
(Max_RIT_frequency +Tx_Offset_frequency
6. MAX_RIT_FREQ
7. SSB_OFFSET -/+ 1500 KHz
8. CW_OFFSET -/+ 750Hz
9. TX_OFFSET_FREQ Offset from RX Frequency
10. OFFSET_FREQ IF Offset Added to TX/RX frequency
11. MULTIPLIER Frequency display is multiplied by N

To Change the Setup screen press and hold the CAL button then power on
the VFO. After the version number display, the first calibration screen –
Enable 6 X REFCLK is displayed. Use the rotary encoder to make the
selection, and then briefly press the CAL button to go to the next screen. The
first three calibration screens rarely need change. So you can change the rest
all settings even when the DDS is working. To do this press and hold the CAL
button for one second you will get the calibration screen.
RX_DDS_FREQ, MIN_RX_DDS_FREQ, MAX_RX_DDS_FREQ,
SSB_OFFSET, CW_OFFSET, TX_OFFSET_FREQ and OFFSET_FREQ are may
be positive or negative values.
The DDS system clock (DDS_SYSTEM_CLK), is the crystal frequency
or 6 x crystal frequency if 6XREFCLK multiplier enabled. This screen sets DDS
output frequency to 10MHz and displays the DDS system clock frequency.
Adjust the DDS system clock (Rotary encoder or keypad can be used) to get
exactly 10 MHz out put from DDS. This screen continues to display until CAL
button pressed briefly (here no timeout function).
The Maximum DDS frequency (MAX_DDS_FREQ) is the limit of your
DDS Frequency and you can set a maximum value of system clock x 0.45, set
this value to 1/3rd of your system clock or the cut of frequency on the low
pass filter in the output which is the lowest.
Minimum RX and Maximum RX frequency are the minimum and
maximum frequency limits of the VFO. Maximum RIT is the limit of RIT and
you can set this is to a maximum up to 10MHz.
SSB offset added to the out put frequency if the VFO is in USB mode or
subtract in LSB mode. The range is -30MHz to + 30MHz note that –ve offset
just change the meaning of LSB and USB.
i.e. If the SSB OFFSET is set to 1500 ( for a 3000 KHz filter bandwidth )
LSB subtracts 1500 Hz from the DDS frequency,
USB adds 1500 Hz to the DDS frequency.

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H A M R A D I O I N D I A

If the SSB OFFSET is set to -1500


LSB adds 1500 Hz to the DDS frequency,
USB subtracts 1500 Hz from the DDS frequency
CW offset added to the VFO out put frequency if the VFO in RX mode
and on TX SSB offset will be added. This will help you to use USB crystal to
receive and transmit CW.
TX offset add only when transmitting, and offset frequency adds in
both RX and TX. 20GHz is the maximum limit of the offset frequency.
Frequency display is multiplied with the value MULTIPLIER. The
range of this value is from 1 to 1024, this will be useful if the VFO using in
VHF or higher frequencies.
Enter a valid frequency in all calibration screens, for an example RX
maximum frequency sets to a value, when added to other offsets (Offset
frequency and SSB offsets etc.) result never cross the limit of Max DDS
Frequency. If the all buttons and rotary encoder kept idle for 10 sec in any of
the above set up screens except the REFCLK, all changes made are discarded
and return to VFO screen. If any changes are made in any of the above
screens, the message “SAVING” will be displayed at the end of CALL screen
and return to VFO screen.

Operational use
On power up the software version number is displayed for a short
time. The second digit after decimal point will be 6 if you enabled the 6 X
REFCLK, or it will be 1, if you are not using the same.
For ease of operation Keypad, rotary encoder and other six buttons are
provided. You can directly enter any value within the DDS limits. The “* “key
represent the decimal point and “# “used to “enter” the value. For an example
if you wants to enter 7.5 MHz, first press 7, the “* “key then 5 followed by “#”
– the “Enter key “. The frequency will be displayed as “7.500000 MHz”.
When pressing any key in the keypad the same will be displayed in the LCD
and the “MHz” text in the LCD has been change to “#” as a reminder to “#”
key must be used after the frequency typed in. Press “#” key first to enter a –
ve value, only allowed in some setup screens.
Turn the rotary encoder clockwise increases the frequency and anti-
clockwise decreases it. While pressing down the STEP button a cursor is
displayed under one digit. This indicates the selected step size, and to change
the same turn the rotary encoder while pressing down the STEP button. You
can select step size from 1 Hz to 10MHz range. The software also monitor
how fast you turn the knob, if you turn fast the frequency will be increasing a
value higher than 1 and up to 30. Due to the software takes 4mS to de-bounce
the encode position; if you turn so fast then no change will occur.
Any changes in the frequency will write into the EEPROM two seconds
after stopping the rotary encoder or entering frequency by Keypad. On power
up last the frequency stored in the EEPROM will be displayed.

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H A M R A D I O I N D I A

Managing two VFOs


A VFO button is used to swaps over two VFOs, ie VFO A and VFO B.
Both frequency and modes (i.e. CW/LSB/USB) associated with the VFO are
swapped over with a brief press of VFO button. “VFOA” or “VFOB” is
displayed in the LCD.

Split
Pressing down VFO button for 1 second will activate SPLIT mode. In
this mode VFO will change from one to another on pressing the PTT and back
when releasing it. A “SPT” will be displayed on LCD to indicate you are in
SPLIT mode. RIT will be disabled in this mode.

RIT
If the RIT button is pressed briefly, RIT is displayed on the LCD and
activate RIT mode. The TX frequency cannot be changed, but the RX
frequency can be changed as long as it does not cross the limits i.e. RX freq
+/- maximum RIT offset. Pressing the RIT button again, removes the RIT
display and the RX frequency reverts to its previous value.

CW/LSB/USB
Pressing SSB button briefly change the mode one by one. No
offset, CW, LSB, USB can be selected one by one. In CW mode CW offset will
be added if the VFO in the RX mode and SSB offset will be add if the VFO in
TX mode. So you can use USB crystal to receive and transmit CW. In LSB
mode SSB offset subtract from the output frequency and add in USB mode.
The –ve offset just changes the meaning of LSB and USB (see calibration and
setup screens for more details). The CW, LSB, or USB displayed on LCD if
anyone of these modes is selected.

Memory Function
Memory function has been used to save and recall RX frequencies to
EEPROM. Max 20 numbers of frequencies can be saved. A brief press of
memory button will change from VFO mode to Memory mode and back. On
pressing memory button MEM 1 will be displayed, and you can select the
desired memory with the rotary encoder. If the memory frequency is invalid a
“---“will be displayed instead of MEM in the LCD. This happens when you
change something in setup screens and try to recall old memory locations. For
example if you change max RX freq to 30MHz and select a memory locations
stored 40MHz.
To save a VFO frequency in to memory, press MEM buttons for 1 sec,
then select memory location using rotary encoder. To avoid erasing any
useful frequency the frequency in that location will be displayed on the
second line of LCD. Press MEM button after selecting the desired location for
1 sec. A message “SAVE” will be displayed on LCD. If you didn’t like to

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overwrite the previous memory Frequencies then a brief press of MEM button
helps to back to VFO mode.
There are two methods to go back VFO mode from memory mode. A
brief press change to VFO mode and recall the previous VFO frequency. If
you press MEM button for 1 second then the memory frequency will be
copied to VFO and change to VFO mode.

Acknowledgements
I was able to finish the project help and encouragements given to me
by VU2ITI (Prof. T.K. Mani), VU3WIJ (Shaji.P.B).
Reference:
1. AD9851 CMOS 180 MHz DDS/DAC Synthesizer Data Sheet
2. AN557 ( Analog Devices )

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H A M R A D I O I N D I A

Chapter

Circuit diagrams

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8 7 6 5 4 3 2 1
VCC
U1.A
DMUX
2 4
A Y0
R1 R2 R3 R4 R5 R6 3 5
B Y1
6
Y2 BAND SELECTION
4k7

4k7

4k7

4k7

4k7

4k7

1 7
D G Y3 D
GND 74LS139
4
U1.B 3
DMUX
12 14 4 X 3 KEYPAD
Y0 A
11 13 2
Y1 B
10
Y2
9 15
Y3 G
1
74LS139

1N4148

1N4148

D3 1N4148

D4 1N4148

D5 1N4148

D6 1N4148

D7 1N4148

D8 1N4148
MODE SELECTION
GND
C 4 C

7
D1

D2
1 18
RA2 RA1

1N4148

1N4148

1N4148
2 17

D10

D11
1

3
RA3 RA0

D9
SW1

SW2

SW3

SW4

SW5

SW6
1 U2 6 3 16
RA4 RA7
ROTARY ENCODER
5 4 15 VCC
RA5 RA6
7 MEM VFO RIT SSB STEP CAL

2
2 4 5 14
VSS VDD
4N35 PIC16F628
6 13
RB0 RB7
GND 7 12
RB1 RB6
SW7

B PTT 8 11 B
RB2 RB5
9 10
( NOTE 1 ) RB3 RB4
5
VCC FQ_UD
W_CLK
R8

100
+ C1 C2 C3 D7 SERIAL DATA
10k
- 100uF 10pF 0.01 R7 REV: 1.02 DATE: 20/09/2004 ENG: VU3CNS

1
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PROJECT: DDS VFO

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2
3
4
5
6
7
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9
10
11
12
13
14
15
16
A GND A

HDR_3

HDR_16
J1
LCD CONTRAST ADJ COMPANY: HAMRADIOINDIA

J2
GND GND ADDRESS: WWW.HAMRADIOINDIA.ORG
CITY CALICUT
TO DDS COUNTRY: INDIA
74 LS 139 VCC = 16 GND = 8 2 LINE X 16 LCD DISPLAY
INITIAL 28/08/2004 PAGE: 1 OF: 2
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Page 1 of 2
8 7 6 5 4 3 2 1
U3
R9
3 1
VCC 10E 12 V
LM7805 2
+ C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14
GND R10
D D

100E
-100u 0.01 0.001 0.001 0.001 0.01 0.1u 0.1u 0.47u 0.01u 0.1u
GND GND
C15
.
0.01u
GND
1 D3 D4 28
RF OUT
C16
2 D2 D5 27 J4
.
DATA 1
C 3 26 2 C
D1 D6
HDR_2
J3 0.01u
1 4 25 VCC
D0 AD9851 D7
2
R11
3 5 24 T1
GND GND
HDR_3 W_CLK

1K
6 23
VDD VDD
FQ_UD
7 22
W_CLK RESET L1 1.0uH L2 0.68uH
8 21
FQ_UD IOUT C19
R14
9 20 2N3866
CLOCK IOUTB C17 C18 180E
VCC T1
10 19
GND GND 0.01u
11 18 R12 R13 R16 R17
VDD VDD 3.3p 8.2p C24

100E

200E

470E
56E
B 12 17 B
14

RSET DACBL NC
C21 C22 C23 0.01u
13 16
NC QOUT VINP
X1 5 TO 180 MHZ
R18 R19
NC 14 15
8 QOUTB VINN C20 22p 33p 22p

56E

56E
R15
22
3.9K

0.001u
7

GND
REV: 1.01 DATE: 20 - 09 - 2004 ENG: VU3CNS
PROJECT: DDS VFO
A A
COMPANY: HAMRADIOINDIA
ADDRESS: WWW.HAMRADIOINDIA.ORG
CITY CALICUT
T1 - 8 BIFILAR TURNS 32 SWG ON FT37 - 45 COUNTRY: INDIA
INITIAL 06 - 09 - 2004 PAGE: 2 OF: 2
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