GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

Teaching and Examination Scheme for B.Tech. (Electronics & Communication Engineering 4
Year Course)

Year: III Semester: V

S. No. Code Subject Hrs./week Exam Maximum Marks
Hrs.
A. Theory Papers L T P *I.A. Exam Total
1 5EC1 VLSI Design 3 0 - 3 30 70 100
2 5EC2 VHDL 3 1 - 3 30 70 100
3 5EC3 Linear Integrated Circuits 3 1 - 3 30 70 100
4 5EC4 Analog Communication 3 1 - 3 30 70 100
5 5EC5 Telecommunication Engineering 3 0 - 3 30 70 100
6 5EC6 Elective (any one of the following) 3 0 - 3 30 70 100
5EC6.1 Computer System Architecture
5EC6.2 Advanced Data Structures
5EC6.3 Computer Oriented Mathematical
Methods
B. Practical & Sessional:
7 5EC7 VHDL Programming Lab - - 3 3 60 40 100
8 5EC8 Electronic Engineering Design Lab - - 3 3 60 40 100
9 5EC9 Communication Lab - - 3 3 60 40 100
10 5EC10 Minor Project - - 2 3 50 - 50
C. Discipline & Extra Curricular 2 - - 2 50 - 50
Training:
11 5EC11 Technical Training
Total For B. Tech 20 3 11 - - - 1000
Total Teaching Load For B. Tech 34
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10
VLSI DESIGN [5EC1]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
[ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit.

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 INTRODUCTION TO MOS TECHNOLOGY- Basic MOS transistors, 7
Enhancement Mode transistor action, Depletion Mode transistor action, NMOS and
CMOS fabrication.
II BASIC ELECTRICAL PROPERTIES OF MOS CIRCUITS- Ids versus Vds 7
relationship, Aspects of threshold voltage, Transistor Transconductance gm. The
nMOS inverter, Pull up to Pull-down ratio for a NMOS Inverter and CMOS Inverter
(Bn/Bp), MOS transistor circuit Model, Noise Margin.
III CMOS LOGIC CIRCUITS- The inverter, Combinational Logic, NAND Gate NOR 7
gate, Compound Gates, 2 input CMOS Multiplexer, Memory latches and registers,
Transmission Gate, Gate delays, CMOS-Gate Transistor sizing, Power dissipation.
IV Basic physical design of simple Gates and Layout issues. Layout issues for inverter, 7
Layout for NAND and NOR Gates, Complex Logic gates Layout, Layout optimization
for performance.
V Introduction to VHDL, Prolog & other design tools. VHDL Code for simple Logic 7
gates, flip-flops, shift registers.

Recommended Books:

1. Stephen Brown and Zvonlo Veranesic-Fundamentals of Digital Logic with VHDL Design, Tata
Mc-Graw Hill.
2. Neil H.E. Weste, Kamran Eshraghian-Principles of CMOS VLSI Design.
3. Douglas A. Pucknell, Kamran Eshraghian-Basic VLSI Design.
4. Michael John, Sebastian Smith-Application specific Integrated Circuit.
5. Behzad Razavi-Design of Analog CMOS Integrated Circuits, Mc-Graw Hill.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10
VHDL [5EC2]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
TUTORIAL:1 [ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit.

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 INTRODUCTION – Fundamental & history of various hardware description 7
language, Design flow of ASICs and and standard logic circuits using software.
II COMBINATIONAL CIRCUIT BUILDING BLOCKS- Multiplexer, Decoders, 7
encoders, Code Converters, VHDL Code for Combinational Circuits.
III SEQUENCIAL CIRCUITS: VHDL code for Flip-Flops, shift registers, Counters. 7
IV SYNCHRONOUS/ ASYNCHRONOUS SEQUENCIAL CIRCUITS: Mealy & 7
Moore type FSMs, VHDL Code for Mealy & Moore Machines, VHDL Codes for
Serial Adder, Vending Machine.
V DIGITAL SYSTEM DESIGN- Building Block circuits, Memory organization, 7
SRAM, Design examples of divider, Multiplier, Shifting & Sorting Operations, Clock
Synchronization, CPU organization and design concepts.

Recommended Books:

1. Stephen Brown and Zvonki Vranesic-Fundamentals of Digital Logic circuit VHDL Design, Tata
Mc-Graw Hill.
2. Z.Navabi-Analysis and Modeling of Digital Systems, Tata Mc-Graw Hill.
3. D.L.Perry-VHDL 3rd cd., Tata Mc-Graw Hill.
4. Morris Mano-Digital Logic & Computer Design, Prentice Hall of India.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10
LINEAR INTEGRATED CIRCUITS [5EC3]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
TUTORIAL:1 [ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 OPERATIONAL AMPLIFIERS: Basic differential amplifier analysis, 7
Single ended and double ended configurations, Op-amp configurations with
feedback, Op-amp parameters, Inverting and Non- Inverting configuration,
Comparators, Adder.
II OPERATIONAL AMPLIFIER APPLICATIONS: Integrator, 7
Differentiator, Voltage to frequency & Frequency to voltage converters.
Oscillators: Phase shift, Wein bridge, Quadrature, square wave, triangular
wave, saw tooth oscillators. Voltage controlled oscillators.
III ACTIVE FILTERS: Low pass, high pass, band pass and band reject filters, 7
All pass filter, Switched capacitor filter, Butterworth filter design, and
Chebyshev Filter design.
IV PHASE-LOCKED LOOPS: Operating Principles of PLL, Linear Model of 7
PLL, Lock range, Capture range, Applications of PLL as FM detector, FSK
demodulator, AM detector, frequency translator, phase shifter, tracking filter,
signal synchronizer and frequency synthesizer, Building blocks of PLL, LM
565 PLL.
V LINEAR IC’s: Four quadrant multiplier & its applications, Basic blocks of 7
linear IC voltage regulators, Three terminal voltage regulators, Positive and
negative voltage regulators. The 555 timer as astable and monostable
multivibrators. Zero crossing detector, Schmitt trigger.

Recommended Books:

1. R.A. Gayakwad-Op-amplifiers & Linear ICs, Prentice Hall of India.

2. Taubay-Operational Amplifiers.
3. K.R. Botkar-Integrated Circuits. Pearson Education.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10
ANALOG COMMUNICATION [5EC4]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
TUTORIAL:1 [ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 NOISE EFFECTS IN COMMUNICATION SYSTEMS: Resistor noise, 7
Networks with reactive elements, Noise temperature, Noise bandwidth,
effective input noise temperature, Noise figure. Noise figure & equivalent
noise temperature in cascaded circuits.
II AMPLITUDE MODULATION: Frequency translation, Recovery of base 7
band signal, Spectrum & power relations in AM systems. Methods of
generation & demodulation of AM-DSB, AM-DSB/SC and AM-SSB signals.
Modulation & detector circuits for AM systems. AM transmitters & receivers.
III FREQUENCY MODULATION: Phase & freq. modulation & their 7
relationship, Spectrum & band width of a sinusoidally modulated FM signal,
phasor diagram, Narrow band & wide band FM. Generation & demodulation
of FM signals. FM transmitters & receivers.. Comparison of AM, FM & PM.
Pre emphasis & deemphasis. Threshold in FM, PLL demodulator.
IV NOISE IN AM AND FM: Calculation of signal-to-noise ratio in SSB-SC, 7
DSB-SC, DSB with carrier, Noise calculation of square law demodulator &
envelope detector. Calculation of S/N ratio in FM demodulators, Super
heterodyne receivers.
V PULSE ANALOG MODULATION: Practical aspects of sampling: Natural 7
and flat top sampling. PAM, PWM, PPM modulation and demodulation
methods, PAM-TDM.

Recommended Books:
1. H.Taub & D.L. Schilling-"Principles of Communication Systems", Tata Mc-Graw Hill.
2. G.Kennedy-"Electronic Communication Systems:, John Wiely & Sons.
3. Simon Haykin-"communication Systems". John Wiely & Sons.
4. B.P. Lathi-"Communication Systems:, John Wiley.
5. Modern Digital Analog communication Systems.
6. Louch-Digital & analog Communication, Pearson Education.
7. Tomasi-Electronic Communication. Pearson Education.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10

TELECOMMUNICATION ENGINEERING [5EC5]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
[ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 TRANSMISSION LINE: Types of transmission lines, general transmission 7
line equation, line constant, equivalent circuits, infinite line, and reflection on
a line, SWR of line with different type of terminations. Distortion less and
dissipation less lines, Coaxial cables, Transmission lines at audio and radio
frequencies, Losses in transmission line,. Characteristics of quarter wave, half
wave and lines of other lengths,
II TRANSMISSION LINE APPLICATIONS: Smith chart and its application. 7
Transmission line applications, Impedance matching Network. Single &
double Stub matching. Measurement of parameters of transmission line,
measurement of attenuation, insertion loss, reflection coefficient and standing
wave ratio.
III ATTENUATORS & FILTERS: Elements of telephone transmission 7
networks, symmetrical and Asymmetrical two port networks. Different
Attenuators, ð-section & T-section attenuators, stub matching, Transmission
equalizers Filters, constant K-section, Ladder type, ð-section, T-section filter,
m-derived filter sections, Lattics filter section.
IV TELEPHONE TRANSMISSION: Telephone set, Touch tone dial types, 7
two wire/ four wire transmission, Echo suppressors & cancellors, cross talk.
Multi-channel systems: Frequency division & time division multiplexing.
V AUTOMATIC TELEPHONY & TELEGRAPHY: Trunking concepts, 7
Grade of service, Traffic definitions, Introduction to switching networks,
classification of switching systems. Principle of Electronic Exchange,
EPABX and SPC Digital telephone Exchange,Numberig Plan, Fascimile
services.

Recommended Books:

1. W. Fraser-Telecommunications (BPB Publication)

2. I. Vishvanathan- Telecommunication switching systems & Networks. Prentice Hall of India.
3. Cole- Introduction to Telecommunication. Pearson Educatino
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10

COMPUTER SYSTEM ARCHITECTURE [5EC6.1]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
[ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 REGISTER TRANSFER LANGUAGE: Data movement amount registers, 7
Data movement from/to memory, arithmetic and logic micro operations.
Concept of bus and timings in register transfer.
II CPU ORGANISATION: Addressing Modes, Instruction Format, CPU 7
organization with large registers, stacks and handling of interrupts &
subroutines Instruction pipelining. ARITHMATIC ALGORITHM: Array
multiplier, Booth's algorithm, Adition/Subtraction for sign Magnitude and 2's
complement numbers.
III MICROPROGRAMMED CONTROL UNIT: Basic Organization of 7
micro-programmed controller, Horizontal & Vertical formats, Address
sequencer.
IV MEMORY ORGANISATION: Concept of RAM/ROM, basic cell of RAM, 7
Associative memory, Cache memory organization, Vertical memory
organization.
V I/O ORGANISATION: Introduction to Peripherals & their interfacing 7
Strobe based and handshake-based communication, DMA based data transfer,
I/O processor.

Recommended Books:

1. Heuring-Computer System Design and Architecture, Pearson Education.

2. M. Morrismanno- 'Computer Architecture & Organization', Mc-Graw Hill.
3. J.P. Hayes- 'Computer Organization and Architecture. Pearson Education'.
4. Staling-Computer Organization and Architecture, Pearson Education.
5. Batee-Computer Architecture, Tata Mc-Graw Hill.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10

ADVANCED DATA STRUCTURES [5EC6.2]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
[ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 ADVANCED TREES - Definitions and operations on weight balanced trees 7
(Huffman trees), 2-3 trees and Red-Black trees. Augmenting Red-Black trees
to dynamic order statistics and interval tree applications. Operations on
disjoint sets and its Union-Find problem. Implementing sets, discitionerics,
priority queues and concatenable queues using 2-3 trees.
II MERGEABLE HEAPS - Mergeable Heap operations, binomial trees, 7
implementing binomial heaps and its operations. 2-3-4- trees and 2-3-4 heaps.
Structure and potential function of Fibonacci heap. Implementing Fibonacci
Heap.
III GRAPH THEORY DEFINITIONS - Definitions of Isomorphism, 7
Components, Circuits, Fundamental Circuits, Cut-sets, Cut-Vertices, Planer
and dual graphs, Spanning trees, Kuratovski’s two graphs.
IV GRAPH THEORETIC ALGORETHMS - Algorithms for connectedness, 7
finding all spanning trees in a weighted graph and planarity testing. Breadth
first and depth first search, topological sort, strongly connected components
and, articulation point.
V APPLICATION OF GRAPHS- Single source shortest path and all pair 7
shortest path algorithms. Min-Cut Max-Flow theorem of network flows, Ford-
Fulkerson Max Flow algorithms.

Recommended Books:

1. Narsingh Deo- Graph Theory with Applications to Engineering and Computer Sicience, Prentice
Hall of India.
2. Cormen- Introduction to Algorithms, Prentice Hall of India.
3. Aho A.V., Hopcrpft J.E. and Ullman J.D.-The Design and Analysis of Computer Algorithms,
Addition-Wesley.
4. Horwitz and Sawhni-fundamentals of Data Structures, Galgotia Book source.
5. Wilson-Introduction to Graph Theory, Pearson Education.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10

COMPUTER ORIENTED MATHEMATICAL METHODS

[5EC6.3]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
LECTURES:3 MAX. MARKS =100
[ MID-TERM (30) & END- TERM (70)]

Two questions will be set from each unit and students will be required to answer one question from each
unit

UNIT CONTENTS OF THE SUBJECT No. of

Hours
Required
1 MATRIX COMPUTATION: Algebra of matrix, Inverse of a matrix, Rank 7
of a matrix, Matrix inversion by Gauss elimination, Computer programs for
matrix inversion.
II SOLUTION OF LINEAR EQUATIONS: Cramer’s rule, Gauss 7
elimination, Gauss Jordan elimination and Gauss Seidal iterative method and
their implementation in C.
III SOLUTION OF NON-LINEAR EQUATIONS: Interval bisection method, 7
Secant method, Regula- Falsi method, Curve fitting, Method of least squares
and their implementation in C.
IV SOLUTION OF DIFFERENTIAL EQUATIONS: Euler’s method, 7
Modified Euler’s method, Runge Kutta method of fourth order, Solution of
partial differential equation with special reference to heat equation, Laplace
equation and wave equation Milne’s and their implementation in C.
V STATISTICAL METHODS: Curve fitting methods – method of least 7
squares, fitting a straight line, parabola. Correlation and Linear regression.

Recommended Books:

1. V.Rajaraman-Computer Oriented Numerical Methods, Prentice Hall of India.

2. B.S. Grewal-Higher Engineering Mathematics
3. J.L. Bansal-Numerical Analysis
4. Balasubramanyam-Numerical Methods.
5. E.V. Krishnamurthy-Numerical Methods.
6. Gaur and Kaul-Higher Engineering Mathematics.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10
VHDL PROGRAMMING LAB [5EC7]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
PRACTICALS :3 MAX. MARKS = 100
[INTERNAL (60) & EXTERNAL (40)]

S.
List of Experiments
No.
Design and write VHDL code for following:
1. Half adder, Full adder, Subtractor Flip Flops, 4bit comparator.
2. Parity generators
3. Bit up/down counter with load able count
4. Decoder and encoder
5. 8 bit shift register
6. 8:1 multiplexer
7. Test bench for a full adder
8. Barrel shifter
9. N by m binary multiplier
10. RISC CPU (3bit opcode, 5bit address)
TOOLS:
Xilinx Tools/ Synopsis Tools/ Cadence Tools/ Model SIM/ Leonardo Spectrum Tools/VIS/SIS Tools
to be used.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10

ELECTRONIC ENGINEERING DESIGN LAB [5EC7]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
PRACTICALS :3 MAX. MARKS = 100
[INTERNAL (60) & EXTERNAL (40)]

S.
List of Experiments
No.
To design the following circuits, assemble these on bread board and test them. Simulation of
these circuits with the help of appropriate software.
Op-Amp characteristics and get data for input bias current, measure the output-offset voltage and
1.
reduce it to zero and calculate slew rate.
2. Op-Amp in inverting and non-inverting modes.
3. Op-Amp as scalar, summer and voltage follower.
4. Op-Amp as differentiator and integrator.
5. Design LPF and HPF using Op-Amp 741
6. Design Band Pass and Band reject Active filters using Op-Amp 741.
7. Design Oscillators using Op-Amp (i) RC phase shift (ii) Hartley (iii) Colpitts
8. Design (i) Astable (ii) Monostable multivibrators using IC-555 timer
9. Design Triangular & square wave generator using 555 timer.
10. Design Amplifier (for given gain) using Bipolar Junction Transistor.
 GYAN VIHAR SCHOOL OF ENGINEERING AND TECHNOLOGY
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
DETAILED SYLLABUS
2009-10
COMMUNICATION LAB [5EC9]

CLASS V Sem B. Tech (ECE) and M. Tech EVALUATION

(Dual) (ECE)
SCHEDULE PER WEEK EXAMINATION TIME = THREE (3) HOURS
PRACTICALS :3 MAX. MARKS = 100
[INTERNAL (60) & EXTERNAL (40)]

S.
List of Experiments
No.
1. Harmonic analysis of a square wave of a modulated wave form.
Observe the Amplitude modulated wave form & measure modulation index. Demodulation of AM
2.
signal.
3. Generation & Demodulation of DSB – SC signal.
Modulate a sinusoidal signal with high frequency carrier to obtain FM signal. Demodulation of the
4.
FM signal.
To observe the following in a transmission line demonstrator kit:
(a) The propagation of pulse in non reflecting transmission line.
5. (b) The effect of losses in transmission line.
(c) Transmission with standing waves on a Transmission line.
(d) The resonance characteristics of a half-wave length long X-mission line.
(a) To observe the operation of sampling and sample & hold circuits.
6. (b) To study the effect of sampling time (sampling pulse width).
(c) To study the effects of changing the sampling frequency & observing aliasing phenomena.
7. To study & observe the operation of a super heterodyne receiver.
8. To study & observe the amplitude response of automatic gain controller (AGC ).
9. PAM, PWM & PPM: Modulation
10. PAM, PWM & PPM: Demodulation.