Module I

The Microprocessor is the CPU of a computer. It is a device or a group of devices

that can communicate with peripherals, provide timing and control signals, direct data
flow and perform computing tasks as specified by the instructions in the memory.

History

• Abacus 500 B.C.

• First generation
• PMOS Technology
• Low cost and slow
• Not TTL compatible
• Intel 4004, Intel 4040, Fairchild PPS 25, National IMP-4, Rockwell PPP-4
• Intel 8008, National IMP-8, Rockwell PPP-8
• National IMP-16
• Second generation
• NMOS Technology so faster
• TTL compatible
• More powerful instruction set.
• Better interrupt handling.
• Intel 8080, Intel 8085, Fairchild F-8, Motorola M6800, National CMP-8
• Intersil 6100 – 12 bit
• TI TMS 9900 -16 bit
• Third generation
• HMOS Technology so faster
• Easier to program
• Physical memory of 1 – 16 Mb.
• Flexible I/O port addressing.
• Intel 8086, Intel 8088, Motorola M68000, Motorola M68010,
National CMP-8
• Fourth generation
• Intel 80386, Intel 80486, Motorola M68020, Motorola M68030.

Advantages of µp based systems

• Computation speeds are high.

• Flexibility by changing the s/w.
• Less components, compact in size, reliable and low cost.
• Easy operation and maintenance.
• Brings intelligent systems.

Disadvantages of µp based systems

• Limitations in data size.

• Analog signals need to be digitized.
• Applications are limited by the physical address.
• Do not support floating point operations.

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 Intel 8085

Intel 8085 is an 8 bit, NMOS microprocessor. The ALU can work with 8 bits and
it has a 16-bit address. It is a 40 pin IC with a single +5V DC supply and a 3MHz clock.
Its clock cycle is of 320ns. It has three main sections
(1) Arithmetic and Logic Unit (ALU)
(2) Timing and Control Unit
(3) Registers

Pin Configuration of 8085

The pins of 8085 can be classified into 6 major sections. (Attach figure)

(1) Address Bus (output) A8-A15.

Pin numbers 21 to 28 are called the higher order address bus. They carry the
MSB’s of the 16-bit address. They are unidirectional.

(2) Multiplexed Address Data Bus (input/output) AD0-AD7.

Pin numbers 12 to 19 are called the Multiplexed Address Data Bus. They carry
the LSB’s of the 16-bit address during the first clock cycle of a machine cycle and
data during the second and third clock cycles. They are bidirectional.

(3) Control and Status Signals.

They are pin numbers 29 S0, 30 ALE, 31 WR , 32 RD , 33 S1, 34 IO/ M . They
include two control signals ( WR and RD ) and three status signals (S0, S1 and
IO/ M ) and one special signal ALE (Address Latch Enable). The operation of
each pin is as follows.
 ALE: It is a positive going pulse indicating the beginning of an operation. It
indicates that bits on AD0-AD7 are address bits. It is used to latch the lower
order address from the multiplexed bus and generate separate set of eight
address lines.
 RD (output)- Read: This is an active low signal. It indicates that the memory
or I/O device has to be read and data is available on the data bus.
 WR (output)- Write: This is an active low signal. It indicates that the data
available on the data bus has to be written to the memory or I/O device.
 IO/ M (output)- It is used to differentiate between a memory and I/O operation.
When it is high it indicates an I/O operation and when low it indicates a
memory operation.
 S1 and S0(output) – They are used as below.

S1 S0 Operation
0 0 HALT
0 1 WRITE
1 0 READ
1 1 FETCH

(4) Power Supply and Frequency Signals (input).

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 The power and frequency signals are pin numbers 1 & 2 clock, 40 VCC, 37 clock
out and 20 VSS.
 Clock: A crystal clock is connected to the pins.
 VCC: +5V DC supply.
 VSS: Ground Reference.
 CLK OUT (output): This is used as the system clock for other devices.

(5) Externally Initiated Signals.

8085 has five interrupt signals TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR. It
has two external signal acknowledgements HLDA and INTA . In addition to these
three pins RESET, READY and HOLD accept the externally initiated signals.
 TRAP (input): Interrupt Request. It is a general purpose interrupt.
 RST 7.5, RST 6.5, RST 5.5 (inputs): Restart Interrupts. When they are
recognized the next instructions are executed from fixed memory locations.
 INTR (input): Interrupt Request. It is a general purpose interrupt.
 INTA (output): Interrupt Acknowledge.
 HOLD (input): This indicates that a peripheral controller is requesting the use of
address and data bus.
 HLDA (output): Acknowledgement to the hold request.
 READY (input): It is used to delay the read and write operations when
communicating with slow peripherals.
 RESET IN : When this pin goes low the Program Counter is set to zero and
the microprocessor restarts.
 RESET OUT: It indicates that the microprocessor is being reset. It is used to
reset other devices
The interrupts have their priorities as follows TRAP, RST 7.5, RST 6.5, RST 5.5
and INTR.

(6) Serial I/O Ports.

They consist of 2 pins SID and SOD.
 SID (input): It is the data line for serial input.
 SOD (output): It is the data line for serial output.

Architecture of 8085 (Fig. to be attached)

The 8085 has three main sections

(1) Arithmetic and Logic Unit (ALU)

The ALU performs the computing functions and the logical operations such as
addition, subtraction, complement, increment, decrement, shift left, rotate right
and let, clear logical AND and OR.

(2) Timing and Control Unit

This section provides the status, timing and control signals necessary for the
execution of instructions and the operation of the memory and I/O devices. It
controls the µP and all peripherals connected to it. It is referred to as the control
unit of the processor.

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(3) Registers
Registers are used for temporary storage and manipulation of data and
instructions. 8085 has the following registers.
I. Accumulator or register A
This is the most important of all registers and it is associated with the ALU.
It is an 8-bit register and it holds one of the operands of an operation. The
other operands may be in the general purpose register or in the memory. The
result of an operation is stored in the accumulator except for some
instructions (e.g. DAD instruction). Some logical instructions work with one
operand only. Then the result is held in the accumulator.

II. Registers B, C, D, E, H and L.

They are also called the general purpose registers. They can store 8 bits. The
combination of 2, eight bit registers can be used to hold 16-bit data and are
called register pairs (e.g. B-C pair, D-E pair and H-L pair. Only these
combinations are permitted). The general purpose registers are
programmable i.e. they can be used by the programmer.

III. Stack Pointer (SP) – 16-bit

The stack is a sequence of memory locations set aside by the programmer to
store/retrieve contents of the registers, PC or flags during a program
execution. Sometimes it becomes necessary to save the contents of the
registers, needed for some other operations in the subsequent steps. These
data are stored in the stack. The contents of the stack will be brought back to
the registers when the registers become free. Since it works on LIFO it is
faster. The SP controls the stack addressing. It holds the address of the top
element of the data stored in the stack. The stack is defined and the SP is
initialized by the programmer.

IV. Program Counter – 16-bit

It holds the memory address of the next instruction to be executed. The
microprocessor increments the contents of the PC after the execution of each
instruction.

V. Instruction register
It holds the opcode of the instruction which is being decoded and executed.

VI. Temporary register.

It is an 8-bit register used by the ALU to store data during an operation. It
cannot be programmed by the user.

VII. Flags
8085 has 5 flip-flops which serve as status flags and they are set or reset
depending upon the conditions arising during an arithmetic or logic
operation. The flags of 8085 are
a) Carry Flag: After the execution of an arithmetic instruction if a
carry is produced then the carry flag is set to 1. It occurs during

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 addition and subtraction. It holds the MSB resulting from the
execution of an operation.
b) Parity Flag: If the result of an operation has even number of ones
the parity flag is set to one.
c) Auxiliary Carry Flag: It holds the carry from the third bit to the
fourth bit. It is normally used in BCD operations.
d) Zero Flag: If the result of an operation is zero, the zero flag is set
to one.
e) Sign Flag: It is set to one if the result of an arithmetic operation
of signed numbers results in a negative number.

Program Status Word (PSW)

7 6 5 4 3 2 1 0
S Z X AC X P X CS

Figure shows that the five bits indicate the flags of 8085 and three bits are
undefined. The combinations of these three bits are called the PSW. PSW and
accumulator are treated as 16 bit registers for stack operation.