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12, DECEMBER 2010


Energy Storage and Management System With Carbon Nanotube Supercapacitor and Multidirectional Power Delivery Capability for Autonomous Wireless Sensor Nodes
Hai Chen, Member, IEEE, Bingqing Wei, and Dongsheng Ma, Senior Member, IEEE
AbstractThis paper presents an energy storage and management system to achieve long lifetime and miniaturization for autonomous wireless sensor nodes, which can be used in communication network for microgrids. The system employs supercapacitors to form a multienergy-source structure, and thus features multidirectional power delivery capability, which in turn allows the implementation of such state-of-the-art power management techniques as dynamic voltage scaling (DVS). A global energy management strategy is introduced to realize appropriate energy delivery, with the aid of a power management unit consisting of several proposed power converters that are capable of bidirectional operation. The bidirectional operation also dramatically increases the tracking speed during DVS with a charge-recycle technique. Fabrication of supercapacitor featuring compatibility with the CMOS process is also discussed, focusing on the preparation of free-standing single-walled carbon nanotube (CNT) lms directly on a Si substrate, as electrodes for supercapacitor. A prototype of a dcdc converter experimentally veries the bidirectional operation and an improvement of over 30 times on tracking speed during DVS. Meanwhile, experiments on a CNT supercapacitor coin cell show high performances and excellent stability. The proposed designs provide the possibility of a fully on-chip energy system with the concept of heterogeneous integration. Index TermsBidirectional operation, carbon nanotube (CNT), dynamic voltage scaling (DVS), energy storage, heterogeneous integration, microgrid, supercapacitor, wireless sensor node (WSN).

Fig. 1.

System architecture of a state-of-the-art WSN.


ICROGRID has been extensively investigated as a promising solution to energy challenges in 21st century. A microgrid consists of interconnected loads and distributed energy resources, and functions as an integrated energy system that

Manuscript received June 30, 2010; revised September 6, 2010; accepted September 12, 2010. Date of current version December 27, 2010. This work was supported in part by the US National Science Foundation (NSF) under Contracts CMMI-0925678 and CMMI-0926093 and in part by the Semiconductor Research Corporation (SRC) under Contract 2009-RJ-2020G. Recommended for publication by Associate Editor J. M. Guerrero. H. Chen and D. Ma are with Integrated System Design Laboratory (ISDL), Texas Analog Center of Excellence (TxACE), The University of Texas at Dallas, Richardson, TX 75080 USA (e-mail:; B. Q. Wei is with the Department of Mechanical Engineering, University of Delaware, Newark, DE 19716 USA (e-mail: Color versions of one or more of the gures in this paper are available online at Digital Object Identier 10.1109/TPEL.2010.2081380

can operate in parallel with electricity grids or in an intentional island mode. Accordingly, technologies such as distributed energy generation [1][3], distributed energy storage [4], [5], interconnection switches [6], [7], and control systems [8][10] are essential for proper operation of microgrids. In the meantime, communications among microgrids and between microgrids and the main grid have become extremely crucial to high power quality and reliability of the network, which can be utilized for optimal power ow [11] and fault detection [12]. Unfortunately, the physical distance between microgrids makes the intercommunication impractical. Moreover, the communication network should work independently from microgrids to ensure its operation. To overcome the aforementioned problems, autonomous wireless sensor nodes (WSNs) can be employed to microgrids, with their self-sustained wireless communication. Nowadays, WSNs have been used in many areas, ranging from military target tracking to industrial monitoring to home environmental control. With the proliferation of WSNs, the development of maintenance-free and miniaturized systems is highly desired [13]. To fulll this requirement, a large body of research has been carried out at all design levels, leading to revolutionary changes on system architecture, control methodology, circuit implementation, and device fabrication. Fig. 1 shows the system architecture of a state-of-the-art WSN [14], [15]. The energy and data ows are represented by solid and dotted lines, respectively. The system includes four basic modules: sensor, data and control, communication,

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and energy modules. The former three are functional modules, which realize all necessary functions required by a WSN, e.g., data acquisition, processing, and communication. The energy module, consisting of energy harvester, energy storage, and power management unit (PMU), supports the operation of functional modules with appropriate energy and power delivery. With energy harvesting technology [16], the harvester scavenges energy from the environment (e.g., vibration, thermal gradient, photovoltaic solar cell, and RF power), and replenishes energy storage, while PMU draws energy out and delivers it to functional modules. With its uniqueness and important role in the system, an optimal design of the energy module is apparently crucial to the popularization of WSNs. This paper focuses on the design of an energy storage and management system, i.e., energy storage and PMU, which is exible and reliable with long lifetime and small form-factor. Flexibility and reliability are valued in a WSN system, where several functional modules are required for various functions, as in Fig. 1. In order to minimize the overall power dissipation, multiple voltage domains are introduced, which allow functional modules to operate at different voltage levels. Moreover, the voltage of each functional module may be xed or may change dynamically based on workload monitoring [17]. This kind of power management technique is usually achieved by software hardware codesign [18], in which the data and control module performs the software-based processing and the PMU executes the commands and realizes the voltage assignment. Therefore, it is desired to have a exible and reliable PMU design capable of appropriate energy and power delivery for multiple functional modules with different voltage requirements. On the other hand, long lifetime and small form-factor have become a shared concern in the design of energy storage. Most systems now use batteries for energy storage, which usually occupy a large proportion of system volume. Worse still, batteries suffer from limited lifetime and are, therefore, unsuitable for environments where battery replacement is impractical or impossible. Hence, to achieve long lifetime and small form-factor of WSN, a better way of energy storage should be developed. To achieve an energy storage and management system that meets the aforementioned requirements, this paper proposes a solution with supercapacitors and multidirectional power delivery capability. In the proposed system, supercapacitors are employed as energy storages due to its longer lifetime over batteries. A supercapacitor offers over half a million charge cycles and boasts a 10-year operational lifetime before the energy capacity is reduced to 80% [19]. Meanwhile, a supercapacitor provides higher energy density than an electrolytic capacitor and a ceramic capacitor, due to its large surface area of electrodes [20]. Hence, the proposed system makes use of supercapacitors for not only energy storage, but also energy sources to directly power up functional modules. A global energy management strategy with multidirectional power delivery capability is developed for efcient energy and power delivery among energy storage and energy sources. Furthermore, a hardware-based executing platform, on the basis of a bidirectional dcdc converter, is proposed as PMU to realize the global energy management strategy. Circuit implementation is carried out on the bidirectional dcdc

Fig. 2.

Architecture of the proposed energy storage and management system.

converter, and a printed-circuit-board (PCB) prototype has been developed for the functionality and performance verication. This paper also discusses the fabrication of supercapacitors to enable CMOS compatible design of energy storage. Electrochemical performance of the supercapacitor based on a carbon nanotube (CNT) is investigated, since it offers exceptional power and energy performances due to its high surface area, high conductivity, and the ability to optimize capacitor properties. This paper demonstrates viability to prepare lms of single-walled CNTs (SWNTs) by employing a simple oating chemical vapor deposition method, and to utilize the SWNT lms as electrodes for supercapacitors. The experimental results not only show CNT supercapacitors with a better performance (e.g., high-energy density and excellent stability), but also indicate potential compatibility with the CMOS process since the fabrication of SWNT lms can be directly performed on a Si substrate. These efforts will enable the fabrication of a CNT supercapacitor together with CMOS devices on a common substrate, with the concept of heterogeneous integration, nally leading to the possibility of fully on-chip energy storage and management system design in the future. The rest of this paper is organized as follows. Section II presents the system architecture of the proposed energy storage and management system, and global energy management strategy is introduced. The circuit design of a hardware-based executing platform, PMU, based on the bidirectional dcdc converter, is described in Section III. Section IV discusses the development of the CNT-based supercapacitor with CMOS process compatibility, and the concept of heterogeneous integration of CNT supercapacitors on the CMOS process is illustrated in Section V. Experimental results presented in Section VI demonstrate the functionality of bidirectional dcdc converters for PMU and performance of the CNT supercapacitor based on SWNT lms. Finally, the paper is concluded in Section VII. II. PROPOSED ENERGY STORAGE AND MANAGEMENT SYSTEM A. System Architecture Fig. 2 shows the proposed energy storage and management system, with supercapacitors as energy storage and energy



Fig. 3. Illustration of the energy management strategy in the proposed energy storage and management system at different operation modes. (a) Module in active mode with uniform workload. (b) Module in active mode with nonuniform workload. (c) Module in standby with no power demand. (d) One module in active mode with high power demand while others in standby.

sources, and a PMU for energy delivery among supercapacitors. The energy storage and sources consist of a main storage SC0 and four point-of-load (POL) sources, SC1SC4. SC0 stores the energy scavenged by the harvester and also the energy from POL sources as will be described later. POL sources, located close to the functional modules, provide power directly to sensor, microprocessor, memory, transceiver, and so on. This arrangement reduces the impedance between each energy source and its load, and thus lowers the noise injection on the power-supply rails. The PMU is a hardware-based executing platform for power management, mainly composed of power converters, i.e., dcdc converters, and it is responsible for energy delivery among SC0 and POL sources. It should be noted that in Fig. 2, four POL sources are shown just for the purpose of illustration. With the same conguration, the number of POL sources and corresponding power converters can change according to a specic application. The proposed energy storage and management system features a multienergy-source structure (namely, SC0SC4 are all energy sources for the WSN), which provides the system with exibility to assign appropriate voltages to different functional modules. Moreover, such a structure makes it possible to achieve global power management to reduce overall energy consumption, through the software and hardware codesign. In the coming subsection, a global energy management strategy will be introduced, together with the operation of PMU showing how energy is delivered among energy storage and sources. B. Energy Management Strategy Before introducing the energy management strategy, a brief review of related power management techniques in WSN is helpful to obtain the basic ideas. A WSN system has several

functional modules and different operation modes. For instance, its activity may involve sampling a sensor, processing the sensed signal, transmitting the sensed value, and receiving an acknowledgement. In different operation modes, the system needs only certain functional modules to work, such as a communication module during transmitting the sensed value. In order to optimize energy consumption, modules are activated, shut down or put into standby depending on their instantaneous workload [21], [22]. Meanwhile, a module may experience nonuniform workloads during active mode, for example, a microprocessor has different computation loads and a transceiver has to transmit signals with different distances. A compromise between performance and energy consumption is usually employed during such a situation, which is widely implemented by the dynamic voltage scaling (DVS) technique [17], [23]. It rst predicts the uctuations of workload, and then performs the assignment of appropriate supply voltage levels and/or corresponding clock frequencies to functional modules, through the hardware-based executing platform. Besides reducing active power dissipation, the DVS technique can also be used to effectively reduce leakage power. Entering the era of deep submicrometer design, leakage power loss becomes increasingly signicant with subthreshold leakage current and reverse-biased diode junction leakage current. When the circuit is in standby mode, leakage turns out to be the main power loss. DVS, also called standby voltage scaling in this situation, lowers the supply voltage of the circuit to reduce leakage power [24]. The aforementioned review demonstrates that a WSN system may experience different operation modes, and a functional module may operate in active, shutdown or standby modes with xed or different supply voltage levels and power consumption. Accordingly, a global energy management strategy is introduced in the proposed energy storage and management



system, to effectively distribute energy among different energy storage and sources and achieve an energy-efcient system. The strategy can be described with four specic cases. In Case A [Fig. 3(a)], functional module operates in active mode with a certain workload, and the supply voltage is required to stay constant. The corresponding power converter transfers energy from the main storage SC0 to POL SC1, maintaining a proper voltage level. In Case B [Fig. 3(b)], functional module operates in active mode with nonuniform workloads, and the DVS technique is applied to assign different supply voltage levels. Conventionally, the power converter remains in unidirectional operation during DVS, which limits the tracking speed (detailed analysis will be provided in the next section). Contrarily, the proposed strategy utilizes a bidirectional operation of power converter to transfer energy back and forth between SC0 and POL SC1, enabling a fast DVS operation. In Case C [Fig. 3(c)], functional module transits from active mode to standby mode, and standby voltage scaling technique is involved to reduce leakage power loss. The power converter is congured to transfer energy back from POL SC1 to SC0, until the preset standby voltage level is reached. In Case D [Fig. 3(d)], one function module operates in active mode with excessive power demand while other modules are in shutdown or standby. When the energy stored in SC0 is not sufcient to replenish POL SC1 for a high-power-demand functional module, such as transceiver, energy in other POL sources with modules in shutdown or standby is delivered as backup, guaranteeing a reliable operation. III. CIRCUIT IMPLEMENTATION OF PMU Together with software-based power management algorithms, the global energy management strategy is capable of multidirectional power delivery to effectively assign variable voltages to functional modules. While it is desirable in achieving fast transient response to a highly dynamic environment, the multidirectional power delivery technique still requires a hardware-based executing platform, where the power converters play important roles. The multidirectional power delivery requires the power converters to operate bidirectionally, enabling diverse energy transfers under different operation scenarios. A bidirectional dcdc converter is thus proposed in this section for the implementation of PMU. A. Topology Fig. 4 shows the topology employed by the proposed bidirectional dcdc converter, which is actually noninverting Buck Boost topology [25]. It is well suited in the application with wide input and output voltage range [26], which is the case of an energy-efcient WSN system with energy harvesting. In such a WSN system, the voltage across SC0 varies with the status of energy harvesting and power dissipation of functional modules. Meanwhile, the voltages across POL sources require different values in different operation modes. Therefore, from the perspective of diversity in inputoutput voltage, noninvert-

Fig. 4. Proposed bidirectional dcdc converter for multidirectional power delivery.

ing BuckBoost provides the system with exibility to operate in different operation modes. It is observable in Fig. 4 that the converter is organized in such a symmetrical way that input and output nodes can be exchanged; in other words, both sides can be treated as input or output. As a result, bidirectional operation can be obtained inherently by simply controlling SW1SW4 in proper phases, which will be elaborated in the next section. B. Control Methods for Bidirectional Operation Fig. 5 shows the current ows through the inductor when the converter operates in either direction. During forward direction from SC0 to SC1, the inductor current IL ows from LX1 to LX2 node (which is designated as a positive value), transferring energy from SC0 to SC1. On the contrary, IL ows from LX2 to LX1 node with a negative value to transfer energy from SC1 to SC0 in backward direction. Except for the different directions of current ow, the converter operates in the same manner in either direction, alternating the switching actions between SW1 and SW3 pair and SW2 and SW4 pair. To control the direction of operation, current-mode hysteretic control is proposed to achieve proper switching actions based on the direction of current ow. In order to enable current-mode hysteretic control, inductor current information should be obtained. A current sensing resistor in series with inductor can meet this requirement, as in [27]. However, it introduces design complexity to implement high-side current sensing and overcome a wide input common mode voltage range (since the switching nodes LX1 and LX2 have a rail-to-rail voltage variation). Furthermore, the different directions of current ow in bidirectional converter causes an even more complicated circuit design. As a result, a lowcost, low-side current sensing circuit capable of bidirectional current monitoring is proposed. Fig. 6 illustrates the proposed low-side current sensing circuit together with corresponding waveforms. Connected between the common-source node of low-side switches SW2 and SW3 and ground node, the current sensing resistor RSNS successfully represents the inductor current regardless of operation direction. Using ISNS information, control circuits can be congured to realize bidirectional operation with current-mode hysteretic control. The proposed control circuit shown in Fig. 7(a) receives a system command of operation direction and generates gate control signals for the switches based on the sensed inductor current. Fig. 7(b) and (c) shows the operation waveforms when MODE



Fig. 5. Current ows when converter operates in either direction: (a) forward direction from SC0 to SC1 and (b) backward direction from SC1 to SC0, and corresponding waveforms: (c) forward direction and (d) backward direction.

Fig. 6. Proposed low-side current sensing circuit: (a) forward direction from SC0 to SC1 and (b) backward direction from SC1 to SC0, and corresponding waveforms: (c) forward direction and (d) backward direction.



Fig. 7. Proposed control circuits for bidirectional operation with current-mode hysteretic control. (a) Circuit implementation. (b) Waveforms when MODE = 0. (c) Waveforms when MODE = 1.

equals to 0 and 1, respectively. Control signal MODE comes from the microprocessor that processes a software-based algorithm, carrying the command of operation direction, with 0 for forward direction from SC0 to SC1 and 1 for backward direction from SC1 to SC0. To facilitate analysis of the converter, operation with MODE equal to 0 is taken as an example in the following. At the beginning of a switching cycle, t0 , SW1 and SW3 are turned on, and IL starts to ramp up, and so does VSNS , voltage across the sensing resistor RSNS . When VSNS reaches a reference voltage dening peak inductor current, VPK , the peak comparator triggers and sets the RS latch. Since MODE is 0, Q of the RS latch is transmitted through the multiplexer according to the

truth table. Meanwhile, both Q and Q are delayed by a certain time before they are fed to the enable pins of the peak and valley comparators, respectively. This delay time is responsible for immunity of the circuits to the current spikes during switching actions. The output of the multiplexer determines the switching actions of the switches and the nonoverlapping gate control logic provides gate signals for the switches with dead time to minimize shoot-through power loss during transition [28]. At t1 , the output of the multiplexer is high, so M1 and M3 are turned off while M2 and M4 are turned on, resulting in ramping down of IL . Because of the reverse current ow through RSNS during this time interval, VSNS carries a negative value. Resistors R1 and R2 form an analog adder for VVY (a reference voltage



Fig. 9. Fig. 8. Current waveform in the POL source.

Waveforms of voltage-mode hysteretic control with burst mode.

dening valley inductor current) and VSNS , and the result, VSUM , is compared with zero voltage. With IL ramping down, VSUM approaches zero voltage and nally the valley comparator triggers at t2 . Then the RS latch is reset and M2 and M4 are turned off while M1 and M3 are turned on, beginning a new switching cycle. The peak and valley inductor currents, IPK and IVY , are determined by the following equations: IPK RSNS = VPK IVY RSNS + VVY = 0, (1) (2)

OFF period in which the POL source is discharged by the loading current. The converter begins Burst ON period when VO reaches VL , pumping current into the POL source to replenish energy. Ignoring various propagation delays in the circuits, VO can be obtained as VO = VH + VL . 2 (4)

Voltage-mode hysteretic control can be realized by introducing a hysteretic comparator to the output voltage VO and a control signal can be generated to enable/disable the nonoverlapping gate control logic and thus the converter. C. Charge Recycling for Fast Tracking During DVS Operation During DVS operation, a reference voltage that denes output voltage level is increased or decreased, depending on the operation mode of the functional module. From the system perspective, it is always expected and assumed that the output voltage of a dcdc converter can achieve instantaneous tracking of the reference voltage. However, there are always limitations in hardware design to realize this ideal system. Considering the existence of nonzero transition time, different options have been suggested during such voltage transition. The functional module may continue operating at the real-time voltages, or stop execution during the voltage transition until the steady state is reached at the new voltage level [23]. Both methods consume more energy than in the ideal system, according to the experimental results in [23]. So it is highly desired to have a converter design with as fast tracking speed as possible for DVS operation, in order to reduce energy consumption. Converter design with DVS compatibility has been widely discussed in the literature. Improvements on the tracking speed for DVS operation are proposed in [29][32]. Control methods that achieve fast response of the feedback system have made it possible to reach the theoretic limitation posed by physical dimensions (e.g., inductor value and capacitance of the POL source) in the converter. In [32], an extra path is introduced to allow larger charging current to accelerate the transient when the reference voltage steps up, achieving an up-tracking speed beyond the limitation. However, the down-tracking speed is still limited through discharging the POL source by only the loading current, which is usually small since a light workload is requesting the down-tracking. The down-tracking time can be expressed as tdw = VO CC , IO (5)

in obtaining that R1 is assumed to be equal to R2. As a result, IPK and IVY are equal to VPK /RSNS and VVY /RSNS , respectively. The operation of the converter when MODE equals 1 is almost the same as that described above, except that the mul tiplexer transmits Q instead of Q, resulting in the opposite switching actions of the switches, and thus operation in reverse direction is achieved. From the above analysis, bidirectional operation with current-mode hysteretic control has been realized by the proposed current sensing circuit and control circuits. However, the regulation of output voltage, which is the main specication of a dcdc converter, has not been achieved yet. To circumvent this problem, voltage-mode hysteretic control with burst mode is adopted. With IL regulated between IPK and IVY , the current waveform in the POL source, IC , can be obtained in Fig. 8. The charge stored in the POL source within one switching cycle, QC , can be calculated through the integration of IC

QC =

IC dt = TS

(IPK + IVY ) (1 D) IO , (3) 2

where D is the duty ratio, IO is the loading current, and Ts is the switching cycle. If IPK and IVY are arranged in such a way that QC > 0 is always guaranteed for any IO , voltage across the POL source will have an increase of QC /CC , where CC is the capacitance of the POL source. The voltage increase will accumulate as long as there is switching action with currentmode hysteretic control. Voltage-mode hysteretic control with burst mode is then proposed based on this phenomenon to regulate the output voltage. The operation waveforms are shown in Fig. 9. In voltage-mode hysteretic control, a hysteretic window of VL VH is set for output voltage VO regulation. When VO increases from VL to VH due to current-mode hysteretic control, all switching actions are stopped and the converter enters Burst



Fig. 10.

Waveforms of DVS operation with bidirectional operation.

where VO is the difference between two DVS voltage levels. As an example, with VO , CC , and IO of 1 V, 10 F and 1 mA, respectively, a tdw of 10 ms is required for the transient, which is quite a long time. Due to the capability of bidirectional operation, the proposed converter can be used to improve down-tracking speed. The operation is illustrated in Fig. 10, where output ripple on VO during steady state is ignored. During up-tracking, the converter operates in current-mode hysteretic control with IL regulated between IPK and IVY , charging up the POL source with maximum current. While in down-tracking, instead of shutting down the converter, it operates in backward direction to discharge the POL source and recycle charge to the main storage SC0, also with current-mode hysteretic control. The operation for down-tracking with bidirectional operation is thus called the charge-recycle technique. With this technique, not only the POL source can be quickly discharged to speed up down-tracking, but also the energy discharged is restored in the main storage, both of which benet the energy-efcient design of the system. The extra discharging current of the POL source extracted by the converter can be described as follows: IEX = (IPK + IVY ) D . 2 (6)

The down-tracking time can now be improved as tdw = VO CC . IO + IEX (7)

D. System Architecture of the Bidirectional DCDC Converter The system architecture of the proposed bidirectional dcdc converter can be obtained based on the aforementioned techniques, as shown in Fig. 11. The control circuits are made up of three blocks: current-mode hysteretic control block, voltagemode hysteretic control block, and DVS block. The noninverting input of DVS comparator is set to VO S (say 50 mV) above VR E F , in order not to conict with the operation of voltagemode hysteretic control. IV. DEVELOPMENT OF CARBON NANOTUBE SUPERCAPACITORS As aforementioned, in the proposed energy storage and management system, supercapacitors are used as energy storage

and energy sources. Despite the abundant choices of commercial products, this research aims at new fabrication strategy to develop a supercapacitor that is compatible with the CMOS process, which commercial products are incapable of. Such an effort is essential to realizing a fully on-chip energy module design for a further miniaturized WSN. Development of the supercapacitor based on a CNT is a promising direction for the motivation of CMOS compatible design. In recent years, there has been a growing interest in lmlike CNT macrostructures because of their unique and usually enhanced properties and tremendous potential as components for use in nanoelectronic and nanomechanical device applications or as structural elements in various devices [33], [34]. CNT offers the advantages of uniform dimension, large specic surface area, high conductivity, and smooth surface topology, plus the ability to optimize capacitor properties. Consequently, the CNT supercapacitor can offer exceptional power and energy performances. Most importantly, the lm-like CNT structures provide opportunities for the fabrication of CNT supercapacitors with CMOS process compatibility. A method to fabricate SWNT macrolms as electrodes of supercapacitors is introduced in the following, and experimental results covered in Section VI B of this paper intent to demonstrate initial success of our efforts. The SWNT macrolms are grown by a simple oating chemical vapor deposition method, using ferrocene as carbon feedstock/catalyst and sulfur as an additive to promote SWNT growth to a high percentage. There is no additional carbon source (e.g., xylene, hexane, and methane) required for the synthesis. (More details can be found in [35].) The deposited lms could be peeled off from substrates (can be Si, Cu, and many other metals) and are puried by rst heating in air up to 450 C for one hour to remove amorphous carbon and then treated in 9 M HCl solution for half an hour to remove the iron catalyst particles. After the acid treatment, the lm is thoroughly washed with deionized water. The purication process does not involve any ltration technique, and the SWNTs are handled as an entire lm through the entire purication process. The lm is then transferred directly from the beaker onto a wire mesh (loop). After drying the lm, electrodes of any desired shape can be punched. The thickness as well as the weight of the electrodes can be controlled by varying the number of layers of the SWNT lms deposited on the wire mesh. The photographs of the punched electrodes and the wire mesh after the electrodes were punched can be seen in Fig. 12(a), while Fig. 12(b) shows the microstructures of the SWNT macrolms, indicating a uniform and entangled feature. There are several advantages of utilizing the free-standing SWNT lm synthesized from our method as supercapacitor electrodes. The rst and foremost is that the SWNT can be handled as an entire lm during the whole process of the synthesis, purication, and electrode preparation, which is extremely simple compared to the ltration technique [36]. The process can be easily expanded to acquire SWNT lm electrodes with uniform thickness and on a large scale. The complex mixing and coating procedure [37] involved with the powder samples is not required. The SWNT lm itself acts as a good conductor, thus eliminating the usage of the current collectors.



Fig. 11.

Proposed system architecture of the bidirectional dcdc converter.

Fig. 13. Illustration of heterogeneous integration of the CNT supercapacitor on the CMOS process.

Fig. 12. Assembly of the CNT supercapacitor with the free-standing SWNT electrode. (a) Electrodes punched from the free-standing SWNT lm and SWNT lm on the wire loop after punching the electrodes. (b) Microstructures of the SWNT macrolms with a hydrophilic surface. (c) Schematic of the supercapacitor coin cell without any current collector. (d) Photographs of the supercapacitor coin cell.

V. HETEROGENEOUS INTEGRATION OF ENERGY STORAGE AND PMU As previously discussed, the CNT supercapacitor using SWNT lms can be constructed to take advantage of their

unique properties, and also the proposed fabrication method has shown that such a device can be realized on a Si substrate where CMOS devices are fabricated. It is possible that, a heterogeneous platform (as is shown in Fig. 13) including CNT supercapacitors and CMOS devices will be realized to achieve a miniaturized system with increasing functionalities [38]. For example, besides acting as the energy sources, the heterogeneously integrated supercapacitors can also be used to meet the requirements on large capacitor design for signal processing, sample and hold, frequency compensation, noise decoupling, tuned resonator, memory design, and so on, enabling fully onchip capacitive devices for system-on-chip (SoC) design. For the heterogeneous integration, the CNT supercapacitors will be




attached to the top of the CMOS chip with interconnection between them, using one extra post-CMOS process. Therefore, it will provide a new low-cost manufacturing method for highly functional and compact systems. VI. EXPERIMENTAL RESULTS To verify the proposed PMU design and CNT supercapacitor fabrication, experiments have been carried out to evaluate the functionality and performance. Results are then presented for both bidirectional dcdc converter design and CNT supercapacitor. A. Experimental Results of the Bidirectional DCDC Converter A PCB prototype based on the proposed system architecture in Fig. 11 has been designed to demonstrate the functionality. The main parameters used in the experiments are listed in Table I. Note that NDP6020P and IPS135N03L are selected for PMOS and NMOS, respectively, due to their low thresholds [39], [40]. 1) Current-Mode and Voltage-Mode Hysteretic Controls: Firstly, the proposed current-mode and voltage-mode hysteretic controls are veried. Fig. 14 shows the steady-state waveforms when VO is set to 2.5 V. It is observed in Fig. 14(a) that IL is regulated within the window of 25 mA and 85 mA during Burst ON period, indicating current-mode hysteretic control. Meanwhile, the output voltage VO is well regulated at 2.5 V with 50-mV ripple dened by the Burst comparator, verifying voltage-mode hysteretic control. Fig. 14(b) shows the waveforms of the switching nodes VLX1 and VLX2 , together with VO and IL , demonstrating switching actions in BuckBoost converter design. 2) Bidirectional Operation and DVS Tracking: In this experiment, the converter is evaluated with stepping of reference voltage to verify both the capability of bidirectional operation and tracking ability for DVS. The results are shown in Fig. 15. When reference voltage steps between 1.8 V and 2.5 V, the output voltage VO is able to track it quickly and settle to the new steady state without overshoot or undershoot, as shown in Fig. 15(a). The details are illustrated in Fig. 15(b) and (c) for down-tracking and up-tracking, respectively. With the proposed

charge-recycle technique, fast down-tracking is achieved by recycling energy back to the energy storage. As in Fig. 15(b), the transient time, tdw , is about 500 s. Fast up-tracking is also achieved with current-mode hysteretic control, resulting in a transient time tup of 1420 s, as in Fig. 15(c). The up-tracking is slower than the down-tracking due to the existence of load resistor of 1.5 k, which discharging the POL source during both up-tracking and down-tracking. An experiment of DVS operation without the proposed charge-recycle technique is also conducted, and the result is shown in Fig. 16(a). The up-tracking is the same as in the previous experiment, with a transient time tup of 1420 s. However, the down-tracking speed is signicantly degraded, with a transient time tdw of 16.8 ms, because it is realized by discharging the POL source by only the loading current. Test results of DVS operation both with and without the charge-recycle technique are shown in Fig. 16(b) for comparison, indicating clearly the speeding up of reference down-tracking with the charge-recycle technique, with an improvement of 33.6 times in transient time from 16.8 ms to 500 s. The above experiments for DVS reference tracking verify the capability of bidirectional operation of the proposed converter, and so as the effectiveness of the charge-recycle technique, enabled by bidirectional operation, for improved tracking speed during DVS. The data obtained in experimental results, i.e., 500 s and 1420 s, are valid only for the selected parameters in the experiments. In real applications, parameters such as IPK , IVY can be modied accordingly to achieve desired specications. For example, increasing IPK and IVY enables faster charging and discharging for up-tracking and down-tracking, respectively, and thus achieves shorter transient times. B. Experimental Results of the CNT Supercapacitor Using SWNT Films as Electrodes To evaluate the CNT supercapacitor based on the freestanding SWNT lm, a supercapacitor was assembled in a 2032 standard coin cell with a pair of SWNT lms weighing 0.7 mg each, without any current collectors. A 1 M TEABF4 (Alfa Aesar) dissolved in battery-graded PC (Alfa Aesar) solvent was used as the electrolyte. A Wattman glass microber lter paper soaked in the electrolyte was used as the separator. The coin cell was sealed using a Teon gasket to withstand temperatures up to 150 C. The supercapacitor assembly was carried out in a glove-box (MBraun, Unilab) with oxygen and water vapor levels less than 0.1 ppm. More details about the assembly can be found in [41]. Fig. 12(c) and (d) shows the schematic and photographs of the supercapacitor coin cell. Fig. 17 shows the plot of specic energy density versus specic power density, also called a Ragone plot [42], for the supercapacitor at 25 C and 100 C, respectively. A maximum power density of about 55 kW/kg at 100 C is obtained with the discharge curve run at a constant current density of 100 A/g. And a maximum energy density obtained from the discharge curve run with 100 mA/g at 100 C is 4.2 Wh/kg. As a result, an excellent electrochemical performance has been achieved, with high current, power and energy densities.



Fig. 14.

Steady-state waveforms at V O = 2.5 V: (a) burst mode waveforms and (b) zoom-in waveforms during burst on.

Fig. 15.

DVS waveforms: (a) up-tracking and down-tracking, (b) zoom in during down-tracking, and (c) zoom in during up-tracking.

Fig. 16.

Comparison of DVS operation with and without (w/o) charge-recycle: (a) w/o charge-recycle and (b) comparison.

After all the long cycle measurements at different current densities with repeated heating and cooling, the cell was run at 25 C for 246 700 and at 100 C for additional 224 000 chargedischarge cycles with a constant current density of 20 A/g. Fig. 18 shows the discharge capacitance of all the cycles at both 25 C and 100 C, demonstrating excellent ultralong cycle stability with an efciency of approximately 82% and 84%, respectively. The efciency is calculated based on the degradation in the value of discharge capacitance after all the chargedischarge cycles from the initial value.

VII. CONCLUSION In this paper, an energy storage and management system composed of supercapacitors and PMU is proposed for WSN design to achieve miniaturization and long lifetime. Such a system can benet many applications including communication network in microgrids. It features a multienergy-source structure, and thus allows a global energy management strategy to be introduced to achieve well adopted power management techniques, such as DVS, for an energy-efcient system design. Circuit implementation of a hardware-based executing platform for the strategy,



Fig. 17. Ragone chart of the supercapacitor obtained from the discharge curves measured at different constant current densities at 25 and 100 C.

Fig. 18. Results for ultralong cycling stability of the cell by running 246 700 and 224 000 cycles of chargedischarge with a current density of 20 A/g at 25 and 100 C.

i.e., PMU, has been carried out. With the proposed bidirectional dcdc converter design, multidirectional power delivery can be achieved in PMU. To enable on-chip design of energy module, this paper also discusses the fabrication of the CNT supercapacitor, which utilizes free-standing SWNT lms prepared directly on a Si substrate as electrodes and achieves high performances and excellent stability. Finally, it is expected that with the concept of heterogeneous integration, the proposed design can be upgraded to be a fully on-chip one. REFERENCES
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Bingqing Wei received the Bachelors, M.S., and Ph.D. degrees in mechanical engineering from Tsinghua University, Beijing, China, in 1987, 1989, and 1992, respectively. His research expertise lies in nanomaterials and nanotechnology. He is currently an Associate Professor in the Department of Mechanical Engineering, University of Delaware, Newark. He was an Assistant Professor in the Department of Electrical and Computer Engineering and Center for Computation and Technology, Louisiana State University, Baton Rouge, from 2003 to 2007. He had worked as a Postdoctorate Research Associate at Rensselaer Polytechnic Institute, Department of Materials Science and Engineering and Rensselaer Nanotechnology Center, from 2000 to 2003. He was a Visiting Scientist at Max-Planck Institut f r Metallforschung, Stuttgart, Germany, in 1998 u and 1999. He was a Faculty Member at Tsinghua University, from 1992 to 2001. His scholarly achievements in the eld of nanomaterials and nanotechnology and, particularly in the research of carbon nanotubes are fully reected from his 176 papers published in refereed international journals, including Nature and Science, more than 90 scientic conference presentations and more than 80 invited talks and seminars in academia and industry worldwide. His research work has been cited more than 6100 times by peer scientists with h-index of 43 and has also been highlighted many times in scientic journals, web journals, and public media. His current research focuses on controllable synthesis of macroscale nanotube architectures with 1-, 2-, and 3-dimensions; physical, chemical, electrochemical, and mechanical property characterizations of nanotubes; and nanotube device applications. Dr. Wei is a member of the Materials Research Society (MRS), Electrochemical Society (ECS), International Society for Optical Engineering (SPIE), and American Society of Mechanical Engineering (ASME).

Hai Chen (M10) received the B.S. and Ph.D. degrees in electrical engineering from Zhejiang University, Hangzhou, China, in 2004 and 2009, respectively. He is currently a Visiting Research Scientist at the University of Texas at Dallas, Richardson. He was a Research Associate at the University of Arizona, Tucson, from 2009 to 2010. During 2008, he was an integrated circuit (IC) design Intern in National Semiconductor Company, Hong Kong, responsible for high-efciency LED driver IC design. His current research focuses on analog and mixed-signal IC design, advanced integrated power electronics and renewable energy harvesting. For the last six years, he has successfully fabricated eight ICs in the aforementioned areas, and has mentored over ten graduate and undergraduate students. Dr. Chen serves as a reviewer for the IEEE TRANSACTIONS ON POWER ELECTRONICS and the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II.

Dongsheng Ma (S99M02SM07) received the B.S. degree with highest honors and M.S. degree in electronic science from NanKai University, Tianjin, China, in 1995 and 1998, respectively, and the Ph.D degree from the Hong Kong University of Science and Technology, Kowloon, Hong Kong, in 2003. He is currently at Texas Analog Center of Excellence (TxACE) as a Chair Professor and an Associate Professor in the Department of Electrical Engineering, Erik Jonsson School of Engineering and Computer Science, University of Texas at Dallas, Richardson. He also serves as the Thrust Leader of Energy Efciency at SRC National Center, TxACE. From 2004 to 2010, he was a Faculty Member at the Department of Electrical and Computer Engineering, University of Arizona, Tucson, where he was an Analog Devices Chair Assistant Professor from 2004 and then promoted as an Associate Professor with early tenure in 2009. He was the Founding Director of Integrated System Design Laboratory (ISDL), University of Arizona. In 2003, he was with Louisiana State University, Baton Rouge, as an Assistant Professor. He is the author or coauthor of more than 90 peer-reviewed journals and conference papers and holds four US patents. His research focuses on developing core technologies for high-performance power-efcient integrated systems. Prof. Ma serves the Analog Signal Processing Technical Committee, Computer-Aided Circuit Network Design Technical Committee, and Power System and Circuit Committee of IEEE Circuits and Systems society. He has been awarded the United States National Science Foundation (NSF) CAREER Award from 2009 to 2014, TxACE Chair Professorship from 2010 to 2015, and Analog Devices Chair Professorship from 2004 to 2008. He was the recipient of the University of Arizona AAFSAA Outstanding Faculty Award in 2006 and was nominated for the University of Arizona Accolades Outstanding Faculty Award in 2009. He was also the recipient of the Best Student Paper Award in the 52nd IEEE Midwest Symposium on Circuits and Systems in 2009 and the Best Design Award of IEEE/ACM Design Automation Conference Asia and South Pacic in 2004. He supervised two students to receive Best Graduate Thesis Award from College of Engineering of University of Arizona in 2006 and 2009. He was also nominated for the Best Paper Award in IEEE/ACM International Conference on Computer-Aided Design in 2007.