5

ZR6 SYSTEM BLOCK DIAGRAM

BOM MARK
IV@: INT VGA

DDR3 PWR

TPS51116

EV@: STUFF FOR EXT VGA

THERMAL
PROTECTION

X'TAL
14.318MHz

SP@: STUFF FOR UMA or VGA

Penryn 479

REV:C

uFCPGA

CLOCK GENERATOR
ICS:
SELGO: SLG8SP512TTR

Fan Driver

Thermal Sensor
(G780-1P81U)

P3, P4

P3

(G991)

VGA CORE
OZ8118

P2

ISL6251

P32

3/5V SYS PWR

ISL6237

P40

DISCHARGER

P25

CHARGER

P36

P33

CPU CORE PWR

OZ8116LN

P39

P35

+1.05V

UP6111AQDD P34

P37

FSB
667/800/1067 Mhz
PCIE 16X

DDRIII
Dual Channel DDR3
667/800 MHz

SO-DIMM 0
SO-DIMM 1

NB
Cantiga

CRT

EXT_CRT

P24

SWITCH

EXT_HDMI

VRAM DDRII
512MB P17-P23

(GM45/ PM45/ GL40)

P16

EXT_LVDS

NVIDIA
N10M-GE1

LVDS

LVDS

INT_LVDS

RGB

INT_CRT

CIRCUIT
HDMI

P24

P24

P24

P5, P6, P7, P8, P9, P10, P11

HDMI switch
(PS8101T)

INT_HDMI

X4 DMI interface

HDD (SATA) *1

P24

P25

Ext USB Port x 2

SATA0

P26

USB 0,1

ODD (SATA)

Int USB Port x 1

P26

USB 7

Bluetooth
USB5

SATA1

P25

USB 2.0

PCI-Express

WLAN

ICH9M

P26

USB8

P26

Azalia
P24

USB11

Mini Card

SB
X'TAL
32.768KHz

CCD

PCIE-1

PCIE-6

Media
Cardreader

LPC

Atheros
Giga-LAN

(RTS5159)

Audio CODEC
(CX20561) P27

USB2

EC (WPC775LDG)

X'TAL
25MHz

P12,P13,P14,P15

(AR8131)

P30

P28

P31
X'TAL
32.768KHz

Card Reader
Connector

SPI ROM

Transformer

P29

P30

P31

Audio Amplifier
G1453L P27

MIC Jack

P27

RJ45

Int. MIC

P29

P27

Touch Pad

K/B COON.

P25

P31

Int.
Speaker

Quanta Computer Inc.

PROJECT : ZR6

P27

Size

Document Number

Rev
1A

Block Diagram
Date:
5

Monday, April 13, 2009

Sheet
1

of

42

Clock Generator (CLK)

BKP1608HS181T_6_1.5A
L44

U13

+3V_CLK

+3V
C645

C399

.1u/10V_4

C637

*.1u/10V_4

C635

.1u/10V_4

*.1u/10V_4

C368

C649

.1u/10V_4

.1u/10V_4

C367

R237
R242
R251

26 PCLK_DEBUG
31
PCLK_591
13
PCLK_ICH

33_4
33_4
33_4

*10p/50V_4 PCLK_DEBUG_R

C371

*10p/50V_4 PCLK_591_R

C641

*10p/50V_4 PCLK_ICH_R

C648

*10p/50V_4 FSA

33p/50V_4

R222
R496

14 SATACLKREQ#
28 LAN_CLKREQ#

PCLK_DEBUG_R
PCLK_591_R
PCLK_ICH_R

C647

14
30

CLKUSB_48
CLK_Card48

14

14M_ICH

CG_XIN
60
The trace within 500mil
CG_XOUT
59

475/F_4
475/F_4

CPU_BSEL0 R254
R258
R507
CPU_BSEL1
CPU_BSEL2 R243
R504
C638

Q12
DMN601K-7

+3V

14,16,26,28 PDAT_SMB

2
9
16
39
55
61

10u/6.3V_6

R238

R217

10K_4

10K_4

SATACLKREQ#_R
LAN_CLKREQ#_R
PCLK_DEBUG_R
PCLK_591_R
PCLK_PCM_R
PCLK_ICH_R
2.2K_4
22_4
FSA
22_4

CPU_STOP#
PCI_STOP#
CKPWRGD/PD#

37
38
56

PM_STPCPU# 14
PM_STPPCI# 14
CK_PWRGD 14

CPU_0
CPU_0#
PCI_0/CLKREQ_A#
CPU_1_MCH
PCI_1/CLKREQ_B#
CPU_1_MCH#
PCI_2
SRC_8/CPU_ITP
PCI_3
SRC_8#/CPU_ITP#
^PCI_4/LCDCLK_SEL
PCIF_5/ITP_EN
NC

54
53
51
50
47
46

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5

XTAL_OUT

REF/FS_C/TEST_SEL

CLK_DREFCLK_R
CLK_DREFCLK#_R

13
14

SRC_0/DOT_96
SRC_0#/DOT_96#

CGCLK_SMB
CGDAT_SMB

64
63

SCL
SDA

8
11
15
19
23
29
42
52
58

VSS_PCI
VSS_48
VSS_I/O
VSS_PLL3
VSS_SRC_1
VSS_SRC_2
VSS_SRC_3
VSS_CPU
VSS_REF

C409

C403

10u/6.3V_6

C384

.1u/10V_4

*.1u/10V_4

C646
.1u/10V_4

C387

C383

.1u/10V_4

LCDCLK/27M
LCDCLK#/27M_SS

17
18

SRC_2
SRC_2#
SRC_3/CLKREQ_C#
SRC_3#/CLKREQ_D#
SRC_4
SRC_4#
SRC_6
SRC_6#
SRC_7/CLKREQ_F#
SRC_7#/CLKREQ_E#
SRC_9
SRC_9#
SRC_10
SRC_10#
SRC_11/CLKREQ_H#
SRC_11#/CLKREQ_G#

21
22
24
25
27
28
41
40
44
43
30
31
34
35
33
32

.1u/10V_4
D

CLK_DREFSSCLK_R
CLK_DREFSSCLK#_R

CLK_PCIE_SATA 12
CLK_PCIE_SATA# 12
T32
T33
CLK_PCIE_LAN 28
CLK_PCIE_LAN# 28
CLK_PCIE_ICH 13
CLK_PCIE_ICH# 13
T30
T31
CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26
CLK_PCIE_3GPLL 6
CLK_PCIE_3GPLL# 6

CLK_PCIE_SRC4
CLK_PCIE_SRC4#

CLK_PCIE_SRC7
CLK_PCIE_SRC7#

CLK_MCH_OE#_C
CLK_PCIE_SRC11#

From GMCH

R270
R582

475/F_4
475/F_4

RN37
CLK_DREFCLK_R
1
CLK_DREFCLK#_R
3
RN38
CLK_DREFSSCLK_R 1
CLK_DREFSSCLK#_R 3

From Deisceret
CLK_DREFSSCLK_R 3
CLK_DREFSSCLK#_R 1

CLK_MCH_OE# 6
MINI_CLKREQ# 26

2
4

IV@0_4P2R

2
4

IV@0_4P2R

4
2

EV@0_4P2R

RN17

CLK_DREFCLK 6
CLK_DREFCLK# 6
CLK_DREFSSCLK 6
CLK_DREFSSCLK# 6
CLK_PCIE_VGA 18
CLK_PCIE_VGA# 18

4 EV@33_4P2R
2

27M_NONSS 20
27M_SS 20

Pin 10/57/62 : For Pin CPU frequency selection

CPU_BSEL0 R252

3 CPU_BSEL0

CPU_BSEL1 R244

3 CPU_BSEL1

*short0402

*short0402

266Mhz

133Mhz

166Mhz

200Mhz

400Mhz

Reserved

100Mhz

333Mhz

10K_4

SATACLKREQ#_R

R495

10K_4

LAN_CLKREQ#_R

R501

*10K_4

PCLK_DEBUG_R R502

R511

10K_4

CLK_PCIE_SRC11#

R246

EV@10K_4 PCLK_PCM_R

3 CPU_BSEL2

CLOCK GENERATOR
5

CLKREQ_B# Control LCDCLK & SRC_4

*10K_4

R500

Reserve overclocking

IV@10K_4

Pin 6 : For Pin 13/14 and 17/18 selection

0 = LCDCLK & DOT96 for internal graphic controller support
1 = 27M & 27M_SS &SRC_0 for external graphic controller support

MCH_BSEL1 6

PCLK_ICH_R
*short0402

CLKREQ_A# Control SRC_0 & SRC_2

R494

MCH_BSEL0 6

CPU_BSEL2 R499

Strap table

+3V

BSEL Frequency Select Table

FSC
FSB
FSA
Frequency

+1.05V

BKP1608HS181T_6_1.5A

Pin 56 : It acts as a
level sensitive strobe
to latch the FS pins
and other multiplexed
inputs.

RN16
CLK_DREFCLK_R
3
CLK_DREFCLK#_R
1

CPU Clock select

02

48

CLK-GEN_SLG8SP512TTR

CGCLK_SMB

C655

.1u/10V_4

14,16,26,28 PCLK_SMB

XTAL_IN

62

FSC

+3V
Q11
DMN601K-7

12
20
26
36
45
49

USB_48MHz/FS_A
FS_B/TEST_MODE

10K_4
33_4
*30p/50V_4

+1V05_CLK

VDD_I/O
VDD_PLL3_I/O
VDD_SRC_I/O_1
VDD_SRC_I/O_2
VDD_SRC_I/O_3
VDD_CPU_I/O

10
57

CGDAT_SMB

1
3
4
5
6
7

L26

VDD_PCI
VDD_48
VDD_PLL3
VDD_SRC
VDD_CPU
VDD_REF

Y2
14.318MHz

PCI/48M RS=33 ohm when one loading

=22 ohm when two loading

C634

33p/50V_4
1

C642

CLK VDD power range 1.05V~3.3V

R503

10K_4

MCH_BSEL2 6

Pin 7 : For Pin 46/47 selection

1 = CPU_ITP
0 = SRC_8

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

CLOCK GENERATOR
Date:
4

Monday, April 13, 2009

Sheet
1

of

42

CPU 1/2 (CPU)

H_A#[3..16]

A20M#
FERR#
IGNNE#

12
12
12
12

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

M4
N5
T2
V3
B2
D2
D22
D3
F6

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]

H5
F21
E1

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5

F1

IERR#
INIT#

D20
B3

H_D#[0..15]

H_D#[0..15]

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_BREQ# 5
H_IERR#

R47

56_4

+1.05V
H_INIT# 12

LOCK#

H4

H_LOCK# 5

RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#

C1
F3
F4
G3
G2

H_CPURST# 5
H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

HIT#
HITM#

G6
E4

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

H_HIT# 5
H_HITM# 5

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
SYS_RST#

D21
A24
B25

H_PROCHOT#_D
H_THERMDA
H_THERMDC

C7

PM_THRMTRIP#

5
5
5

H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#[16..31]

PROCHOT#
THERMDA
THERMDC

+1.05V

THERMTRIP#

H CLK
BCLK[0]
BCLK[1]

A22
A21

R374
1K/F_4

5
5
5

H_DSTBN#1
H_DSTBP#1
H_DINV#1

T9
T60
T2
T63
T8

R373
2K/F_4
2
2
2

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

H_GTLREF AD26
*1K_4 CPU_TEST1 C23
*1K_4 CPU_TEST2 D25
CPU_TEST3 C24
CPU_TEST4 AF26
CPU_TEST5 AF1
CPU_TEST6 A26
CPU_TEST7
C3
B22
B23
C21

R54
R57

CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP[0]
COMP[1]
COMP[2]
COMP[3]

R26
U26
AA1
Y1

COMP0
COMP1
COMP2
COMP3

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

H_D#[32..47] 5

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]

MISC

03
D

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5
H_D#[48..63]

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

Connect it to CPU DBR# is for ITP debug port

or CPU interposer (like ICE) to reset the system
SYS_RST# 14

H_D#[32..47]

U22B
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

H_D#[16..31]

T1
T4
T3
T5
T6

THERMAL

ICH

A6
A5
C4

H_ADS# 5
H_BNR# 5
H_BPRI# 5

DATA GRP 2

CONTROL

ADDR GROUP_1

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

12 H_A20M#
12 H_FERR#
12 H_IGNNE#
H_STPCLK#
H_INTR
H_NMI
H_SMI#

BR0#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

H_ADSTB#1

DEFER#
DRDY#
DBSY#

H1
E2
G5

DATA GRP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

K3
H2
K2
J3
L1

ADS#
BNR#
BPRI#

DATA GRP 3

H_A#[17..35]

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

XDP/ITP SIGNALS

DATA GRP 0

5 H_ADSTB#0
5 H_REQ#[0..4]

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

ADDR GROUP_0

U22A

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_D#[48..63] 5

Layout note:
comp0,2: Zo=27.4ohm, L<0.5"
comp1,3: Zo=55ohm, L<0.5"
Layout note:
DPRSTP# , Daisy Chain
(SB>Power>NB>CPU)
C

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5
R376
R375
R27
R28

27.4/F_6
54.9/F_4
27.4/F_6
54.9/F_4

For Dual Core

ICH_DPRSTP# 6,12,35
H_DPSLP# 12
H_DPWR# 5
H_PWRGD 12
H_CPUSLP# 5
PSI#
35

Penryn

Layout note:
H_GTLREF: Zo=55 ohm
L<0.5", 2/3*VCCP+-2%

RESERVED

Penryn

Thermal Trip

CPU Thermal monitor (THM)

+1.05V

XDP PU/PD

+3V

+3V

6,14,31,35 DELAY_VR_PWRGOOD

1
PM_THRMTRIP#

.1u/10V_4
2
1

U5
SYS_SHDN# 33,40

No use PROCHOT CPU side still PU 56ohm.

Use PROCHOT to optional receiver CPU side PU
68ohm and through isolat 2.2K ohm to receiver
side

+1.05V
A

R49
56_4
H_PROCHOT#_D

R51

*0_4

H_THERMDA

XDP_TDO

R30

*54.9/F_4

XDP_TDI

R31

54.9/F_4

XDP_TMS

R32

54.9/F_4

XDP_BPM#5

R29

54.9/F_4

31

2ND_MBCLK

SCLK

VCC

31

2ND_MBDATA

SDA

DXP

C85

XDP_TCK

R34

54.9/F_4

ALERT#

DXN

2200p_4

XDP_TRST#

R33

54.9/F_4

OVERT#

GND

H_THERMDC

No use Thermal trip CPU side still PU 56ohm.

Use Thermal trip can share PU at SB side

Processor hot

+1.05V
C70

Q7
3 MMBT3904

*1K_4

VCC_TH

R67
56_4

R55

200_6

DMN601K-7
+1.05V

6,12 PM_THRMTRIP#

SYS_RST#

R58

Q8

+3V
14 THERM_ALERT#
+3V

R68

*10K_4

R70

*0_4

R69

10K_4

25 THER_OVERT#

XDP_DBRESET# and XDP_TDO

reserve for XDP

G780-1P81U

ADDRESS: 9AH

GMT

AL000780003

Use 2200p

WINDBOND

AL83L771001

Check

Quanta Computer Inc.

H_PROCHOT# 35

PROJECT : ZR6
Size

Document Number

Rev
1A

CPU Host Bus

Date:
5

Sheet

Monday, April 13, 2009

1

of

42

CPU 2/2 (CPU)

VCC_CORE

U22D

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]

VCC_CORE
U22C

C25

C49

C50

C48

C26

C487

C488

C62

*10u/10V_8

10u/6.3V_8

10u/6.3V_8

*10u/10V_8

10u/6.3V_8

*10u/10V_8

*10u/10V_8

*10u/10V_8

C489

C495

C496

C497

C23

C480

C59

C483

10u/6.3V_8

*10u/10V_8

10u/6.3V_8

*10u/10V_8

*10u/10V_8

10u/6.3V_8

*10u/10V_8

*10u/10V_8

C53

C52

C479

C482

C66

*10u/10V_8

*10u/10V_8

*10u/10V_8

10u/6.3V_8

10u/6.3V_8

Layout Note:
Place these parts
reference to Intel demo
board.

C55

C51

C65

*10u/10V_8

*10u/10V_8

10u/6.3V_8

C63

C64

C60

C61

C492

C490

*10u/10V_8

*10u/10V_8

10u/6.3V_8

*10u/10V_8

10u/6.3V_8

*10u/10V_8

C491

C494

C498

C499

C24

C481

10u/6.3V_8

10u/6.3V_8

10u/6.3V_8

*10u/10V_8

10u/6.3V_8

*10u/10V_8

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA[01]
VCCA[02]

B26
C26

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VSSSENSE

AE7

+ C484
*330u/2V_7343

+ C493

+ C58

04

Layout Note:
Inside CPU center cavity in 2 rows

VCCP : 2.5A(Supply after VCC Stable)

4.5A(Supply before VCC Stable)
+1.05V

C57

C56

C54

.1u/16V_6

.1u/16V_6

.1u/16V_6

C67

C486

C485

*.1u/16V_6

.1u/16V_6

.1u/16V_6

C500
330u/2V_7343

VCCA:130mA

+1.5V

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

35
35
35
35
35
35
35

C69

C68

.01u/25V_4

10u/6.3V_8

R371

100/F_6

VCC_CORE
VCCSENSE 35
VSSSENSE 35

R372

Penryn
.

+ C27

100/F_6

*330u/2V_7343 *330u/2V_7343 *330u/2V_7343

Layout Note:
Z0=27.4,PU/PD L<1"
A

Quanta Computer Inc.

Montevina platform : Early Reference Board Schematics Feb 2007. Rev 1.0
stuff 22U*34, NC 22U*2
stuff 330U*2, NC330U*2

Penryn
.

PROJECT : ZR6
Size

Document Number

Rev
1A

CPU Power
Date:

VCC:38A (Low power type)

VCC:47A (Standard type)

Monday, April 13, 2009

Sheet
1

of

42

GMCH-CANTIGA(CLG)
3

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

Intel Cantiga (G)M

AJSLB940T04

Intel Cantiga (P)M

AJSLB970T06

Intel Cantiga (G)L A1

AJSLGGM0T04

+1.05V

0.3125*VCCP
WIDE(10):SPACING(20) ,
L<0.5"

R90
221/F_4

H_SWING
R89

C121

100/F_4

.1u/10V_4

H_RCOMP

R393

Layout Note:
WIDE(10):SPACING(20) ,
L<0.5"

24.9/F_4

H_SWING
H_RCOMP

+1.05V

3
3

R98

2/3*VCCP
WIDE(10):SPACING(20),
L<0.5"

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
C5
E3

C12
E11

H_CPURST#
H_CPUSLP#

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP

H_CPURST#
H_CPUSLP#

1K/F_4
H_AVREF
R102
2K/F_4

C157
*.1u/10V_4

A11
B11

H_A#[3..35]

U28A

H_D#[0..63]

QCI P/N
D

HOST

H_AVREF
H_DVREF

05

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

H_ADS#
3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BREQ# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT#
3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#[3..0]

3
B

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[0..4]

H_RS#[0..2]

CANTIGA_PM

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

GMCH HOST
Date:
5

Monday, April 13, 2009

Sheet
1

of

42

GMCH-CANTIGA(CLG)

06

IV@
EV@
Strap table

CFG6

iTPM Host Interface

CFG7

ME TLS Confidentiality

0 = AMT Firmware will use TLS cipher suite

with no confidentiality
1 = AMT Firmware will use TLS cipher suite
with confidentiality(Default)

PCIE Graphics Lane Reversal

0 = Reverse Lanes
1 = Normal operation(Default)

CFG10

PCIE Loopback enable

0 = Enabled
1 = Disabled (Default)

CFG11

Reserved
ALLZ

0 = ALLZ mode enable

1 = disable(Default)

CFG13

XOR

0 = XOR mode enable

1 = disable(Default)

CFG[15:14]

Reserved

CFG16

FSB Dynamic ODT

CFG[18:17]

Reserved

CFG19

DMI Lane Reversal

0 = Normal (Default)
1 = Lanes Reversed

CFG20

Digital Display Port

(SDVO/DP/iHDMI)
Concurrent with PCIE

0 = Only Digital Display port (SDVO/DP/iHDMI)

or PCIE is operational (Default)
1 = Digital Display port (SDVO/DP/iHDMI) and
PCIE are operating simultaneously via PEG
port
2
2
2

0 = No SDVO/HDMI Device Present(Default)

1 = SDVO/HDMI Device present

Digital Display Present

0 = Digital display(HDMI/DP) device

absent(Default)
1 = Digital display(HDMI/DP) device present

ME_JTAG_TMS

TPM Disable

R106
R129

100/F_4
*0_4

NB Thermal trip pin

No use Thermal trip NB side can
NC.(NB has ODT)

+3VSUS

10K_4
10K_4

PM_EXTTS#0
PM_EXTTS#1

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1

AR24
AR21
AU24
AV20

M_CLK#0
M_CLK#1
M_CLK#2
M_CLK#3

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

BC28
AY28
AY36
BB36

M_CKE0
M_CKE1
M_CKE2
M_CKE3

16
16
17
17

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

BA17
AY16
AV16
AR13

M_CS#0
M_CS#1
M_CS#2
M_CS#3

16
16
17
17

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

BD17
AY17
BF15
AY13

M_ODT0
M_ODT1
M_ODT2
M_ODT3

16
16
17
17

SM_RCOMP
SM_RCOMP#

BG22
BH21

M_RCOMP
M_RCOMP#

BF28
BH28

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

AV42
AR36
BF17
BC36

SM_VREF
SM_PWROK
SM_REXT R108
DDR3_DRAMRST#

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

B38
A38
E41
F41

CLK_DREFCLK
CLK_DREFCLK#
CLK_DREFSSCLK
CLK_DREFSSCLK#

PEG_CLK
PEG_CLK#

F43
E43

CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

AE41
AE37
AE47
AH39

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AE40
AE38
AE48
AH40

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AE35
AE43
AE46
AH42

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

AD35
AE44
AF46
AH43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

R578
12.1K_4

HWPG_1.5V 31,36
R577

*short0402

SUSC#

14,31

R579

*0_4

SUSB#

14,31
D

SM_PWROK

16
16
17
17

R580
10K_4

SM_VREF=0.5*VCC_SM
SM_PWROK only for
DDR3.(DDR2 PD only)
SM_DRAMRST# only
for DDR3.(DDR2:NC)

+1.5VSUS
M_RCOMP
M_RCOMP#

R430
R426

80.6/F_4
80.6/F_4

SM_VREF

R184
R194

10K/F_4
10K/F_4

+1.5VSUS

499/F_4
DDR3_DRAMRST#

16,17

CLK_DREFCLK 2
CLK_DREFCLK# 2
CLK_DREFSSCLK 2
CLK_DREFSSCLK# 2

SM_VREF.Default use voltage divider for

poor layout cause +SMDDR_VREF not
meet spec.And Intel circuit PU/PD is
1K,But Check list PU/PD is 10K.

CLK_PCIE_3GPLL 2
CLK_PCIE_3GPLL# 2

DMI_TXN[3:0] 13

INTEL FAE Suggest PD for Ext graphics

DMI_TXP[3:0] 13

DMI_RXN[3:0]

13

DMI_RXP[3:0]

13

CLK_DREFCLK#
CLK_DREFCLK
CLK_DREFSSCLK#
CLK_DREFSSCLK

R440
R444
R199
R198

EV@0_4
EV@0_4
EV@0_4
EV@0_4

+1.5VSUS
1K/F_4

SM_RCOMP_VOH

C565

C563

R435

R434
3.01K/F_4

.01u/25V_4

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
CANTIGA_PM

16
16
17
17

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SM_RCOMP_VOH
SM_RCOMP_VOL

NC

SDVO_CTRLDATA
SDVO_CTRLCLK
DDPC_DDCDATA
DDPC_CTRLCLK
CLK_MCH_OE#

RST_IN#_MCH
THRMTRIP#_R

R29
B7
N33
P32
AT40
AT11
T20
R32

M_CLK0
M_CLK1
M_CLK2
M_CLK3

2.2u/6.3V_6

PM

MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_9
MCH_CFG_10
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16

14 PM_SYNC#
3,12,35 ICH_DPRSTP#
16 PM_EXTTS#0
17 PM_EXTTS#1
3,14,31,35 DELAY_VR_PWRGOOD
13 PLT_RST#
3,12 PM_THRMTRIP#
14,35 PM_DPRSLPVR

PM_DPRSTP#
The Daisy chain topology should
be routed from ICH9M to IMVP ,
then to (G)MCH and CPU, in that
order.

R179
R178

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

MCH_CFG_19
MCH_CFG_20

+3V

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

CFG

MCH_CFG_3
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20

+3V

IV@4.7K_4
IV@4.7K_4
*2.21K/F_4
*2.21K/F_4
10K_4

ME_JTAG_TDI

JTAG_TMS_GMCHAM35

T14
T20

*2.21K/F_4
*2.21K/F_4
*2.21K/F_4
*2.21K/F_4
*2.21K/F_4
*2.21K/F_4
*2.21K/F_4
*2.21K/F_4

ME_JTAG_TCK

T22

T13
T12

*4.02K/F_4
*4.02K/F_4

AL34
AK34

ME_JTAG_TDO

MCH_BSEL0
MCH_BSEL1
MCH_BSEL2
T15
T18

Strap pin

R175
R181
R162
R163
R186

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25

JTAG_TDO_GMCH AN35

T17

R146
R138
R137
R128
R127
R143
R132
R131

RSVD20

T21

T16

R153
R160

AY21

0 = Dynamic ODT disable

1 = Dynamic ODT Enable(Default)

SDVO Present

RSVD17

ME JTAG

SDVO_CTRLDATA

RSVD15

M1

B2
BG23
BF23
BH18
BF18

CFG12

DDPC_CTRLDATA

RSVD14

ME

CFG9

Reserved

T24
B31

AP24
AT21
AV24
AU20

0 = DMI X2
1 = DMI X4(Default)
0 = iTPM Host Interface is enabled
1 = iTPM Host Interface is disabled(Default)

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

B33
B32
G33
F33
E33

GFX_VR_EN

C34

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

AH37
AH36
AN36
AJ35
AH34

C570

SM_RCOMP_VOL

For EMI

R437

HDA_BIT_CLK_HDMI
C555
*10p/50V_4

*22_4

R433

1K/F_4
.01u/25V_4

Check list note : CL_VREF=0.35V

+1.05V

CL_CLK0 14
CL_DATA0 14
MPWROK 14,31
CL_RST#0 14

MCH_CLVREF_R

NB Thermaltrip
+1.05V

R169
1K/F_4

R402
*10K_4

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

N28
M28
G36
E36
K36
H36

DDPC_CTRLCLK
DDPC_DDCDATA

TSATN#

B12

TSATN#

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

B28
B30
B29
C29
A28

HDA_BIT_CLK_HDMI
HDA_RST#_HDMI
HDA_SDIN_HDMI
HDA_SDOUT_HDMI
HDA_SYNC_HDMI

R168

.1u/10V_4

511/F_4

SDVO_CTRLCLK 24
SDVO_CTRLDATA 24
CLK_MCH_OE# 2
MCH_ICH_SYNC# 14

CLK_MCH_OE#

R103

C278

56_4

TSATN#

HDA_BIT_CLK_HDMI 12
HDA_RST#_HDMI 12
HDA_SDIN_HDMI 12
HDA_SDOUT_HDMI 12
HDA_SYNC_HDMI 12

If HDMI not support

HDA --> NC
VCC_HDA-->GND
Differential signal-->NC

Impact ICH9M VCCHDA and VCCSUSHDA supply 1.5V/3.3V

Q20
3 *MMBT3904

TSATN_EC# 31

DDPC_CTRL for HDMI port C

SDVO_CTRL for HDMI port B

+1.05V

NOTE:
If (G)MCH's HD Audio signals are connected to ICH9M for
iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
only on 1.5V. These power pins on ICH9M can be supplied
with 3.3V if and only if (G)MCH's HDA is not connected to
ICH9M. Consequently, only 1.5V audio/modem codecs can
be used on the platform.
3

C556

2.2u/6.3V_6

DMI X2 Select

DDR CLK/ CONTROL/COMPENSATION

CFG5

CLK

Reserved

DMI

CFG[4:3]

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9

GRAPHICS VID

FSB Frequency Select

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12

RSVD

CFG[2:0]

000= FSB 1066MHz

010 = FSB 800MHz
011 = FSB 667MHz

CFG8

Configuration

MISC

U34
TC7SH08FU

U28B

Strap description

HDA

Pin Name

+3V_S5

<Checklist ver0.8>
If TSATN# is not used, then it must be terminated
with a 56- pull-up resistor to VCCP.
A

<Pin out check issue>

Cantiga EDS 0.7 change Ball B12 to TSATN# from TSATN

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

GMCH DMI
Sheet
1

of

42

GMCH-CANTIGA(CLG)
EV@

+3V

SP@

R171

IV@10K_4

L_CTRL_CLK

R172

IV@10K_4

L_CTRL_DATA

24 INT_LVDS_EDIDCLK
24 INT_LVDS_EDIDDATA
24 INT_LVDS_DIGON
R195

IV@2.4K/F_4 LVDS_IBG

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

24 INT_TXLOUT024 INT_TXLOUT124 INT_TXLOUT2-

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

24 INT_TXLOUT0+
24 INT_TXLOUT1+
24 INT_TXLOUT2+
C

SP@

TV_A/B/C
For IV: 75ohm
For EV:0ohm
R147
R136
R151

SP@75_4
SP@75_4
SP@75_4

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

M33
K33
J33

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

M29
C44
B43
E37
E38
C41
C40
B37
A37

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

H47
E46
G40
A40

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

H48
D45
F40
B40

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

A41
H38
G37
J37

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

B42
G38
F37
K37

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TVA_DAC
TVB_DAC
TVC_DAC

H24

TV_RTN

C31
E32

TV_DCONSEL_0
TV_DCONSEL_1

24 INT_CRT_BLU
24 INT_CRT_GRN

24 INT_CRT_DDCCLK
24 INT_CRT_DDCDAT
24 INT_HSYNC
24

INT_VSYNC

E28

CRT_BLUE

INT_CRT_GRN

G28

CRT_GREEN

INT_CRT_RED

J28

CRT_RED

G29

CRT_IRTN

H32
J32
J29
E29
L29

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

R158

IV@30.1_4

R165

IV@30.1_4

HSYNC_G
CRTIREF
VSYNC_G

HSYNC/VSYNC serial R place close to NB

Discrete Stuffed. (CRT)
HSYNC_G
A

CRTIREF pull down

for IV cantiga 1.02k ohm/F

VGA

24 INT_CRT_RED

INT_CRT_BLU

TV

INT_TV_COMP F25
INT_TV_Y/G
H25
INT_TV_C/R
K25

LVDS

INT_TXLCLKOUTINT_TXLCLKOUT+

24 INT_TXLCLKOUT24 INT_TXLCLKOUT+

07
+1.05V

L32
G32
M32

GRAPHICS

24 L_BKLT_CTRL
24 INT_LVDS_BLON

PCI-EXPRESS

IV@

L<0.5" , If PCIE not support

still connect to +VCC_PEG

U28C

IV&EV Dis/Enable setting

If LVDS no use,all signal can NC

EXP_A_COMPX

R176

49.9/F_4

PEG_COMPI
PEG_COMPO

T37
T36

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

C_PEG_TXN0
C_PEG_TXN1
C_PEG_TXN2
C_PEG_TXN3
C_PEG_TXN4
C_PEG_TXN5
C_PEG_TXN6
C_PEG_TXN7
C_PEG_TXN8
C_PEG_TXN9
C_PEG_TXN10
C_PEG_TXN11
C_PEG_TXN12
C_PEG_TXN13
C_PEG_TXN14
C_PEG_TXN15

C583
C587
C591
C596
C618
C588
C600
C598
C604
C603
C608
C594
C616
C619
C614
C593

.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

C_PEG_TXP0
C_PEG_TXP1
C_PEG_TXP2
C_PEG_TXP3
C_PEG_TXP4
C_PEG_TXP5
C_PEG_TXP6
C_PEG_TXP7
C_PEG_TXP8
C_PEG_TXP9
C_PEG_TXP10
C_PEG_TXP11
C_PEG_TXP12
C_PEG_TXP13
C_PEG_TXP14
C_PEG_TXP15

C580
C585
C590
C597
C611
C586
C601
C599
C605
C602
C609
C595
C617
C620
C615
C592

.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PEG_RXN[15:0] 18

IV&EV Dis/Enable setting

<5/31>Montevina_Schematics_Checklist_Rev0_8
a)For TVOUT Disabled, TV_DCONSEL[1:0] Connect to GND. But
design guide Rev0.7 show NC.What is correct.
b)For CRT DAC Disable, CRT_DDC_CLK, CRT_DDC_DATA .
CRT_HSYNC, CRT_VSYNCThese signals should be connected to
GND. But design guide Rev0.7 show NC, Intel suggest follow
Design guide.

<check list>
For EV@
CRT R/G/B 0ohm to GND
CRTIREF 0ohm to GND
PEG_RXP[15:0] 18,24

Can support reversal routing.If CFG9=1, PCI Express

is normal operation. If CFG9=0, then PEG_TXP0
becomes PEG_TXP15, PEG_TXP1 becomes
PEG_TXP14, PEG_TXP2 becomes PEG_TXP13, etc.
similarly for PEG_RXP[15:0] and PEG_RXN[15:0]

<check list>
For IV@
CRT R/G/B 150ohm to GND
CRTIREF 1Kohm to GND

For topology without the analog switch

- if the total motherboard route
length is less than 12", the
recommended reference
resistor value is 1 k 1%

CRTIREF
For IV: 1Kohm
For EV:0ohm
R161

SP@1K/F_4

CRTIREF

SP@
CRT_R/G/B
For IV: 150ohm
For EV:0ohm

PEG_TXN[15:0] 18,24

R155

SP@150/F_4

INT_CRT_BLU

R154

SP@150/F_4

INT_CRT_GRN

R150

SP@150/F_4

INT_CRT_RED

PEG_TXP[15:0] 18,24

CANTIGA_PM
A

VSYNC_G
R159
EV@0_4

R166
EV@0_4

Quanta Computer Inc.

PROJECT :
Size

ZR6

Document Number

Rev
1A

GMCH VGA
Date:
5

Monday, April 13, 2009

Sheet
1

of

42

GMCH-CANTIGA(CLG)

M_A_BS0 16
M_A_BS1 16
M_A_BS2 16

SA_RAS#
SA_CAS#
SA_WE#

BB20
BD20
AY20

M_A_RAS# 16
M_A_CAS# 16
M_A_WE# 16

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_B_DQ[63:0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_A_DM[7:0] 16

M_A_DQS[7:0] 16

M_A_DQS#[7:0] 16

M_A_A[14:0] 16

CANTIGA_PM

U28E
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

BD21
BG18
AT25

MEMORY

SA_BS_0
SA_BS_1
SA_BS_2

SYSTEM

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

MEMORY

17

U28D
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

SYSTEM

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR

M_A_DQ[63:0]

DDR

16

08
SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

M_B_BS0 17
M_B_BS1 17
M_B_BS2 17

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

M_B_RAS# 17
M_B_CAS# 17
M_B_WE# 17

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_DM[7:0] 17

M_B_DQS[7:0] 17

M_B_DQS#[7:0] 17

M_B_A[14:0] 17

CANTIGA_PM

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

GMCH DDRIII
Date:
5

Monday, April 13, 2009

Sheet
1

of

42

GMCH-CANTIGA(CLG)

09

IV@
Power consumption reference to Intel
644135 Cantiga chipset EDS Volume1.
Section 10

Intel check list(Rev 0.8)

No description for VCC_SM bulk CAP
Intel CRB(Rev 0.7)
330U*1 Reserve near to power
330U*1 near to NB

GM TDP 10.5~12W
GS TDP 7~8W
PM TDP 7W
D

Intel check list(Rev 0.8)

270U*1 near to power(+V1.05M).
270U*2 near to NB
Intel CRB(Rev 0.7)
270U*3 near to power(+V1.05M).
270U*1 near to NB
ESR=12m ohm

+1.05V_AXG

330u/2V_7343

VCC_SM(1.5V) DDR3

BA36
BB24
BD16
BB21
AW16
AW13
AT13

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

Voltage regulator is shared between

the Graphics Core Rail,
VCCA_HPLL,VCCA_MPLL,VCCA_PEG_PLLVCCD_PEG_PLL,
VCCA_SM_CK, VCCA_DPLLA, VCCA_DPLLB, VCCD_HPLL,
VCCA_SM, VCC_AXF

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

+1.05V_AXG

IV@

R112
R110

IV@10/F_4 AJ14
IV@10/F_4 AH14

VCC_AXG_SENSE
VSS_AXG_SENSE

+1.05V

U28F

C267

C283

C266

.1u/10V_4

*.22u/6.3V_4

.22u/6.3V_4

C286

+1.05V

22u/6.3V_8

C610
330u/2V_7343

IV@

+1.05V_AXG
R156

IV@0_8

R83

IV@0_8

R80

IV@0_8

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34

T32

+1.05V

VCC_35

IV&EV Dis/Enable setting

Design guide(Table 72)
For INT VGA diasble.VCC_AXG power can connect to GND

+1.05V_AXG

SP@
+ C505

+ C501
IV@330u/2V_7343

C219

C168

C149

IV@.47u/6.3V_4

SP@1u/10V_6

IV@10u/6.3V_8 IV@22u/6.3V_8 IV@.1u/10V_4

Intel check list(Rev 0.8)

220U*2 near to NB(ESR=15m ohm)
Intel CRB(Rev 0.7)
270U*4 near to power(+V1.05S).
330U*2 near to NB

C187

C223

C107

C166

IV@.1u/10V_4

IV@.1u/10V_4

Cavity Capacitors

SP@:IV Sutff 1uf

EVstuff 0 ohm

1.8V
Internal connect to power
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

AV44
BA37
AM40
AV21
AY5
AM10
BB13

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

C151

C142

C211

C292

C290

C319

.1u/10V_4

.1u/10V_4

.22u/6.3V_4

.22u/6.3V_4

.47u/6.3V_4

1u/10V_4

1u/10V_4

VCC
VCC_NCTF
1210.34mA_EV
1930.4mA_IV
ME Engine
508.12mA
Total Max=2438.52mA

CANTIGA_PM

C163

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

NB Power Status and max current table(1/3)

1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially

2. VCC_AXG_SENSE PU to +VGFX_CORE_INT with 10ohm
and VSS_AXG_SENSE PD with 10ohm for Intel suggest

POWER PLANE

S4/S5

Voltage

I(max)

S0

S3

Note

VCC(EXT_VGA)

+1.05V

2178mA

VCC(INT_VGA)

+1.05V

2899mA

VCC_AXG

+1.05V

8700mA

VCC_SM(800)

+1.8VSUS

3A

(DDRII-667) 2.6A

VCC_SM(Standby)

+1.8VSUS

1mA

Self Refresh during S3

Graphics Core

Quanta Computer Inc.

(See NB EDS Rev:1.0 Section 10.1 for max current)

4

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

GMCH VCC,NCTF

(See NB EDS Rev:1.0 Section 12.2 for DC voltage)

5

Place close to
the GMCH

Place close to the GMCH

CANTIGA_PM

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

IV@330u/2V_7343

VCC GFX

1.05V
Graphics core
VCC_AXG
VCC_AXG_NCTF
6326.84mA

VCC GFX NCTF

+1.05V_AXG

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC NCTF

.1u/10V_4

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC CORE

*22u/6.3V_8

C624

VCC SM LF

C264

VCC SM

22u/6.3V_8

C612

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

POWER

U28G

+1.5VSUS

C606

POWER

SP@

Sheet
1

of

42

GMCH-CANTIGA(CLG)
+3V_CRT_TV_DAC

IV@.1u/10V_4

1210 10UH, 10%

0.45A DCR_max = 0.39

C559

SP@.01u/25V_4

*IV@10u/6.3V_8

+3V_A_DAC_BG

R427
IV@0_6

IV@10uH_8_155mA

C550

C551

C554

IV@.1u/10V_4

SP@.01u/25V_4

IV@10u/6.3V_8

3.3V
73mA

1.05V
FSB-1067
852mA

U28H
+ C577

C320

F47

VCCA_DPLLA

+1.05VM_DPLLB

L48

VCCA_DPLLB

C329

+1.05VM_HPLL

AD1

VCCA_HPLL

SP@.1u/10V_4

+1.05VM_MPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

1.8V
13.2mA

C325

*short0603

SP@1000p/50V_4

.1u/10V_4

R469

+VCCA_PEG_BG

*short0805
C623

1.05V
139.2mA
L37

3.9 nH, 0.2 nH, 1A

, DCR_max=32 m

BKP1608HS181T_6_1.5A

1210 0.1uH, 20%, 1A,

DCR_max=0.078

+1.05V

R152

1.05V
DDR2-800
720mA

.1u/10V_4

C191

+1.05VM_MPLL_RC R389

C210

+1.05VM_PEGPLL

C190

0.5/F_6
22u/6.3V_8

C504

4.7u/6.3V_6

1u/10V_4

C516

22u/6.3V_8

.1u/10V_4

+1.05V

R144

L39

+3V

3.3V
79mA

+1.05VM_A_SM_CK

*short0603

AA48

VCCA_PEG_PLL

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

C248

C221

*2.2u/10V_6

22u/6.3V_8

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

C231
.1u/10V_4

IV&EV Dis/Enable setting

IV@BKP1608HS181T_6_1.5A

SP@:INT use 0.01U

EXT use 0 ohm

C549

C543

C542

IV@10u/6.3V_8

IV@.1u/10V_4

SP@.01u/25V_4
+3V_CRT_TV_DAC

CRB no 10U
Check list need min 10U~100U for VCCA_TV_DAC
R438

1.5V
50mA

SP@:INT use 0.1U

EXT use 0 ohm

IV@0_6

+VCC_HDA

B24
A24

A32

1.5V
48.363mA for CRT
5mA for TV

VCCA_TV_DAC_1
VCCA_TV_DAC_2

VCC_HDA

.1u/10V_4

.01u/25V_4

L11

+1.05VM_MCH_PLL2

*short0603

+1.05VM_PEGPLL

C515

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1
AA47

4.7u/6.3V_6

4.7u/6.3V_6

VCCD_HPLL
VCCD_PEG_PLL

1.5V
0.5mA

VCCD_LVDS_1
VCCD_LVDS_2

+1.05V

330u/2V_7343

ESR= 12m ohm

GND

VCCA_CRT_DAC

GND

VCCD_LVDS

GND

VCC_TX_LVDS

GND

VCCA_LVDS

GND

VCCA_TVDAC

GND

VCCD_QDAC

GND

VCCA_DAC_BG

GND

VCC_AXG

GND

VCC_AXG_NCTF

GND

1.05V
321.35mA
R418

*short0805

+1.05V

C536
*10u_8

1.8V
DDR2-800
124mA
R307

C544
1/F_4

0805 1UH , Rdc = 0.14 - 0.26.

Max rated current = 220 mA
C

*short0805

+1.8VSUS_SMCK_RC

R421

IV&EV Dis/Enable setting

.1u/10V_4
M38
L37

*short0805

VCCSYNC_CRT

+1.5VSUS

C537

10u/6.3V_6

.1u/10V_4

DMI

C215

FB 180@100 MHz, 25% 1.5A

DCR_max=90 m

R390

1.05V
157.2mA

C216

2.2u/6.3V_6

+1.5VSUS_VCC_SM_CK

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

CANTIGA_PM

B22
B21
A21

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

BF21
BH20
BG20
BF20

VCC_TX_LVDS

K47

1.8V
118.8mA

VCC_HV_1
VCC_HV_2
VCC_HV_3

C35
B35
A35

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

V48
U48
V47
U47
U46

R209

SP@:INT use 1000pf

EXT use 0 ohm

3.3V
105.3mA

C345

IV@0_8

+1.8V

C347

SP@1000p/50V_4

*IV@22u/6.3V_8

+3V
R193

10_4

+1.05V_SD

D13

2 CH751

+1.05V

C291

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

VTTLF

+1.5V_QDAC

*short0603

.47u/6.3V_4

POWER

LVDS

R135

C131

ESR = 60 m

D TV/CRT

VCCD_QDAC share to TV and CRT

VCCD_TVDAC always keep 0.1U/0.022U/10U to +1.5V

+1.5V

C118

1u/10V_4

SP@.1u/10V_4

+1.05V

C119

+1.05VM_AXF

VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

+1.5V_TVDAC

C571

1.5V
35mA

R91
+ C527

C171

+1.8V_TXLVDS

CRB : 0 ohm
Check list : 2.2nH

FB 180@100 MHz, 25% 1.5A

DCR_max=90 m

+1.05V_VCCP_GMCH

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

C538

1.05V
DDR2-800
26mA

3.3V
24.15mA for VCCA_TVA_DAC
39.48mA for VCCA_TVB_DAC
24.15mA for VCCA_TVC_DAC
Total 87.78mA

+1.5V

VCCA_PEG_BG

1.05V
50mA

VCCA_PEG_PLL
+1.25V for Teenah use(100mA)

0_6 +1.05VM_A_SM

AD48

AXF

4.7u/6.3V_6

+1.5V

SM CK

C517

HV

C512

1.5V
414uA

PEG

1.05V
24mA
R383

+1.8V_TXLVDS

A LVDS

ESR=15 m

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

A PEG

IV@220u/2.5V_3528

VTT

+1.05VM_DPLLA

IV@10uH_8_155mA
+ C573

+1.05V

USE same GND plane

VCCA_DAC_BG
VSSA_DAC_BG

TV

+1.05V

A25
B25

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

CRT

VCCA_DPLLA/B always keep to +1.05V

(If no use IV dynamic core power)

1210 10UH, 10%

0.45A DCR_max = 0.39
L20

B27
A26

3.3V
5mA

PLL

SP@.1u/10V_4

ESR=15 m

A SM

IV@220u/2.5V_3528

A CK

1.05V
64.8mA for DPLL_A/B

External Graphics
(GMCH Integrated Graphics Disable)

SP@:INT use 0.01U

EXT use 0 ohm

SP@:INT use 0.1U

EXT use 0 ohm
L18

+1.05V

10

C560

HDA

SP@
D

C561

IV&EV Dis/Enable setting

EV@

IV&EV Dis/Enable setting

+3V_VCCA_CRT_DAC

R428
IV@0_6

Power consumption reference to Intel

Cantiga chipset EDS Volume1. Section 10

IV@

If CRT have Flicker issue

STUFF 5.6 ohm

VTTLF1
VTTLF2
VTTLF3

.1u/10V_4

1.05V
1782mA

+1.05V

+1.05V_VCC_PEG

R466
C328

1.05V
456mA

AH48
AF48
AH47
AG47

4.7u/6.3V_6

C607
22u/6.3V_8

*short0805

+ C613
220u/2.5V_3528

C589
.1u/10V_4

VTTLF1
A8
VTTLF2
L1
AB2 VTTLF3
C518

C519

C526

.47u/6.3V_4

.47u/6.3V_4

.47u/6.3V_4

1.05V
Internal connect to power

BKP1608HS181T_6_1.5A

C226
10u/6.3V_8

CRB no 10U
Check list need min 10U~100U
for VCCA_QDAC

C235

C234

.1u/10V_4

.01u/25V_4

Power Net Name

1.05V

VCCA_PEG_BG

1.5V

VCCA_DPLLA

1.05V

VCCA_DPLLB

1.05V

VCCA_SM_#

1.05V

VCCA_HPLL

1.05V

VCCA_MPLL

1.05V

VCCA_SM_CK_#

1.05V

C289

VCCA_PEG_PLL

1.05V

SP@1u/10V_4

VCC_AXF_#

1.05V

VCCD_HPLL

1.05V

VCCD_PEG_PLL

1.05V

MODIFY
FB 220 @100 MHz, 25%, 2A
A

L22

+1.05V

1.05V
50mA

BKP1608HS181T_6_1.5A

+1.05VM_PEGPLL_RC R208

C344

C346

.1u/10V_4

.1u/10V_4

1/F_4
+1.8V

C348

1.8V
60.31mA

10u/6.3V_6

ESR=60m ohm

IV&EV Dis/Enable setting

R185

IV@0_6

+1.8V_DLVDS

SP@:INT use 1 U
EXT use 0 ohm

Cantiga(V)

VCC_AXG_#
VCC_AXG_NCTF_#

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

GMCH POWER
2

Sheet
1

10

of

42

GMCH-CANTIGA(CLG)

VSS

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233

BA16

VSS_235

AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CANTIGA_PM

VSS

VSS NCTF

11

U28J
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

VSS SCB

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

NC

U28I

AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

VSS_351
VSS_352
VSS_353
VSS_354
VSS_355

U24
U28
U25
U29
AJ6

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4

BH48
BH1
A48
C1

VSS_SCB_6
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43

A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
A47

CANTIGA_PM

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

GMCH VSS
Date:
5

Monday, April 13, 2009

Sheet
1

11

of

42

12

18p/50V_4
2
1

C450

RTC_RST#
SRTC_RST#
SM_INTRUDER#

A25
F20
C22

RTCRST#
SRTCRST#
INTRUDER#

R569
R568

330K/F_4
330K/F_4

ICH_INTVRMEN
LAN100_SLP

B22
A22

INTVRMEN
LAN100_SLP

Internal VRM enabled for

VccSus1_05, VccSus1_5,
VccCL1_5, VccLAN1_05 and
VccCL1_05.

24.9 Ohm pull up to 1.5V

for GLAN_COMPI/O is
required, no matter intel
LAN is used or not.

+3V_S5

+1.5V

GLAN_CLK

C13

LAN_RSTSYNC

F14
G13
D14

LAN_RXD0
LAN_RXD1
LAN_RXD2

D13
D12
E13

LAN_TXD0
LAN_TXD1
LAN_TXD2

R555

10K_4 ICH_GPIO56

B10

GLAN_DOCK#/GPIO56

R299

24.9/F_4

B28
B27

GLAN_COMPI
GLAN_COMPO

HDA_BIT_CLK_R
HDA_SYNC_R

AF6
AH4

HDA_BIT_CLK
HDA_SYNC

HDA_RST#_R

AE7

HDA_RST#

Internal pull-down
resistors that are
always enabled

AF4
AG4
AH3
AE5

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDOUT_R

AG5

HDA_SDOUT

AG7
AE8

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

SATA_LED#

AG8

SATALED#

25 SATA_RXN0
25 SATA_RXP0
25 SATA_TXN0
25 SATA_TXP0

SATA_TXN0_C
SATA_TXP0_C

AJ16
AH16
AF17
AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA_TXN1_C
SATA_TXP1_C

AH13
AJ13
AG14
AF14

T24
T26
25

C366
C365

25 SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

ODD (SATA) 25

.01u/16V_4
.01u/16V_4

C358
C359

25
25

.01u/16V_4
.01u/16V_4

SATA

FWH4/LFRAME#

K3

LFRAME# 26,31

LDRQ0#
LDRQ1#/GPIO23

J3
J1

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

A20GATE
A20M#

N7
AJ27

DPRSTP#
DPSLP#

AJ25
AE23

LDRQ0/1# : Internal PU

T39
T38

R294

HDA_SDOUT_R
B

Weak integrated PD on the HDA_SDOUT pin.

MXM_SDOUT_HDMI 21
HDA_SDOUT_HDMI 6
ACZ_SDOUT_AUDIO 27

31
3

H_FERR#_R

R481

AJ26
AD22

H_PWRGD 3

IGNNE#

AF25

H_IGNNE# 3

INIT#
INTR
RCIN#

AE22
AG25
L3

NMI
SMI#

AF23
AF24

STPCLK#

AH27
AG26

TP8

AG27

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10
AH18
AJ18

SATARBIAS#
SATARBIAS

R219
R215
R239

R292

10K_4

H_FERR# 3

H_INIT# 3
H_INTR 3

+3V

H_STPCLK# 3
H_THERMTRIP_R

R497

54.9/F_4

H_THERMTRIP_RR

T25

R483

56_4

R493

*0_4

*EV@33_4
*IV@33_4
33_4

R482

RTC
MXM_BIT_CLK_HDMI 21
HDA_BIT_CLK_HDMI 6
BIT_CLK_AUDIO 27
C369

C353

C360

*10p/50V_4

*10p/50V_4

*10p/50V_4

D39

*10p/50V_4

R213
R214
R253

HDA_RST#_R

*EV@33_4
*IV@33_4
33_4

C704

R561

MXM_RST#_HDMI 21
HDA_RST#_HDMI 6
ACZ_RST#_AUDIO 27

SRTC_RST#

1u/10V_4

1u/10V_4

1K_4

HDA_SDIN3
HDA_SDIN2

R228
R227

R566

20K_6
C706

*EV@0_4
*IV@0_4

MXM_SDIN_HDMI 21
HDA_SDIN_HDMI 6

Configuration

Flash Descriptor Security

Override Strap

PWROK

SATALED#

PCI Express Lane Reversal

(Lanes 1-4)

PWROK

Internal PU

TP3

XOR Chain Entrance

PWROK

PWROK

1u/10V_4

+5VPCU
R542

*MMBT3904

RTC_RST#
G3
*SHORT_ PAD

*68.1K/F_4

RTC_N03

This strap should only be enabled in manufacturing

environments using an external pull-up resistor.

CN20
BAT_CONN

R540
*150K/F_6

Change type

Description

ICH_TP3

HDA_SDOUT

RSVD

Enter XOR Chain

Normal opration(Default)

Set PCIE port config bit 1

PU/PD

*16K_6

G2
*SHORT_ PAD

Sampled

R543

Q31

20MIL

HDA_DOCK_EN/
GPIO33

XOR Chain Entrance /PCI Express*

Port Config 1 bit 1(Port 1-4)

3 RTC_N01

1
VCCRTC_2

Strap description

20K_6

C361

0 = The Flash Descriptor Security will be overridden.

1 = The security measures defined
in the Flash Descriptor will be in effect

HDA_SDOUT

R544

C698

South Bridge Strap Pin (1/3)

+VCCRTC

BAT54C

20MIL

*22_4

*10p/50V_4

Pin Name

20MIL

VCCRTC_1

For EMI

R223

Pjt: BCBAT54CZ04
Ons: BCBAT54CZ70

+3VPCU

Weak integrated PD on the HDA_SYNC pins

MXM_SYNC_HDMI 21
HDA_SYNC_HDMI 6
ACZ_SYNC_AUDIO 27

CLK_PCIE_SATA# 2
CLK_PCIE_SATA 2

HDA_BIT_CLK_R
R241
R220
R224

PM_THRMTRIP# 3,6

SATA_RBIAS_PN

*10p/50V_4

HDA_SYNC_R

+1.05V

No use Thermal trip SB side still PU 56ohm.(Serial R use 0ohm)

Use Thermal trip can share PU for CPU and SB side(And Serial R use 54.9 ohm)
PU L<2"

*EV@33_4
*IV@33_4
33_4

24.000 MHz is output from the ICH9M.

C362

R474
56_4

RCIN# 31
H_NMI 3
H_SMI# 3

THRMTRIP#

AJ7
AH7

+1.05V

56_4

FERR#

SATA_CLKN
SATA_CLKP

Layout note:
DPRSTP# , Daisy Chain
(SB>Power>NB>CPU)

R255
*56_4

24.9/F_4

HDA_BIT_CLK_R

C357

R484
*56_4

+3V

AJSLB8Q0T03

+1.05V

ICH_DPRSTP# 3,6,35
H_DPSLP# 3

SATABIAS L<0.5"

HD Audio
*EV@33_4
*IV@33_4
33_4

8.2K_4

GATEA20
H_A20M#

ICH9M REV 1.0

R225
R216
R221

26,31
26,31
26,31
26,31

CPUPWRGD

IHDA

HDA_SDIN2
HDA_SDIN3

27 ACZ_SDIN0

SATA HDD

E25

LAD0
LAD1
LAD2
LAD3

1M/F_6

K5
K4
L6
K2

ICH9M(CLG)

R570

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

RTCX1
RTCX2

+VCCRTC

C23
C24

18p/50V_4

CLK_32KX1
CLK_32KX2

RTC
LPC

C451

Intel ICH9M

U32A

3
4

EV@

R332
10M_6

LAN / GLAN
CPU

Y4
32.768KHZ

IV@

14

ICH_TP3

ICH_TP3

R545

*1K_4

Quanta Computer Inc.

PROJECT : ZR6

HDA_SDOUT_R

R240

*1K_4

Size

+3V

Rev
1A

ICH9M HOST
Date:

Document Number

Monday, April 13, 2009

Sheet
1

12

of

42

ICH9M(CLG)

13

U32D

INTA#
INTB#
INTC#
INTD#

J5
E1
J6
C4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
C/BE0#
C/BE1#
C/BE2#
C/BE3#

D8
B4
D6
A5

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

IRDY#

C14
D4
R2

PLT_RST#

PLTRST#
PCICLK
PME#

L29
L28
M27
M26

PERN2
PERP2
PETN2
PETP2

J29
J28
K27
K26

PERN3
PERP3
PETN3
PETP3

G29
G28
H27
H26

PERN4
PERP4
PETN4
PETP4

E29
E28
F27
F26

PERN5
PERP5
PETN5
PETP5

GLAN_TXN_SB
GLAN_TXP_SB

C29
C28
D27
D26

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

SPI_CLK_SB
SPI_CS0#
SPI_CS1#

D23
D24
F23

SPI_MOSI
SPI_MISO

D25
E23

USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
USBOC#8
USBOC#9
USBOC#10
USBOC#11

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

T54
T44
T43

WLAN

PCIRST#
DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

PCIRST#

26

PLT_RST# 6
PCLK_ICH 2

GLAN

26
26
26
26

28
28
28
28

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

GLAN_RXN
GLAN_RXP
GLAN_TXN
GLAN_TXP

PME# internal PU 18K~42K

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#

F1
G4
B6
A7
F13
F12
E6
F6

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

C431
C429

PLACE NEAR ICH9

WITHIN 600 MIL

T58
T51

T52

INTE#
INTF#
INTG#
INTH#

H4
K6
F2
G2

C423
C420

ICH9M REV 1.0

C

.1u/10V_4
.1u/10V_4

.1u/10V_4
.1u/10V_4

PCIE_TXN4_C
PCIE_TXP4_C

SB_USBBIAS

AG2
AG1

PCI-Express

PERN1
PERP1
PETN1
PETP1

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

V27
V26
U29
U28

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

6
6
6
6

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

6
6
6
6

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB27
AB26
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

6
6
6
6

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

6
6
6
6

T26
T25

CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

SPI

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#

Direct Media Interface

N29
N28
P27
P26

U32B

USB

AF29
AF28

DMI_IRCOMP_R

R249

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

24.9/F_4
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+

26
26
30
30
26
26
26
26
26
26

USBP6- 26
USBP6+ 26

+1.5V

EXT-USB
Cardreader
EXT-USB
BLUETOOTH
Wireless
M/B USB Port
C

USBP11- 24
USBP11+ 24

CAMERA

ICH9M REV 1.0

R226
22.6/F_4

L<0.5",Avoid routing next to clock/high speed signals.

+3V

South Bridge Strap Pin (2/3)

C468

Pin Name

.1u/10V_4
PLT_RST#
+3V

RN27
REQ3#
TRDY#
STOP#
DEVSEL#
+3V

6
7
8
9
10

5
4
3
2
1

REQ2#
FRAME#
REQ1#
INTD#

R346

TC7SH08FU

100K_4

8.2K_10P8R
+3V

RN26
INTC#
INTA#
SERR#
INTE#
+3V

6
7
8
9
10

5
4
3
2
1

INTF#
INTG#

+3V_S5

+3V

6
7
8
9
10

5
4
3
2
1

USBOC#2
USBOC#1
USBOC#6
USBOC#3

+3V_S5

10K_10P8R

6
7
8
9
10

5
4
3
2
1
8.2K_10P8R

PU/PD

PCI Express Port

Config 1 bit 0 (Port 1-4)

PWROK

0 = Default
1 = Setting bit 0

GNT2# / GPIO53

PCI Express Port

Config 2 bit 2 (Port 5-6)

PWROK

0 = Setting bit 2
1 = Default

GNT1# / GPIO51

ESI Strap(Server Only)

PWROK

0 = DMI for ESI-compatible

1 = Default

GNT3# / GPIO55

Top-Block Swap Override

PWROK

0 = "top-block swap" mode

1 = Default

GNT3#

R309

SPI_MOSI

Integrated TPM Enable

CLPWROK

0 = INT TPM disable(Default)

1 = INT TPM enable

SPI_MOSI

R277

GNT0#

Boot BIOS Selection 0

PWROK

GNT0#

R293

*1K_4

SPI_CS1#

R274

*1K_4

+3V

RN39

REQ0#

Configuration

RN25
USBOC#5
USBOC#4
USBOC#7
USBOC#0

8.2K_10P8R

LOCK#

Sampled

HDA_SYNC
PLTRST# 18,26,28,30,31

U19

Strap description

RN21
IRDY#
PERR#
INTB#
INTH#

USBOC#9
USBOC#11
USBOC#8
USBOC#10

8
6
4
2

7
5
3
1

+3V_S5

SPI_CS1# /
GPIO58 / CLGPIO6

10K_8P4R

Boot BIOS Selection 1

PCI_GNT#0

CLPWROK

SPI_CS#1

Boot Location

SPI

PCI

LPC(Default)

*1K_4

*10K_4

+3V_S5

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

ICH9M PCIE / PCI / USB

5

Sheet
1

13

of

42

+3V_S5
R547

10K_4

SMB_CLK_ME

R546

10K_4

SMB_DATA_ME

R552

2.2K_4

PCLK_SMB

D3A:(1/31) ASF issue:when iAMT is not implemented,

ICH8M SMBus and SMLink should be connected together to support slave mode
Connect SMLINK0 to SMBCLK and SMLINK1 to SMBDATA (Add R474,R475 for debug use)

ICH9M(CLG)

U32C

R336

10K_4

ICH_GPIO60

R284

10K_4

SYS_RST#

R548

10K_4
10K_4

PCIE_WAKE#

R549

8.2K_4

PM_BATLOW#

*10K_4

SMB_ALERT#

R286

R268

T34
6

10K_4

ICH_GPIO12

R327

10K_4

ICH_GPIO13

R287

8.2K_4

CLKRUN#

R281

8.2K_4

SERIRQ

R489

8.2K_4

THERM_ALERT#

R573

10K_4

EC_SCI#

PWRBTN : 16 ms of internal debounce

logic on this pin and internal PU 24K

R583

*10K_4

HDMI_SET

R282

*10K_4

SATACLKREQ#

R486

*10K_4

MCH_ICH_SYNC#

R479

10K_4

KBSMI#_ICH

R480

10K_4

LID591#_ICH

R554

10K_4

PM_STPPCI#

R337

10K_4

PM_STPCPU#

10K_4
ICH_GPIO57

R556

*100/F_4

R256

10K_4

CR_WAKE#

R290

10K_4

ICH_PWROK

R315

10K_4

HDMI_SET

RI#

R4
G19

SUS_STAT#/LPCPD#
SYS_RESET#

31

SMB_ALERT#

A17

PM_STPPCI#
PM_STPCPU#

A14
E19

CLKRUN#

CLKRUN#

E20
M5
THERM_ALERT# AJ23

D31
D32

KBSMI#
LID591#

31

KBSMI#_ICH
LID591#_ICH
HDMI_SET

BAS316
BAS316

AG19
AH21
AG21
A21
ICH_GPIO12
C12
ICH_GPIO13
C21
BOARD_ID0
AE18
BOARD_ID1
K1
PANEL_ID1
AF8
BOARD_ID3
AJ22
A9
D19
SATACLKREQ#
L1
CR_WAKE#
AE19
ICH_GPIO39
AG22
ICH_GPIO48
AF21
DMI_TERM_SEL AH24
ICH_GPIO57
A8

EC_SCI#

T55
T56
2 SATACLKREQ#

27
PCSPK
6 MCH_ICH_SYNC#
12 ICH_TP3

TPM Physical
Presence for
iTPM.

Stuff

T75
T76
T23

D21
A20

T82
31
24,31

L4

PCIE_WAKE#

VR_PWRGD_CLKEN

+3V_S5
R551

F19

SYS_RST#

M6

26,28,31 PCIE_WAKE#
31
SERIRQ
3 THERM_ALERT#

+3V

RI#

PM_SYNC#

2 PM_STPPCI#
2 PM_STPCPU#

DNBSWON#

R550

SYS_RST#

M7
MCH_ICH_SYNC# AJ24
ICH_TP3
B21
AH20
AJ20
AJ21

HDMI SET

R583

HDMI

R315

No HDMI

R571

*10K_4

CLK14
CLK48

STP_PCI#
STP_CPU#
CLKRUN#
WAKE#
SERIRQ
THRM#

P1
C16
E16
G17

S4_STATE#/GPIO26

C10

PWROK

G20

VRMPWRGD
TP12

DPRSLPVR/GPIO16
BATLOW#

SPKR
MCH_SYNC#
TP3
TP9
TP10
TP11

6,31
6,31

T47
ICH_PWROK

M2

*22_4

C377

R250

*10p/50V_4

*22_4

PM_DPRSLPVR 6,35

R3
D20

PM_LAN_ENABLE_R

R328

*short0402

D22

PM_RSMRST#_R

R317

*0_4

DNBSWON#

31

PM_RSMRST#_R

CK_PWRGD

R5

CK_PWRGD

CLPWROK

R6

MPWROK 6,31

SLP_M#

B16

T79

CL_CLK0
CL_CLK1

F24
B19

T81

CL_DATA0
CL_DATA1

F22
C19

T57

CL_VREF0
CL_VREF1

C25
A19

<Checklist ver0.8>
If integrated LAN is not used LAN_RST# tie it to GND.NC serial R from RSMRST#.
If Intel LAN is used with Wake On LAN, tie LAN_RST# to RSMRST# and NC 0ohm.

CL_RST0#
CL_RST1#

F21
D18

MEM_LED/GPIO24
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
WOL_EN/GPIO9

A16
C18
C11
C20

CL_PWROK must not assert after PWROK asserts for IAMT.

CL_PWROK to the NB and SB should be connected to existing PWROK inputs
on the NB and SB on a platform with no IAMT

CL_CLK0 6

CL VREF

CL_DATA0 6

CL_VREF0_SB
CL_VREF1_SB
CL_RST#0 6

T53
ICH_GPIO10
ICH_GPIO14
ICH_GPIO9

T80
R318
R312
R306

10K_4
10K_4
10K_4

VREF1 CRB connect to

+3V_S5
Checklist connect to
+3V(iAMT reserve)

<Checklist ver0.8>
The ICH9M Controller
Link 1 VREF circuit is
required only if Intel
AMT is to be supported.

+3V

+3V

+3V_S5

R563

ICH9M REV 1.0

CL_VREF1_SB

3.24K/F_6
CL_VREF0_SB

R558

C700

R313

C436

*453/F_4

*.1u/10V_4

453/F_4

.1u/10V_4

M/B ID ID0=0 -->ZK6 ,ID0=1 -->ZR6

Resume RST

ID1=0 -->UMA ,ID1=1 -->Discrete

EC_SCI#

ICH_PWROK

U15

Follow CHECK LIST V1.5

2
2
3

DELAY_VR_PWRGOOD
PWROK_EC

2
R289

+3V

+3V

+3V

+3V

MMBT3906
4.7K_4

+3V_S5

R487

R298

R230

*10K_4

*10K_4

EV@10K_4

10K_4

BOARD_ID3

BOARD_ID2

BOARD_ID1

BOARD_ID0

R491

R488

R308

R229

10K_4

10K_4

IV@10K_4

*10K_4

BAV99

3,6,31,35

PWROK_EC 31

100K_4

TC7SH08FU

D26
BAV99

R314
2.2K_4

ZD1 INTEL FAE (08/17)

"Add RSMRST# isolation (important!!! See
ww22 Santa Rosa MoW)"
Default stuff for Teenah(Interposer) chipset
ZS2 Intel FAE suggestion to add for to protect
RTC/CMOS data from corruption when system
encounters an abnormal power down
sequence

Board ID

A-SMT,ID1=0 -->UMA ,ID1=1 -->Discrete

South Bridge Strap Pin (3/3)

Strap description

CLK Enable

Sampled

Configuration

+3V

PU/PD

C419

GPIO20

Reserved

PWROK

SPKR

No Reboot

PWROK

DMI Termination
Voltage
5

PWROK

*.1u/10V_4
U20

0 = Default
1 = No Reboot mode
0 = for desktop applications
1 = for mobile applications
Internal PU

35 VR_PWRGD_CK410#
PCSPK

R271

*1K_4

1
2
3

ID2

ID1

ID0

0/1 1

0/1 1

0/1 1

0/1 1

0/1 1

VR_PWRGD_CLKEN

+3V

Quanta Computer Inc.

R339

PROJECT : ZR6

100K_4
R485

ID3

NC7SZ04

DMI_TERM_SEL

R492
D36

ICH_GPIO48

ICH_GPIO39

10K_4

10K_4

R232

RSMRST# 31

R291

DELAY_VR_PWRGOOD need PU 2K to +3V.

ZS2 PU at power side

*.1u/10V_4

R490

1
Q17

10K_4

PANEL_ID1
C430

GPIO49

R319

*3.24K/F_6

ZS2 Default not

support IAMT. So this
interface follow
CRB/Checklist PU
only

R329

Pin Name

PM_BATLOW#

PWRBTN#

+3V_S5
10K_4

*10p/50V_4

CLKUSB_48
SUSB#
SUSC#

T40

B13

+3V
R245

R288
14M_ICH

T35

PM_RSMRST#_R

C428
+3V
14M_ICH 2
CLKUSB_48 2

LAN_RST#
RSMRST#

GPIO1
GPIO6
GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
ENERGY_DETECT/GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

10K_4
10K_4
10K_4

H1
AF3

SLP_S3#
SLP_S4#
SLP_S5#

SMBALERT#/GPIO11

For EMI(EMI)

BOARD_ID2
PANEL_ID0 R231
ICH_GPIO36 R236
ICH_GPIO37 R233

AH23
AF19
AE21
AD20

SUSCLK

PMSYNC#/GPIO0

ICH PWROK

+3V_S5

SATA
GPIO

SMB

RI#

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

Clocks

PDAT_SMB

10K_4

SYS GPIO
Power MGT

2.2K_4

R285

SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1

MISC
GPIO
Controller Link

R553

PCLK_SMB
G16
PDAT_SMB
A13
ICH_GPIO60
E17
SMB_CLK_ME
C17
SMB_DATA_ME B18

2,16,26,28 PCLK_SMB
2,16,26,28 PDAT_SMB

14

SATA[x]GP pins if unused require

8.2-k to 10-k pull-up to Vcc3_3 or
8.2-k to 10-k pull-down to ground

*1K_4

Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

ICH9M GPIO
4

Sheet
1

14

of

42

ICH9M(CLG)
2~3.456v
3.6uA_G3

+5V_S5

SB_V5REF
C458

100/F_6

5V
S0:2mA
S3/4/5:1mA

R498

1u/10V_4
+5VPCU_ICH_V5REF_SUS

1 CH751

MODIFY

100/F_6

C639
.1u/10V_4

1.5V
646mA

330 Ohms@ 100 MHz , 0805

+1.5V

AE1

L24

2 BLM21PG331SN1D_8_1.5A

+ C657

C408

220u/2.5V_3528

22u/6.3V_8

+1.5V_B

C388

C386

2.2u/6.3V_6

22u/6.3V_8

1.5V
47mA
10uH_8_155mA +1.5V_APLL_ICH

L43

+1.5V

C631

10u/6.3V_6

1u/10V_4

VCC1_5_A
1.5V
1342mA

C380
1u/10V_4

1u/10V_4

1.5V
11mA
C381
.1u/10V_4

C441

3.3V
+3V
S0:19mA
S3/4/5:78mA

R342

.1u/10V_4

+1.5V

L33

1uh_6_25mA

1.5V
80mA

VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

B9
F9
G3
G6
J2
J7
K7

AD8

TP_VCCSUS1_5_ICH_1

VCCSUS1_5[2]

F18

VCCSUS1_5_INT_ICH

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

A18
D16
D17
E22

VCCSUS3_3[05]

AF1

VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

AC9

VCC1_5_A[17]

AC18
AC19

VCC1_5_A[18]
VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10
G9

VCC1_5_A[21]
VCC1_5_A[22]

AC12
AC13
AC14

VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]

VCCLAN3_3[1]
VCCLAN3_3[2]

C460

A27

VCCGLANPLL

.1u/10V_4

D28
D29
E26
E27

VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

C461
2.2u/6.3V_6

AD19
AF20
AG24
AC20

VCCSUS1_5[1]

VCCLAN1_05[1]
VCCLAN1_05[2]

10u/6.3V_6

AC10

VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

AC8
F17

A12
B12

C462

1.5V
23mA

VCC3_3[07]

VCCSUS1_05[1]
VCCSUS1_05[2]

A10
A11

+1.5V_ICH_GLANPLL_R

AJ6

VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]

A26

+1.5V_ICH_VCCDMIPLL

1.5V
23mA

L28

1uh_6_25mA

+1.5V

500 mA, 20%

C414

C415

.01u/25V_4

10u/6.3V_6

1.05V
48mA
+1.05V_ICH_DMI

L27

C401

+1.05V

5 Ohms @ 100 MHz , 0.7A

C402

4.7u/6.3V_6

NBQ160808T-100Y-N_6_400mA

22u/6.3V_8
+1.05V

1.05V
2mA
C405

C413

C382

.1u/10V_4

.1u/10V_4

4.7u/6.3V_6

C370

C378

C379

.1u/10V_4

.1u/10V_4

.1u/10V_4

3.3V
308mA

+3V

Impact ICH9M VCCHDA and

VCCSUSHDA supply 1.5V/3.3V
C438

C374

C417

.1u/10V_4

.1u/10V_4

.1u/10V_4
C632

R475

EV@0_6 +3V

R477

IV@0_6 +1.5V

1.5V / 3.3V
11mA

.1u/10V_4

+3V_HDA_IO_ICH
+3V_VCCSUSHDA

R478

TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2

C633

T29
T41

R476

.1u/10V_4

EV@0_6

+3V_S5

IV@0_6

+1.5VSUS

1.5V / 3.3V
S0:11mA
S3/4/5:1mA

T28

Support INT HDMI HDA

interface. These power
only support 1.5V.Device
must to meet.

NOTE:
If (G)MCH's HD Audio signals are connected to ICH9M for
iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
only on 1.5V. These power pins on ICH9M can be supplied
with 3.3V if and only if (G)MCH's HDA is not connected to
ICH9M. Consequently, only 1.5V audio/modem codecs can
be used on the platform.

C427
.1u/10V_4

VCCSUS1_05 power by VCC1_05 in S0 / VCCSUS3_3 in S3/S4/S5

VCCSUS1_5 power by VCC1_5_A in S0 / VCCSUS3_3 in S3/S4/S5
+3V_S5

VCCCL1_05

G22

VCCCL1_05_INT_ICH

VCCCL1_5

G23

VCCCL1_5_INT_ICH

VCCCL3_3[1]
VCCCL3_3[2]

A24
B24

C392

C396

C393

.022u/16V_4

.022u/16V_4

.1u/10V_4

C425
C421

C426

*1u/10V_4

*.1u/10V_4

.1u/10V_4

3.3V
S0:212mA
S3/4/5:53mA

VCCCL1_05 power by VCC1_05_A in S0

VCCCL1_5 power by VCC1_5_A in S0

3.3V
S0:19mA
S3/4/5:73mA
VCCCL3_3

GLAN POWER

If use SB MAC for LAN function.

And support wake up need
connect to relation power.

AG29

VCC3_3[02]

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

VCCLAN3_3

*short0603

VCC3_3[01]

AJ3

VCCUSBPLL

VCCLAN1_05_INT_ICH

AB23
AC23

AJ4

AJ5

.1u/10V_4

V_CPU_IO[1]
V_CPU_IO[2]

.1u/10V_4

VCCHDA

USB CORE

1.05V , Powered by VCC1_05 in S0

W23
Y23

.1u/10V_4

VCCSUSHDA

AA7
AB6
AB7
AC6
AC7

C424

VCC_DMI[1]
VCC_DMI[2]

C404

VCCSATAPLL

ATX

C385

R29

C394

AJ19

ARX

C630

VCCDMIPLL

U32E
+1.05V

VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCA3GP

V5REF_SUS

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

CORE

D33

.1u/10V_4

V5REF

VCCP_CORE

+3V_S5

.1u/10V_4

A6

PCI

R335

C705

VCCRTC

VCCPSUS

+5V

1 CH751

C707

5V
2mA

1.05V
1634mA

U32F
A23

+VCCRTC

D27

15

VCCPUSB

PER INTEL SUGGESTION:

CHANGE TO 100OHM & 1UF

EV@

+3V

Power consumption reference to

Intel ICH9 Family EDS Rev 1.6

IV@

R341

*short0603

+3V

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

ICH9M REV 1.0

If use SB MAC for LAN function. And

support wake up need connect to
relation power.

VCCGLAN3_3
ICH9M REV 1.0

+1.5V_B
C389

MODIFY

3.3V
1mA

+3V

4.7u/6.3V_6

R320

*short0603

VCCGLAN3_3

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

ICH9 POWER
5

Sheet
1

15

of

42

DDR3 (DDR)

2
3

2,14,26,28 PDAT_SMB

TP2

R60
R61

10K/F_4
10K/F_4

8
8
8
6
6
6
6
6
6
6
6
8
8
8

M_A_BS0
M_A_BS1
M_A_BS2
M_CS#0
M_CS#1
M_CLK0
M_CLK#0
M_CLK1
M_CLK#1
M_CKE0
M_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

17
17

SCL_DDR
SDA_DDR

6
M_ODT0
6
M_ODT1
8 M_A_DM[7:0]

8 M_A_DQS[7:0]

8 M_A_DQS#[7:0]
B

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

DIMM0_SA0
DIMM0_SA1
SCL_DDR
SDA_DDR

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

+3V

10K_4
SDA_DDR

RHU002N06

2,14,26,28 PCLK_SMB

SCL_DDR

1
Q18
RHU002N06

+1.5VSUS

CN13B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

6 PM_EXTTS#0
6,17 DDR3_DRAMRST#

198
30

EVENT#
RESET#

+SMDDR_VREF

1
126

VREF_DQ
VREF_CA

+3V

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

DDR3-DIMM0

+1.5VSUS

10K_4

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

R377

Q19

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

M_A_A[14:0]

R378

M_A_DQ[63:0] 8

CN13A

PC2100 DDR3 SDRAM SO-DIMM

(204P)

16

+3V

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

+SMDDR_VTERM

G1
G2

G1
G2

DDR3-DIMM0

+SMDDR_VREF

Place these Caps near So-Dimm0.

C109 *470P/50V_4
R78
C207

C186

10U/6.3V_6

10U/6.3V_6

C165
10U/6.3V_6

C145

C134

10U/6.3V_6

C236

10U/6.3V_6

C196

10U/6.3V_6

C173

*.1U/10V_4

C155

.1U/10V_4

C137

*.1U/10V_4

C214

.1U/10V_4

.1U/10V_4

*0_6

+SMDDR_VTERM 17,36,39

C628
+

R87

*10K/F_4

R93

*10K/F_4

+1.5VSUS

330U/6.3V_6X5.7

+3V

+SMDDR_VREF

+SMDDR_VTERM

C108

C106

C93

C90

C86

C76

C78

C77

C72

C71

C73

.1U/10V_4

2.2U/6.3V_6

2.2U/6.3V_6

.1U/10V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

*10U/6.3V_6

*10U/6.3V_6

10U/6.3V_6

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

DDR3 DIMM-0(H=5.2)
Date:
5

Monday, April 13, 2009

16

Sheet
1

of

42

17

DDR3 (DDR)

R72
R71

10K/F_4
10K/F_4

+3V

M_B_BS0
M_B_BS1
M_B_BS2
M_CS#2
M_CS#3
M_CLK2
M_CLK#2
M_CLK3
M_CLK#3
M_CKE2
M_CKE3
M_B_CAS#
M_B_RAS#
M_B_WE#

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

16 SCL_DDR
16 SDA_DDR

8 M_B_DQS[7:0]

8 M_B_DQS#[7:0]
B

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

DIMM1_SA0
DIMM1_SA1

6
M_ODT2
6
M_ODT3
8 M_B_DM[7:0]

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

+1.5VSUS

CN12B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

6 PM_EXTTS#1
6,16 DDR3_DRAMRST#

198
30

EVENT#
RESET#

+SMDDR_VREF

1
126

VREF_DQ
VREF_CA

+3V

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

DDR3-DIMM1

+1.5VSUS

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

TP3
8
8
8
6
6
6
6
6
6
6
6
8
8
8

M_B_DQ[63:0] 8

CN12A

M_B_A[14:0]

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

G1
G2

+SMDDR_VTERM

G1
G2

DDR3-DIMM1

Place these Caps near So-Dimm1.

C175

C233

C194

C252

C150

C208

C217

C138

C156

C172

C192

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

*.1U/10V_4

.1U/10V_4

*.1U/10V_4

.1U/10V_4

.1U/10V_4

C502
+
*330U/6.3V_6X5.7

+3V

+SMDDR_VREF

+SMDDR_VTERM

C115

C110

C92

C89

C81

C82

C80

C79

C74

C83

C84

.1U/10V_4

2.2U/6.3V_6

2.2U/6.3V_6

.1U/10V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

*10U/6.3V_6

*10U/6.3V_6

10U/6.3V_6

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

DDR3 DIMM-1(H=9.2)
Date:
5

Monday, April 13, 2009

17

Sheet
1

of

42

18

NV10M (VGA)
U27A

+VGA1.1V

BGA969-NVIDIA-NB9P-GS

~ 500mA
D

C258

C280

C271

EV@22U/6.3V_8

C256

EV@1U/6.3V_4
EV@4.7U/6.3V_6

C276

C269

C564

EV@.1U/10V_4

EV@.1U/10V_4
EV@.47U/6.3V_4

EV@1U/6.3V_4

+VGA1.1V

1600mA

C568

C566

C282

EV@22U/6.3V_8

C558

EV@1U/6.3V_4
EV@4.7U/6.3V_6

C275

C257

EV@.47U/6.3V_4

EV@.1U/10V_4

EV@.47U/6.3V_4

<SKU>

AK16
AK17
AK21
AK24
AK27

AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16

PEX_RX0
PEX_RX0*
PEX_RX1
PEX_RX1*
PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX10*
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*

AP17
AN17
AN19
AP19
AR19
AR20
AP20
AN20
AN22
AP22
AR22
AR23
AP23
AN23
AN25
AP25
AR25
AR26
AP26
AN26
AN28
AP28
AR28
AR29
AP29
AN29
AN31
AP31
AR31
AR32
AR34
AP34

PEG_TXP0_R
PEG_TXN0_R
PEG_TXP1_R
PEG_TXN1_R
PEG_TXP2_R
PEG_TXN2_R
PEG_TXP3_R
PEG_TXN3_R
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15

PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*

AL17
AM17
AM18
AM19
AL19
AK19
AL20
AM20
AM21
AM22
AL22
AK22
AL23
AM23
AM24
AM25
AL25
AK25
AL26
AM26
AM27
AM28
AL28
AK28
AK29
AL29
AM29
AM30
AM31
AM32
AN32
AP32

C_PEG_RXP0
C_PEG_RXN0
C_PEG_RXP1
C_PEG_RXN1
C_PEG_RXP2
C_PEG_RXN2
C_PEG_RXP3
C_PEG_RXN3
C_PEG_RXP4
C_PEG_RXN4
C_PEG_RXP5
C_PEG_RXN5
C_PEG_RXP6
C_PEG_RXN6
C_PEG_RXP7
C_PEG_RXN7
C_PEG_RXP8
C_PEG_RXN8
C_PEG_RXP9
C_PEG_RXN9
C_PEG_RXP10
C_PEG_RXN10
C_PEG_RXP11
C_PEG_RXN11
C_PEG_RXP12
C_PEG_RXN12
C_PEG_RXP13
C_PEG_RXN13
C_PEG_RXP14
C_PEG_RXN14
C_PEG_RXP15
C_PEG_RXN15

PEX_REFCLK
PEX_REFCLK*

AR16
AR17

CLK_PCIE_VGA
CLK_PCIE_VGA#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT*

AJ17
AJ18

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5

PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24
PEX_IOVDDQ_25

+3V

C153

C179

C188

EV@1U/6.3V_4

EV@.1U/10V_4

EV@.1U/10V_4

37

J10
J11
J12
J13
J9

VGA_SENSE

VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5

AD20

VDD_SENSE

AD19

GND_SENSE

AG14

PEX_PLLVDD

PCI EXPRESS

SI-2 4/10 For Nvidia recommend.

100mA

+VGA1.1V
L16

EV@MLG1608B10NJ_6

+PEX_PLLVDD

12~16 mils width

C255

C249

C254

C243

C268

EV@4.7U/6.3V_6

EV@4.7U/6.3V_6

EV@1U/6.3V_4

EV@.1U/10V_4

EV@.01U/16V_4 AG19

AG20

PEX_CAL_PD_VDDQ

PEX_CAL_PU_GND

A2
AB7
AD6
AF6
AG6
AJ5
AK15
AL7
D35
E35
E7
F7
H32
M7
P6
P7
R7
U7
V6

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19

RN28
RN29
RN30
RN31

C317
C318
C304
C303
C333
C332
C316
C315
C302
C301
C341
C340
C313
C314
C300
C299
C312
C311
C338
C337
C298
C297
C310
C309
C335
C334
C296
C295
C308
C307
C326
C327

R170

3
1
3
1
3
1
3
1

4
2
4
2
4
2
4
2

EV@0_4P2R

PEG_TXP0 7,24
PEG_TXN0 7,24
PEG_TXP1 7,24
PEG_TXN1 7,24
PEG_TXP2 7,24
PEG_TXN2 7,24
PEG_TXP3 7,24
PEG_TXN3 7,24
PEG_TXP4 7
PEG_TXN4 7
PEG_TXP5 7
PEG_TXN5 7
PEG_TXP6 7
PEG_TXN6 7
PEG_TXP7 7
PEG_TXN7 7
PEG_TXP8 7
PEG_TXN8 7
PEG_TXP9 7
PEG_TXN9 7
PEG_TXP10 7
PEG_TXN10 7
PEG_TXP11 7
PEG_TXN11 7
PEG_TXP12 7
PEG_TXN12 7
PEG_TXP13 7
PEG_TXN13 7
PEG_TXP14 7
PEG_TXN14 7
PEG_TXP15 7
PEG_TXN15 7

EV@0_4P2R
EV@0_4P2R
EV@0_4P2R

EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4

PEG_RXP0 7
PEG_RXN0 7
PEG_RXP1 7
PEG_RXN1 7
PEG_RXP2 7
PEG_RXN2 7
PEG_RXP3 7,24
PEG_RXN3 7
PEG_RXP4 7
PEG_RXN4 7
PEG_RXP5 7
PEG_RXN5 7
PEG_RXP6 7
PEG_RXN6 7
PEG_RXP7 7
PEG_RXN7 7
PEG_RXP8 7
PEG_RXN8 7
PEG_RXP9 7
PEG_RXN9 7
PEG_RXP10 7
PEG_RXN10 7
PEG_RXP11 7
PEG_RXN11 7
PEG_RXP12 7
PEG_RXN12 7
PEG_RXP13 7
PEG_RXN13 7
PEG_RXP14 7
PEG_RXN14 7
PEG_RXP15 7
PEG_RXN15 7

CLK_PCIE_VGA 2
CLK_PCIE_VGA# 2
*EV@200_4
D7

VGA_RST#

PEX_RST*

AM16

PEX_CLKREQ*

AR13

T73

PEX_TERMP

AG21

PEX_TERMP

R115

EV@2.49K/F_4

TESTMODE

AP35

TESTMODE

R456

EV@10K/F_4

PLTRST# 13,26,28,30,31

*EV@BAS316
R43
*EV@100K/F_4

R42

EV@0_4

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

NV10X (PCIE I/F) 1/5

Date:
5

Sheet

Monday, April 13, 2009

1

18

of

42

NV10M (VGA)

23
23
23
23
23
23
23

VMA_MA3
VMA_MA0
VMA_MA2
VMA_MA1
VMA_MA3H
VMA_MA4H
VMA_MA5H

23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23

VMA_CS0#
VMA_WE#
VMA_BA0
VMA_CKE
VMA_ODT
VMA_MA2H
VMA_MA12
VMA_RAS#
VMA_MA11
VMA_MA10
VMA_BA1
VMA_MA8
VMA_MA9
VMA_MA6
VMA_MA5
VMA_MA7
VMA_MA4
VMA_CAS#

23

VMA_BA2

BGA969-NVIDIA-NB9P-GS
<SKU>

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7

P30
P32
J30
H34
AF32
AF35
AL32
AL34

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7

N31
L34
J32
H35
AE31
AC33
AJ32
AJ34

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7

N32
L35
H31
G35
AD32
AC34
AJ31
AJ35

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

P29
R29
L29
M29
AD29
AE29
AG29
AH29

FBA_WDS0
FBA_WDS0*
FBA_WDS1
FBA_WDS1*
FBA_WDS2
FBA_WDS2*
FBA_WDS3
FBA_WDS3*

+1.8V

AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
J23
J24
J29

19

U27C

V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29

Add for 64x16 vram

U27B

BGA969-NVIDIA-NB9P-GS
<SKU>

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

R30
R32
P31
N30
L31
M32
M30
L30
P33
P34
N35
P35
N34
L33
L32
N33
K31
K30
G30
K32
G32
H30
F30
G31
H33
K35
K33
G34
K34
E33
E34
G33
AG30
AH31
AG32
AF31
AF30
AD30
AC32
AE30
AE32
AF33
AF34
AE35
AE33
AE34
AC35
AB32
AN33
AK32
AL33
AM33
AL31
AK30
AJ30
AH30
AM35
AH33
AH35
AH32
AH34
AM34
AL35
AJ33

FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*

T32
T31
AC31
AC30

MEMORY I/F A

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

23 VMA_DQ[63..0]
23 VMA_DM[7..0]
23 VMA_WDQS[7..0]
23 VMA_RDQS[7..0]

Add for 64x16 vram

R130

EV@10K/F_4

VMA_ODT

R141

EV@10K/F_4

VMA_CKE

for DDR2 need use

CMD11(CKE) and
CMD12(ODT)

+1.8V

FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27

FB_VREF

J27

VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#

+FB_VREF1

use internal Vref, ext

divider no stuff

VMA_CLK0 23
VMA_CLK0# 23
VMA_CLK1 23
VMA_CLK1# 23

+1.8V

R100
*EV@1K/F_4

15mils width

C128
*EV@.1U/10V_4

R97
*EV@1K/F_4

C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
F24
C25
E22
C20
B22
A19
D22
D20
E19
D19
F18
C19
F22
C23
B20
A20

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30

F11
D10
D15
A16
D27
D28
D34
A34

FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7

E10
A10
D14
C14
E26
B26
D32
A32

FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7

D9
B10
E14
B14
F26
A26
D31
A31

FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7

G11
G12
G14
G15
G24
G25
G27
G28

FBC_WDS0
FBC_WDS0*
FBC_WDS1
FBC_WDS1*
FBC_WDS2
FBC_WDS2*
FBC_WDS3
FBC_WDS3*

N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27

FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38

MEMORY I/F B

FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63

D11
E11
F10
D8
F8
F9
E8
F12
B11
C13
A11
B8
A8
C8
C11
C10
D12
E13
F17
F15
F16
E16
F14
F13
D13
A13
B13
A14
C16
A17
B16
D16
D24
D26
E25
F25
F27
E28
F28
D29
A25
B25
D25
C26
C28
B28
A28
A29
E29
F29
D30
E31
C33
D33
F32
E32
B29
C29
B31
C31
B32
C32
B34
B35

FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*

E17
D17
D23
E23

FB_CAL_TERM_GND

For Debug only

FBA_DEBUG

FB_DLLAVDD0

AG27

FB_PLLAVDD0

AF27

FBA_DEBUG

+FB_PLLAVDD

*EV@60.4/F_4

R119

FB_CAL_PD_VDDQ
FB_CAL_PU_GND

T30

+1.8V

FBC_DEBUG

K27 FB_CAL_PD_VDDQ

R99

EV@30.1/F_4

R111

EV@30.1/F_4

M27 FB_CAL_TERM_GND

R104

*EV@30.1/F_4

G19 FBC_DEBUG

R95

*EV@60.4/F_4

L27

FB_CAL_PU_GND

R91 Install for DDR3

L15
EV@HCB1608KF-181T15_6

15mils width
C146

C244

C122

EV@.1U/10V_4

EV@.1U/10V_4

EV@1U/6.3V_4

EV@4.7U/6.3V_6

+1.8V

R86 no stuff

+VGA1.1V

C139

+1.8V

G96 only

FB_DLLAVDD1

J19

FB_PLLAVDD1

J18

+FB_PLLAVDD
C140
C242
*EV@.1U/10V_4
*EV@.1U/10V_4

+1.8V

C545

+1.8V

C127

*EV@22P/50V_4
A

C574

C94

EV@22P/50V_4

EV@4.7U/6.3V_6

*EV@22P/50V_4

C112

C509

C540

EV@.47U/6.3V_4
EV@.47U/6.3V_4

C507

C218

EV@4.7U/6.3V_6
EV@.1U/10V_4

C169

C277

EV@.47U/6.3V_4
EV@.47U/6.3V_4

C511

C164

EV@.1U/10V_4
EV@.1U/10V_4

C176

C148

EV@.1U/10V_4
EV@.1U/10V_4

C510

C213

EV@.1U/10V_4
EV@.1U/10V_4

EV@.1U/10V_4

+1.8V

C508

C111

EV@4.7U/6.3V_6

C117

C141

EV@.47U/6.3V_4
EV@.47U/6.3V_4

C114

C113

EV@4.7U/6.3V_6
EV@.1U/10V_4

C133

C130

EV@.47U/6.3V_4
EV@.47U/6.3V_4

C147

C195

EV@.1U/10V_4
EV@.1U/10V_4

C230

C152

EV@.1U/10V_4
EV@.1U/10V_4

C206

C136

Quanta Computer Inc.

EV@.1U/10V_4
EV@.1U/10V_4

EV@.1U/10V_4

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

NV10X (MEMORY I/F) 2/5

5

Sheet
1

19

of

42

+1.8V

NV10M (VGA)
L41

L14

C578

C575

C279

EV@4.7U/6.3V_6

EV@4700P/25V_4

EV@470P/50V_4

20

<SKU>

AK9

*EV@1K/F_4

+IFPAB_IOVDD

EV@HCB1608KF-181T15_6

IFPAB_PLLVDD

AJ11

IFPAB_RSET

AG9

IFPA_IOVDD

AG10

IFPB_IOVDD

C247

C246

C251

C265

C250

C259

EV@4.7U/6.3V_6

EV@4.7U/6.3V_6

EV@4700P/25V_4

EV@4700P/25V_4

EV@470P/50V_4

EV@470P/50V_4

IFPAB(LVDS)

50 mA
50 mA

+1.8V

L40

+IFPCD_PLLVDD

EV@HCB1608KF-181T15_6

C132

C572

C260

C261

EV@1U/6.3V_4

EV@4.7U/6.3V_6

EV@4700P/25V_4

EV@470P/50V_4

AJ9
R432

+VGA1.1V
L42

EV@1K/F_4 AK7

IFPCD_PLLVDD

IFPCD

IFPCD_RSET

IFPC

+IFPCD_IOVDD

EV@HCB1608KF-181T15_6

AJ8

IFPC_IOVDD

AK8

IFPD_IOVDD

C579

C581

C576

C584

C287

C274

EV@4.7U/6.3V_6

EV@1U/6.3V_4

EV@1U/6.3V_4

EV@4700P/25V_4

EV@470P/50V_4

EV@470P/50V_4

IFPEF_PLLVDD

IFPEF_IOVDD

IFPD

AJ6

IFPEF_PLLVDD

AL1

IFPEF_RSET

AE7

IFPE_IOVDD

T72
R164
EV@10K/F_4

AD7

IFPF_IOVDD

+DACA_VDD

AJ12

DACA_VDD

DACA_VREF

AK12

DACA_VREF

DACA_RSET

AK13

DACA_RSET

IFPA_TXC
IFPA_TXC*
IFPA_TXD0
IFPA_TXD0*
IFPA_TXD1
IFPA_TXD1*
IFPA_TXD2
IFPA_TXD2*
IFPA_TXD3
IFPA_TXD3*
IFPB_TXC
IFPB_TXC*
IFPB_TXD4
IFPB_TXD4*
IFPB_TXD5
IFPB_TXD5*
IFPB_TXD6
IFPB_TXD6*
IFPB_TXD7
IFPB_TXD7*

AM11
AM12
AM8
AL8
AM10
AM9
AK10
AL10
AK11
AL11
AP13
AN13
AN8
AP8
AP10
AN10
AR11
AR10
AN11
AP11

AUX*
AUX
DPL3_TXC
DPL3_TXC
DPL2_TXD0
DPL2_TXD0
DPL1_TXD1
DPL1_TXD1
DPL0_TXD2
DPL0_TXD2
AUX
AUX
DPL3_TXC
DPL3_TXC
DPL2_TXD0
DPL2_TXD0
DPL1_TXD1
DPL1_TXD1
DPL0_TXD2
DPL0_TXD2

AN3
AP2
AR2
AP1
AM4
AM3
AM5
AL5
AM6
AM7
AN4
AP4
AR4
AR5
AP5
AN5
AN7
AP7
AR7
AR8

IFPE_AUX
IFPE_AUX*
IFPE_L0
IFPE_L0*
IFPE_L1
IFPE_L1*
IFPE_L2
IFPE_L2*
IFPE_L3
IFPE_L3*
IFPF_AUX
IFPF_AUX*
IFPF_L0
IFPF_L0*
IFPF_L1
IFPF_L1*
IFPF_L2
IFPF_L2*
IFPF_L3
IFPF_L3*

AE4
AD4
AH6
AH5
AH4
AG4
AF4
AF5
AE6
AE5
AF3
AF2
AL2
AL3
AJ3
AJ2
AJ1
AH1
AH2
AH3

IFPEF

R425
EV@10K/F_4

+3V
L17

EV@HCB1608KF-181T15_6

C285

C270

C284

C281

EV@4.7U/6.3V_6

EV@4700P/25V_4

EV@470P/50V_4

EV@.1U/10V_4

DACA(CRT)

R454
EV@124/F_4

R431
EV@10K/F_4

AG7

DACC_VDD

T71

AK6

DACC_VREF

T70

AH7

DACC_RSET

DACC(CRT2)

R145
EV@10K/F_4

AC6

DACB_VDD

T68

AC5

DACB_VREF

T67

AB6

DACB_RSET

+NV_PLLVDD

EV@HCB1608KF-181T15_6
C227

C224

C238

C241

C245

EV@1U/6.3V_4

EV@1U/6.3V_4

EV@1U/6.3V_4

EV@.1U/10V_4

EV@.1U/10V_4

AE9

PLLVDD

AD9

VID_PLLVDD

AF9

XTAL_PLL

HDMI_CLKHDMI_CLK+
HDMI_TX0N
HDMI_TX0P
HDMI_TX1N
HDMI_TX1P
HDMI_TX2N
HDMI_TX2P

24
24
24
24
24
24
24
24

TMDS channel two

Display port output

EV_VGA_GRN 24

DACA_BLUE

AL14

EV_VGA_BLU 24

DACA_HSYNC
DACA_VSYNC

AM13
AL13

CRT_HSYNC
CRT_VSYNC

AK4

DACC_GREEN

AL4

EV@33_4
EV@33_4

EV_VGA_RED

R187

EV@150/F_4

EV_VGA_GRN

R188

EV@150/F_4

EV_VGA_BLU

R189

EV@150/F_4

Close to GPU

EV_HSYNC 24
EV_VSYNC 24
EV_CRTDCLK 24
EV_CRTDDAT 24

+3V

AJ4
AM1
AM2
G3
G2

DACB_RED

AA4

DACB_GREEN

AB4
Y4
AB5

I2CB_SCL
I2CB_SDA

R404
R405

EV@2.2K_4
EV@2.2K_4
B

SI Build
T69

XTAL_SSIN
XTAL_OUTBUFF

D2
D1

27M_SS
BXTALOUT

XTAL_IN

B1

27M_NONSS

XTAL_OUT

B2

SP_PLLVDD

R190
R191

G1
G4

DACC_RED

DACB_CSYNC

65mA
50mA
25mA

EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4

EV_VGA_RED 24

DACB_BLUE

+VGA1.1V

C293
C294
C305
C306
C323
C324
C322
C321

AM15

DACC_BLUE

DACB(TV)

Fix Ball out and Pin Name

HDMI_CLK-_R
HDMI_CLK+_R
HDMI_TX0N_R
HDMI_TX0P_R
HDMI_TX1N_R
HDMI_TX1P_R
HDMI_TX2N_R
HDMI_TX2P_R

AM14

I2CB_SCL
I2CB_SDA
+DACC_VD

DACA_RED

DACC_HSYNC
DACC_VSYNC

EV_TXLCLKOUT+ 24
EV_TXLCLKOUT- 24
EV_TXLOUT0+ 24
EV_TXLOUT0- 24
EV_TXLOUT1+ 24
EV_TXLOUT1- 24
EV_TXLOUT2+ 24
EV_TXLOUT2- 24

DACA_GREEN

I2CA_SCL
I2CA_SDA
+DACB_VDD

L13

BGA969-NVIDIA-NB9P-GS

100 mA

+IFPAB_PLLVDD

EV@HCB1608KF-181T15_6

R173

U27D

27M_SS

27M_NONSS 2

NVidia suggest:
10 k pull-down only if
no spread chip used.
27M_SS
BXTALOUT

SPREAD SPECTRUM
+3V

21,24 EV_LVDS_DDCCLK
21,24 EV_LVDS_DDCDAT

R395

R392
*EV@10K/F_4

*EV@10K/F_4
U23

ICSS_PD

PD#

BXTALOUT

CLKIN

EV_LVDS_DDCCLK
EV_LVDS_DDCDAT

7
6

SCL
SDA

VDD

CLKOUT

REFOUT

GND

*EV@22_4

GFX27M_L

R379

SI Build

+3V

27M_SS

R391
EV@10K/F_4

R396
EV@10K/F_4

C520
*EV@10P/50V_4

+3V_SSC

ICSS_RFO

C506
R397
*EV@10K/F_4

*EV@470P/50V_4

R394

C503
*EV@.1U/10V_4

C514
*EV@4.7U/6.3V_6

*EV@4.7_6

+3V

C513
*EV@4.7U/6.3V_6

*EV@ICS91730AMLF-T

Quanta Computer Inc.

I2C ADDRESS: 0xD4H

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

NV10X (DISPLAY) 3/5

5

Sheet
1

20

of

42

NV10M (VGA)

+3V

C180

EV@.1U/10V_4

P9
R9
T9
U9

MIOA_VDDQ_1
MIOA_VDDQ_2
MIOA_VDDQ_3
MIOA_VDDQ_4

U5

MIOA_CAL_PD_VDDQ

T5

MIOA_CAL_PU_GND

MIOA

N5

MIOA_VREF

+3V

C189

AA9
AB9
W9
Y9

C154

EV@4.7U/6.3V_6

EV@.1U/10V_4

NVidia Propose Remove C3134,C3681,R3092,R3402,R3063,R3064,C3076

MIOB_VDDQ_1
MIOB_VDDQ_2
MIOB_VDDQ_3
MIOB_VDDQ_4

AA7

MIOB_CAL_PD_VDDQ

AA6

MIOB_CAL_PU_GND

AF1

MIOB

MIOB_VREF

MIOA_D0
MIOA_D1
MIOA_D2
MIOA_D3
MIOA_D4
MIOA_D5
MIOA_D6
MIOA_D7
MIOA_D8
MIOA_D9
MIOA_D10
MIOA_D11
MIOA_D12
MIOA_D13
MIOA_D14

N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6

MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE

P5
N3
L3
N2

MIOA_CLKOUT
MIOA_CLKOUT*
MIOA_CLKIN

R4
T4
N4

MIOB_D0
MIOB_D1
MIOB_D2
MIOB_D3
MIOB_D4
MIOB_D5
MIOB_D6
MIOB_D7
MIOB_D8
MIOB_D9
MIOB_D10
MIOB_D11
MIOB_D12
MIOB_D13
MIOB_D14
MIOB_D15
MIOB_D16
MIOB_D17
MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
MIOB_CLKOUT
MIOB_CLKOUT*
MIOB_CLKIN

GFX_THMD-

T74

31 MXM_SMCLK
31 MXM_SMDATA
20,24 EV_LVDS_DDCCLK
20,24 EV_LVDS_DDCDAT
24 HDMI_DDCCLK
24 HDMI_DDCDATA

EV_LVDS_DDCCLK
EV_LVDS_DDCDAT

R81
R84

EV@33_4
EV@33_4

B4

21

MXM_RST#_HDMI
MXM_SDIN_HDMI
MXM_SDOUT_HDMI
MXM_SYNC_HDMI

R92

R109
R107

EV@10P/50V_4

CLOSE U38

EV@40.2K/F_4
EV@40.2K/F_4

C3
D3
C4
D4

ROM_SI
ROM_SO
ROM_SCLK

I2CH_SCL
I2CH_SDA

F6
G6

HDCP_SCL
HDCP_SDA

SPDIF

A5

SPDIF_VGA

BUFRST*
PGOOD_OUT*

A4
C5

N9
M9

STRAP_REF_3V3
STRAP_REF_MIOB

RFU
RFU_GND
EV@10K/F_4

IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT

ACTIVE

USAGE

R380

R382

R381

*EV@4.99K/F_4

EV@45.3K/F_4

*EV@4.99K/F_4 D

R388

R387

*EV@4.99K/F_4

EV@15K/F_4

ROM_SI
ROM_SO
ROM_SCLK

N/A
N/A
HIGH
HIGH
HIGH
N/A
N/A
N/A
LOW
LOW
N/A
N/A
N/A
LOW
HIGH

PRIMARY DVI HOTPLUG

SECONDARY DVI HOTPLUG
R386
PANEL BACKLIGHT PWM
EV@4.99K/F_4
PANEL POWER ENABLE
PANEL BACKLIGHT ENABLE
NVVDD VID0
NVVDD VID1
SEE Datasheet for details on G10x Straps!
FBVDD VID0
THERMAL ALERT
FAN PWM
R420
FBVREF SELECT
EV@45.3K/F_4
SLI SYNC0
STRAP0
STRAP1
AC DETECT
STRAP2
PS CONTROL OR HDMI_CEC
R417
PS CONTROL
*EV@4.99K/F_4

EV_LVDS_BL_BRGHT

T11
VGA_THERM#
ALERT
T64
T66
MXM_ACIN

PCI_DEVID: STRAP2

+3V

JTAG_TMS
JTAG_TDI
VGA_OVT#
ALERT
I2CE_SCL_G
I2CE_SDA_G

R448
R447
R75
R408
R384
R94

NB9M-GE
NB9M-GS
NB9P-GE2
NB9P-GS
N10P-GE1
N10M-GE1

EV@10K/F_4
EV@10K/F_4
EV@10K/F_4
EV@10K/F_4
EV@2.2K_4
EV@2.2K_4

SI Build
JTAG_TCK
JTAG_TRST#
EV_LVDS_BL_BRGHT
MXM_ACIN

R449
R450
R385
R514

EV@10K/F_4
EV@10K/F_4
EV@2K/F_4
EV@10K/F_4

R85

AK14
K9

EV@35.7K/F_4

0x06E 8
0x06E 9
0x064 8
0x064 9
0x065 2
0x06E C

Definitions

Die

Hynix

CS31002FB26
10K

64Mx16 DDR2

CS32002FB29
20K

64Mx16 DDR2

MAX6649_V 1

MAX6649_A# R76

DXP

GFX_THMD+

DXN

ALERT
VCC

C105

5
*EV@.1U/16V_4GND

*EV@10K_4
Q33
*EV@DTA114YUA

*EV@0_4 VGA_OVT#

Samsung

Samsung

C98
*EV@2200P/50V_4
GFX_THMDR183

*EV@G799P8UF

Low: Crypto ROM

Hi: I2C ROM
+3V

R399

A0

VCC

A1

WP

A2

SCL

HDCP_SCL

C521

GND

SDA

HDCP_SDA

EV@.1U/10V_4

R403
EV@2.2K_4
EV@2.2K_4
HDCP_SCL
HDCP_SDA

Waiting Confirm from Nvidia

ACIN

R398
*EV@10K/F_4

EV@AT24C16B

*EV@0_4 ALERT

THERMAL TRACE CONSTRAINTS

DHCP ROM

+3V

MAX6649_O# R74

R182

*EV@200_4

OVT

GND

R82

SDAT
SCLK

10K

+3V

U6

+3V

Change P/N
U24
47K

MXM_ACIN

0000
0001
0010
0011
0100
0101
0110
0111

Config

SI Build

*EV@2.2K_4
7
8

*EV@15K/F_4

64Mx16 DDR2

HDCP_SCL

*EV@10K_4

+3V

R73

GFX_SDA
GFX_SCL

R415

EV@10K/F_4

R386
CS25102FB02
5K

+3V

R177

*EV@0_4
*EV@0_4

R424

1000
1001
1010
1011
1100
1101
1110
1111

5K
10K
15K
20K
25K
30K
35K
45K

1000
1001
1000
1001
0010
1100 default

HDCP ROM

R77
R79

EV@24.9K/F_4

Logical Strap Bit Mapping

R414 PU-VDD
PD

VGA_THERM# 31

+3V

EV_LVDS_DDCCLK
EV_LVDS_DDCDAT

R414

*EV@4.99K/F_4

HDMI_HP_EV 24
EV_LVDS_BL_BRGHT 24
EV_LVDS_VDDEN 24
EV_LVDS_BLON 24
GPU_VID0 37
GPU_VID1 37

NVidia Request

R423

EV@10K/F_4

MXM_RST#_HDMI

I2C ADDRESS: 0x98H

+3V

T65

ROM_CS*
ROM_SI
ROM_SO
ROM_SCLK

EMI

R88

R429

HDA_BCLK
HDA_RST*
HDA_SDI
HDA_SDO
HDA_SYNC

MISC2(ROM)

I/O

Delete T31

BBIASN_NC
BBIASP_NC

E2
E1
E3
E4
F4
G5
D5
E5

THERMDN

EV@10K/F_4

W3
W1
W2
Y5
V4
W4
AE1

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14

STRAP0
STRAP1
STRAP2

D7
D6
C7
B7
A7

AP14
AR14
AN14
AN16
AP16

STRAP_REF_3V3
STRAP_REF_MIOB

R412

J26
J25

B5

MXM_BIT_CLK_HDMI
MXM_RST#_HDMI
EV@10_4 MXM_SDIN_HDMI_R
MXM_SDOUT_HDMI
MXM_SYNC_HDMI

GPIO

+3V

PCI_DEVID[4]/SUBVENDOR

GPIO ASSIGNMENTS

K1
K2
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#

I2CC_SCL_G
I2CC_SDA_G
HDMI_DDCCLK
HDMI_DDCDATA
I2CE_SCL_G
I2CE_SDA_G

Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
W5
W7
V7

N10P-GE1 (G96) Straps

N10M-GE1 (G98) Straps

GPIO0
GPIO1
GPIO2
THERMDP
GPIO3
GPIO4
GPIO5
JTAG_TCK MISC1
GPIO6
JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7
JTAG_TDI
GPIO8
JTAG_TDO
GPIO9
JTAG_TRST*
GPIO10
GPIO11
GPIO12
I2CS_SCL
GPIO13
I2CS_SDA
GPIO14
I2CC_SCL
GPIO15
I2CC_SDA
GPIO16
I2CD_SCL
GPIO17
I2CD_SDA
GPIO18
I2CE_SCL
GPIO19
I2CE_SDA
GPIO20
GPIO21
GPIO22
GPIO23

GFX_THMD+

HD Audio Level :3V

12 MXM_BIT_CLK_HDMI

C125

BGA969-NVIDIA-NB9P-GS
<SKU>

C178

EV@4.7U/6.3V_6

12
12
12
12

U27E

31,32

Q32
*EV@DMN601K-7

Quanta Computer Inc.

*EV@0_4

VGA THERMAIL CIRCUIT Use 10MIL Guard(GND) Trace around THERMDC and THERMDA

PROJECT : ZR6
Size

Document Number

Rev
1A

NV10X (GPIO & STRRAPS) 4/5

Date:
5

Monday, April 13, 2009

Sheet
1

21

of

42

NV10M (VGA)

BGA969-NVIDIA-NB9P-GS
<SKU>

NVVDD Decoupling

+VGACORE
U27F
BGA969-NVIDIA-NB9P-GS
<SKU>

AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19

VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056

NVVDD

VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
VDD_073
VDD_074
VDD_075
VDD_076
VDD_077
VDD_078
VDD_079
VDD_080
VDD_081
VDD_082
VDD_083
VDD_084
VDD_085
VDD_086
VDD_087
VDD_088
VDD_089
VDD_090
VDD_091
VDD_092
VDD_093
VDD_094
VDD_095
VDD_096
VDD_097
VDD_098
VDD_099
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111

P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24

+VGACORE
NEAR BGA

PLACE NEAR BALLS

C199

C237

C205

C225

C222

C200

EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@4.7U/6.3V_6

C201

C529

*EV@22P/50V_4

EV@330U/2.5V_6032
C170

C158

C160

C162

C167

C240

EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@4.7U/6.3V_6

C212

C183

C159

C193

C174

C204

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

EV@4.7U/6.3V_6

C182

C220

C177

C181

C232

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

Follow Design Guide DG-03276-001 4.7uFx3

and 0.22x10 uF instead of 0.1uF x10

power up sequence
PXE 1.2VDD
PXE 1.1VDD

I/O 3.3V

NVCORE

22

U27G

+VGACORE

AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AA5
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD11
AD13
AD15
AD17
AD2
AD21
AD23
AD25
AD31
AD34
AD5
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG31
AG34
AG5
AK2
AK31
AK34
AK5
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL6
AL9
AN2
AN34
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP6
AP9
B12
B15
B21
B24
B27
B3
B30
B33
B6
B9
C2
C34
E12

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095

GROUND

GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191

E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25

1.8VFBDDQ

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

NV10X (POWER & GND) 5/5

Date:
5

Sheet

Monday, April 13, 2009

1

22

of

42

NV10M (VGA)

19
19
19

VMA_BA2
VMA_BA1
VMA_BA0

19
19
19
19
19
19
19
19
19
19
19
19
19

VMA_MA12
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5
VMA_MA4
VMA_MA3
VMA_MA2
VMA_MA1
VMA_MA0

19
19
19
19
19
19

VMA_ODT
VMA_CKE
VMA_CS0#
VMA_WE#
VMA_RAS#
VMA_CAS#

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
UDQ1
UDQ0
LDQ7
LDQ6
LDQ5
LDQ4
LDQ3
LDQ2
LDQ1
LDQ0

VMA_DM0
VMA_DM1

B3
F3

UDM
LDM

VMA_WDQS0
VMA_RDQS0
VMA_WDQS1
VMA_RDQS1

B7
A8
F7
E8

UDQS
UDQS
LDQS
LDQS

VMA_CLK0
VMA_CLK0#
VMA_BA2
VMA_BA1
VMA_BA0

J8
K8
L1
L3
L2

CK
CK
BA2
BA1
BA0

VMA_MA12
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5
VMA_MA4
VMA_MA3
VMA_MA2
VMA_MA1
VMA_MA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

K9
K2
L8
K3
K7
L7

ODT
CKE
CS
WE
RAS
CAS

VMA_ODT
VMA_CKE
VMA_CS0#
VMA_WE#
VMA_RAS#
VMA_CAS#

19

U7

VMA_DQ3
VMA_DQ4
VMA_DQ0
VMA_DQ6
VMA_DQ7
VMA_DQ1
VMA_DQ5
VMA_DQ2
VMA_DQ10
VMA_DQ14
VMA_DQ8
VMA_DQ13
VMA_DQ12
VMA_DQ11
VMA_DQ15
VMA_DQ9

VREF

J2 VMREFA0

R400

15mil

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDDL

J1

NC1
NC2

A2
E2

NC4
NC5
NC6

R3
R7
R8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSSDL

J7

EV@1K/F_4

R401

EV@1K/F_4

C525

EV@.1U/10V_4

+1.8V

SI Build
+1.8V

N10P-GE1/N10M-GE1: 50% FBVDD

N10M-GE1: 50% , R429 ( 1K )

U25

VMA_DQ27
VMA_DQ24
VMA_DQ30
VMA_DQ28
VMA_DQ25
VMA_DQ29
VMA_DQ26
VMA_DQ31
VMA_DQ20
VMA_DQ19
VMA_DQ22
VMA_DQ17
VMA_DQ21
VMA_DQ18
VMA_DQ16
VMA_DQ23

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
UDQ1
UDQ0
LDQ7
LDQ6
LDQ5
LDQ4
LDQ3
LDQ2
LDQ1
LDQ0

VMA_DM3
VMA_DM2

B3
F3

UDM
LDM

VMA_WDQS3
VMA_RDQS3
VMA_WDQS2
VMA_RDQS2

B7
A8
F7
E8

UDQS
UDQS
LDQS
LDQS

VMA_CLK0
VMA_CLK0#
VMA_BA2
VMA_BA1
VMA_BA0

J8
K8
L1
L3
L2

CK
CK
BA2
BA1
BA0

VMA_MA12
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5
VMA_MA4
VMA_MA3
VMA_MA2
VMA_MA1
VMA_MA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

VMA_ODT
VMA_CKE
VMA_CS0#
VMA_WE#
VMA_RAS#
VMA_CAS#

K9
K2
L8
K3
K7
L7

ODT
CKE
CS
WE
RAS
CAS

EV@H5PS1G63EFR-20L

VREF

J2

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDDL

J1

NC1
NC2

A2
E2

NC4
NC5
NC6

R3
R7
R8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSSDL

J7

23

VMA_CLK0

VMA_CLK0

VMREFA0
R406
EV@475/F_4

15mil

19

VMA_CLK0#

19

VMA_CLK1

VMA_CLK0#

+1.8V
D

VMA_CLK1

R439
EV@475/F_4

19

VMA_CLK1#

VMA_CLK1#

N10M-GE1/N10P-GE1: 475R

CS14752FB11 RES CHIP 475 1/16W +-1%(0402)

(By pass capacitor)

+1.8V
C96

C95

C539

C553

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

EV@.1U/10V_4

C562

C209

C523

C97

EV@1000P/50V_4 EV@.1U/10V_4

EV@.1U/10V_4

EV@4.7U/6.3V_6

C534

C129

C120

EV@1000P/50V_4 EV@.1U/10V_4

EV@.1U/10V_4

EV@4.7U/6.3V_6

C126

C557

C552

EV@1000P/50V_4 EV@.1U/10V_4

EV@.1U/10V_4

EV@4.7U/6.3V_6

C262

C569

C116

+1.8V

EV@H5PS1G63EFR-20L
U9

19
19
19
19

VMA_MA5H
VMA_MA4H
VMA_MA3H
VMA_MA2H

VMA_DQ33
VMA_DQ34
VMA_DQ32
VMA_DQ38
VMA_DQ37
VMA_DQ36
VMA_DQ39
VMA_DQ35
VMA_DQ45
VMA_DQ46
VMA_DQ41
VMA_DQ47
VMA_DQ44
VMA_DQ42
VMA_DQ43
VMA_DQ40

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
UDQ1
UDQ0
LDQ7
LDQ6
LDQ5
LDQ4
LDQ3
LDQ2
LDQ1
LDQ0

VMA_DM4
VMA_DM5

B3
F3

UDM
LDM

VMA_WDQS4
VMA_RDQS4
VMA_WDQS5
VMA_RDQS5

B7
A8
F7
E8

UDQS
UDQS
LDQS
LDQS

VMA_CLK1
VMA_CLK1#
VMA_BA2
VMA_BA1
VMA_BA0

J8
K8
L1
L3
L2

CK
CK
BA2
BA1
BA0

VMA_MA12
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5H
VMA_MA4H
VMA_MA3H
VMA_MA2H
VMA_MA1
VMA_MA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

VMA_ODT
VMA_CKE
VMA_CS0#
VMA_WE#
VMA_RAS#
VMA_CAS#

K9
K2
L8
K3
K7
L7

ODT
CKE
CS
WE
RAS
CAS

VREF

J2 VMREFA1 R451

15mil

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDDL

J1

NC1
NC2

A2
E2

NC4
NC5
NC6

R3
R7
R8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSSDL

J7

EV@1K/F_4

R453

EV@1K/F_4

C582

EV@.1U/10V_4

+1.8V

SI Build
+1.8V

N10P-GE1/N10M-GE1: 50% FBVDD

N10M-GE1: 50% ,R433 ( 1K )

U29

VMA_DQ57
VMA_DQ62
VMA_DQ60
VMA_DQ61
VMA_DQ63
VMA_DQ59
VMA_DQ56
VMA_DQ58
VMA_DQ53
VMA_DQ52
VMA_DQ54
VMA_DQ48
VMA_DQ50
VMA_DQ49
VMA_DQ51
VMA_DQ55

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
UDQ1
UDQ0
LDQ7
LDQ6
LDQ5
LDQ4
LDQ3
LDQ2
LDQ1
LDQ0

VMA_DM7
VMA_DM6

B3
F3

UDM
LDM

VMA_WDQS7
VMA_RDQS7
VMA_WDQS6
VMA_RDQS6

B7
A8
F7
E8

UDQS
UDQS
LDQS
LDQS

VMA_CLK1
VMA_CLK1#
VMA_BA2
VMA_BA1
VMA_BA0

J8
K8
L1
L3
L2

CK
CK
BA2
BA1
BA0

VMA_MA12
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5H
VMA_MA4H
VMA_MA3H
VMA_MA2H
VMA_MA1
VMA_MA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

VMA_ODT
VMA_CKE
VMA_CS0#
VMA_WE#
VMA_RAS#
VMA_CAS#

K9
K2
L8
K3
K7
L7

ODT
CKE
CS
WE
RAS
CAS

EV@H5PS1G63EFR-20L

VREF

J2

VMREFA1

15mil

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDDL

J1

NC1
NC2

A2
E2

NC4
NC5
NC6

R3
R7
R8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSSDL

J7

+1.8V
C522

+1.8V
+1.8V
C567

+1.8V
C533

EV@1000P/50V_4 EV@.1U/10V_4

EV@.1U/10V_4

EV@4.7U/6.3V_6

For DB:
N10P/N10M : AKD5LG-T510(Samsung,64M*16)

19 VMA_DQ[63..0]
19 VMA_DM[7..0]

AKD5LG-TW02(Hynix,64M*16)

19 VMA_WDQS[7..0]
19 VMA_RDQS[7..0]

Quanta Computer Inc.

PROJECT : ZR6

EV@H5PS1G63EFR-20L

Size

Document Number

Rev
1A

NV10X VRAM-1(GDDR2 BGA84)

Date:
5

Monday, April 13, 2009

Sheet
1

23

of

42

CRT(CRT)

C135

+5V_CRT2
D12
2

1N5819HW
1

25 MIL

+5V_CRT2

CRT_SEN#

L12

BLM18BA220SN1D_6_0.5A

CRT_R1

VGA_GRN

L10

BLM18BA220SN1D_6_0.5A

CRT_G1

VGA_BLU

L9

BLM18BA220SN1D_6_0.5A

CRT_B1

C229

R122

C203

R116

C185

C184

C202

C228

150/F_4

10p/50V_4

150/F_4

10p/50V_4

150/F_4

10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

CRT_11

11

R409

10K_4

D44

31 CRT_SENSE#

R411
C531
U26
+5V

C546

.22u/10V_4

+3V
+5V_CRT2 R413
C532

14
15

+3V
C548

*0_4
2.2u/6.3V_6

VGA_RED

R121

IV@0_4

VGA_GRN

R118

IV@0_4

VGA_BLU

R114

IV@0_4

16

VSYNC1

R123

15_4

VSYNC1_1

VCC_DDC

SYNC_OUT1

14

HSYNC1

R124

15_4

HSYNC1_1

SYNC_IN2

15

VSYNC

CM2009-02 have internal 15 ohm

HSYNC

C535

+5V_CRT2

HSYNC

R126

IV@0_4

R134

CRTDCLK

R140

IV@0_4

CRTDDAT

R149

IV@0_4

C541

10p/50V_4 10p/50V_4

VGA_RED

R120

EV@0_4

VGA_GRN

R117

EV@0_4

VGA_BLU

R113

EV@0_4

HSYNC

R125

EV@0_4

VSYNC

R133

EV@0_4

SYNC_IN1

VIDEO_1

DDC_IN1

10

CRTDCLK

R416

2.2K_4

VIDEO_2

DDC_IN2

11

CRTDDAT

R419

2.2K_4

CRT_B1

VIDEO_3

DDC_OUT1

CRTDCLK_R

CRTDCLK

R139

EV@0_4

GND

DDC_OUT2

12

CRTDDAT_R

CRTDDAT

R148

EV@0_4

R422
4.7K_4

C12

2.2U/10V_8

.1U/10V_4

.01U/16V_4

22U/10V_1206

+3V
U1

INT_HSYNC 7
INT_VSYNC 7

LCD_VCC_ON

INT_CRT_DDCCLK

R105
4.7K_4

C161

C547

10p/50V_4

10p/50V_4

C13

IN

OUT

1u/10V_4

IN

GND

ON/OFF

GND

*short0402 DISP_ON_R

R20

INT_CRT_DDCDAT 7
7 INT_LVDS_DIGON

CRT_G1

+3V

C8

INT_CRT_BLU 7

21 EV_LVDS_VDDEN

CRT_R1

+3V

C9

INT_CRT_RED 7

IV@0_4

13

VCC_VIDEO

24

C21

INT_CRT_GRN 7

MXM to CRT

SYNC_OUT2

BYP

C10
.1U/10V_4

CRT_SEN#

VCC_SYNC

LCD_VCC

UMA to CRT

13

VSYNC

*0_4 +5V_CRT2_R8
.22u/10V_4
2

.22u/10V_4

CM2009

T19

12

+3V

BAS316

PANEL VCC CONTROL

1000p/50V_4

*DA204U

17

R142

6
1
7
2
8
3
9
4
10
5

LCD_ON(LDS)
C528

CN11
CRT

VGA_RED

+3V

D30

16

+5V

.1u/16V_4

R24

IV@0_4

R21

EV@0_4

IC(5P) G5243T11U
LCD_VCC_ON
R23

<Check list ver:0.8>

UMA: 100K pull-down to GND

EV_VGA_RED 20

100K_4

EV_VGA_GRN 20
EV_VGA_BLU 20
EV_HSYNC 20

Backlight Control(LDS)

EV_VSYNC 20

D8

+3V

*BAS316
2

EV_CRTDCLK 20
R52

EV_CRTDDAT 20

R46

*short0402

BL_STATE 31

R44
1K_4

10K_4

BL_ON

3
L_BKLT_CTRL
CONTRAST

IV@0_4

R45

EV@0_4

BRIGHTNESS

=> MXM
=> UMA
=> EC

1u/10V_4
7 INT_LVDS_BLON

*470K_4

LID591#

21 EV_LVDS_BLON

HE1
PT3661-BB
SOT23_123-2_8-1_9

R56

IV@0_4

R53

EV@0_4 LVDS_BLON

R59

LID591#

Q3
DMN601K-7

100K_4

14,31

D9
BAS316

3
+3VPCU
C288

R174

*EV@0_4

R48

31

R50

21 EV_LVDS_BL_BRGHT

BL#

BRIGHTNESS
DPST

+3VPCU

EC_FPBACK# 31

Q2
DTC144EUA

Lid Switch (HSR)

LVDS(LDS)

Q4
DMN601K-7

PT3661-BB (PLC) : AL003661003

ME268-002 (FCE) : AL000268000
B

HDMI(HDM)

7 INT_LVDS_EDIDDATA

EV@0_4

R2

IV@0_4

R9

EV@0_4

R3

IV@0_4

+3V
LVDS_EDIDCLK

R5

LVDS_EDIDDATA

2.2K_4

R6

2.2K_4

+3V

+3V

PS8101 : AL008101000
PS8101T : AL008101001

R472

*IV@0_4

R473

*IV@0_4

.1u/25V_6

+3V

HDMITX1P
HDMITX1N
CN1

32
31
33
34

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

HDMITX0P
HDMITX0N

LVDS_EDIDDATA
LVDS_EDIDCLK

+3V

HDMICLKP
HDMICLKN

TXLCLKOUTTXLCLKOUT+

GND
CFG1
CFG0
VCC
DDC_EN
GND
HPD_SINK
SDA_SINK
SCL_SINK
GND
VCC
OE#

TXLOUT0TXLOUT0+

Equalization Control

TXLOUT1TXLOUT1+

PC1 PC0

TXLOUT2TXLOUT2+

L
L
H
H

EQ Control

L
H
L
H

8dB
4dB
12dB
0dB

CN15

HDMITX2P_C

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HDMITX2N_C
HDMITX1P_C

HDMITX0N_C
HDMICLKP_C

HDMITX2P_C
HDMITX2N_C
+3V

HDMICLKN_C
HDMITX1P_C
HDMITX1N_C
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB

HDMITX0P_C
HDMITX0N_C
+3V

HDMICLKP_C
HDMICLKN_C

HDMI_HP_A

*IV@4.7K_4
*IV@4.7K_4
R206

+3V

*IV@499/F_4

HDMI_HP_IV#_RR

R205

*short0402 HDMI_HP_IV#

*RB501V-40
2
1

D14

+5V

21 HDMI_DDCCLK

C349

C625

*IV@2.2u/6.3V_6

*IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4

C621

C626

C622

C627

C342

*RB501V-40
2
1

C343
D15

+5V

C2
.1u/16V_4

21 HDMI_DDCDATA

2 IV@0_4P2R
4

INT_TXLOUT0INT_TXLOUT0+

INT_TXLOUT0- 7
INT_TXLOUT0+ 7

TXLOUT1TXLOUT1+

RN7

1
3

2 IV@0_4P2R
4

INT_TXLOUT1INT_TXLOUT1+

1
3

2 IV@0_4P2R
4

INT_TXLOUT2INT_TXLOUT2+

EV_TXLOUT0EV_TXLOUT0+

TXLOUT1TXLOUT1+

RN6

3
1

4 EV@0_4P2R
2

EV_TXLOUT1EV_TXLOUT1+

TXLOUT2TXLOUT2+

RN2

3
1

4 EV@0_4P2R
2

EV_TXLOUT2EV_TXLOUT2+

Camera(CCD)

Modify

HDMI_TX0N
HDMI_TX0P

INT_TXLOUT1- 7
INT_TXLOUT1+ 7

20
20

HDMI_TX1N
HDMI_TX1P

INT_TXLOUT2- 7
INT_TXLOUT2+ 7

20
20

HDMI_TX2N
HDMI_TX2P

UMA to LVDS

20
20

EV_TXLCLKOUT- 20
EV_TXLCLKOUT+ 20

RN33

3
1

4 *EV@0_4P2R
2

HDMITX0N_C
HDMITX0P_C

RN34

3
1

4 *EV@0_4P2R
2

HDMITX1N_C
HDMITX1P_C

RN35

3
1

4 *EV@0_4P2R
2

HDMITX2N_C
HDMITX2P_C

RN32

3
1

4 *EV@0_4P2R
2

HDMICLKN_C
HDMICLKP_C

PEG_TXP2
PEG_TXN2

RN12

3
1

4 *IV@0_4P2R
2

HDMITX0P
HDMITX0N

PEG_TXP1
PEG_TXN1

RN11

3
1

4 *IV@0_4P2R
2

HDMITX1P
HDMITX1N

PEG_TXP0
PEG_TXN0

RN10

3
1

4 *IV@0_4P2R
2

HDMITX2P
HDMITX2N

PEG_TXP3
PEG_TXN3

RN13

3
1

4 *IV@0_4P2R
2

HDMICLKP
HDMICLKN

HDMI_CLKHDMI_CLK+

From GMCH (iHDMI)

EV_TXLOUT0- 20
EV_TXLOUT0+ 20

MXM to LVDS

EV_TXLOUT1- 20
EV_TXLOUT1+ 20

7,18 PEG_TXP2
7,18 PEG_TXN2
7,18 PEG_TXP1
7,18 PEG_TXN1

EV_TXLOUT2- 20
EV_TXLOUT2+ 20

7,18 PEG_TXP0
7,18 PEG_TXN0
7,18 PEG_TXP3
7,18 PEG_TXN3

+3V

USBP11USBP11+

MB_HDMI_DDCCLK

C722

C477

10U/6.3V_6

4.7u/6.3V_6

1
4

2
3

R203

*2.2K_4

R200

*EV@0_4

MB_HDMI_DDCDAT

R457
*IV@20K/F_6

HDMI_OE#

HDMI_HP_A

R218

HDMI_DDCCLK_MB

*short0402

*.1u/16V_4

R234

HDMI_DDCDATA_MB

*short0402
*.1u/16V_4

+3V

EV@Hot-plug

HDMI_HP_IV#

HDMI_HP_IV#_RR 2

2
Q26
*IV@DMN601K-7

R455
*EV@10K_4

+5V

HDMI_HP_EV 21

R458
*IV@7.5K/F_4

R452
*EV@10K_4

Q27
*IV@DMN601K-7

ST need

FOR NV HDMI

20mil
for CCD power

L1
13
13

*EV@0_4

+3V

HP-detect for
PS8101 only

R460
*IV@10K_4

EV_TXLCLKOUTEV_TXLCLKOUT+

4 EV@0_4P2R
2

From MXM
20
20

*IV@0_4 HDMI_HP_IV#

R207

HP_EV 2

1
3

2 EV@0_4P2R
4

*2.2K_4

R197

RN5

3
1

R196

TXLOUT0TXLOUT0+

OE# control for

power saving

INT_TXLCLKOUT- 7
INT_TXLCLKOUT+ 7

1
3

PEG_RXP3

PEG_RXP3

C336

INT_TXLCLKOUTINT_TXLCLKOUT+

RN4

7,18

SDVO I2C Control

SDVO_CTRLCLK 6
SDVO_CTRLDATA 6

4 IV@0_4P2R
2

TXLOUT0TXLOUT0+

FOR UMA iHDMI HPD

*HDM@HDMI-C12816-119A5-L

+3V

3
1

TXLCLKOUT- RN8
TXLCLKOUT+

22
23

C331

+3V

LCD_VCC
LCD_VCC
VIN
VIN

TXLCLKOUT- RN9
TXLCLKOUT+

RN3

20
21

+3V

LCD_CON30

TXLOUT2TXLOUT2+

change HDMI conn 12/30

D2+
D2 Shield
D2D1+
D1 Shield
D1- SHELL1
D0+ SHELL2
D0 Shield
D0- SHELL3
CK+ SHELL4
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET

R204
*EV@100K_4

+3V

*IV@0_4
*IV@0_4

R202
R201
for CCD power

*.1u/16V_4

R236,R237,R239,R240 for 2'nd source

+3V
R459
R462

+3V

BRIGHTNESS
BL_ON
USBP11USBP11+

C339

*.1u/16V_4

HDMITX1N_C
HDMITX0P_C

24
23
22
21
20
19
18
17
16
15
14
13

GND
OUT_D1OUT_D1+
VCC
OUT_D2OUT_D2+
GND
OUT_D3OUT_D3+
VCC
OUT_D4OUT_D4+

LS_REXT

C7

10u/25V_1206

GND
IN_D1IN_D1+
VCC
IN_D2IN_D2+
*IV@PS8101T
GND
IN_D3IN_D3+
VCC
IN_D4IN_D4+
Thermal GND

GND
VCC
PC0
PC1
GND
REXT
HPD#
SDA
SCL
RT_EN#
VCC
GND

C1

10u/25V_1206

C330

1
2
3
4
5
6
7
8
9
10
11
12

C11

37
38
39
40
41
42
43
44
45
46
47
48
49

HDMITX2P
HDMITX2N

D43

+5V

HDMI_OE#

U11

VIN

MB_HDMI_DDCDAT
MB_HDMI_DDCCLK

+3V

+3V

From GMCH
65mil

VIN

*RSX101M-30

20,21 EV_LVDS_DDCDAT

R8

+5V

stuff R214,R213

*EV@499/F_4
*EV@499/F_4

HDMI_TX0P
HDMI_TX0N

*EV@499/F_4
*EV@499/F_4

HDMI_TX1P
HDMI_TX1N

*EV@499/F_4
*EV@499/F_4

HDMI_TX2P
HDMI_TX2N

R463
R461

*EV@499/F_4
*EV@499/F_4

HDMI_CLK+
HDMI_CLK-

NVHDMI_499

HDMI_HP_A 2

NV suggestion near
HDMI connector

R465
Q28
R464
*EV@DMN601K-7
R468
R467
2
+3V
R471
R470

Q24
*EV@DMN601K-7

7 INT_LVDS_EDIDCLK

HDMI_HP_A

20,21 EV_LVDS_DDCCLK

R210
*IV@4.7K_4
Active Buffer
R211
*IV@4.7K_4
R212
*IV@4.7K_4

36
35
34
33
32
31
30
29
28
27
26
25

LCD EDID SMBus PU

Q25
*EV@DMN601K-7

Quanta Computer Inc.

USBP11USBP11+

PROJECT : ZR6

*WCM2012-90

Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

LVDS/CRT/CCD/HDMI/MIC
1

24

Sheet
8

of

42

SATA HDD(HDD)

SATA ODD(ODD)

R41

CN17

23

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND24

24

10K_4
12

SATA_TXP0 12
SATA_TXN0 12
SATA_RXN0_C
SATA_RXP0_C

C372
C373

.01u/16V_4
.01u/16V_4

SATA_RXN0 12
SATA_RXP0 12

For ESD

SATA_TXN0
+5V

120mil

SATA_TXP0

U12
*CM1293A-04SO
1

CH1

VN

CH2

CH4

VP

CH3

SATA_RXN0_C
+5V
SATA_RXP0_C

+3V

SA@127043FR022GX51ZR

SATA_LED#_R

SATA_LED#

CN10

+3V

120mil

LED(UIF)

U3
TC7SH08FU

31

SUSLED#

31

PWRLED#

31

BATLED1#

31

BATLED0#

C375

C363

C364

4.7u/6.3V_6

4.7u/6.3V_6

.1u/16V_4

R40
GND14

14

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

DP
+5V
+5V
RSVD
GND
GND

8
9
10
11
12
13

GND15

15

SATA_RXN1_C
SATA_RXP1_C

SATA_DP

C198
C197

R101

.01u/16V_4
.01u/16V_4

SATA_RXP1_C

SATA_RXN1_C

U8
*CM1293A-04SO
1

C354

C350

C351

C352

4.7u/6.3V_6

.1u/16V_4

.1u/16V_4

.01u/16V_4

.01u/16V_4

CAPSLED#

31

NUMLED#

CH1

VN

CH2

CH4

SATA_TXP1

VP

+5V

CH3

SATA_TXN1

C524

C530

C144

C143

C124

C123

100u/6.3V_3528

10u/6.3V_8

.1u/16V_4

.1u/16V_4

.1u/16V_4

.1u/16V_4

31

MODIFY

R348

1M_6

+3VPCU
D

221/F_4

R365

221/F_4

D5

LED_Green

R369

221/F_4

SATA_LED#_R D4

LED_Green

R368

221/F_4

D2

LED_ORANGE R10

221/F_4

D1

LED_Green

221/F_4

R1

BT_LED 26

+3V

D1 Power LED near PW SW

3
1

2
4
5
6

3
1

NBSWON#
MY0

2
4
5
6

31

MISAKI_SW_H1.5

3
1

MX1

31

SW3

MISAKI_SW_H1.5

2
4
5
6
MISAKI_SW_H1.5

C273

31

*short0805

2
1

R441

*0_4

VIN

VO
GND
FON# GND
GND
VSET GND

31
31

CN14
TH_FAN_POWER

3
5
6
7
8

30 MIL

*G991

C272

C263

22u/6.3V_8

1000p/50V_4

C253
.01u/16V_4

1
25
36
4

FAN

TP_LEFT#
+3V

R443
10K_4

D11

2 *Uclamp0511P_4_ESD

TP_RIGHT# D10

2 *Uclamp0511P_4_ESD

R436
10K_4

TP_RIGHT# 3
1

Q23
MMBT3904

*short0402 FAN_PWM_EC

R445
5

3
10K_4 THER_OVERT#_B 2

4.7K_4
L3
L4

TPDATA
TPCLK

SW5
R442
10K_4

FAN_PWM_E
THER_OVERT# R446

4.7K_4

R66

+5V

+5V

0_6 TP_VCC

R64
C75

TP_12P

.1u/16V_4

TPDATA_R
TPCLK_R

BK1608LL121_6_150mA
BK1608LL121_6_150mA
C87

C88

10p/50V_4

10p/50V_4

TP_RIGHT#

TP_LEFT#

1
2
3
4
5
6
7
8
9
10
11
12

1
2
3
4
5
6
7
8
9
10
11
12
CN3

+5V

+3V
A

R65

FANSIG

U10

*2.2u/6.3V_6

25mil

TP CONN

R157
10K_6
R167

CPUFAN#

1M_6

330_4

+3V

THER_OVERT# 3

+5V

31

R349

R356

+5V

CPUFAN#

BAT_VCC
1 LED_G/A

R4

WLAN_SW#
SW1

Q22
*DMN601K-7

+3V_S5

Battery LED

LED_Green

MX0

+3V

R180
*10K_4

330_4

Power Button
(UIF)

31

R355

LED_BLUE

BT_SW#
SW2

FAN(THM)

4
LED2
3

Power LED

PWR_VCC
1 LED_G/A

D6

26 WLAN_LED#
6

120mil
+

C355

31

For ESD

+5V

100u/6.3V_3528

D3

SATA_RXN1 12
SATA_RXP1 12

1K_4

+5V

C356

4
LED1
3

SATA_TXP1 12
SATA_TXN1 12

C18534-11305-L

+5V

*0_4

25

Power/Suspend: Green/Amber

GND23

+3V

11/09 modify

SW4
2
4
5
6
MISAKI_SW_H1.5

TP_LEFT#

3
1

2
4
5
6

Quanta Computer Inc.

MISAKI_SW_H1.5

PROJECT : ZR6

FAN_PWM_CN

Size

Q21
MMBT3904

Document Number

Rev
1A

HDD/ODD/LED/SW/TP/FAN/MMB
Date:
4

Monday, April 13, 2009

Sheet
1

25

of

42

Bluetooth(BTM)

MINI-CARD(MPC)

R266

+3V

+3VSUS

13
PCIRST#
2 PCLK_DEBUG
R537

+3V

TV use +3V

13
13

PCIE_TXP4
PCIE_TXN4

13
13

PCIE_RXP4
PCIE_RXN4

*0_6
C681

+3V_MINI_R_A
*.1u/16V_4

2 CLK_PCIE_MINI1
2 CLK_PCIE_MINI1#
2 MINI_CLKREQ#
+5V_TV-CARD

*0_6 +5V_TV-CARD_R_A
*0_6 +5V_TV-CARD_R_B

R262
R260

TV use +5V

PCIE_WAKE_WL_R_#

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

15
13
11
9
7
5
3
1
53

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
PAD53

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
PAD54

16
14
12
10
8
6
4
2
54

R310

31 BT_POWERON#

WLAN_LED#_A R538
USBP4+_C
USBP4-_C

*short0402

R536
R532

C406

AO3413
2

CN19
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

WLAN_LED# 25

*short0402
*short0402

USBP4+ 13
USBP4- 13

26

20mil

BT_POWER

Q14

+3V

+1.5V

*0_6

4.7u/6.3V_6

*short0402

CN6
25

BT_LED

13
13

USBP3+
USBP3-

L25
4
1

1
2
3
4
5

USBP3+
USBP3-

3
2

*WCM2012-90

1
2
3
4
5

MINI_SMDATA
MINI_SMCLK

6
7

6
7

CON5_BT_L

MODIFY Follow Z07

PLTRST# 13,18,28,30,31
RF_EN 31

RF_EN

120mil

INT. USB(USB)

LFRAME# 12,31
LAD3
12,31
LAD2
12,31
LAD1
12,31
LAD0
12,31

L45

USBPWRP1
CN16

L23
13
13

4
1

USBP6+
USBP6-

1
3
2
4

USBP6+
USBP6-

3
2

*WCM2012-90

8
7
6
5

GND
GND
GND
GND

100U/16V_6.3X6
+

C640

470p/50V_4

C107H6-10405-L

USBPWR1

TI201209G121_8_3A

+ C629

C636
*100u/6.3V_3528

MINI CARD_A

C437

C643

IN1
IN2

4
1
9

EN#
GND
GND-C

120mil

OUT3
OUT2
OUT1

8
7
6

OC#

USBPWR1

R505

USBP6+

D16

1 *MLVG06031R

USBP6-

D17

1 *MLVG06031R

*6.34K/F_4

R296

10K_4

2,14,16,28 PDAT_SMB

+1.5V

1
Q16
DMN601K-7

+5V_TV-CARD

*0_6

R295
C395

C391

C656

C673

C690

*4.7u/6.3V_6

*.1u/16V_4

.1u/16V_4

.1u/16V_4

4.7u/6.3V_6

MINI_SMDATA

EXT. USB(USB)

*0_4
R279
C410

10K_4

1
Q15
DMN601K-7
R278

+3V for WWAN card is 2.75A

120mil

+3V
2

2,14,16,28 PCLK_SMB

C679

C680

C683

C675

4.7u/6.3V_6

4.7u/6.3V_6

*4.7u/6.3V_6 *4.7u/6.3V_6

C651

C671

C693

.1u/16V_4

.1u/16V_4

.1u/16V_4

+5VPCU

CN8

10u/10V_8

C411

MINI_SMCLK

12
11
10
9
8
7
6
5
4
3
2
1

1u/10V_4

L31
13
13

*0_4

USBP2USBP2+

USBP2USBP2+

1
4

USBP0USBP0+

USBP0USBP0+

USBP2USBP2+

2
3

*WCM2012-90

L32
13
13

1u/10V_4
USBON#

PCIE_WAKE_WL_R_#

500mA, 25mil

+3V

C644

U30
G547F2P81U

2
3

+3V

+5V
R264

10u/10V_8

4.7K_4

*DTC144EUA
1

*22_4

R257
Q13

14,28,31 PCIE_WAKE#

+5VPCU

PCLK_DEBUG
*10p/50V_4

For EMI

R311

+3VSUS

1
4

USBP0USBP0+

2
3

*WCM2012-90

31

USBON#

12
11
10
9
8
7
6
5
4
3
2
1
C

DUAL USB CONN

Modfiy C

HOLE20
HOLE22
HOLE19
HOLE25
h-tc236bc315d142p2 h-tc236bc315d142p2 h-tc236bc315d142p2 H-C236D142P2

HOLE26
HOLE27
H-C236D142P2 H-C236D142P2

HOLE13
*H-C315D110P2

HOLE15
*h-tc315bsd106p2

HOLE17
HOLE9
HOLE11
*h-tc315bc433d106p2 *H-C315D106P2 *H-C315D110P2

(OTH)

HOLE12
*H-C51D51N

+3V_S5

+1.5VSUS

C716

C239

.1u/10V_4
HOLE29
h-c157d63pt

HOLE30
h-c157d63pt

HOLE21
h-c236d142pt

HOLE24
h-tc236bc315d142p2

HOLE23
H-C236D142P2

HOLE31
H-C236D142P2

HOLE1
HOLE14
*H-C315D106P2 *H-C315D106P2

HOLE6
*O-ZR6-1

HOLE28
*h-c91d91n

+1.05V

+VGACORE

C91

1000p/50V_4

C104

1000p/50V_4

*1000p/50V_4

HOLE16
*H-C315D106P2

For EMI(EMI)

HOLE2
*h-tc224bc315d106p2-8
7
6
8
5
9
4

Quanta Computer Inc.

1
2
3

HOLE10
*H-TC315BSD106P2-8
7
6
8
5
9
4
1
2
3

HOLE7
*H-C315D110P2-8
7
6
8
5
9
4
1
2
3

HOLE4
*hg-c315d106p2
7
6
8
5
9
4
1
2
3

HOLE18
*H-C315D106P2-8
7
6
8
5
9
4
1
2
3

HOLE3
*hg-c315d106p2
7
6
8
5
9
4
1
2
3

HOLE5
*H-C315D106P2-8
7
6
8
5
9
4
1
2
3

1
2
3

HOLE8
*H-C315D106P2-8
7
6
8
5
9
4

PROJECT : ZR6
Size

Document Number

Rev
1A

MINI/USB/BT/HOLE
Date:
1

Monday, April 13, 2009

7

Sheet

of

26
8

42

.1u/16V_4

C712

10u/6.3V_6

R575

IV@0_4
EV@0_4
U33

Determining HDA use +1.5V/+3V

12 ACZ_RST#_AUDIO

11

RESET#

12 BIT_CLK_AUDIO
12 ACZ_SYNC_AUDIO
12 ACZ_SDIN0
12 ACZ_SDOUT_AUDIO

6
10
8
5

BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

R572

14

C710

PCSPK

ACZ_SDIN20561

DIB_P
DIB_N

T78
100K_4

R62

MODIFY

33_4

PCBEEP

.1u/16V_4

R559
R562

*10K_4
*10K_4

GPIO2
GPIO1
EAPD#

43
42

DIB_P
DIB_N

12

PC_BEEP

45
46
47

GPIO2
GPIO1
EAPD#/GPIO0

PORTA_L
PORTA_R

34
35

MICBIASB
PORTB_L
PORTB_R

19
14
15

MICBIASC
PORTC_L
PORTC_R

18
16
17

-6dB

10K

omit

-18dB

omit

10K

MIC1-VREFO
MIC1_LL
MIC1_RR

20
21

MONO
STEREO_L
STEREO_R

29
30
31

R557
C463
C459

ADOGND

15

LIN-

FRONT-R C676

1u/10V_6

FRONT-R-1R525

20K/F_6

FRONT-R-2

RIN-

BYPASS

BYPASS

ADOGND

C674

1u/10V_6

FRONT+L-1R528

20K/F_6

FRONT+L-2

16

LIN+

RVO1

12

INSPKR+

ADOGND

C677

1u/10V_6

FRONT+R-1R527

20K/F_6

FRONT+R-2

RIN+

RVO2

INSPKR-

LVO1

INSPKL+

1453 MUTE#

14

LVO2

INSPKL-

INSPKL-

R524

47K/F_6

INSPKR-

R522

47K/F_6

SHDN#

C699
C697

MIC1_LL1 R343
MIC1_RR1 R338

MIC1_L1
MIC1_R1

100_4
100_4

ADOGND

1K_4

MIC2-VREFO R330

4.7K_4

INT MIC.

2.2u/6.3V_6
2.2u/6.3V_6

MIC2_INTL1

R565

5.11K/F_4

R567

5.11K/F_4

LINEOUT_JD#

HP_JD#

R560

20K/F_4

MIC1_JD#

EXT MIC._JD#

MIC2_INT
R331

LINE OUT(AMP)

0_4
CN21

MODIFY

FRONT-L
FRONT-R

SPEAKER
13

SENSEA

VREF_FILT

24

CX20561_VILT

FLY_P
FLY_N

39
37

CX20561_FLY_P
CX20561_FLY_N

VREF_HI
VREF_LO
RESERVED_32
RESERVED_33

22
23
32
33

CX20561_RVD22
CX20561_RVD23

ADOGND
4.7u/6.3V_6

C670

10u/6.3V_6

R321

+3AVDD
MIC2_INT_L
MIC2_INT_R

FRONT-L-2

EXT MIC.

4.7K_4
2.2u/6.3V_6
2.2u/6.3V_6

C448

13

20K/F_6

+3AVDD

HPL

R530

5.1_4

HPL_SYS1

L49

BK1608LL121_6_150mA

HPL_SYS

HPR

R533

5.1_4

HPR_SYS1

L50

BK1608LL121_6_150mA

HPR_SYS
HPPLG#

R534
*1K_4
C444

1u/6.3V_4

R531
*1K_4

C682
C672
100P/NPO/50V_6 100P/NPO/50V_6

C454

.1u/16V_4

10u/6.3V_6

7
C

Line-in JACK Green

Normal Close Jack

ADOGND

C442

1
2
6
3
4
5

ADOGND

ADOGND
LINEOUT_JD#

C691

C695

1u/6.3V_4

1u/6.3V_4

ADOGND

R539
HPPLG#

ADOGND

+3AVDD

Q30
DMN601K-7

10K_4

-12dB

AVSS_49

omit

AVSS_25
AVSS_38

omit

CX20561-15Z

FRONT-L-1 R512

G1453L

49

10K

25
38

10K

DVSS_7
DVSS_41

GPIO2

7
41

0dB

GPIO1

*22_4

1u/10V_6

HPL
HPR

27
28

MIC_L
MIC_R

DMIC_CLOCK
DMIC_1/2

PC Beep GAIN CONTROL

GAIN

*10p/50V_4

U31

C658

ADOGND

SENSEA
1
2

BIT_CLK_AUDIO

47K/F_6

HP

CX20561

S/PDIF

FRONT-L

For EMI

R347

10u/6.3V_6

PORTD_L
PORTD_R

48

C469

.1u/16V_4

26
40
36

.1u/16V_4
.1u/16V_4

AVDD_26
AVDD_40
AVEE

C708
C470

.1u/16V_4

C684

9
4
3
44

R576

+3V_S5

.1u/16V_4

C447
AVEE C688

VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44

+1.5VSUS

C694

47K/F_6

R515

NC

C709

R526

INSPKL+

NC

.1u/16V_4

C667

INSPKR+

VSS

.1u/16V_4

1u/10V_4

10

10u/6.3V_6

C446

11

C701

VSS

MODIFY REV:C

C464

+AZA_VDD
C711

*0_6

+3AVDD

VCC

0_6

R541

C666
4.7u/6.3V_6
.1u/16V_4

ADOGND

VCC

R574

+3AVDD

27

+5V_ADO

+3V_S5

Speaker Amplifier(AMP)

THERMALPAD

17

Codec CX20561-15Z (ADO)

QFN

ADOGND
ADOGND

CODER Power(ADO)
+5V

+3V
U35

L48
FBMH1608HM151_6_2A

+5V_ADO

60mil

VIN

GND

EN

VOUT

R581

2.2U/10V_8

+5V

1
C713

NC

*0_6

L51
FBMH1608HM151_6_2A

60mil

+3AVDD

C714

C689

C692

C685

C687

C686

1u/6.3V_4

*4.7u/6.3V_6

.1u/16V_4

4.7u/6.3V_6

.1u/16V_4

.1u/16V_4

C665

C664

.1u/16V_4

4.7u/6.3V_6

.1u/16V_4

MIC1_L1

L46

MIC1_R1

L47

Q29

MIC1_PLG

BK1608LL121_6_150mA

MIC1_R

+3AVDD

DMN601K-7

INT MIC
MIC2_INT

MIC1_L

1
2
6
3
4
5

MIC1_PLG

INT MIC.(ADO)

ADOGND

BK1608LL121_6_150mA

R521

C660

C654

100P/50V_6

100P/50V_6

ADOGND

Normal Close Jack

ADOGND

CN5

MUTE(AMP)

(ADO)

R506
R508
R535
R345
C650
C653
C703
C678
C465
C456

+3V

SPEAKER(AMP)
INSPKRINSPKR+
INSPKLINSPKL+

L6
L5
L7
L8

INSPKR-N
INSPKR+N
INSPKL-N
INSPKL+N

1
25
36
4

C100

C101

C102

C103

180p_4

180p_4

180p_4

180p_4

+3AVDD

ESD(AMP)

CN4
BKP1608HS181T_6_1.5A
BKP1608HS181T_6_1.5A
BKP1608HS181T_6_1.5A
BKP1608HS181T_6_1.5A

D34

SPEAKER-CON

MIC1_JD#

+3AVDD
D38

HPPLG#

*DA204U

R564
100K_4

1
31

3
*DA204U

AMP_MUTE#
EAPD#

ACZ_RST#_AUDIO
D35
HPL_SYS
1
*Uclamp0511P_4_ESD

D37

MIC-JACK-PINK

1
2

C99
*22p_4

10K_4

C661

4.7u/6.3V_6

CN18

MIC1_JD#

ADOGND

G9091-330T11U(SOT23-5)
C659

MIC(AMP)
3

AMP Power(AMP)

HPR_SYS
1
*Uclamp0511P_4_ESD

1
D42
1
D40
1
D41

2
BAS316
2
*BAS316
2
*BAS316

*short0603
*short0603
*short0603
*short0603
.1u/16V_4
.1u/16V_4
.1u/16V_4
.1u/16V_4
*1000p/50V_4
*1000p/50V_4

ADOGND
1453 MUTE#

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

CODEC/AMP/MDC
Date:
5

Monday, April 13, 2009

Sheet
1

27

of

42

LAN Controller

28

U2
13
13
13
13

C38
C39

GLAN_RXN
GLAN_RXP
GLAN_TXN
GLAN_TXP

.1u/10V_4
.1u/10V_4

2 CLK_PCIE_LAN#
2 CLK_PCIE_LAN

PCIE_RXN6
PCIE_RXP6

37
38
44
43

TX_N
TX_P
RX_N
RX_P

CLK_PCIE_LAN#
CLK_PCIE_LAN

40
41

REFCLKN
REFCLKP

VPD_DATA
VPD_CLK

30
29

TWSI_DATA/TEST_PAD
TWSI_CLK/3.3V

33
31

SMDATA
SMCLK

PERSTn

WAKEn

12

RBIAS

34
35

TESTMODE
NO CONN

2,14,16,26 PDAT_SMB
2,14,16,26 PCLK_SMB
13,18,26,30,31 PLTRST#
PCIE_WAKE_R#

C19

2.37K/F_4

33p/50V_4

CLK_LAN_X1

10

XTLI

CLK_LAN_X2

XTLO

SEL_25MHz

AR8131

C22

VDD33

VDD3V

15
19
25

AVDD_REG
VDD11_REG
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL

11
8
16
22
36
39
42

VDD17

TRXN[3]
TRXP[3]
TRXN[2]
TRXP[2]
TRXN[1]
TRXP[1]
TRXN[0]
TRXP[0]

24
23
21
20
18
17
14
13

LED_ACTn
LED_LINK10/100n
LED_LINK1000n
CLKREQn

47
48
26
27

33p/50V_4
49

LX

VDDHO
AVDDH
AVDDH

SENSITIVE PIN!
PER FAE SUGGESTION,
RESERVE ONE BEAD FOR EMI.

GND1

+3V_S5

VDDL12

28
32
45
46

Y1
25MHZ
C

RBIAS

Atheros

R22

DVDDL
DVDDL
DVDD_REG
DVDD_REG

VDDL12

(30mils)
C34

LX/VDD18O
.1u/10V_4

2
3

C720

AVDDL_LAN

C18

C44

C45

C47

.1u/16V_4

10u/10V_8

10u/10V_8 10u/10V_8

1u/10V_4
1000p/50V_4
VAUX_12

VDDL12_LAN

EMI

R36
C43
C723

0_6
.1u/10V_4
.1u/10V_4

C32

.1u/10V_4

VDDCIO_18
LAN_TRD3N
LAN_TRD3P
LAN_TRD2N
LAN_TRD2P
LAN_TRD1N
LAN_TRD1P
LAN_TRD0N
LAN_TRD0P

29
29
29
29
29
29
29
29

5.1K/F_6

LED_1000#
R25
LAN_CLKREQ#

LAN_ACTLED# 29
LAN_LINKLED# 29

*0_4

LAN_CLKREQ# 2

R26

*4.7K_4

AR8131

PCIE_WAKE_R#

C37

1u/6.3V_4

EMI

4.7K_4
14,26,31 PCIE_WAKE#

C36

+2.5V_LAN

VDDCIO_18

4.7uH/1A_2X2
+3V_S5

+2.5V_LAN

R35

R37

L2

+3V_S5

Q1
DTC144EUA

PLACE NEAR IC SIDE

Decoupling CAP
B

EEPROM
B

VAUX_12

for pin 8/16/22/36/39

LAN_TRD3N

1u/10V_4

LAN_TRD3P

C30

.1u/10V_4

LAN_TRD2N

C14

.1u/10V_4

LAN_TRD2P

C16

.1u/10V_4

LAN_TRD1N

C35

.1u/10V_4

LAN_TRD1P

C40

.1u/10V_4

LAN_TRD0N

C29

+3V_S5

LAN_TRD0P

close pin8

VDDL12

1u/10V_4

.1u/10V_4

.1u/10V_4

.1u/10V_4

EMI

close pin15

R13
49.9/F_4

R12
49.9/F_4

R11
49.9/F_4

U4
5
6

SDA
SCL

WP

GND

A0
A1
A2

1
2
3

VCC

*24C02

for pin45/28/32/46
A

R14
49.9/F_4

*4.7K_4

+3V_S5
C46

LAN_N3

C42

R15
49.9/F_4

LAN_N2

C28

R16
49.9/F_4

LAN_N1

C31

R17
49.9/F_4

LAN_N0

C41

R18
49.9/F_4

R38

*4.7K_4
VPD_DATA
VPD_CLK

VDDL12
close pin45

R39

*.1u/16V_4

+2.5V_LAN
A

C33

C17

C20

C15

.1u/10V_4

1u/10V_4

1u/10V_4

.1u/10V_4

C6

C5

C4

C3

.1u/16V_4

.1u/16V_4

.1u/16V_4

.1u/16V_4

Quanta Computer Inc.

PROJECT : ZR6

for pin 5/15/19/25.

Size

Document Number

Rev
1A

AR8131 GLAN
Date:
5

Monday, April 13, 2009

Sheet
1

28

of

42

VDDCIO_18

L36

For EMI
0_6

29

VDDCIO_18_LAN
C721

C473

1u/10V_4

.1u/16V_4

C474
.1u/16V_4

C476
.1u/16V_4

C475
.1u/16V_4

TRANSFORMER

Close to Transformer pin 1,4,7,10

RJ45
28 LAN_LINKLED#

CN9
LAN_LINKLED#

R370

220_8

10
9

+3V_S5
X-TX3N
X-TX3P
X-TX1N
X-TX2N
X-TX2P
X-TX1P
X-TX0N
X-TX0P

U21
28
28

LAN_TRD3N
LAN_TRD3P

28
28

LAN_TRD2N
LAN_TRD2P

28
28

LAN_TRD1N
LAN_TRD1P

28
28

LAN_TRD0N
LAN_TRD0P

LAN_TRD3N
LAN_TRD3P

1
2
3

TCT1
TD1+
TD1-

MCT1
MX1+
MX1-

24
23
22

X-TX3N
X-TX3P

LAN_TRD2N
LAN_TRD2P

4
5
6

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

21
20
19

X-TX2N
X-TX2P

LAN_TRD1N
LAN_TRD1P

7
8
9

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

X-TX1N
X-TX1P

LAN_TRD0N
LAN_TRD0P

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

X-TX0N
X-TX0P

R360

28 LAN_ACTLED#

8
7
6
5
4
3
2
1
12
11

220_8

GREEN_N
GREEN_P
TX1TX1+
RX1TX2TX2+
RX1+
RX2RX2+

GND2

14

GND1

13

YELLOW_N
YELLOW_P
AOP_RJ45

LAN_ACTLED#

LAN_LINKLED#

BOT-GST5900B LF

D28
*RCLAMP0521P.TCT

EMI

EMI

R363
75/F_8

D29

R362
75/F_8

R361
75/F_8

R359
75/F_8

*RCLAMP0521P.TCT

C466

C467

.1u/10V_4

.1u/10V_4

C478
220p/3KV_1808

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

LAN Transformer and RJ45/BT

Date:
1

Monday, April 13, 2009

7

Sheet

29

of
8

42

(MMC)

MODE_SEL

R350
100K/F_4

CARD_RST#

R352

R351

C471
1u/10V_4

RESET to EC GPIO (Confirm Anda)

*short0402 CARD_RST#_R

*0_4

R353 / C472 = 0 ohm / NC (RTS5159)

R353

C472

*short0402

*47P/50V_4

RREF

NC1

XD_ALE

XD_RE#/SD_D2

XD_WE#/SD_D3

XD_R/B#

XD_WP#

40

39

38

37

XD_RDY

XD_CE#

41
XD_ALE

XD_CLE

42
XD_CE#

CARD_RST#_R

43
XD_CLE

RST#

MODE_SEL

44

SD_D4/XD_WP#/MS_D7

SD_D2/XD_RE#

RREF

Modify

AV_PLL

SD_D3/XD_WE#

6.19K/F_4

45

46
AG_PLL

.1u/16V_4

MODE_SEL

XTLO

XTLI
C696

VREG
R344

XTLI

C702
1u/10V_4

47

U18

Vreg out 1.8V from Internal 3.3VLDO

48

*short0402

XTLO

R354

2 CLK_Card48

CN7
XD_R/B#
XD_RE#/SD_D2
XD_CE#
XD_CLE
XD_ALE
XD_WE#/SD_D3
XD_WP#
XD_D0
XD_D1
XD_RE#/SD_D2
XD_WE#/SD_D3
SD_CMD
SD_CLK/MS_SCLK
XD_D7/MS_D3
MS_CD#
XD_D2/MS_D2
XD_D6/MS_D0/SD_D0

SD_CMD

36

SD_CMD

SD_D5/XD_D0/MS_D6

35

XD_D0

SD_CLK/XD_D1/MS_CLK

34

XD_D1

13

USBP1-

DM

D3V3

33

13

USBP1+

DP

DGND

32

AGND

NC2

XD_D2/MS_D2

10

VREG

SD_D0/XD_D6/MS_D0

27

XD_D6/MS_D0/SD_D0

11

D3V3

XD_D3/MS_D1

26

XD_D3/MS_D1

XD_D5/MS_BS

25

XD_D5/MS_BS

12MHz from Crystal

T49

40mil

*0_8

+3V
R324
*short0805

C440

C439

10u/6.3V_6

.1u/16V_4
2

VCC_XD

MS_D5

For EMI
XD_D1

R326

C398

C412

C453

C390

*100K_4

4.7u/6.3V_6

.01u/16V_4

.01u/16V_4

.01u/16V_4

24

23

SD_CD#

SD_WP

MS_D4
22

21

20

XD_CD#
19

EEDI

EESK

18

17

16
T48

T46

XD_CD#
SD_WP#
SD_CD#

30mil

C715

XD_D4/SD_D1

Floating
1

SD_CD#

48MHz from CLK gen.

SD_WP#

Pull-high

XD_CD#

CLK source

EEDI

XTAL_CTR

EESK

+3V_CARD

EECS

RTS5159-GR

EECS

DGND

SD_D1/XD_D4

28

.1u/16V_4

37
38
41
42

SD_CLK/MS_SCLK
XD_D6/MS_D0/SD_D0
XD_D2/MS_D2
XD_D3/MS_D1
XD_D4/SD_D1
XD_D4/SD_D1
XD_D5/MS_BS
XD_D6/MS_D0/SD_D0
XD_D7/MS_D3

+3V_CARD

R322

29

12

SHIELD1-GND
SHIELD2-GND
SHIELD3-GND
SHIELD4-GND

XD_D3/MS_D1
XD_D5/MS_BS

CARDREADER POWER
+3VSUS

MS_INS#

EEDO

C445

+3V_CARD

XD_D7/MS_D3

SD_D7/XD_D2/MS_D2

15

.1u/16V_4

20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36

.1u/16V_4

CARD_3V3

EEDO

.1u/16V_4

MS-DATA1
MS-BS
4IN1-GND2
SD-VCC
SD-CLK
SD-DAT0
XD-D2
XD-D3
XD-D4
SD-DAT1
XD-D5
XD-D6
XD-D7
XD-VCC
XD-CD-SW
SD-WP-SW
SD-CD-SW

XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
XD-D0
XD-D1
SD-DAT2
SD-DAT3
SD-CMD
4IN1-GND1
MS-VCC
MS-SCLK
MS-DATA3
MS-INS
MS-DATA2
MS-DATA0

SD_CLK/MS_SCLK
C457

3V3_IN

XTAL_CTR

C455

30

22_4

GPIO0

+3V_CARD VREG

C452

31

NC3

L34

14

VCC_XD

13

+3V_CARD

SD_D6/XD_D7/MS_D3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

30

CONN_CARDREADER

MS_CD#

GPIO0

Modify

RTS5159

VCC_XD

VCC_XD

T59
PLTRST# 13,18,26,28,31

4 IN 1 CARD READER

R353 / C472 = NC / NC (RTS5158E)

+3V_CARD

10p/50V_4

T50

T45

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

CARD READER RTS5159

Date:
A

Monday, April 13, 2009

Sheet
E

30

of

42

EC(KBC)

L29

+3VPCU

30mil

C432

C434

.1u/16V_4_X7R

10u/6.3V_6

+3V

I/O Address
BADDR1-0

E775AGND
C418

C416

*.1u/16V_4_X7R

.1u/16V_4_X7R

For EMI
PCLK_591

PU +3V for SCI

14

CLKRUN#

12

GATEA20

12

RCIN#

14

EC_SCI#

D18

13,18,26,28,30 PLTRST#
26

PU +3V for SMI

USBON#

14

SERIRQ

14

KBSMI#

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

123

GPIO67/PWUREQ

SERIRQ

125

SERIRQ

CP4
B

*220PX4

2
4
6
8

MY13
MY12
MY11
MY10

2
4
6
8

MY9
MY8

10K_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5
+3VPCU

32
MBCLK
32
MBDATA
3
2ND_MBCLK
3 2ND_MBDATA

FFC_26P_KB

1
3
5
7

MY0

+3VPCU
RP1
10
MX4 9
MX5 8
MX6 7
MX7 6

25
TPCLK
25
TPDATA
32
CHG-EN
26 BT_POWERON#
34,36,37,38,39 MAINON
21 VGA_THERM#

CP3

1
3
5
7

*220PX4
CP2

1
3
5
7

*220PX4

2
4
6
8

MY7
MY6
MY5
MY4

Y3
1
2

*220PX4

2
4
6
8

MX0
MX1
MX2
MX3

2
4
6
8

MX4
MX5
MX6
MX7

32.768KHZ
4
3

C400
15p/50V_4

GPIO65/SMI

GPIO

54
55
56
57
58
59
60
61

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

70
69
67
68

GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2

72
71
10
11
12
13

GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
GPIO25/PSCLK3
GPIO12/PSDAT3

77

32KX1/32KCLKIN

TPCLK
TPDATA

E775_32KX2

79

R267

CP7

1
3
5
7

20M_6

LREST

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

E775_32KX1

R265

GPIO10/LPCPD

USBON#

MX0
MX1

25

GPIO24/LDRQ

SMB IR

PS/2

32KX2
WPCE775LA0DG

33K/F_4
C435
C397

C407
15p/50V_4

TPD_TRIP

ICMNT

64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112
80

ACIN
21,32
NBSWON# 25
LID591# 14,24
SUSB# 6,14
MXM_SMCLK 21

GPIO56/TA1
GPIO20/TA2
GPIO14/TB1

31
117
63

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO66/G_PWM

32
118
62
81

GPIO77/SPI_DI
GPO76/SPI_DO/SHBM
GPIO75/SPI_SCK

GPIO72/IRRX1/SIN2
GPIO70/IRRX2_IRSL0
GPIO71/IRTX/SOUT2
GPIO87/CIRRXM/SIN_CR
GPIO34/CIRRXL
GPIO16/CIRTX
GPO83/SOUT_CR/BADDR1

CP1
A

1
3
5
7

D/C#
S5_ON

*220PX4

*220PX4

2Eh

2Fh

11

164Eh

164Fh

10K_4

BADDR1

uR_SOUT_CR

R302

*10K_4

SHBM

SHBM

R269

10K_4

DNBSWON#_uR

SM BUS PU

+3VPCU

R276

*short0402

MBCLK
MBDATA

R513
R509

4.7K_4
4.7K_4

MXM_SMCLK
MXM_SMDATA

R304
R305

4.7K_4
4.7K_4

2ND_MBCLK
2ND_MBDATA
CRT_SENSE#

R259
R261
R523

4.7K_4
4.7K_4
4.7K_4

+3V

32
33,40

+3VPCU

ACER ID

DNBSWON# 14

6
5
7

SUSON 36,39
FANSIG 25

SCL
SDA
WP

A0
A1
A2

1
2
3

VCC
GND

8
4

R316
*0_4

84
83
82

CRT_SENSE#
SHBM
CELL-SET

C449

24C02

75
73
74
113
14
114
111

RSMRST#_uR

R519

*short0402

PWROK_EC_uR
RF_EN

R516

*short0402

SPI FLASH

CRT_SENSE# 24
T36

*.1u/16V_4_X7R

RSMRST# 14
SUSC# 6,14
PWROK_EC 14
RF_EN 26

22_4

R333

+3VPCU

+3VPCU

2'nd Source AKE38ZA0Q00

SPI_SDI_uR R325

HWPG
uR_SOUT_CR

U17

SPI_SDI_uR_R

SO

SPI_SDO_uR

SI

SPI_SCK_uR

SCK

CE

10K_4 SPI_CS0#_uR

VDD

HOLD

C443

WP

.1u/16V_4_X7R

VSS

W25X16AVSSIG

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR_R
SPI_CS0#_uR
SPI_SCK_uR_R

GPIO55/CLKOUT

30

ECDB_CLOCK

T27

VCC_POR

85

VCC_POR#

R272

47K_4

104

VREF_uR

R297

*short0402 +A3VPCU

R275

22_4

SPI_SDO_uR

R280

22_4

SPI_SCK_uR

1/13 Comfirm by vendor mail :

If the Southbridge enables 'Long Wait Abort' by default, the
flash device should be 50MHz (or faster)

R273
10K_4
1V8_ON

6,36 HWPG_1.5V
34 HWPG_1.05V
C652

1'st AKE38ZP0N01 : Winbond W25X16AVSSIG

2'nd AKE37FP0Z13 : MXIC MX25L1605AM2C-15G
3'rd AKE38ZA0Q00 : EON EN25F16-100HIP
4'rd AKE38ZN0800 : AMIC A25L016

Thermal Sensor(THM)

38,39 HWPG_1.8V
33

SYS_HWPG

3,6,14,35 DELAY_VR_PWRGOOD
37

HWPG_1.1V

D19

EV@BAS316

D24

BAS316

D20

BAS316

D25

BAS316

D21

BAS316

D22

*BAS316

D23

EV@BAS316

HWPG
R263
*short0402

MPWROK 6,14

INTERNAL KEYBOARD STRIP SET

+3V

MY17
MY16
MY15
MY14

+3VPCU
MY0

G1
NBSWON#

+3V

HWPG

+3VPCU

37

1u/10V_4

2
4
6
8

R323
*short0402

CONTRAST 24
NUMLED# 25
PWRLED# 25
CAPSLED# 25

BK1608HS220_6_1A

MY3
MY2
MY1
MY0

+3V_S5

U16

MXM_SMCLK
MXM_SMDATA

BADDR0

E775AGND

2
4
6
8

1/13 Comfirm by vendor mail :

Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware

PCIE_WAKE# 14,26,28

CP5

1
3
5
7

CORE DEFINED

R303

CPUFAN# 25

L30

POWER-ON PAD(UIF)

01
10

BADDR0

AMP_MUTE# 27

E775AGND

*220PX4

XOR TREE TEST MODE

BADDR0

MXM_SMDATA 21
BATLED0# 25
BATLED1# 25
VRON 35
SUSLED# 25

F_SDI
F_SDO
F_CS0
F_SCK

VREF

Data

00

BL_STATE 24

CP6

1
3
5
7

32

GPIO01/TB2
GPIO03/AD6
GPIO06
GPIO07/AD7
GPIO23/SCL3
GPIO30/CIRTX2
GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM
GPIO36/TB3
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/CIRRXM/TRST
GPO47/SCL4
GPIO50/TDO
GPIO51/TA3
GPIO52/CIRTX2/RDY
GPIO53/SDA4
GPIO81
GPO82/TRIS
GPO84/BADDR0
GPIO41

FIU

.1u/16V_4_X7R
.1u/16V_4_X7R

TEMP_MBAT 32
TSATN_EC# 6

CC-SET 32

TIMER

SPI

97
98
99
100
108
96
101
105
106
107

LPC

ECSCI/GPIO54

Index

SHBM=0: Enable shared memory with host BIOS

GPI94/DA0
GPI95/DA1
GPI96/DA2
GPI97/DA3

D/A

CN2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

A/D

PLTRST#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

KBRST

25
25

PU +3V for SMI

GA20

124

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05/AD4
GPIO04/AD5

GPIO11/CLKRUN

121

SCI#_uR 29

E_KEY

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

122

EC_FPBACK#
T42

C422
*10p/50V_4

1 BAS316

24 EC_FPBACK#
R283
*22_4

3
126
127
128
1
2

GND1
GND2
GND3
GND4
GND5
GND6

For PCICLK

LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_591

LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_591

5
18
45
78
89
116

12,26
12,26
12,26
12,26
12,26
2

U14

.1u/16V_4_X7R

VDD

*.1u/16V_4_X7R

VCORF

.1u/16V_4_X7R

AGND

4.7u/6.3V_6

.1u/16V_4_X7R

VCORF_uR 44

C669

103

C668

102

C662

AVCC

C433

VCC1
VCC2
VCC3
VCC4
VCC5

C376

19
46
76
88
115

4.7u/6.3V_6
C663

31

I/O ADDRESS SETTING

+A3VPCU

BK1608HS220_6_1A

+3VPCU

R301
100K/F _4 NTC

*SHORT_ PAD

R247

10K_4

R300
47K/F_4

Quanta Computer Inc.

TPD_TRIP

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

WPCE775C_0DG & FLASH

5

Sheet
1

31

of

42

Rev
1A

PL1
HI0805R800R-00_8

VA

PD13
PDS1040S-13
1

4
3

PC85
0.1u/50V_6

PC86
0.1u/50V_6

PC82
0.1u/50V_6

R1

PQ19
AP4435GH
VA2

PC5
0.1u/50V_6

PR14
220K/F_6

VIN

PQ21

PC87
0.1u/50V_6

PC89
2200p/50V_6

PR3
33K_6

32

AP4435GH

PD12
P4SMAJ20A

PC83
0.1u/50V_6

PL2
HI0805R800R-00_8

PC84
2200p/50V_6

PR139
0.02_7520

PJ2
PD4
SW1010CPT

PR22
220K/F_6

PR1
D/C#

PR2
10K_6

31

SHORT 0 0402

20277-044L

PQ1
IMD2AT108

2
PQ2
DMN601K-7
1

CSIP_1

VIN

PC28
2200p/50V_4

PR75
4.7_6

PC30
0.1u/50V_6

PC95
100p/50V_6

HI0805R800R-00_8
PL3

PJ1

MBAT+

1
2
3
9 4
10 5
6
7
8

PR57
10K/F_6

BAT-V

PC2
47p/50V_6

PC3
47p/50V_6

TEMP_MBAT

TEMP_MBAT 31

6251EN

15
VDDP

20
CSIN

VDD

18

ISL6251_PHASE

EN

PC39
0.1u/50V_8

LGATE

14

PGND

13

GND

12

VADJ

11

ACLIM

10

PC129
PC49
*10u/25V_1206
*10u/25V_1206
PC128
*10u/25V_1206

PQ5
AO4496

PL7
6.8uH

PR147
0.03_3720
6251LR

BAT-V

5
6
7
8

3
2
1
PHASE

ACSET

PR53
SHORT 0 0603

PR20
*0_6

ISL6251_UGATE

DCIN

PL5
HI0805R800R-00_8
31
CHG-EN
PD1
RB500V-40

BATTERY Con.

6251ACSET 2

17

PC48
10u/25V_1206

PR64
2.2/F_4

ISL6251_LGATE
4

VADJ

PC20
0.01u/50V_6

PC36
*2200p/50V_4

PQ4
AO4710
3
2
1

PR58
82.5K/F_6

24

6251B_1

PC43
0.1u/50V_6

T7

PC103
2200p/50V_6

6251LR
BAT-V

PC111
10u/25V_1206

PC106
10u/25V_1206

VREF

R2

PR74
196K/F_6

Use Z06 conn for A-SMT

B change to XXXXXX

PC90
0.1u/50V_6
1

DCIN

PR72
2.7_6
16 6251B_2

UGATE

VRFE

PC29
0.1u/50V_6

PU3
ISL6251A

ACPRN

PR59
10/F_6

23

ICM

ACPRN

VCOMP

+3VPCU
MBCLK

PR60
20/F_6

PQ3
DMN601K-7

ICOMP

CH3

MBDATA

6251VCOMP1 6

VP

CSON

CELLS

CH2

BOOT

6251ICOMP 5

VN

CH4

CSON 22

TEMP_MBAT

CH1

CSOP

PC41
2200p/50V_6

PD5
RB500V-40

CHLIM

BAT-V

ACIN

CSOP 21

PC35
0.047u/25V_6

21,31
PU1
CM1293A-04SO

CSIN

19

6251LR

PR61
20/F_6

CSIP

PR44
100K/F_6

PC44
4.7u/10V_8

ISL6251_VDDP

CSIP

PR45
10K/F_6

EMI request

PR54 ISL6251_VDD
20/F_6

5
6
7
8

PR52
2.2/F_6
+3VPCU

ACLIM

VREF
CC-SET

6251CELLS_1

PC45
100p/50V_6

31

R3

PR76
15K/F_6

+3VPCU

MBCLK

31

MBDATA

31

PR56
100K/F_6

0.01u/50V_6
PC37
PR63
SHORT 0 0603

PR70
100_4
6251VCOMP2

PR16
100_4

PC38
*100p/50V_6

PR15
100_4

PR25
100K/F_6

ICMNT

PC32
0.01u/50V_6

ICMNT

31

LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)

PR67
3.3K/F_6

CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A

PC42
3300p/50V_4

4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)

Vaclm=((33//152)/(33//152+19.6//152))*Vref
A

PD3
*ZD5.6V

PR13
*100K/F_6

PD2
*ZD5.6V

R2=adapter current sense resistnece

PC7
0.01u/50V_6

Quanta Computer Inc.

PROJECT : ZR6
CELL-SET = Hi ----> Cells = VDD ---->4S
CELL-SET = Low ----> Cells = GND ---->3S

Size

Rev
1A

Charger (ISL6251A)
Date:

Document Number

Sheet

Monday, April 13, 2009

1

32

of

42

MAIND

SUSD

MAIND

36,39

SUSD

39

33
PR182

VL

3,40 SYS_SHDN#

VIN

SHORT 0 0402

VIN

VIN

PC169
0.1u/50V_6

PC163
100u/25V_6X7.7

PC171
PC173
2200p/50V_6 10u/25V_1206

PC172
*10u/25V_1206

PC174
0.1u/50V_6

PD15
ZD5.6V

3V5V_EN

PC175
0.01u/16V_4

PC165
0.1u/50V_6

PR187
*0_6

PC164
2200p/50V_4

PC166
10u/25V_1206

PR180
39K/F_4

VL

PC178
4.7u/10V_8

PC176
0.1u/50V_6

OCP: 8A

PC160
10u/25V_1206

PC158
330u/6.3V_6X5.7

PR179
196K/F_6

PR169
*2.2/F_4

PR116
*63.4K/F_4

5V_DL

PC159
0.1u/50V_6
PC168
*2200p/50V_4

PC81
0.1u/50V_6
PR114
1/F_6

PQ35
AO4710

1
2
3

PR118
0_4

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

32
31
30
29
28
27
26
25

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

PU10
ISL6237

PR178
196K/F_6
2

PC170
*2200p/50V_4

PC80
0.1u/50V_6
PR113
1/F_6

PC76
0.1u/50V_6

L(ripple current)
=(19-5)*5/(2.2u*0.4M*19)
~4.18A

PR170
0_6

PC78
0.1u/50V_6
3

1
PR112
22_8

Iocp=10-(4.18/2)=5.91A
Vth=5.91A*14.2mOhm=83.922mV
R(Ilim)=(83.922mV*10)/5uA
~169K

+15V

PR184
*200K/F_4

+15V_ALWP

PR120
*0_6

PR181
*0_6

PR119
0_6

REFIN2

+3VPCU

DDPWRGD_R

+3VPCU

+3VPCU

3
PR126
1M_6

+3VPCU

SUSD

S5D

2
PQ14
AO3404

PQ33
AO4496

PQ38
AO4496

C717

C718

C719

.1u/10V_4

.1u/10V_4

.1u/10V_4

PQ17
DMN601K-7

PQ12
DMN601K-7

3
2
1

PQ16
DMN601K-7

3
2
1

PR122
1M_6

0.17A

PQ18
DTC144EU

+3V_S5

0.3A

MAIND 4

+5V_S5

Quanta Computer Inc.

S5_ON

31,40

MAIND

PQ15
AO3404

+3VSUS
PQ13
AO6402A

S5D 3

PR124
22_8

+5VPCU

PR123
22_8

+5VPCU

1
2
5
6

PR125
1M_6

+15V

+5V_S5

SYS_HWPG 31
PR176
SHORT 0 0402

PR183
*39K/F_4

5
6
7
8

+3V_S5

PR174
100K/F_4

Iocp=8-(2.48/2)=6.67A
Vth=6.67A*15mOhm=94.714mV
R(Ilim)=(94.714mV*10)/5uA
~191K

PC77
0.1u/50V_6

5
6
7
8

VIN

PC162
330u/6.3V_6X5.7

PR115
*0_6

REF

L(ripple current)
=(19-3.3)*3.3/(2.2u*0.5M*19)
~2.48A

PC161
0.1u/50V_6

PQ37
AO4710

OCP:8A

2
PD10
CHN217

PR171
SHORT 0 0603

OCP:8A

PR117
0_6

10K/F_4 : CS31002FB26

3V_DL4

SKIP

PR172
*0_6
PC167
1u/16V_6

PC79
0.1u/50V_6

PL13
2R2uH-5.8mR

PR173
*2.2/F_4

SKIP
DDPWRGD_R
3V_EN

VL

PD11
CHN217

PQ34
AO4496

3
2
1

8
7
6
5

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD
PAD
PAD
PAD

1
2
3

5V_LX

9
10
11
12
DDPWRGD_R 13
5V_EN
14
15
16
37
36

35
34
33

+5VPCU

+3VPCU

3V_LX

BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2

PQ36
AO4496

3V_DH

*0_4

8
7
6
5
4
3
2
1

PR188
200K/F_4

5V_DH

17
18
19
20
21
22
23
24

+5VPCU

PL12
2R2uH-5.8mR

OCP : 8A
PR209

REF

3
2
1

8
7
6
5

PR121
0_4

5
6
7
8

PR185
0_4
PC177
1u/16V_6

5
6
7
8

3V_EN

PR186
100K/F_4

REFIN2

PR177
SHORT 0 0402

5V_EN

PR175
SHORT 0 0402

2.25A
+5V

4.54A

+3V

PROJECT : ZR6

5.26A

Size

Document Number

Rev
1A

SYSTEM 5V/3V (ISL6237)

Date:
5

Monday, April 13, 2009

Sheet
1

33

of

42

34

VIN
+5V_S5

+3V
PC115
0.1u/50V_6

15

EN/DEM

16
1

PR69
*10K/F_6

TON

UGATE

12

VOUT

PHASE

11

OC

10

VDD

FB

PGOOD

VDDP

LGATE

GND

PGND

NC

TPAD

17

14

NC

4.7u/6.3V_6
PQ26
AOL1448

PC53
0.1u/50V_6

PC120
0.1u/50V_6

PL9
1R0uH-3mR

UGATE-1V
PHASE-1V
PR68

+1.05V

2.8K/F_6

LGATE-1V

PR159
*2.2/F_6

Rds*OCP=RILIM*20uA

Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

PC55
33p/50V_6

R1

PQ29
AOL1718

PC132
*2200p/50V_6

PC135
PC133
10u/10V_8
560u/2.5V_6X5.7

PR89
10K/F_6

R2

VOUT=(1+R1/R2)*0.75

1V_FB

TON=3.85p*RTON*Vout/(Vin-0.5)

1.05V
OCP: 12A

PR82
4.02K/F_6

PC114
0.01u/50V_6

PC131
10u/25V_1206

1
2
3

1
2
PC117
*1000p/50V_6

13

31 HWPG_1.05V

BOOT

PC123

47K_6

PC119
1u/16V_6

PR151
0_6

PU7
UP6111AQDD

1
2
3

PR150

PC121
*0.1u/50V_6

31,36,37,38,39 MAINON

PC52
2200P/50V_4

PR149
1M_6

PD14
RB500V-40

PR153
10/F_6

AOL1412 Rdson=4.6mOhm
OCP=16-0.8A
L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
~3.646A
4.6m*12=RILIM*20uA
RILIM=2.76K--- 2.8K

+1.05V

PC125
0.1u/50V_6

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

VCCP 1.05V(UP6111A)
Date:
5

Monday, April 13, 2009

Sheet
1

34

of

42

+3VPCU

PR129
*0_4

PR130
*0_4

35

+3VPCU

PR131
*0_4

PR132
*0_4

PR133
*0_4

PR134
*0_4

DELAY_VR_PWRGOOD

PR135
*0_4

3,6,14,31

VIN
H_VID6

H_VID5

H_VID4

H_VID3

H_VID2

H_VID1

H_VID0
PC9
PC96
2200p/50V_6 10u/25V_1206

1
2
3
1
2
3

48

35

BOOT1

36
PR137
2.2_6

Throttling temp.
105 degree C

+3V_S5
H_PROCHOT#

PR21
470K_4 NTC

PR6

0_4

PSI#_1

PSI#

PR10

*0_4

PGD_IN

PGD_IN

PR24

147K/F_6

RBIAS

PR140
4.02K/F_4
VSOFT
PC98
0.022u/50V_6

PC97
0.01u/16V_4

Panasonic
ERT-J0EV474J

H_VID0
4

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

31

VRON

3,6,12 ICH_DPRSTP#
14 VR_PWRGD_CK410#

NTC

SOFT
VID0

H_VID1

38

VID1

H_VID2

39

VID2

H_VID3

40

VID3

41

VID4

42

VID5

43

VID6

44

VR_ON

PR128

0_4

ICH_DPRSTP#_R 46

PR127

0_4

CLKEN#

47

PGND1

33

ISEN1

24

ISEN2

1/F_6

PR5

*0_6

VIN
PC4
0.22u/25V_6

31

PC26
PC116
2200p/50V_6 10u/25V_1206

PC99
4.7u/10V_8

DPRSLPVR

UGATE2

27

BOOT2

26

PHASE2

28

LGATE2

30

PGND2

29

ISEN2

23

NC

25

DPRSTP#
CLK_EN#

6266A_UG2
PC100
0.22u/25V_8

PQ24
AOL1448

PC33
*2200p/50V_6

6266A_PH2

ISEN2

6266A_LG2
PC21
0.22u/25V_6

PR143
100/F_4

13
PC102
2200p/50V_6

VSUM

19

PC101
1000p/50V_4

PR29
97.6K/F_4

12

FB2

11

FB

10

PQ23
AOL1718

PC17
330p/50V_4

PC13
330p/50V_4

Panasonic
ERT-J1VR103J

ISL6266_VO

17
PR33
3.9K/F_4

+
PC23
*330u/2V_7343

PC22
*2200p/50V_6
PR40
0_6

PR28

3.65K/F_6

PR30

10K/F_6

PR38

1/F_6

PR46

*0_6

18

DFB

DROOP
16

VSEN
14

VW

VSUM
PR55
10K _6 NTC

RTN

PC12
*330u/2V_7343

PR42
2.7K/F_4
PR41
11K/F_4

COMP

15

PR35
11.3K/F_4

+
PC11
330u/2V_7343

VSUM

PC104
0.068u/25V_6

VO
PC19
1000p/50V_6

PR37
2.2_6

VDIFF

PR144
1K/F_4

PC15
220p/50V_4

PC108
100u/25V_6X7.7

PR141
13.3K/F_4

PC110
0.22u/25V_6
PC18
100P/50V_4

PC25
0.1u/50V_6

PL6
0.36uH

PR34
0_6

OCSET

PC27
10u/25V_1206

PR66
*2.2_6

PR145
1K/F_4

PR4
0_6

ISEN1

PR142
2.2_6

H_VID6
PR7
0_4
PR8
499/F_4

DPRSLPVR 45

32

PVCC

PU6
ISL6266A

H_VID5

VR_ON

LGATE1

PC91
0.22u/25V_8

+5V_S5

37

H_VID4

6,14 PM_DPRSLPVR

VR_TT#

34

PR26
*10K/F_4

PHASE1

10K/F_6

PR12

1
2
3

VR_ON

PR19

PC94
*330u/2V_7343

PC16
*2200p/50V_6

PR9
10K/F_6

VSUM

UGATE1

3.65K/F_6

+
PC93
330u/2V_7343

GND_T

PSI#

PSI#

GND

49

PR11
0_6
PR23

1
2
3

21

3V3

22

Close to Phase 1 Inductor

VCC

PC105
1u/25V_8

PR27
2.2_6

4
PQ22
AOL1718

PGOOD

PGD_IN

PC1
0.1u/50V_6

VIN

PR146
10/F_6

2
3

PR138
1.91K/F_4

PC88
0.1u/50V_6

20

PC107
0.1u/50V_6

PL4
0.36uH

PR136
10_4

6266A_LG1

PWR_MON

VCC_CORE
PC6
*2200p/50V_6

PR39
10/F_6

+5V_S5

PR18
4.99K/F_6

30A

6266A_PH1

SHORT 0 0805

PC92
100u/25V_6X7.7

PQ20
AOL1448

+3V

PC8
0.1u/50V_6

PR17
*2.2_6

5
6266A_UG1
VIN

PR36

PC10
10u/25V_1206

PC109
0.33u/10V_6

ISEN1

Close to Phase 1 Inductor

PR43
1K/F_4
VCC_CORE

PC24
180p/50V_4
PC14
0.01u/16V_4

PR32
10/F_6

Parallel
VCCSENSE 4
VSSSENSE 4

Quanta Computer Inc.

PR31
10/F_6

PROJECT : ZR6
Size

Document Number

Rev
1A

CPU CORE(ISL6266A)
Date:
5

Monday, April 13, 2009

Sheet
1

35

of

42

36
D

PC122
10u/6.3V_8
PR71
0_6

PC40
0.1u/50V_6

+SMDDR_VTERM

VIN
PC118
10u/10V_8
5

PC113
10u/10V_8

PQ27
AOL1448

19

PC51
PC50
2200p/50V_6 10u/25V_1206

+1.5VSUS

+1.5VSUS

VTTSNS

GND

MODE

LL

DRVH

VBST

DRVL
PGND

18

CS_GND

17

CS

16

V5IN

15

9A

+1.5VSUS

PR152

TPS51116REGR
PU2

5.1K/F_6

PR73
*2.2/F_6

4
+5VPCU

COMP

PGOOD

13
2
PR62
100K/F_6

NC

S5

PC31
1u/10V_4

PR65
5.1_6

PC34
1u/10V_4

PC46
*2200p/50V_6

PC139
560u/2.5V_6X5.7

+3VPCU

12

11

S3
10

VDDQSET

VDDQSNS
8

FOR DDR II

+5VPCU

NC

PC112
0.033u/50V_6

PC68
10u/6.3V_8

V5FILT

VTTREF

14

PQ25
AOL1718
1

+SMDDR_VREF

OCP: 11A

VTTGND

PC130
10u/25V_1206

PL8
2R2uH-5.8mR

1
2
3

VLDOIN

VTT

GND

1
2
3

20

21

22

24

23

25

HWPG_1.5V 6,31

PR49
620K/F_4
VIN

PR48
10K/F_6
B

T61

VDDIO_FB_H

T62

VDDIO_FB_L

PR155

S5_1.5V

PR50 SHORT 0 0402

S3_1.5V

PR51 SHORT 0 0402

31,39

MAINON

31,34,37,38,39

AO1412 Rdson=3.~4.6mOhm
OCP=15.5+0.5A
L(ripple current)
=(19-1.8)*1.8/(2.2u*400k*19)
~1.03A
4.6m*16=RILIM*10uA
RILIM=5.06K~5.1K

Vout = (PR150/PR149) X 0.75 + 0.75

*0_4
S3_1.5V

PR154

SUSON

PR148
*0_4

S5_1.5V

*0_4
PR47
10K/F_6

(10u*PR154)/Rdson+Delta_I/2=Iocp

5
6
7
8

+1.5VSUS

33,39

MAIND

4
PQ32
AO4496
A

3
2
1

+1.5V

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

DDR 1.5V(TPS51116)
Date:
5

Sheet

Monday, April 13, 2009

1

36

of

42

V1.2GND

PC58
EV@0.1u/50V_6

37

PC59
EV@1000p/50V_6

R1

VID[1:0]

PR77
EV@158K/F_6
V1.2GND

R2

PR80
EV@750K/F_6

PR78

PR83
EV@33K/F_6

EV@121K/F_6

R3

PR88
EV@2.2K_4

V1.2GND
2

PC57
EV@0.1u/50V_6

G0

G1

PQ7
EV@DMN601K-7

V1.2GND

GPU_VID1

INPUTS

VID0

Set

OUTPUTS

G1

G0

OD1

OD2

VOUT1
OD3
A

PR93
PC67
EV@332K/F_4
EV@150p/50V_4

PR91
EV@100K/F_6

PQ6
EV@DMN601K-7

PR84

V1.2GND

1.2V

2.75* R2/(R1+R2)=2.75*121/(121+158) =

1.192 (G0=0, G1=0)

1.1V

2.75*(R2||R3)/[(R2||R3)+R1] =

1.092 (G0=1. G1=0)

1.0V

2.75*(R2||R4)/ [(R2||R4)+R1] =

0.99 (G0=0, G1=1)

0.9V

2.75*(R2||R3||R4)/ [(R2||R3||R4)+R1] =

0.91 (G0=1, G1=1)

MCP67 TABLE

EV@63.4K/F_6

V1.2GND

V1.2GND

GPU_VID0
PC65

+3V

V1.2GND

PR98
SHORT 0 0603

PC64
EV@0.01u/50V_6

OCT

VIN

13
CSN

12

CSN

CSP

11

CSP

PR90
PC60
EV@330K/F_4EV@1000p/50V_6
V1.2GND

V1.2GND

V1.2GND

PU4
EV@OZ8111
3

ON/SKIP

PGD

LX

PHASE-1.2V

UGATE-1.2V

14A

PC72
EV@0.1u/50V_6
PQ28
EV@AOL1448

V1.2GND

10

OCP:18A

PC137
EV@2200p/50V_6

4
1
2
3

VSET

PR95
EV@1K_4

VREF

PR99
EV@10K_6

AGND

MAINON

14

V1.2GND

15

VIN
16

V1.2GND

EMI request

VDDA

V1.2GND

VIN

VDDA

EV@100K/F_6

PC56
EV@1u/16V_6

EV@150p/50V_4

TEST

PR94
EV@2.7K_4

PR92

17

21

VID1

V1.2GND

R4

21

MAINON

31,34,36,38,39 MAINON

PC61
EV@22p/50V_4

+VGACORE

PC71
PC70
EV@10u/25V_1206
EV@10u/25V_1206

PL10
EV@1R5uH-3.9mR

31

PC66

EV@0.22u/25V_6

+5V

1V8_ON

LGATE-1.2V

PC142
*EV@330u/2V_7343

EV@4700P/50V_6
PC143
EV@330u/2V_7343

PC141
EV@10u/6.3V_8

CSP
PD6
EV@RB500V-40

PR100

V1.2GND

PC63

PC140
*EV@2200p/50V_4

PQ30
EV@AOL1718

PR101
EV@22_6

VDDA

PR85
EV@51/F_6 +
PR86
EV@100K/F_6

1
2
3

V1.2GND

PR160
*EV@2.2_4

LDR

BST
8

GNDP

PR97
SHORT 0 0603

HDR

VDDP

PR96
EV@100K/F_6

PC69
EV@1u/16V_6

CSN

SHORT 0 0805

18

M92LP

VGA_SENSE
PR79
*EV@100/F_4

+1.5VSUS

+3V_S5

PR156

MAINON

PR157

PC126
EV@0.1u/10V_4

EV@100K_4

PU8
EV@G973

EV@0_6

PC124
EV@10u/6.3V_8

VIN

POK

VIN1

GND

EN

VOUT

VCNTL

VOUT

HWPG_1.1V 31

+VGA1.1V

PC47
EV@1u/10V_4

FB

PC127
*0.1u/50V_6

PR158
EV@100K_4

+5VPCU

R2
Vout =0.8(1+R1/R2)
=1.5V

PR81
EV@34K/F_6

2.435A
D

PR87
EV@13K/F_6

R1
1

PC136
2

PC134

PC138

Quanta Computer Inc.

EV@10u/6.3V_8 EV@10u/6.3V_8 EV@0.1u/10V_4

PROJECT : ZR6

PC54
EV@0.047u/16V_4

Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

VGA M92LP (OZ8118)

1

Sheet
5

37

of

42

VIN
+5V_S5

38

UGATE-1.8V

PR163

PC149
*EV@0.1u/50V_6
PU9
EV@UP6111AQDD

EV@47K_6

31,34,36,37,39 MAINON
+3V
PC146
EV@0.1u/50V_6

TON

UGATE

12

UGATE-1.8V

VOUT

PHASE

11

OC

10

VDD

FB

PGOOD

VDDP

LGATE

GND

PGND

NC

TPAD

17

14

NC

1 D1

G1

2 D1

S1/D2

LGATE-1.8V 3 G2

4 S2

PC151
EV@0.1u/50V_6

PL11
EV@2.5uH
+1.8V

EV@3.92K/F_6

LGATE-1.8V

Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

2.73A
C

PR168
*EV@2.2/F_6

PC75
EV@33p/50V_6

R1

Rds*OCP=RILIM*20uA
PC154
*EV@2200p/50V_6

1.8V_FB

TON=3.85p*RTON*Vout/(Vin-0.5)

PR111
EV@14K/F_6

PC144
*EV@1000p/50V_6 PC145
EV@0.01u/50V_6

OCP: 4A

PQ31
EV@AO4932

PHASE-1.8V
PR165

PC153
EV@10u/25V_1206

PC152
EV@2200P/50V_4

PC147
EV@0.1u/50V_6

16

31,39 HWPG_1.8V

13

EN/DEM

PR167
*EV@10K/F_6

BOOT

15

PC148
EV@1u/16V_6

PR164
EV@0_6

PC150
EV@4.7u/6.3V_6

PR162
EV@1M_6

PD9
EV@RB500V-40

PR166
EV@10/F_6

PC156
EV@560u/2.5V_6X5.7
PC155
EV@10u/10V_8

PR110
EV@10K/F_6

R2

VOUT=(1+R1/R2)*0.75
B

AO4932 Rds=15.6~19.6mOhm
OCP=16-0.8A
L(ripple current)
=(19-1.8)*1.8/(2.5u*272k*19)
~2.14A
19.6m*4=RILIM*20uA
RILIM=3.92K

+1.8V

PC157
EV@0.1u/50V_6

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

VCCP 1.8V(UP6111A)
Date:
5

Monday, April 13, 2009

Sheet
1

38

of

42

39
1

+3V

PR207

+5VPCU
D

PS10 SHORT 0 0603

31,34,36,37,38 MAINON

VEN

3
8
9

VIN
GND
GND

VO

NC

HWPG_1.8V 31,38
+1.8V

0.3A

+3V_S5

IV@100K_4

PU11
IV@RT9025-25PSP
4 VPP PGOOD 1

ADJ

PC182
IV@0.1u/50V_6

PR208

PC185

IV@43.2K/F_6

IV@10u/10V_8

0.8V
PC183
IV@10u/10V_8

PC184 PC181
IV@0.1u/50V_6 *IV@0.1u/50V_6

PR206
IV@34K/F_6

Vout =0.8(1+R1/R2)
=1.8V

VIN

+3VSUS

PR193
1M_6

+SMDDR_VTERM

PR189
22_8

+1.5VSUS

PR190
22_8

+15V

PR191
22_8

PR192
1M_6

33

SUSD

SUSD
3

SUS_ON_G

PQ40
DMN601K-7

PQ41
DMN601K-7

PQ42
DMN601K-7

PC179
*2200p/50V_4

PQ43
DMN601K-7
1

PR195
100K_4

PQ39
DTC144EU

PR194
1M_6

SUSON
1

31,36

VIN

+3V

PR203
1M_6

+5V

PR196
22_8

+VGACORE

PR197
22_8

+1.05V

PR198
22_8

+1.5V

PR199
22_8

+1.8V

PR200
22_8

+15V

PR201
22_8

PR202
1M_6

33,36

MAIND

MAIND
3

MAINON_ON_G

PQ48
DMN601K-7

PQ49
DMN601K-7

PQ50
DMN601K-7

PQ51
DMN601K-7

PC180
*2200p/50V_4

2
PQ47
DMN601K-7

2
PQ46
DMN601K-7

2
PQ45
DMN601K-7

PQ44
DTC144EU
2

PR205
100K_4

PR204
1M_6

MAINON

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Date:

Monday, April 13, 2009

Rev
1A

Discharge
5

Sheet
1

39

of

42

40
VIN
A

PR108
1M_6
31,33

PD8
SW1010CPT

S5_ON

S5_ON

PQ11
AO3409

TH_ON 2

2
PQ10
DTC144EU

VL

VL

thermal protection

S5_ON

SYS_SHDN# 3,33
PR103
200K/F_4

PC74
0.1u/50V_6

PR105
200K/_6
3

PR104
1.33K/F_4

2.469V

PU5A
LM393

PC73
0.1u/50V_6

PR102
200K/F_4

+3VPCU

PQ9
DMN601K-7
1

PR161
10K _6 NTC

VL
S5_ON

PQ8
DMN601K-7

PR109
100K/F_6
PR106
10K/F_6

PU5B
5
4.95V

+
LM393

PD7
NC_TEMP

T10

RB500V-40

For EC control thermal protection (output 3.3V)

PR107
1M/F_6

Quanta Computer Inc.

PROJECT : ZR6
Size

Document Number

Rev
1A

Thermal Protection
Date:
1

Monday, April 13, 2009

Sheet
5

40

of

42

MODEL:

MODEL

REV

ZR6 MB

CHANGE LIST

FROM

PAGE

First release

Page23:Change C209,C522,C567,C533 from CH31003MB14 to CH41002KB93

Page10:change net name +1.8VSUS_TXLVDS-->+1.5VSUS_TXLVDS,+1.8VSUS_VCC_SM_CK-->+1.5VSUS_VCC_SM_CK

ZR6 MB

Page24:change R174 from 100k to 470K,Del R177 to slove Hall sensor issue
Page25:U12 No stuff and Del R248 to no stuff
Page12:Change R543,R542,Q31 to no stuff,because ZR6 battery can't charging
Page21:VGA ID pin R387 stuff 15k,R382 stuff 45.3K,R414 stuff 25K,R381/R415 no stuff
Page14:MB ID pinR298 Value change to EV@,R308 Valule change to IV@
Page26:change L25 layout and del RN19 and change L23 layout and del RN14
Page24:change L1 layout and del RN1
Page24:Change LCD connector(OT2)
Page33:Mirror the PJ2 connector
Page26:change CN19 footprint to

mipci800055fb052g100pl-52p-ldv

as ZG5 and Del debug card 0 ohm R518,R517,R514,R511,R510,R315,R310

Page6:Change DD3 power OK circuit as ZK6

Page26:Del R520,R529 and change R538,R536,R532 footprint to short pad
Page24:U11 add pin 49 to thermal pad gnd
Page25:Change CN3 footprint to af712l-a2g1t-12p-l-zr6
Page32:Change CN2 footprint to 88502-260N-26P-L-ZR6

Page29:Change U21 footprint to trf-10-1-24p-zr6

Page27:Change U33 footprint to tqfn48-7x7-5-49p-zr6
Page26:Change CN8 footprint to bl123-10r-10p-l-zr6
Page25:Change D1D2D3

footprint to led-ht-110nb5-3p-zr6

Page27:Change CN18 Part Number to DFTJ06FR212 and Change CN21 Part Number to DFTJ06FR211
Page33:Change PJ1 Part Number to DFHD08MR064 for ZR6
Page17:Change C502 to no stuff for cost down
Page26:Change CN8 footprint to bl123-10r-10p-l-zr6& Partumber change to DFFC10FR017
Page2:Del RN15,RN36,RN18,RN22,RN20,RN24,RN23 for cost down &Change R252,R244,R499 to short pad
Page4:Change C58 to No stuff
Page29:change R366,R367,R357,R358 to short pad

for cost down

Page27:change R506,R508,R535,R345 to short pad

for cost down

Page24:Del R346,R7

for cost down

Page25:Del R218,R407 for cost down

B

Page26:change C683,C675 to no stuff

Page31:Add C715 for EMI
Page31:Del C466,C467,L35 for cost down
Page24:Add CN1 Pin33,Pin34 to GND ,Add R248,R218 for HDMI and Add L52,L53,L54,L55 for EMI
Page10:change L38 to R037
Page2:Add R511 for Mini_CLKREQ# pull up
Page40:change +3VSUS to +3V_S5,HWPG_1.5V to HWPG_1.8V

TO

1A
1A
1A
1A
2A
1A
1A
1A
3A
3A
1A
1A
1A
3A
2A
1A
3A
2A
3A
1A
3A
1A
3A
3A
2A
3A
2A
3A
3A
1A
3A
2A
2A
2A
2A
2A
2A
2A
3A

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

3B
D

3B

3B
C

3B

3B

3B

Page24:1.Del R248,R218,2.L19,L21 change to R218,R234,3.change D14,D15,R196,R197,R203,R200 vaule to stuff

Page12:Change C450,C451 to 18P
Page28:Change C19,C22 to 33P
Page21:Add MXM ACIN circuit,R177R182,Q33,Q32,R183
Page27:change R574 to no stuff and R541 to stuff
Page24:Add D44 and Del R410
Page28:change R39,R38,U4,C46 to no stuff
Page18-23:change T65,T74,T11,T69,T68,T64,T67,T70,T73,T66,T72,T71 footprint to T3050

Page26:Change C629 to 100uf and C636 to no stuff

Page6:change R175 and R181 to 47K for HDMI vender request
Page24:Change R197,R200 to EV@

Quanta Computer Inc.

MB Assy' P/N: 31ZR6MB0000/10/20/30/40/50/60/70

Approved by :
5

Johnny_O
4

Project :ZR6 MB

Document No.:

Drawing by :Andy Chen

DATE: 2009/03/04

PROJECT : ZR6
Size

Document Number

Rev
1A

Thermal Protection
Date:
2

Monday, April 13, 2009

Sheet
1

41

of

42

MODEL:

MODEL

REV

ZR6 MB

CHANGE LIST

FROM

PAGE

Page6:change R175 and R181 to 4.7K for HDMI vender request

Page10:change net name +1.5VSUS_TXLVDS--> +1.8V_TXLVDS

Page3:Del Q5,Q6,R62,R63

ZR6 MB

Page3:change Par Number from AL000780000 to AL000780003 for thermal sensor address change to 9AH
Page21:Del Q10,Q9,R96,R86
Page27:R574 stuff and R541 no stuff
Page31:R300,R301 stuff thermal sensor
Page37:change PC65,PC67 to 150pF
Page28:change U2 PartNumber from AL008131001 to AL008131002(LAN chip)
Page27:change R530,R533 from 10 ohm to 5.1 ohm for headphone
Page27:change CN8 (usb) 12 pin board to board
Page26:Change CN5 footprint to cwy027-b0g1z-2p-l,CN16(USB )footprint change to usb-c107h6-10405-l-4p-r-v-nb4
Page30:Change CN7 footprint to 4IN1-R015-212-LM-42P-H-nb4
Page32:PJ1 footprint change to bat-btj-08qn0b-8p-r-v-nb4
Page32:Del R510,change Hole15 footprint from h-tc315bc433d106p2 to h-tc315bsd106p2
Page04:change C493 to no stuff
Page27:Del T77 and Add R62
Page26:change Hole21 footprint to h-c236d142pt-8

Page24:Change D1D2D3

footprint to led-ht-110nb5-3p

Page24:Change R218,R234 to shortpad

Page26:Change R310 to shortpad
Page10:Change R91,R307,R418,R466,R469 to shortpad
Page29:Add C466,C467 for EMI,Add R358,R357,R366,R367 and change DGND to LAN GND
Page26:Add C716 for EMI
Page30:Change L34 to 0 ohm and C715 to 10P,Change R512,R525,R528,R527 to 20K 1% and Change R526,R515,R524,R522 to 47K 1%
Page25:Change R1,R4,R10,R365,R369,R368 to 221 ohm and Change D1,D2,D3 part number
Page14:Change R282 to no stuff
Page28:Change R26 to no stuff
Page26:Change Hole29 part number to MBZR6005010
Page29:Del net name LAN_LNK_LED_PWR

Page14:Add R583 and R315 at GPIO7 for HDMI option,change R583 to no stuff and R315 to stuff

Page24:change HDMI item to no stuff(remove this function)

Page12:change R225,R216,R241,R220,R219,R215,R213,R214,R228,R227 to no stuff for remove HDMI Audio
Page26:Change Hole 16 footprint as hole1

Page37:change PR97,PR98 to short-pad ,change PU4 OZ8116 change to OZ8111 for cost issue ,Del PC62

Page27:C670 change value from 1U to 4.7U ( CH5471M9907 )

Page29:change c478 from 1000p to 220p.( CH122GK1I10 )
Page28:change C18

from 0.1u to 1000p ( CH21006JB10),change C20 from 0.1u to 1u ( CH5102K9B06 ) ,ADD C723

TO

1A
1A
1A
1A
2A
1A
1A
1A
3A
3A
1A
1A
1A
3A
2A
1A
3A
2A
3A
1A
3A
1A
3A
3A
2A
3A
2A
3A
3A
1A
3A
2A
2A
2A
2A
2A
2A
2A
3A

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

3B
D

3B

3B
C

3B

3B

3B

0.1u ( CH41002KB93 ),ADD C720 1u ( CH5102K9B06 )

Page25:change DHP00DA1G03->DHPTME53201
Page24:add

C722

( CH6101M9905 )

to solve ISN issue

Page27:the PC beep will change Gain from -6db to -18 db , so R559 needs stuff 10k on all BOM.
Page34:change PC133 from CC7560JMZ15 to CC7560JMZ02 for cost down
Page36:change PC139 from CC7560JMZ15 to CC7560JMZ02 for cost down
Page38:change PC156 from CC7560JMZ15 to CC7560JMZ02 for cost down
Page33:change PC158,PC162 from CC73301MZB2 to CC73301MZ04 for cost down
A

Page37:change PQ6,PQ7 from BAM700200F6 to BAM601K0003 for cost down

Quanta Computer Inc.

MB Assy' P/N: 31ZR6MB0000/10/20/30/40/50/60/70
Approved by :
5

Johnny_O
4

Project :ZR6 MB

Document No.:

Drawing by :Andy Chen

DATE: 2009/03/04

PROJECT : ZR6
Size

Document Number

Rev
1A

Thermal Protection
Date:
2

Monday, April 13, 2009

Sheet
1

42

of

42