TRW-24G
RF MODULE
Version History Version V1.01 V1.02 V1.03 V1.04 V1.05 V2.00 Date Jun 13, 2007 Aug 20, 2007 Mar 15, 2008 May 7, 2008 Feb 28, 2011 May 12, 2011 Changes 1st. Edition 2nd. Edition 3rd. Edition 4th. Edition 5th Edition Add in direct mode
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Content
1 1.1 2 3 4 4.1 4.2 5 5.1 5. 1. 1 5.1.2 5.1.3 5.2 5.3 5.4 5.5 5.5.1 5.5.2 5.5.3 5.5.4 5.6 5.6.1 5.6.2 5.6.3 6 6.1 6.1.1 6.1.1.1 6.1.1.2 6.2 7 Product De scription .......................................................................................................3 Key Feature ...................................................................................................................3 Block Diagram ...............................................................................................................4 Pin Function ..................................................................................................................4 Hardware Specification..................................................................................................5 Specification..................................................................................................................5 Reference schematics ...................................................................................................6 Configuration and Operation Modes .............................................................................7 Configuration Mode .......................................................................................................8 Configuration of ShockBurst
TM
operation: ....................................................................8
Configuration for Direct Mode operation .......................................................................8 Configuration Word Detailed Description ......................................................................9 ShockBurst
TM
configuration......................................................................................... 10
General device configuration ...................................................................................... 12 Data Package Description............................................................................................ 14 ShockBurst ............................................................................................................... 15 ShockBurst
TM TM
principle ................................................................................................ 15
TM TM
Direct Mode ................................................................................................................. 20 Direct Mode Transmit: ................................................................................................. 20 Direct Mode Receive:................................................................................................... 20 DuoCeiver Simultaneous Two Channel Receive Mode............................................. 20 Important Timing Data ................................................................................................. 31 Configuration mode timing .......................................................................................... 33 ShockBurst ShockBurst ShockBurst
TM TM TM
Appendix
1 2 Demo Program - EM78P 156E MCU .............................................................................. 37 Demo Program - C8051F330 MCU................................................................................ 54
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1 Product Description
TRW-24G is a wireless transceiver module which adopts 2.4G ISM band with printed ant enna on board to provide the optimal transmission and reception in signal. TRW -24G is a good solution for short and median range applications, such as Wireless Joysticks, cordless phone, wireless earphone, wireless mouse and key board, due to its adjustable transmission power level. It is also suitable for surveillance system because of its frequency hopping technology which provides a safe
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2 Block Diagram
This block diagram details the whole structure of this module which allows user to adopt two channels simultaneously without adding any extra components except micro-controller. We shall have reference schematic how this module works with micro-controller in the subsequence.
3 Pin Function
Pin
1
Name Category
CLK1 Digital
I/O
Input/Output
Description
For channel 1 clock TX: Clock input RX: Clock input/output Chip selection activates Configuration Mode For channel 2 clock Rx: Clock input/output Chip Enable to active RX / TX mode H: TX mode L: Rx mode Ground Power supply
2 3 4
CS CLK2 CE
5 6 7 8 9 10
Power Power Digital Digital Digital Power Output Output Output Input/output
Data ready for channel 2 to output (*) H: Data ready for accessing Channel 2 Data output Data ready for channel 1 to output (*) H: Data ready for accessing DATA pin can act as channel 1 data output and configuration data input pin. CS = H, Configuration data input CS = L, Channel 1 data output
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4 Hardware Specification
4.1 Specification
Conditions: VDD = +3V, VSS = 0V, TA = - 40 to + 85 C C
1) Usable band is determined by local regulations 2) The crystal frequency may be chosen from 5 different values (4, 8, 12, 16, and 20MHz) which are specified in the configuration word, see Table 9. 16MHz are required for 1Mbps operation. 3) Data rate must be either 250kbps or 1000kbps. 4) Antenna load impedance = 100W+j175W 5) Antenna load impedance = 100W+j175W. Effective data rate 250kbps or 1Mbps. 6) Antenna load impedance = 100W+j175W. Effective data rate 10kbps. 7) Current if 4 MHz crystal is used. 8) 250kbps / 1000kbps.
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Mode
Active (RX/TX) Configuration Stand by
CE
1 0 0
CS
0 1 0
Device allows user to have two communication models in Active mode Direct Mode and ShockBurst to transmit and receive data from remote parties. It depends on the content of configuration to set up the working models. Configuration Mode allows user to setup the following settings: 1. 2. 3. 4. 5. Communication Mode : Direct Mode ShockBurst Mode Transmit power Frequency selection for Channel 1 & 2 Data Rate One / Two receiving simultaneously
Stand-by mode is used t o minimize average c urrent cons umption while maintaining short start up times. The configuration word content is maintained during stand by. The following introduction shall commence from configuration setting
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2. 3. 4. NOTE
These configuration blocks, with the exception of the CRC, are dedicated for the packages that a TRW-24G is to receive. In TX mode, the MCU must generate an address and a payload section that fits the configuration of the TRW-24G that is to receive the data. When using theTRW-24G on-chip CRC feature ensure that CRC is enabled and uses the same length for both the TX and RX devices. PRE-AMBLE ADDRESS PAYLOAD CRC
ShockBurst configuration
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Bit Position 15
Number of bits 1 1 1 3 2 7 1
Function Enable two channel receive mode Communication mode (Direct or ShockBurst) RF data rate (1Mbps requires 16MHz crystal) Crystal frequency RF output power Frequency channel RX or TX operation
Table 1 Table of configuration words The configuration word is shifted in MSB first on positive CLK 1 edge, new configuration is enabled on the falling edge of CS. NOTE On the falling edge of CS, the TRW-24G updates the number of bits actually shifted in during the last configuration. Example If the TRW-24G is to be configured for 2 channel RX in ShockBurst shifted in during the first configuration after VDD is applied.
TM
Once the wanted protocol, modus and RF channel are set, only one bit (RXE N) is shifted in to switch between RX and TX.
5.1.3
The following describes the function of the 144 bits (bit 143=MSB) that is used t o configure the TRW-24G General Device Configuration: bit [15:0] TM ShockBurst Configuration: bit [119:0] Test Configuration: bit [143:120]
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Table 2 Configuration data word The MSB bit should be loaded first into the configuration register. Default configuration word: h8E08.1C20.2000.0000.00E7.0000.0000.E721.0F04.
Table 3 PLL setting Bit 121-120: PLL_CTRL: Controls the setting of the PLL for test purposes. With closed PLL in TX no deviation will be present. For normal operational mode these two bits must both be low. DATAx_W DATA2_W
119
111
118
110
117
109
116
108
115
107
114
106
113
105
112
104
DATA1_W
Table 4 Number of bits in payload Bit 119-112: DATA2_W: Length of RF package payload section for receive-channel 2. Bit 111-104: DATA1_W: Length of RF package payload section for receive-channel 1. http://www.wenshing.com.tw ; http://www.rf.net.tw TRW-24G Datasheet P.10
NOTE The total number of bits in a ShockBurst RF package may not exceed 256! Maximum length of payload section is hence given by: DATAx_W(bits)=256-ADDR_W-CRC Where: ADDR_W: length of RX address set in configuration word B[23:18] CRC: check sum, 8 or 16 bits set in configuration word B[17] PRE: preamble, 4 or 8 bits are automatically included Shorter address and CRC leaves more room for payload data in each package. ADDRx ADDR2 103 102 101 .. 71 70 69 68 67 66 65 64
TM
Bit 103-64: ADDR2: Receiver address channel 2, up to 40 bit. Bit 63-24: ADDR1: Receiver address channel 1, up to 40 bit. NOTE Bits in ADDRx exceeding the address width set in ADDR_W are redundant and can be set to logic 0. ADDR_W & CRC ADDR_W 23 22 21 20 19 18 CRC_L 17 CRC_EN 16
Table 6 Number of bits reserved for RX address + CRC setting Bit 23-18: ADDR_W: Number of bits reserved for RX address in ShockBurst
TM
packages.
NOTE Maximum number of address bits is 40 (5 bytes). Values over 40 in A DDR_W are not valid. Bit 17: CRC_L: CRC length to be calculated by TRW-24G in shockBurst. Logic 0: 8 bit CRC Logic 1: 16 bit CRC Bit 16: CRC_EN: Enables on-chip CRC generation (TX) and verification (RX). Logic 0: On-chip CRC generation/checking disabled Logic 1: On-chip CRC generation/checking enabled NOTE TM An 8 bit CRC will increase the number of payload bits possible in each S hockBurst data packet, but will also reduce the system integrity.
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Table 7 RF operational settings Bit 15: RX2_EN: Logic 0: One channel receive Logic 1: Two channels receive NOTE In two channels receive, the TRW-24G receives on two, separate frequency channels simultaneously. The frequency of receive channel 1 is set in the configurati on word B[7-1], receive channel 2 is always 8 channels (8 MHz) above receive channel 1. Bit 14: Communication Mode: TM Logic 1: operates in ShockBurst mode Bit 13: RF Data Rate: Logic 0: 250 kbps Logic 1: 1 Mbps NOTE Utilizing 250 kbps instead of 1 Mbps will improve the receiver sensitivity by 10 dB. 1 Mbps requires 16MHz crystal. Bit 12-10: XO_F: Selects the crystal frequency to be used. Default to be 16MHz.
Table 8 Crystal frequency setting Bit 9-8: RF_PWR: Sets TRW-24G RF output power in transmit mode:
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Table 10 Frequency channel + RX/TX setting Bit 7-1: RF_CH#: Sets the frequency channel the nRF2401 operates on. The channel frequency in transmit is given by: ChannelRF = 2400 MHz + RF_CH# 1.0 MHz RF_CH # : between 2400MHz and 2527MHz may be set. The channel frequency in data channel 1 is given by: ChannelRF = 2400 MHz + RF_CH# 1.0 MHz (Receive at PIN#8) RF_CH # : between 2400MHz and 2524MHz may be set.
NOTE The channels above 83 can only be utilized in certain territories (ex: Japan) The channel frequency in data channel 2 is given by: ChannelRF = 2400 MHz + RF_CH# 1.0 MHz + 8MHz (Receive at PIN#4) RF_CH # : between 2408MHz and 2524MHz may be set. Bit 0: Set active mode: Logic 0: transmit mode Logic 1: receive mode
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ADDRESS
PAYLOAD
CRC
Figure 2 Data Package Diagram Hereby is the information in detail about these 4 sections. 1. PREAMBLE The preamble field is required in ShockBurst and Direct Mode Preamble is 8 bits in length and is dependent of the first data bit in direct mode. PREAMBLE 1st ADDR-BIT 01010101 0 10101010 1 The address field is required in ShockBurst mode. 8 to 40 bits length. Address automatically removed from received packet in shockBurst mode. In Direct Mode MCU must handle address The data to be transmitted In Shock-Burst mode payload size is 256 bits minus the following: (Address: 8 to 40 bits. + CRC 8 or 16 bits). The CRC is optional in ShockBurst mode, and is not used in Direct mode 8 or 16 bits length
The CRC is removed from the received output data in ShockBurst RX. .
2. ADDRESS
3. PAYLOAD
4. CRC
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5.5 ShockBurstTM
The ShockBurst technology uses on-chip FIFO to clock in data at a low data rate and transmit at a very high rate thus enabling extremely power reduction. When operation t he TRW-24G in S hockBurst ,you gain access to the high data rates(1 Mbps)offered by the 2.4GHz band without the need of a costly, high-speed micro controller (MCU) for data processing. By putting all high speed signal processing related to RF protocol on -chip, the TRW-24G offers the following benefits: 1. 2. 3. Highly reduced current consumption. Lower system cost (facilitates use of less expensive micro controller). Greatly reduced risk of on-air collisions due to short transmission time.
TM TM
The TRW-24G can be programmed using a simple 3-wire interface where the data rate is decided by the speed of the micro controller. By allowing the digital part of the application to run at low speed while maximizing the data rate on TM the RF link, the nRF ShockBurst mode reduces the average current consumption in applications considerably.
5.5.1
ShockBurstTM principle
TM
When the TRW-24G is configured in ShockBurst following way (10 kbps for the example only).
TM
technology
technology
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TM
Transmit of TRW-24G
5.5.2
MCU interface pins:CE,CLK1,DATA 1. 2. 3. 4. When the application MCU has data to send, set CE high. This activates TRW-24G on-board data processing. The address of the receiving node(RX address) and payload data is clocked into the TRW-24G. The application protocol or MCU sets the speed <1Mbps(ex:10kbps)>. MCU sets CE low, this activates a TRW-24G ShockBurst
TM TM
transmission.
TRW-24G ShockBurst : RF front end is powered up. RF package is completed (preamble added, CRC calculated). Data is transmitted at high speed (250kbps or 1 Mbps configured by user). TRW-24G returns to stand-by when finished.
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TM
Receive of TRW-24G.
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5.5.3
MCU interface pins: CE, DR1, CLK1 and DATA (one RX channel receive) 1. 2. 3. 4. 5. 6. 7. 8. Correct address and size of payload of incoming RF packages are set when TM TRW-24G is configured to ShockBurst RX. To activate RX , set CE high. After 200us settling, TRW-24G is monitoring the air for incoming communication. When a valid package has been received (correct address and CRC found), TRW-24G removes the preamble, address and CRC bits. TRW-24G then notifies (interrupts) the MCU by setting the DR1 pin high. MCU may (or may not) set the CE low to disable the RF front end (low current mode). The MCU will clock out just the payload data at a suitable rate (ex,10 kbps). When all payload data is retrieved TRW-24G sets DR1 low again, and is ready for new incoming data package if CE is kept high during data download. If the CE was set low, a new start up sequence can begin, see Figure 12.
5.5.4
In ShockBurst mode the TRW-24G can facilitate simultaneous reception of two parallel independent frequency channels at the maximum data rate. This means: 1. TRW-24G can rec eive data from two 1Mbps transmitters (ex: TRW -24G or TRW-24G) 8MHz (8 frequency channels) apart through one antenna interface. The output from the two data channels is fed to two separate MCU interfaces. Data channel 1:CLK1,DATA,and DR1 Data channel 2:CLK2,DOUT2,and DR2 DR1 and DR2 are available only in ShockBurst
TM TM
2. 3. 4. 5.
The TRW-24G DuoCeiver technology provides 2 separat e dedicated dat a channels for RX and replaces the need for two, stand alone receiver systems.
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There is one absolute requirement for using the second data channel. For the TRW -24G to be able to receive at the sec ond dat a channel the frequency channel must be 8MHz higher than the frequency of dat a channel 1. The TRW -24G must be programmed to receive at the frequency of data channel 1. No time multiplexing is used in TRW -24G to fulfil this function. In direct mode the MCU must be able to handle two simultaneously incoming data packets if it is not multiplexing TM between the two dat a channels. In ShockBurst it is possible for the MCU to clock out one data channel at a time while data on the other data channel waits for MCU availability, without any lost data packets, and by doing so reduce the needed performance of the MCU.
Figure 8 DuoCeiver
TM
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5.6.1
MCU interface pins: CE, DATA 1. 2. 3. When application MCU has data to send, set CE high The nRF2401 RF front end is now immediately activated, and after 200 ms settling time, data will modulate the carrier directly. All RF protocol parts must hence be implemented in MCU firmware (preamble, address and CRC).
5.6.2
MCU interface pins: CE, CLK1, and DATA 1. 2. 3. Once the nRF2401 is configured and powered up (CE high) in direct RX mode, DATA will start to toggle due to noise present on the air. CLK1 will also start to toggle as nRF2401 is trying to lock on to the incoming data stream. Once a valid preambl e arrives, CLK 1 and DA TA will lock on to the incoming signal and the RF package will appear at the DA TA pin with the same speed as it is transmitted. To enable the demodulator to re-generate the clock, the preamble must be 8 bits toggling hi-low, starting with low if the first data bit is low. In this mode no dat a ready (DR) signals is available. Address and checksum verification must also be done in the receiving MCU.
4. 5.
5.6.3
In direct mode, it can facilitate simultaneous reception of two parallel independent frequency channels as ShockBurst mode. Please refer to section 5.5.4.
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Example 2 : ShockBurst Receiving mode Channel Freq: 2410MHz, Data Rate : 1 Mbps
Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 0 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 1 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 1 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 1
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Example 3 : ShockBurst Transmitting mode Channel Freq: 2410MHz, Data Rate : 250 Kbps
Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 0 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 1 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 0 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 0
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Example 4: ShockBurst Receiving mode Channel Freq: 2410MHz, Data Rate : 250 Kbps
Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 0 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 1 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 0 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 1
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Example 5 : ShockBurst Due-Channel Transmitting mode Channel Freq: 2410MHz, Data Rate : 250 Kbps
Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 1 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 1 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 1 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 1
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Example 6: ShockBurst Due-Channel Receiving mode Channel Freq: 2410MHz, Data Rate : 250 Kbps
Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 1 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 1 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 0 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 1
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Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 0 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 0 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 0 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 0
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Example 8 : Direct Mode Receiving mode Channel Freq: 2410MHz, Data Rate: 250 Kbps Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 0 Bit7 0 Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 0 Bit6 0 Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 0 Bit5 0 Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1 Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0 Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1 Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0 Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 1
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Example 9 : Direct Mode Due-Channel Transmitting mode Channel Freq: 2410MHz, Data Rate : 250 Kbps
Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 1 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 0 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 0 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 1
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Example 10 : Direct Mode Due-Channel Receiving mode Channel Freq: 2410MHz, Data Rate : 250 Kbps
Bit143 1 Bit135 0 Bit127 0 Bit119 1 Bit111 1 Bit103 1 Bit95 1 Bit87 0 Bit79 1 Bit71 0 Bit63 1 Bit55 0 Bit47 1 Bit39 0 Bit31 1 Bit23 1 Bit15 1 Bit7 0
Bit142 0 Bit134 0 Bit126 0 Bit118 1 Bit110 1 Bit102 1 Bit94 0 Bit86 1 Bit78 0 Bit70 1 Bit62 0 Bit54 1 Bit46 0 Bit38 1 Bit30 0 Bit22 0 Bit14 0 Bit6 0
Bit141 0 Bit133 0 Bit125 0 Bit117 0 Bit109 0 Bit101 0 Bit93 1 Bit85 0 Bit77 1 Bit69 0 Bit61 1 Bit53 0 Bit45 1 Bit37 0 Bit29 1 Bit21 1 Bit13 1 Bit5 0
Bit140 0 Bit132 0 Bit124 1 Bit116 0 Bit108 0 Bit100 0 Bit92 0 Bit84 1 Bit76 0 Bit68 1 Bit60 0 Bit52 1 Bit44 0 Bit36 1 Bit28 0 Bit20 0 Bit12 0 Bit4 1
Bit139 1 Bit131 1 Bit123 1 Bit115 1 Bit107 1 Bit99 0 Bit91 1 Bit83 0 Bit75 1 Bit67 0 Bit59 1 Bit51 0 Bit43 1 Bit35 0 Bit27 1 Bit19 0 Bit11 1 Bit3 0
Bit138 1 Bit130 0 Bit122 1 Bit114 0 Bit106 0 Bit98 0 Bit90 0 Bit82 1 Bit74 0 Bit66 1 Bit58 0 Bit50 1 Bit42 0 Bit34 1 Bit26 0 Bit18 0 Bit10 1 Bit2 1
Bit137 1 Bit129 0 Bit121 0 Bit113 0 Bit105 0 Bit97 0 Bit89 1 Bit81 0 Bit73 1 Bit65 0 Bit57 1 Bit49 0 Bit41 1 Bit33 0 Bit25 1 Bit17 1 Bit9 1 Bit1 0
Bit136 0 Bit128 0 Bit120 0 Bit112 0 Bit104 0 Bit96 0 Bit88 0 Bit80 1 Bit72 0 Bit64 1 Bit56 0 Bit48 1 Bit40 0 Bit32 1 Bit24 0 Bit16 1 Bit8 1 Bit0 1
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Table 11
When the TRW-24G is in power down it must always settle in stand-by(Tpd2sby) before it can enter configuration or one of the active modes.
Figure 9 Timing diagram for TRW-24G (or VDD off) to stand by mode.
Figure10 VDD off to active mode http://www.wenshing.com.tw ; http://www.rf.net.tw TRW-24G Datasheet P.31
Note that the configuration word will be lost when VDD is turned off and that the device then must be configured before going to one of the active modes. If the device is configured one can go directly from power down to the wanted active mode. NOTE CE and CS may not be high at the same time. Setting one or the other decides whether configuration or active mode is entered.
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Figure11 Timing diagram for configuration of TRW -24G If configuration mode is entered from power down, CS can be set high aft er Tpd2sby as shown in Figure 8
TM
in TX
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The package length and the data rate give the delay Toa (time on air), as shown in the equation. TOA = 1/ datarate (#databits + 1)
6.1.1.2 ShockBurstTM RX
TM
in RX
The CE may be kept high during downloading of data, but the cost is higher c urrent consumption (18mA) and the benefit is no start-up time(200s) after the DR1 goes low.
6.2
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Appendix
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; -------------------------------------------------------
0X0 RESET
INT_0
ORG JMP
0X8 INT_1
; TEST
RETL
0X20
; DATA2_W
RETL
0X0D0
; DATA1_W
; ADDR2
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; ADDR1
; ADDR_W/CRC
RETL RETL
0X53 0X02
; RF-PROGRAMMING
;----------------------------------------------ADDRESS_TABLE: ADD RETL RETL RETL RETL RETL 0X2, A 0X12 0X34 0X56 0X78 0X9A ; ADDR1 MOV A, R0
;----------------------------------------------RESET: MOV IOW IOW MOV IOW A, @0X0 0XF 0XE A, @0X0FF 0XB
IOW
0XD
MOV
A, @0X08
; P5, 0- LED
P5,1-LED
P5,2-PW
P5,3-CRYSTALL_SLECT IOW MOV IOW BC BC MOV CONTW MOV IOW A, @0X80 0XE ; WATCHDOG ENABLE 0X5 A, @0X47 0X6 P6, 3 P6, 7 A, @0X0D ; CE ; CS ;WDT ; P6, 0- KEY ; P6,4-DATA P6,1-KEY P6,5-CLK1 P6,2-KEY P6,6-DR1 P6,3-CE P6,7-CS
MOV MOV
A, @0X3 0X10, A
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S_LED_TEST: MOV MOV S_LED_TEST1: CALL CALL WDTC JBS JMP BS BS JMP S_LED_OFF: BC BC S_SKIP: DJZ JMP DJZ JMP ; ENI 0X11 S_LED_TEST1 0X10 S_LED_TEST P5, 0 P5, 1 ; LED ; LED 0X11, 7 S_LED_OFF P5, 0 P5, 1 S_SKIP ; LED ; LED DELAY1MS DELAY1MS A, @0X0FF 0X11, A
;======================================== ;========= MAIN PROGRAM ================ ;======================================== MAIN_LOOP: BS BC BC BC P5, 2 P5, 0 P5, 1 P6, 3 ; PW ; R_LED ; T_LED ; CE
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SLEEP_MODEL
JMP
MAIN_LOOP
P5, 1
; T_LED
DATA_PRO A, @0X1C 0X22, A A, @0X4F P6, 2 A, @0X6F ; 250K 0db ; <0-250K 1-1000K> ; TX_ON RX_OFF
T_LOOP: BS CALL CALL CALL CALL CALL CALL CALL CALL CALL WDTC MOV A, P6 P5, 1 RF_SEND DELAY1MS DELAY1MS DELAY1MS DELAY1MS DELAY1MS DELAY1MS DELAY1MS DELAY1MS ; T_LED
BYTE, A P5, 3 BYTE, 3 A, BYTE A, KEY_REG 0X3, 2 T_LOOP P5, 1 ; T_LED ;Z ; KEY
MAIN_LOOP
;======================================== R_MODEL: BC BC CALL MOV MOV MOV JBC MOV MOV MOV MOV CALL P5, 0 P5, 1 ; R_LED ; T_LED
DATA_PRO A, @0X1F 0X22, A A, @0X4F P6, 2 A, @0X6F 0X30, A A,@0X15 0X31, A RF_CONFIG ; 2410 ; 250K 0db ; <0-250K 1-1000K> ; TX_OFF RX_ON
MOV MOV BS
; TIMER FLAG
P5, 0
; R_LED
R_LOOP: WDTC JBC JMP MOV AND MOV JBC BS MOV XOR JBS JMP JBS JMP BS FLAG, 0 R_SP1 A, P6 A, @0X7 BYTE, A P5, 3 BYTE, 3 A, BYTE A, KEY_REG 0X3, 2 R_RET P6, 6 R_LOOP P5, 0 ; R_LED ; DR1 ;Z ; KEY ;INTERRUPT FLAG
;======================================== SLEEP_MODEL: CALL BC BC CALL MOV MOV MOV JBC MOV MOV MOV MOV CALL BC DATA_PRO P5, 0 P5, 1 ; R_LED ;T_LED
;<0-250K 1-1000K>
WDTC MOV AND MOV JBC BS MOV XOR JBC JMP JMP A, P6 A, @0X07 BYTE, A P5, 3 BYTE, 3 A, BYTE A, KEY_REG 0X3, 2 S_LOOP MAIN_LOOP ;Z ; KEY
;======================================== DATA_PRO: MOV MOV CLR MOV MOV DATA_LOOP: CALL MOV INC INC DJZ JMP RET ;================================= ;===== RF CONFIG SUBROUTINE ====== http://www.wenshing.com.tw ; http://www.rf.net.tw RF_CONFIG_TABLE 0X0, A R0 0X4 0X10 DATA_LOOP A, @0X20 0X4, A R0 A, @0X12 0X10, A ;18
;================================= RF_CONFIG: BC BS CALL MOV MOV MOV MOV P6, 3 P6,7 ;CE ;CS
RF_CONF_BIT_LP: BC JBS BC JBC BS RLC BS DJZ JMP INC DJZ JMP CALL BC P6, 5 BYTE, 7 P6, 4 BYTE, 7 P6, 4 BYTE P6, 5 0X11 RF_CONF_BIT_LP 0X4 0X10 RF_CONF_BYTE_LP DELAY5US P6, 5 ; CLK1 ; CLK1 ; DATA ; DATA ; CLK1
RET ;================================= ;======= RF SEND SUBROUTINE ====== ;================================= RF_SEND: BC BS CALL CALL CLR MOV MOV P6, 7 P6, 3 ; CS ; CE
RF_S_ADD_BYTE: CALL MOV MOV MOV RF_S_ADD_BIT: BC JBS BC JBC BS RLC BS DJZ JMP INC P6, 5 BYTE, 7 P6, 4 BYTE, 7 P6, 4 BYTE P6, 5 0X11 RF_S_ADD_BIT R0 ; CLK1 ; DATA ; DATA ; CLK1 ADDRESS_TABLE BYTE, A A, @0X8 0X11, A
JMP
RF_S_ADD_BYTE
MOV MOV RF_S_D_BYTE: MOV MOV MOV MOV RF_S_D_BIT: BC JBS BC JBC BS RLC BS DJZ JMP DJZ JMP CALL BC BC RET
A, @0X1A 0X10, A
; CLK1
; DATA
; DATA
; CLK1
BC BC CALL CALL MOV MOV MOV MOV CLR RF_BYTE_LP: MOV MOV RF_BIT_LP: RLC BS JBS BC JBC BS BC DJZ JMP INC DJZ JMP CALL CALL BS RET
P6, 7 P6, 3
; CS ; CE
A, @0X8 0X11, A
BYTE P6, 5 P6, 4 BYTE, 0 P6, 4 BYTE, 0 P6, 5 0X11 RF_BIT_LP 0X4 0X10 RF_BYTE_LP DELAY5US DELAY5US P6, 3 ;CE ; CLK1 ; DATA ; CLK1 ; DATA
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;======================================== ; ========= DELAY1MS SUBROUTINE ========== ;======================================== DELAY1MS: MOV JMP A, @0X0FF DLY_SKIP
DLY_LOOP: NOP NOP NOP DJZ JMP RET ;======================================== ;========= INTERRUPT SUBROUTINE ========= ;====================================== == INT_0: INT_1: BC 0XF, 0 ;TIMER FLAG http://www.wenshing.com.tw ; http://www.rf.net.tw DLY_REG DLY_LOOP
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Features: TRW-24G is written a BYTE (includes write the word with configuration information sent a BYTE)
------------------------------------------------------------------ */ void Write_TRW_24G_BYTE(x ) { char i; for(i=0;i<8;i++) { TRW_24G_CLK = 0; if(x&0x80) TRW_24G_DATA= 1; else TRW_24G_DATA= 0; x<<=1; TRW_24G_CLK = 1; TRW_24G_CLK = 1; TRW_24G_CLK = 1; } } /* --------------------------------------------------------------------
P1 |= 0x40; TRW_24G_CLK = 0; if(TRW_24G_DR1) { for(i=0;i<28;i++) RF_Data[i] = Read_TRW_24G_BY TE(); i= RF_Data[4]; } return(i); } /* --------------------------------------------------------------------
This program is Kit_10 to configure TRW_24G/TRW_24G part. Which is used RF_Status [7] and RF_Buffer [110] array. Here's RF_Status [7] array of detailed definitions: RF_Status[0] = 0 , Modules work is in the state of launch = 1 , Modules work is in the receiving state RF_Status[1] = Neglected RF_Status[2][3] = To retain frequencies via 16-band. If its value = 0x0190, it express operating frequency now is 2400 M. If its value = 0x01B0, it express operating frequency now is 2400 M. RF_Status[4] = 0, Modules work is in the rate of 1 M = 1 , Modules work in the 250 K rate. RF_Status[5] = 0, Set up the transmitter power modules is for -20 dBm = 1 , Set up the transmitter power modules is for -0 dBm RF_Status[6] = 0, Modules work is in the direct model = 1 , Modules work is in the ShockBurth model .
---------------------------------------------------------------------Void Control_TRW_24G(void) { unsigned char i,Send_Value = 0x00,Receive_Time = 0,Receive_Value=0; unsigned int Freq_buffer; Freq_buffer = RF_Status[2]<<8; Freq_buffer += RF_Status[3]; if((RF_Status[6]==1)&&(RF_Status[0]==0)) { for(Freq_buffer=0;Freq_buffer<10000;Freq_buffer++) for(i=0;i<200;i++); } http://www.wenshing.com.tw ; http://www.rf.net.tw TRW-24G Datasheet P.56
else if((Freq_buffer>527)||(Freq_buffer<400)) show_Freq_Error(); else { for(i=0;i<18;i++) RF_Buffer[i]=TRW_24G_Table[i]; if(RF_Status[0]) { RF_Buffer[2] = 0x1F; RF_Buffer[17] |= 0x01; } else { RF_Buffer[2] = 0x1C; RF_Buffer[17] &= 0x00; } Freq_buffer -= 400; Freq_buffer <<=1; i=Freq_buffer&0xFE; RF_Buffer[17] |= i; if(RF_Status[6]==0) RF_Buffer[16] |= 0x40; if(RF_Status[4]==0) RF_Buffer[16] |= 0x20; switch(RF_Status[5]) { case 0: RF_Buffer[16] &= 0xFC; break; case 1: RF_Buffer[16] |= 0x01; break; default: RF_Buffer[16] |= 0x03; break; } Config_TRW_24N();
if(RF_Status[0]&&(RF_Status[6]==1)) { LCD_write_String(0x02,0x11,0xB2,"Direct output RF",0); LCD_write_String(0x02,0x11,0xB3," DATA from TP5 8",0); while((Key_Value&0x08)==0x00) Scan_Key(); } http://www.wenshing.com.tw ; http://www.rf.net.tw TRW-24G Datasheet P.57
while((Key_Value&0x08)==0x00) { Scan_Key(); if(RF_Status[0]) { RF_Buffer[2] |= 0x1F; RF_Buffer[17] |= 0x01; Config_TRW_24G(); for(Freq_buffer=0;Freq_buffer<500;Freq_buffer++); i =0; while(i==0) i = Receive_TRW_24G(); ++Receive_Time; if(Receive_Value>i) { Receive_Time = 1; Send_Value = 0; } Receive_Value = i; ++Send_Value; RF_Buffer[2] &= 0x1C; RF_Buffer[17] &= 0xFE; Config_TRW_24G(); for(Freq_buffer=0;Freq_buffer<1000;Freq_buffer++); Send_TRW_24G(Send_Value); for(Freq_buffer=0;Freq_buffer<1500;Freq_buffer++); } else { if(Send_Value == 100) { for(i=0;i<128;i++) for(Freq_buffer=0;Freq_buffer<20000;Freq_buffer++ Send_Value = 0; Receive_Time = 0; } ++Send_Value; RF_Buffer[17] &= 0xFE; RF_Buffer[2] &= 0x1C; Config_TRW_24G(); for(Freq_buffer=0;Freq_buffer<1000;Freq_buffer++); http://www.wenshing.com.tw ; http://www.rf.net.tw TRW-24G Datasheet P.58
Work_LED = 1; Send_TRW_24G(Send_V alue); for(Freq_buffer=0;Freq_buffer<1500;Freq_buffer++); Work_LED = 0; RF_Buffer[17] |= 0x01; RF_Buffer[2] |= 0x1F; Config_TRW_24G(); for(Freq_buffer=0;Freq_buffer<500;Freq_buffer++); for(Freq_buffer=0;Freq_buffer<30000;Freq_buffer++) { i = Receive_TRW_24G(); if(i) { ++Receive_Time; break; } } for(;Freq_buffer<30000;Freq_buffer++); } SET_OLED_Adress(0x02,0x 14,0xB3); charDIV(Send_Value,0,0,0); SET_OLED_Adress(0x02,0x 14,0xB4); charDIV(Receive_Time,0,0, 0); } } } }
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