Tutorial: Using Xilinx ISE 10.

1 for VHDL Based Design

Tutorial: Using Xilinx ISE 10.1 for VHDL Based Design

In this tutorial, you will learn to create a design module from VHDL code. With Xilinx ISE, you can easily create modules from VHDL code using the ISE Text Editor tool. The VHDL code may then be connected to your top-level VHDL design through instantiation and compiled with the rest of the design. In this tutorial, you will author a new VHDL module. This program converts a hexadecimal number to a 7-segment LED display format. If necessary, review the steps in Practice-project to create a new project, generate a test bench, and perform a functional simulation.

Using the New Source Wizard and ISE Text Editor

In order to create the module, in the New Source Wizard, create a file and specify the name and ports of the component. The resulting skeleton VHDL file is then modified further in the ISE Text Editor. To create the source file: 1. Select Project New Source. A dialog box opens in which you specify the type of source you want to create. 2. Select VHDL Module in New Source Wizard Select Source Type window. 3. In the File Name field, type hex2led. Click Next. The hex2led component has a 4-bit input port named HEX and a 7-bit output port named LED. To enter these ports: 1. In New Source Wizard Define Module window, click in the Port Name field and type HEX. 2. Click in the Direction field, set the direction to in, and select the Bus field. 3. In the MSB field enter 3, and in the LSB field enter 0. 4. Refer to Figure 1. Repeat the previous steps for the LED[6:0] output bus. Be sure that the direction is set to out.

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Tutorial: Using Xilinx ISE 10.1 for VHDL Based Design

Figure 1: New Source Wizard for VHDL

5. Click Next to complete the Wizard session. A description of the module displays. 6. Click Finish to open the empty VHDL file in the ISE Text Editor. See Figure 2.

Figure 2: Skeleton VHDL File in the ISE Text Editor

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Tutorial: Using Xilinx ISE 10.1 for VHDL Based Design

In the ISE Text Editor, the ports are already declared in the VHDL file, and some of the basic file structure is already in place. Keywords are displayed in blue, data types in red, comments in green, and values in black. This color-coding enhances readability and recognition of typographical errors.

Using the Language Templates

The ISE Language Templates include VHDL constructs and synthesis templates which represent commonly used logic components, such as counters, D flip-flops, multiplexers, and primitives. You will use the 7-Segment Display Hex Conversion template for this exercise. This template provides source code to convert a 4-bit value to a 7-segment LED display format. Note: You can add your own templates to the Language Templates for components or constructs you use often. To invoke the Language Templates and select the template for this tutorial: 1. From Project Navigator, select Edit Language Templates. 2. To expand the view of any of these sections, click the (+) next to the topic. Click any of the listed templates to view the template contents in the right-hand pane. 3. Under the VHDL hierarchy, expand the Synthesis Constructs, Coding Examples, Misc hierarchy and select the template called 7-Segment Display Hex Conversion. The contents display in the right-hand pane. Refer to Figure 3.

Figure 3: Language Templates

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Tutorial: Using Xilinx ISE 10.1 for VHDL Based Design

Adding the Language Template to Your File You will now use the Use in file method for adding templates to your VHDL file. (Note: a copy and paste function is also available from the Language Templates Edit Menu and the right click menu.) 1. Before you add the template to the hex2led.vhd, move the cursor under the architecture begin statement (line number 38 in Figure 4). 2. In the Language Templates, right click the 7-Segment Display Hex Conversion name and select Use in file. This will add the template into the hex2led.vhd file. 3. Close the Language Templates window. You now have complete and functional VHDL code. 4. Save the file by selecting File Save. 5. Select hex2led in the Sources window. In the Processes window, expand the selection of Implement Design, Synthesize-XST, and double click on Check Syntax to test your VHDL code.

Figure 4: Check Syntax

6. To create a schematic symbol, click (+) under Design Utilities and double click on Create Schematic Symbol. The schematic symbol of hex2led will appear under Symbols in a Schematic Editor window in the same project. 7. To simulate, open new Test Bench Waveform file and select hex2led as a source code.
Reference: ISE In-Depth Tutorial, www.xilinx.com

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