Global FAE Meeting: LED Thermal

Outline
High Power LEDs & Heat
Light output vs. Tj Lifetime vs. Tj Tj vs. Vf

Thermal Measurements Thermal Models Examples:

MX6 FR4 PCB with Vias XP PCB layout CFX Bulb analysis

MPL Solderpoint temp

Copyright 2010, Cree, Inc.

pg. 2

LED Thermal Resistance

Thermal resistance quantifies how easily heat flows between the LED junction and the LEDs thermal path. Lower thermal resistance = better thermal flow

sp

Typical LED Specification:

Junction to solder point thermal resistance

Qj-sp: Thermal resistance between junction (j) and solder-point (sp)

Unit: C/W or Kelvin/W
pg. 3

Copyright 2010, Cree, Inc.

XLamp Performance vs. Temperature

Why is thermal management important?
Performance Lifetime

Copyright 2010, Cree, Inc.

pg. 4

Vf vs. Tj
At a constant current, the change in voltage for a change in temperature is nearly linear
Temperature coefficient of voltage
Silicon diode typically about -2 mV/C LEDs vary from -2 to -4 mV/C (per chip)

As the Junction temperature increases the forward voltage decreases. Vf decrease means lower power, right?
Yes, but overall system efficacy may still decrease due to higher Tj LED driver may have to accommodate a larger Vf range

Copyright 2010, Cree, Inc.

pg. 5

Thermal Measurements
Simple:
Basic thermocouple measurements

Complex:
Pulsed Vf measurements IR thermal measurements

Copyright 2010, Cree, Inc.

pg. 6

Basic thermocouple measurements

Pros
Speed Cheap and easy to setup

Cons
Accuracy Cant measure junction, only solder point Proper contact can be challenging
Copyright 2010, Cree, Inc. pg. 7

Pulsed Vf measurements
90 80 70 60 Tj( C ) 50 40 30 20 10 0 2.4 2.42 2.44 2.46 2.48 Vf(V) (@ 1mA) 2.5 2.52 2.54

y = -656.45x + 1679.7 R = 0.9992

Tj (C) (function of Vf@low current)

100

Controlled temp, measure Vf

70 60 50 40 30 20 10 0 0

Internal heat generation, measure pulsed Vf

y = 0.0131x + 24.846 R = 0.9993

500

1000

1500

2000

2500

3000

Measurement Steps 1) Vf vs. Temp measurement at low current 2) Internal heat generation from range of input current while measuring Vf at pulsed low current 3) Plot internal heat generation Vf vs. known temp Vf

Input Power (mW)

Pros
Very accurate for single junction devices Measurement of junction temperature

Cons
Very specific equipment required to measure Assumptions needed for multi-junction parts Slow
Copyright 2010, Cree, Inc. pg. 8

IR Thermal Measurements
Solder point temperature

Junction temperature

Pros
Accurate surface temperature Visual heat spreading representation Relatively quick

Cons
Expensive equipment Must have exposed chip (non-encapsulated)
Copyright 2010, Cree, Inc. pg. 9

LED Thermal Models

Simple
Resistor Network Model
Use thermal resistances, calculate junction temperature
Calculate thermal resistance using: thickness/thermal conductivity/area

Complex:
Finite Element Models Computational Fluid Dynamics
Used for system modeling/design changes

Copyright 2010, Cree, Inc.

pg. 10

Resistor Network Model

Tj T P hsa sphs jsp a in

junction

Qj-sp
solder point

Qsp-hs
heat sink

total layer1 layer 2 layer 3 ... layerN

Qhs-a
ambient

l Layer Thickness k * A Thermal Conductivity* Area

UNITS : m W * m2 m*K K W
pg. 11

Copyright 2010, Cree, Inc.

Thermal via Thermal Resistance Calculation

th

h n k t (D t )

Qth: Thermal Resistance [C/W] h: PCB thickness [m] n: Number of vias D: Via diameter [m] t: Via thickness [m] k: Thermal conductivity of the plating material (ex: Copper = 390 W/mK)

Copyright 2010, Cree, Inc.

pg. 12

Basic Thermal Simulation: ANSYS Mechanical

Primarily simulates conductive flow Setup:

3D CAD layout of model Define materials and properties Define boundary conditions: inputs, known temps, etc. Create mesh Solve (~10-30 min/solution)
pg. 13

Copyright 2010, Cree, Inc.

Advanced Thermal Simulation: CFD

Simulates conductive & convective flow Setup:
3D CAD layout of model (including environment) Define materials and properties Define boundary conditions: inputs, known temps, etc. Create mesh Solve (~4-8 hrs/solution)

Good for fluid flow and full system analysis Very slow to setup and solve

Copyright 2010, Cree, Inc.

pg. 14

Thermal Simulation Results

Copyright 2010, Cree, Inc.

pg. 15

MX-6: MCPCB vs. FR4 Simulation

MX6 + MCPCB

MX6 + FR4 (top)

MX6 + FR4 (bottom)

MCPCB j-hs ~ 8.44C/W

(junction to heat sink)

FR4-Vias j-hs ~ 12.31C/W

(junction to heat sink)

MCPCB is 31% lower than FR4

MCPCB FR4+15Vias

Copyright 2010, Cree, Inc.

pg. 16

FR4 via Layouts

FR4: 9 vias FR4: Standard (15 vias) FR4: 21 vias

FR4: 27 vias

Red circles in images represent the via locations

T h e r m a l R e sist a n c e ( C / W )

SIMULATION RESULTS
35.00

MCPCB MX6 Only SnAgCu Vias Copper Vias Cu Lined, SnAgCu Filled

3 large vias (0.635 mm) directly under the chips Various number of smaller vias (0.279 mm) located outside of the chip area PCB thickness is 1.6 mm Vias are simulated as 1 mil thickness copper filled with solder or other material as noted
Copyright 2010, Cree, Inc.

30.00

25.00

20.00

Standard via count

15.00

10.00

5.00

0.00 0 5 10 15 20 25 30

# of Vias

pg. 17

MX-6: PCB Thickness

50.00 45.00 40.00

Thermal Resistance (C/W)

PCB Thickness
FR4- No Vias FR4- 9 Vias FR4- 15 Vias (standard) FR4- 27 Vias MCPCB

35.00 30.00 25.00 20.00 15.00 10.00 5.00 0.00 0

0.5

1.5

2.5

3.5

PCB Thickness (mm)

Copyright 2010, Cree, Inc.

pg. 18

MX-6: Via Count simulation results

28 Vias: 0.2mm, 1.0mm pitch

45 Vias: 0.2mm, 0.75mm pitch

91 Vias: 0.2mm, 0.5mm pitch

153 Vias: 0.2mm, 0.375mm pitch

20.00 18.00
Thermal Resistance (C/W)

Via Count (Under Component)

16.00 14.00 12.00 10.00 8.00 6.00 4.00 2.00 0.00 0 50 100 # of Vias 150 200

The more vias the lower the thermal resistance. The more vias the higher the cost. Manufacturing capabilities limit spacing, size, etc. of vias.

Copyright 2010, Cree, Inc.

pg. 19

XP-E FR4 PCB: Number of Vias

6-vias
Lens

10-vias
LED chip
20.00 18.00
Thermal Resistance, Solder point through Board (C/W)

14-vias

58-vias

102-vias

Filled Via Count: 10mil, 25.4mil pitch

1.6mm thick FR4 PCB 0.8mm thick FR4 PCB

16.00 14.00 12.00 10.00 8.00 6.00 4.00 2.00 0.00 0 20 40 60 # of Filled Copper Vias 80

Ceramic substrate AlN Anode pad Thermal pad

Cathode pad

100

120

Copyright 2010, Cree, Inc.

pg. 20

XP-E PCB: Top Trace Size

MCPCB:

Minimum trace: 3.3mm wide

Trace: 6.0mm wide

Trace: 10.0mm wide

Maximum trace: 20.0mm wide

FR4 + 14 vias:

20.00

MCPCB: Top Trace Size- Junction through board

0.8mm thick MCPCB
The rm al Re sistance, Solder point through Board (C/W )

9.00 8.00 7.00 6.00 5.00 4.00 3.00 2.00 1.00 0.00 0

FR4 14 vias: Top Trace Size- Solder point through board

1.6mm thick FR4 PCB 0.8mm thick FR4 PCB

Thermal Resistance, Junction through Board (C/W)

18.00 16.00 14.00 12.00 10.00 8.00 6.00 4.00 2.00 0.00 0 5 10 15 Length/Width of Top Trace (mm)

1.6mm thick MCPCB

20

25

10 Trace Width (mm)

15

20

25

Copyright 2010, Cree, Inc.

pg. 21

XP-E PCB: Top Trace Thickness

20.00 18.00

Trace Thickness
MCPCB

Thermal Resistance: Junction-to-Heatsink (C/W)

16.00 14.00 12.00 10.00 8.00 6.00 4.00 2.00 0.00 0

MCPCB: 1.6mm PCB MCPCB: 0.8mm PCB 5 Via FR4: 1.6mm PCB 5 Via FR4: 0.8mm PCB 15 Via FR4: 1.6mm PCB 15 Via FR4: 0.8mm PCB

5-vias
0.5oz Copper
0.02 0.04

2oz Copper
0.06 0.08 0.1 0.12 Trace Thickness (mm) 0.14 0.16

5oz Copper
0.18 0.2

15-vias

Copyright 2010, Cree, Inc.

pg. 22

XP-E PCB: Via filling

14.00

Unfilled Conductive Epoxy

Via Thermal Conductivity

Thermal Resistance, Solder point through Board (C/W)

12.00

1.6mm thick FR4 0.8mm thick FR4 1.6mm thick FR4 0.8mm thick FR4

PCB, 5 vias PCB, 5 vias PCB, 15 vias PCB, 15 vias

10.00
Solder

8.00

6.00
Copper

4.00

2.00

0.00 0 50 100 150 200 250 300 Via Thermal Conductivity (W/mK) 350 400 450

Copyright 2010, Cree, Inc.

pg. 23

Positioning and Orientation Effects: Toshiba Heat sink

Bottom, Source up: 7.0C/W Centered, Source up: 8.46C/W

Centered, Source down: 8.24C/W

Centered, Source horizontal: 9.27C/W

The angled fins perform better in the vertical positions as the air flows through the fins. The rotation to horizontal is only ~10% worse than vertical orientation. Angled fins will help minimize orientational effects.
Cree Proprietary & Confidential pg. 24

Copyright 2010, Cree, Inc.

Full bulb simulation: Toshiba heat sink

Glass bulb

Air fill

8.46C/W
Heat source Aluminum heat sink

9.27C/W

Air fill

Aluminum base

10.66C/W

12.14C/W

The full bulb setup increases the thermal resistance by 26-31% for the Toshiba heat sink
The flow through the center and around the heat source is impeded by the glass bulb, thus natural convection is not cooling as effectively.
Copyright 2010, Cree, Inc. Cree Proprietary & Confidential pg. 25

Forced Flow (Fan): Toshiba Heat sink

A small fan was simulated below the heat sink, displacing air at 0.5m/s (very low flow)
Heat source Aluminum heat sink

3.48C/W
Fan

The forced airflow from the fan decreases the thermal resistance by 59-64%
The orientation effect is basically negligible with forced flow Note: This heat sink has a hole in the middle, so the effect without the bulb (as modeled) will be greater than with the bulb which will impeded the flow
Cree Proprietary & Confidential

3.38C/W

Copyright 2010, Cree, Inc.

pg. 26

Bulb_D: Fin Count

Fin count optimization
Vary number of fins and evaluate performance
Step 1: heat sink only, no forced flow; Step 2: add globe?
4 Fins 8 Fins 16 Fins 32 Fins 64 Fins

14.00 13.00 Thermal Resistnace (C/W) 12.00 11.00 10.00 9.00 8.00 7.00 6.00 0
Copyright 2010, Cree, Inc. Proprietary & Confidential Cree

Thermal Resistance vs. Fin Count

Source Down Source Horizontal Source Up

10

20

30 40 Fin Count

50
pg. 27

60

70

Junction Temperature vs Solderpoint Temperature

Copyright 2010, Cree, Inc.

pg. 28

Junction vs Solderpoint Temperature

Historically, Cree has published on data sheets a maximum junction temperature for each component With the release of the MPL-EZW, the maximum temperature was stated as a maximum solderpoint temperature Why?
With the large quantity of chips/junctions it is impossible to give a single constant number for a package junction temperature because the location of the chips and power input give varying values
The inner chips run much hotter than the exterior chips due to thermal crosstalk, see image on next slide. As power is increased, there is more thermal crosstalk and thus the junction temperature increases (increased thermal resistance)

Solderpoint temperature is much easier to monitor and doesnt rely on assumptions/calculations

Copyright 2010, Cree, Inc. pg. 29

MPL Junction Temp

Copyright 2010, Cree, Inc.

pg. 30

Junction vs Solderpoint Temperatures Pros/Cons

Pros:
Solderpoint temperature is much easier to measure and usually is what was used by customers to calculate junction temperature
Rj = Rsp + Power*Thermal Resistance

As chip performance improves, less heat is generated by chip (better optical efficiency) and thus thermal resistance will change
This is an entire other problem- should we account for optical efficiency in thermal resistance values?
Recommendation- NO. This complicates the calculation even further. It is much simpler for a customer to simply monitor total power input, not to have to factor in optical efficiency also.

Cons:
Assume proper thermocouple measurement Assume good/repeatable solder bond
Simulations show very little difference unless really bad voiding of component attach (see next slide)

Copyright 2010, Cree, Inc.

pg. 31

MPL Voiding Simulations

MPL Thermal Resistance- Die Attach & Substrate Attach Voids
2.2
Substrate Coverage

2.1
Thermal Resistance (C/W)

100% 81% 64%

2 1.9 1.8 1.7 1.6 1.5 20% 40% 60% 80% Die Attach Coverage 100%

49% 36% 25%

The chart above shows that there is only a very small difference in total thermal resistance (j-hs) unless the attach is only about 25%

Copyright 2010, Cree, Inc.

pg. 32

Measuring Solderpoint
Thermocouple Attach to Solderpoint Process:
Ensure thermocouple tip is in good mechanical contact with exposed metal at the junction of the component and PCB Attach thermocouple using either highly conductive epoxy (ex: Arctic Silver Adhesive) or solder directly to exposed metal Tip: Use tape to hold thermocouple in place and relieve stress on thermocouple Tip: Bend thermocouple to press against solderpoint/component

Solderpoint

Thermal Epoxy

Tape

Copyright 2010, Cree, Inc.

pg. 33

Summary
LED junction temperature will affect LED light output, LED life time and forward voltage There are several ways to determine LED thermal performance through measurement and simulation Cree XLamp LED has electrically isolated thermal pad make it perfect for FR4 with thermal vias application Using thermal vias on FR4 board can achieve thermal performance close to MCPCB and have lower board cost Board design and via layout can have a significant impact on thermal performance Heat sink design for bulbs requires consideration of orientation, air flow and fin count, amongst many other variables, all which can be modeled with CFD software Multiple chip components need to be characterized with maximum solderpoint temperature instead of junction temp

Copyright 2010, Cree, Inc.

pg. 34