Quartus Tutorial: 1-bit 2-1 Multiplexer using LPM function on the MAX7000S Device

Before you begin: This tutorial assumes that you have successfully designed and simulated a 1-bit 2-1 multiplexer using gates as described in the first Quartus tutorial. Therefore, you should already be familiar with basic Quartus terms and processes. They will not be described in detail here.

1. Open Quartus II. 2. Create a new Quartus project named mux_lpm that includes the file DEC_7SEG.vhd that was used in the last tutorial. 3. Create a new block diagram: 3.1. Click on the Symbol Tool. 3.2. Create an LPM multiplexer module: 3.2.1. Select lpm_mux in altera/quartus/libraries/megafunctions/gates in the Symbol window as shown below and click OK. A new window will appear as shown on the next page.

3.2.2.Set the output file type: Select VHDL as shown on the next page. 3.2.3.Name the output file lpm_mux0. NOTE: Be sure that the output file is saving to your working directory.

3.2.4.Click Next on the bottom of page 2c of the MegaWizard Plug-In Manager. You will now be on the next page as shown below.

3.2.5.Select the amount of data inputs: Select 8 from the drop-down menu. 3.2.6.Select the width of data inputs and outputs: Select 1. 3.2.7.Select unpipelined multiplexer: Select NO. 3.2.8.Click FINISH at the bottom of page 3 in the MegaWizard Plug-In Manager. You will now be at the Summary Page as shown below.

3.2.9.Click FINISH at the bottom of page 5 in the MegaWizard Plug-In Manager. The cursor is now ready to stamp a 1-bit 8-1 multiplexer. Note: The functionality of this multiplexer is similar to the ones you have seen. However, because we have 8 inputs, S is now be 3 bits wide. 3.3. Place one multiplexer symbol in your block diagram window as shown below. 3.4. Place 8 input pins named I0 though I7 on your diagram as shown below.

3.5. Create an LPM adder/subtracter module: 3.5.1. Select lpm_add_sub in altera/quartus/libraries/megafunctions/arithmetic in the Symbol window as shown below and click OK. A new window will appear as shown on the next page.

3.5.2.Set the output file type: Select VHDL as shown above. 3.5.3. Name the output file lpm_add_sub0. NOTE: Be sure that the output file is saving to your working directory. 3.5.4.Click Next on the bottom of page 2c of the MegaWizard Plug-In Manager. You will now be on the next page as shown below.

3.5.5.Select the width of data inputs and outputs: Select 3. 3.5.6.Select operating mode: Select Addition only. 3.5.7.Click FINISH at the bottom of page 3 in the MegaWizard Plug-In Manager. You will now be at the Summary Page as shown below.

3.5.8.Click FINISH at the bottom of page 7 in the MegaWizard Plug-In Manager. The cursor is now ready to stamp a 2-input adder of width 3. 3.6. Place one adder symbol in your block diagram window as shown below.

3.7. Place two input pins on your diagram and name them dataa[2..0] and datab[2..0]. Note: This naming convention describes a vector, or an array, of 3 bits.

3.8. Place 1 dec_7seg symbol and 9 output pins labeled a through b, O and S[2..0] as shown below.

3.9. Connect and name each element as shown above. Note: Vectors, such as dataa[2..0], should be connected using the Orthogonal Bus Tool located just below the Orthogonal Node Tool. 3.10. Save the block diagram as mux_lpm.bdf.

4. Compile the block diagram. 5. Simulate the design: 5.1. Reproduce the waveform file below using the same processes you used in the first Quartus tutorial.

6. Simulate your design and understand the waveform produced. 7. Next, complete the ModelSim LPM Mux Tutorial.