Improvement of Integrated Dipole Antenna Performance Using Diamond for Intra-chip Wireless Interconnection

Xiaowei He, Jinwen Li, Minxuan Zhang, and Shubo Qi

AbstractIn this paper, a 2mm-long linear on-chip dipole antenna pair on Si substrate is analyzed and simulated to investigate the transmission characteristics using Ansofts HFSS. By inserting a 0.35mm thick diamond layer between substrate and heat sink, the obtained transmission gain of antenna pair with 1mm separation on 10 Ohm-cm Si substrate increases by 9dB at 20GHz. The effect of the dielectric materials, diamond thickness, substrate resistivity and the separation of an antenna pair on the transmission gain has been investigated. The results indicate that thinner diamond layer along with high resistivity substrate is preferred. A modified propagation model involving a diamond layer is also evaluated to make antenna performance predictable in real wireless interconnection systems. Index Termsdipole antenna, heat sink, propagation model, transmission gain, wireless interconnection.

substrate. Operation at high frequency above 15GHz allows the use of physically short dipole antennas which are compatible with affordable silicon substrate dimensions. For example, a 24GHz (free space wavelength 12mm) operation enables the use of 3 to 4mm long dipole antenna, which is around quarter-wave[2].

Figure. 1 Conceptual diagram of intra-/inter-chip wireless interconnection with on-chip dipole antennas

I. INTRODUCTION NTEGRATION of antennas into radio frequency integrated circuits(RFICs) eliminates external transmission line interconnections and sophisticated packagings, which should lower the cost of wireless systems operating above 10GHz[1]. As CMOS technologies improve and the cost of on-chip antennas as well as other required circuits gradually decreases, there will be greater freedom to make use of on-chip antennas. Therefore, integrated antennas become popular in promoting wireless interconnection for intra- and inter-chip communications these years. Figure. 1 shows the concept of intra- and inter-chip wireless interconnection with on-chip dipole antennas. The related characteristics of integrated antennas have been widely investigated[1]-[11]. For instance, Ref. [2] demonstrated that wireless communication at 24GHz between a base station and a receiver with on-chip antenna over a distance of 95m was possible. The performance of wireless interconnections is critically dependent on integrated antenna characteristics. On-chip dipole antennas are preferred for wireless interconnections as they can adequately suppress noise and interference generated by other CMOS circuits on the same
This work was supported by the National Natural Science Foundation of China under Grant No. 60873212, and the National High-Tech Development 863 Program of China under Grant No. 2009AA01Z124. The authors are with the School of Computer Science, the National University of Defense Technology, Changsha 410073, China (e-mail: xw_he1980@ nudt.edu.cn, xw_he1980@163.com).

The silicon substrate with low resistivity in modern CMOS circuits induces the main loss for integrated antennas limiting the antenna efficiency and gain. Ref. [3] achieved a transmission gain of -20dB between dipole antennas on a high-k substrate separated by 1cm at 20GHz, and Ref. [4] demonstrated a transmission gain of -17dB at a distance of 2.5mm with on-chip antennas on SOI silicon substrate with high resistivity which is more than 1k -cm . Ref. [5] showed various techniques to improve the characteristics of integrated antennas including reducing substrate thickness, increasing the substrate resistivity, keeping the antenna separation to the chip edge below 0.5mm, etc. Ref. [6] increased the antenna gain in upward direction by 8 13dB with a big and tall rectangular silicon lens attached on top of the chip. However, these ways are not compatible with low cost integrated circuit technologies. To evaluate and improve the performance of integrated antenna pairs, this paper introduces a thin diamond layer between the lossy Si substrate and heat sink. The induced propagation model including metals and dielectrics has been explained. The dependences of integrated antenna characteristics for wireless interconnection on substrate resistivity, diamond thickness, the separation between an antenna pair, and various dielectric layers between the heat sink and silicon substrate have been investigated and the simulation results and analysis are presented.

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II. DESIGN ISSUES OF ON-CHIP DIPOLE ANTENNAS A. Operating Frequency and Antenna Size Selection

plane wave propagating model has been investigated and shown in Figure. 3.
r

7.9

At 10 GHz, the length of a quarter-wave dipole antenna needs to be only 7.5mm and 2.2mm in air and in silicon according to the equation f c . To improve the on-chip antenna performance and reduce its physical size, integrated antennas with other digital/analog/RF circuits should operate above 10GHz in future wireless interconnection systems. This paper mainly focuses on integrated dipole antenna pair and wireless applications working from 10GHz to 40GHz. In such frequency range, a 2mm-long dipole antenna should be acceptable for integration on chip. Figure. 2 shows the transmission gain of a 2mm-long on-chip dipole antenna pair with its metal width ranging from 5um to 100um. It indicates that the peak gain, which is independent of width variety, occurs at about 30GHz. At lower frequency below 30GHz, wider dipole antenna has higher gain at a fixed length 2mm. However, unobvious gain improvement can be observed when frequency exceeds 30GHz.

4
11.9

11.9

16.5

Figure. 3 A plane wave propagating model with (a) an AlN layer and (b) a diamond layer

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-40 -50 -60 -70 5 10 15 20 25 30 35 40 dipole with 5um width dipole with 10um width dipole with 30um width dipole with 100um width

Freq(GHz)

Figure. 2 Transmission gains of a 2mm-long on-chip dipole antenna pair with various widths

B. Propagation Model for On-chip Antenna Pair In wireless interconnection systems, the heat sink which is placed close to the on-chip antennas could severely deteriorate the on-chip antenna performance. In Ref. [7], an 1cm thick wood or a 1mm glass layer was inserted between the wafer containing the integrated antennas and the heat sink to improve the antenna gain. However, this strategy was incompatible with modern packaging technology. A 0.76mm thick AlN layer was chosen to replace wood or glass and obvious gain enhancement was achieved above 14GHz[8]. Therefore, providing an efficient technique for heat removal while not degrading on-chip antenna transmission gain is a key requirement for intra-chip wireless interconnection systems. As we know, diamond in nature is the hardest material which has high thermal conductivity(138W/m-K, similar with Si, AlN, and 100 times that of glass) and large permittivity(16.5, larger than that of Si:11.9, AlN:8.8 and that of glass:5.5). Whats more, diamond films with nearly the same electrical properties as natural diamonds could be grown by hot filament chemical vapor deposition(HFCVD)[12]. In order to further improve the antenna transmission gain, we choose diamond as alternative to be placed between the Si substrate and heat sink. To understand the characteristics of on-chip antenna pair with a diamond layer inserted between the substrate and heat sink, a

In Figure. 3(a), there are four propagation paths[8]. Path 1 represents the direct path. Path 3 is the wave that goes through the lossy silicon substrate and is reflected back at the Si/dielectric layer boundary. Path 4 is the lateral wave propagating on the dielectric layer side of the Si/dielectric layer boundary. In path 2, the wave first goes into the lossy silicon substrate, then into the dielectric layer, and finally is reflected back by the heat sink to reach the receiving antenna. In the modified model shown in Figure. 3(b), because the permittivity of diamond is larger than that of Si substrate and a passivation with the permittivity of 7.9 is added, there are possibly four propagation paths available. Path 1 and 2 are the same as that of Figure. 3(a). However, path 2 in Figure. 3(b) exists due to the higher relative permittivity of diamond than that of Si substrate, which is different from the one of Figure. 3(a) in theory. Path 3 in Figure. 3(b), subsequent wave omitted for simplicity, is very similar with path 2. The difference lies on that the wave may be reflected several times before arriving at the receiving antenna. In path 3, the propagating wave could be severely attenuated after several reflections in the lossy Si substrate. Path 4 in Figure. 3(b) is the wave going through the passivation and penetrating into the air. This part of wave will not be picked up by the receiving antenna. Fortunately, path 4 can be neglected because the passivation is very thin, and has a relative permittivity of 7.9 which is much larger than the airs. In this case, only path 1 and path 2 dominate. III. PERFORMANCE IMPROVEMENTS USING DIAMOND To verify the possibility of using diamond to increase the antenna pair gain, simulation is performed using Ansofts HFSS. The experimental dipole antenna pair is formed using the top metal(Al) with its thickness of 2.17um. Considering the real wafer dimensions and saving computing time, a 4mm 4mm Si substrate should be reasonable and sufficient for simulation. The detailed parameters are listed in TABLE I.
TABLE I. PARAMETERS OF EACH LAYER FOR SIMULATION IN A 0.18UM CMOS
PROCESS

Transmission Gain(dB)

Layers Passivation Oxide Metal(M6) Substrate Diamond Heat sink(Al)

Thickness (um) 0.6 10.9 2.17 350 350 400

Relative Permittivity 7.9 4 1 11.9 16.5 1

Conductivity (S/m) 0 0 28000000 10 0 28000000

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A. Ga with Various Dielectric Layers First, the power transmission gain of on-chip dipole antenna pair is simulated and compared for the case when the substrate is directly contacted with heat sink to when a dielectric layer is inserted between the substrate and heat sink. We choose a 0.35mm diamond layer, a 0.7mm AlN layer, a 1mm GaAs layer and a 1mm glass layer for comparison. With the dipole antenna pair separated by 1mm on a 10 -cm silicon substrate, the simulated transmission gain is shown in Figure. 4. As can be seen, gains for the dielectric cases are nearly the same from 14GHz to 30GHz, and they are much higher than the case without dielectric layer inserted. During 20 40GHz, gain with 0.35mm diamond layer is the highest, which is 9dB higher compared to that of the no dielectric case at 20GHz.
Antenna Space=1mm
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40GHz, there is no dip for the 0.35mm thick diamond case. However, there is a dip frequency for the 1mm diamond case and more than 2 dip frequencies for the 3mm and 5mm diamond cases. These show that thinner diamond is preferred in consideration of system robustness.
10 Ohm-cm Si substrate
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separation=1mm
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Ga(dB)

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no diamond diamond 0.35mm diamond 1mm diamond 3mm Dips diamond 5mm

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9dB higher

Figure. 5 Transmission gains of on-chip dipole antenna pair with diamond layer of various thicknesses
200 no diamond diamond 0.35mm diamond 1mm diamond 3mm diamond 5mm

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Ga(dB)

Impedance(1,1)(Ohm)

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with 0.35mm diamond with 0.7mm AlN with 1mm GaAs with 1mm glass with nothing inserted

100

Real part
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10 Ohm-cm Si substrate
10 15 20 25 30 35 40

Freq(GHz)
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Imaginary part

Figure. 4 Transmission gains of on-chip dipole antenna pair with different dielectric layers
5 10 15 20 25 30 35 40

Freq(GHz)

The gain increase can be explained using the propagation model mentioned in Figure. 3. When the substrate is directly contacted with heat sink, paths 1 and 3 in Figure. 3(a) exist. The signal in path 3 is so small that it can be neglected. By inserting the AlN, glass layer between the substrate and heat sink, paths 2 and 4 in Figure. 3(a) are included. Since the ratio of permittivities of Si substrate to that of AlN and glass(11.9/8.8, 11.9/3.9) is smaller than or nearly equal to the ratio of permittivity of Si substrate to that of silicon oxide(11.9/4), path 4 can not exist. So only path 2 is added when a glass or an AlN layer is inserted. For the diamond layer case, path 1 and 2 in Figure. 3(b) are the main propagating paths discussed in section II. B. Ga with a Diamond Layer When Thickness Varies Figure. 5 shows that when the layer thickness of diamond increases above 1mm, the gain does not increase monotonously and dips occur above 30GHz. The gain drops by 6.7dB at 32GHz for the 5mm diamond case and drops by 24dB at 38GHz for the 3mm diamond case. When the phase difference between signals traveling on path 1 and 2 is n (n= 1, 3, ...), the waves will cancel each other and result in gain drops. As the thickness of diamond increases, the signal traveling paths in Figure. 3(b) in Si substrate and diamond layer become shorter. Then more power propagating through path 3 in Figure. 3(b) will be consumed after reflections in the lossy Si substrate, which accordingly reduces the transmission gain. With the increase of the slope of the gain, the interval between dip frequencies becomes smaller. In Figure. 5, between 10 and

Figure. 6 Impedances of on-chip dipole antenna with diamond thickness varying from 0 to 5mm

C. Effect of Inserting a Diamond Layer on Antenna Impedance The real and imaginary parts of port impedance are given in Figure. 6. Compared with that of the no diamond layer case, both the real and imaginary parts have shifted more or less when the diamond thickness increases from 0.35mm to 5mm. During the entire simulating frequency, the resistances are all above 50 ; while the reactances approach zero and the on-chip antenna resonates at 25-30GHz. In real wireless interconnection systems, therefore, additional matching network or some slight modifications of antenna structure is required to optimize the power transmission. D. Ga with a Diamond Layer Under Different Separations Figure. 7 shows the gain of on-chip dipole antenna pair on a 10 -cm substrate with a 0.35mm thick diamond propagation layer separated by 0.2, 0.5, 1, 3 and 8mm. For the separations below 1mm, the gains are sufficiently high. However, the gains may possibly fall by more than 20dB when the antenna pair is separated by more than 3mm. Especially, two dips are obviously seen for the 8mm separation and the gain is too low for wireless interconnection. This indicates that a 0.35mm thick diamond layer is preferred for the 15-40GHz frequency range with the antenna pair separations less than 3mm.

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with 0.35mm thick diamond

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separation 0.2mm separation 0.5mm separation 1.0mm separation 3.0mm separation 8.0mm

The characteristics of this 2mm-long on-chip dipole antenna pair on 100 -cm Si substrate separated by 3mm are listed in TABLE II and compared with that of previously published on-chip antennas especially for intra-chip wireless interconnections. Comparatively higher gain by involving a 0.35mm thick diamond layer is achieved in the very wide frequency range 15-40GHz. IV. CONCLUSION The transmission characteristics of on-chip dipole antenna pair are investigated. The transmission gain is greatly improved by placing a 0.35mm thick diamond layer between the Si substrate and heat sink. Simulations are performed by Ansofts HFSS in order to determine the optimum diamond thickness, substrate resistivity and applicable separation between an antenna pair. Our method makes integrated dipole antennas well suited for intra-chip wireless interconnections which are known as a future solution to replace critical wiring interconnections. REFERENCES
Jau-Jr Lin, et al. Integrated Antennas on Silicon Substrates for Communication Over Free Space, IEEE Electron Device Letters, 2004, 25(4):196-198. [2] Changhua Cao, et al. A 24-GHz Transmitter With On-Chip Dipole Antenna in 0.13um CMOS, IEEE Journal of Solid-State Circuits, 2008, 43(6):1394-1402. [3] Moncef Kadi, Fabien Ndagijimana, Jol Dansou-Eloy, Printed Dipoles Antennas for MCM-L Wireless RF Interconnects, IEEE Transactions on Antennas and Propagation, 2008, 56(1):223-230. [4] A. Triantafylou, et al. Integrated Antennas for Wireless Interconnect and Electromagnetic Interference, The 14th IEEE Mediterranean Electrotechnical Conference, 2008, pp:416-420. [5] Jau-Jr Lin, et al. 10x Improvement of Power Transmission over Free Space Using Integrated Antennas on Silicon Substrates, IEEE Custom Integrated Circuits Conference, 2004, pp:697-700. [6] Paul H. Park, S. Simon Wong, An On-Chip Dipole Antenna for Millimeter-Wave Transmitters, IEEE Radio Frequency Integrated Circuits Symposium, 2008, pp:629-632. [7] K. Kim, et al. Integrated Dipole Antennas on Silicon Substrates for Intra-chip Communication, IEEE AP-S Int. Symp., 1999, pp:1582-1585. [8] Guo Xiaoling, CMOS Intra-chip Wireless Clock Distribution. PhD dissertation. 2005, pp:33-36. [9] A.B.M.H. Rashid, S. Watanabe, T. Kikkawa, High Transmission Gain Integrated Antenna on Extremely High Resistivity Si for ULSI Wireless Interconnect, IEEE Electron Device Letters, 2002, 23(12):731-733. [10] Kenneth C.L.CHAN, Xuejun TIAN, Yi HUANG, Integrated Antenna for Future Wireless Communication Applications, The 2rd European Conference on Antennas and Propagation, 2007, pp:1-4. [11] Mohammad Reza Nezhad Ahmadi, Safieddin Safavi-Naeini, Lei Zhu, An Efficient CMOS On-Chip Antenna Structure for System in Package Transceiver Applications, Radio and Wireless Symposium, 2007, pp:487-490. [12] Su Qingfeng, et al. Growth and Electrical Properties of (100)-Oriented CVD Diamond Films, Chinese Journal of Semiconductors, 2005, 26(5):947-951. [1]

Ga(dB)
-80

10 Ohm-cm Si substrate
5 10 15 20 25 30 35 40

Freq(GHz)

Figure. 7 Transmission gains of on-chip dipole antenna pair with different separations with a 0.35mm diamond layer

E. Substrate Effect on Ga with 1mm Separation To evaluate the effect of silicon substrate on the antenna gain in terms of its resistivity, a 2mm-long antenna pair separated by 1mm on 10 -cm and 100 -cm substrates has been simulated. The results are compared in Figure. 8.
-10

10dB separation=1mm

-20 -30

Ga(dB)

-40 -50 -60 -70 5 10 15 20 25 30 35 40

10Ohm substrate without diamond 10Ohm substrate with 0.35mm diamond 100Ohm substrate without diamond 100Ohm substrate with 0.35mm diamond

Freq(GHz)

Figure. 8 Transmission gains for antenna pair on 10 -cm and 100 -cm substrate with and without a 0.35mm diamond layer

When the diamond layer is 0.35mm thick, the gain of antennas on a 100 -cm substrate is much higher than that of the antennas on a 10 -cm substrate above 18GHz. Typically, it reaches -6.8dB at 26GHz, 10dB higher than that of the other. The gain is almost the same for the case when no diamond layer is placed. For each substrate, the gain with 0.35mm thick diamond is remarkably higher than that without a diamond layer. Therefore, high resistivity substrate is preferable for gain improvement. Nevertheless, the gain for antenna pair on 10 -cm substrate with a 0.35mm thick diamond layer still reaches -16dB at 28GHz. Considering the well compatibility with standard CMOS process, 10 -cm substrate is also capable for short-range wireless interconnections.
TABLE II. COMPARISONS OF SEVERAL ON-CHIP DIPOLE ANTENNAS
Ref. [3] [4] [8] Freq. (GHz) 10-25 10-40 10-18 Substrate 500um, LaAlO3 substrate 525um, SOI substrate 600um, 20 -cm Si substrate 260um, 105 -cm Si substrate 350um, 100 -cm Si substrate Inserted Layer N/A N/A 0.76mm AlN 2.6mm wood 0.35mm diamond Gain (dB) -65 -20 -22 -12 -60 -44 Ant. Size 2.14mmN/A 1.98mm10um 2mm10um Sep. (mm) 10 2.5 5

[9] This work

5-26

-40 -14

2mm10um

15-40

-53 -17

2mm30um

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