Himanshu Srivastava

D-203, Kesar Garden Sector 48,

NOIDA 201-301,
India
Phone : 001-720-8388010 (Mobile)
E-mail : himanshu001@gmail.com

Objective
- To develop a career in designing and maintaining software tools by applying
innovation and creativity.
- To contribute to the company excellence by using CMM practices during the SDLC.

Technical Skills:

- Languages : C, C++ and UML.

- Expertise : Data Structures, Algorithms, STL’s,
- Tools : Visual Studio, Rational Rose, Rational Purify, Rational
Quantify,
Rational Pure Coverage
- Procedure : RUP
- Technology : OOAD, DP’s.
- Version Control Tool : Clear Case.
- OS used : MS-Windows NT

Work Experience:

- Organisation : STMicroelectronics, NOIDA Site, India.

- Current Designation : Senior Software Engineer.
- Duration : Nov 2000-Till Date

• Role:
- Research and Development work catering to software algorithms and data
structures for FPGA chip using the below mentioned tools and technologies in the
various phases of SDLC
o Designing
Rational Rose and UML
o Implementation
C, C++, STL’s
o Testing
Regression tools and nightly builds
White Box, Grey and Black box testing
Unit and Integration testing
o Optimization
Rational Purify : To remove memory leaks
Rational Quantify : To remove code bottlenecks
Pure Coverage : To identify untested code
o Release and Maintenance
Clear Case : For version control & Build mechanism
Clear Quest : For bug logging, resolving and tracking

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Himanshu Srivastava.
 o Software Architecture
Design Patterns : For Software reusability, modularity and
extensibility
Layered Architecture: To minimize dependency

Project Summary
The below mentioned projects were targeted at development of specific router tools
for FPGA test chip(s). The FPGA Architecture consists of various kinds of logic and
routing resources.

Title : Router for the project GOSPL1.0 of STMicroelectronics

Project Brief:
The different phases of SDLC were

1. Software Design and Analysis/ Implementation and Testing

 Performed Object Oriented Analysis and Design.
Used Rational Rose for class design and flow representation in
terms of sequence diagrams
Made Use case and logical view of the router subsystem
 Implementation and testing
Coded the complete router subsystem in C++.
Identified and wrote test cases for the router
Performed Unit and Black box testing for functional and non-
functional requirements.
 Optimization
Ran Rational Purify, Pure coverage and Quantify to remove
memory leaks and code bottle necks.
2. Integration with other subsystems and Integration testing
 Integrated software tool with Device Modeling, Placement and Timing
Analysis systems.
 Identified and wrote test cases for Integration testing and input / Output
data integrity
3. Version Control
 Used Clear Case to maintain versions and integration purposes.
4. Debugging and Maintenance
 Clear Quest for tracking and closing bugs reported by SQA team.
 Maintaining and extending this version till date as required by other teams
for Device Architecture evaluation /bench marking and other internal
usage.
5. Re-factoring / Redesigning/Testing
 This involved the design changes identification and subsequent design re-
factoring to accommodate the above mentioned features using OOP’s
concepts

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Himanshu Srivastava.
Education:
Bachelor Of Engineering (Electrical and Electronics)
1999, Sri Siddhartha Institute Of Technology, Banglore University.

Diploma In Advance Computing (D.A.C.)

2000, C-DAC ACTS, Hauz Khaz, New Delhi.

Acronyms and Keywords

- SDLC : Software Development Life Cycle
- CMM : Corporate Maturity Model
- UML : Unified Modeling Language
- STL : Standard Template Library
- RUP : Rational Unified Process
- OOAD : Object Oriented Analysis and Design
- DP : Design Patterns
- FPGA : Field Programmable Gate Arrays
- SQA : Software Quality Analysis
- OOP : Object Oriented Programming

Personal Details:
- Martial Status : Unmarried/ Single
- Passport : F6392030
- Valid Till : 23/03/2016

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Himanshu Srivastava

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Himanshu Srivastava.