design

Edited by Bill Travis and Anne Watson Swager

ideas

Single FET controls LED array

Len Sherman, Maxim Integrated Products, Sunnyvale, CA
hite-LED backlights are gainL1 Li-ION CELL ing acceptance because they offer D1 2.7 TO 10 H, higher reliability and simpler drive MBR0530L 5.5V 1A circuitry than backlights based on CCFL C1 FDN337N 10 F (cold-cathode-fluorescentQ1 C2 Figure 1 lamp) and EL (electroluminesKEYPAD 10 F 10 1 V LEDs EXT CC cent) technology. As a result, white-LED backlights are increasingly common in 9 CS NDS7002A PDAs (personal digital assistants), cell Q2 MAX1698 phones, digital cameras, and other portable devices. A design in which the 8 3 PGND REF display requires backlighting for extendBACKLIGHT BRIGHTNESS LEDs ed periods needs an efficient circuit that R1 4 7 drives the LEDs with a controlled current ADJ AGND 500k and eliminates the wasted power associated with current-limiting resistors. Fig6 FB ure 1 shows a switch-mode boost design ON 2 SHDN that regulates current instead of voltage. OFF OFF BACKLIGHT Because all the LEDs are connected in seON OFF R3 R2 C4 ries, they all receive the same current 15 100k 10 nF without the need for ballasting resistors. Identical currents help achieve uniform intensity. And, because the output cur- When this circuit turns off the backlight LEDs, the keypad LEDs remain on with no change in intenrent is low (20 mA in this case), the out- sity. put-filter capacitance, C2, can be smaller than for a load consisting of parallelThe circuits 90% conversion efficien- their current. The remaining LEDs (for connected LEDs. cy offers a distinct power-saving advan- the keypad, for example) remain on, and tage over resistor-limited and linearly their intensity remains constant because regulated designs. It might appear that a IC1 regulates their current, by sensing the Single FET controls LED array ..................131 series-LED connection is unsuitable for voltage across R2 (300 mV at full brightapplications in which some (but not all) ness). When the circuit turns the LEDs on Circuit protects battery LEDs must be off. A cell phone, for ex- and off, the R2-C4 network at the gate of from overdischarge ....................................132 ample, sometimes needs that capability Q1 slows the load changes sufficiently to Two diodes change for occasions when the display is off but prevent transients in the LED drive curdemagnetization-signal polarity..............134 the keypad remains lit. Or, a PDA might rent. Other features include adjustable Simple scheme keeps need to play a sound file while maintain- intensity via the ADJ pin and full shutcurrent drain constant ................................138 ing illumination in the buttons but not down via the SHDN pin. the display. In the circuit of Figure 1, RS-232/485 converter switching off individual LEDs or groups has automatic flow control........................140 of LEDs is not a problem, even with seCircuit provides accurate ries drive. Applying a logic-high level to Is this the best Design Idea in this RTD measurements ....................................142 the gate of a simple MOSFET switch, Q2, issue? Vote at www.ednmag.com/edn turns off a subset of LEDs by shunting mag/vote.asp.

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Circuit protects battery from overdischarge

Martin Wuzik, Implex AG Hearing Technology, Ismaning, Germany
ll electronic circuits powered by a battery discharge the Figure 1 Q1 battery. In some applicaVSYS VBAT LP0701 MAIN CIRCUIT tions, it is undesirable to overdischarge the battery, because it could irreversibly reduce the batterys capacity and the 10M number of discharge/charge cycles. The 10M IC1 circuit in Figure 1 protects a single R3111Q131C-TR Q2 Q3 + NiMH (nickel-metal-hydride) cell by dis1 10 F 2 V DD OUT connecting the load from the battery. Figure 2 shows the output voltage, VSYS, verTN2501 TN2501 GND sus the input voltage,VBAT. For this NiMH 4 battery, the switching points are 1.1 and 1.3V. If the battery discharges and VBAT drops below 1.1V, Q1 switches off ,and IC2 R3111Q111A-TR the node Main Circuit disconnects from 2 1 VDD OUT the battery. In that case, the batterys only load is the pair of voltage detectors IC1 1.35V GND and IC2 from Ricoh (www.ricohNiMH 4 BATTERY usa.com). The load current of one detector is typically 800 nA, so the battery drain is 1.6 A. The user must now charge the battery. Once the battery charges and the voltage reaches 1.3V, the A simple circuit prevents excessive discharge of NiMH cells. load reconnects to the battery and re1.8 mains connected as long as VBAT stays above 1.1V. 1.6 DOWN IC1 is a voltage detector with Figure 2 1.4 a 1.3V setpoint and a push-pull 1.2 output. IC2 has a 1.1V setpoint. An important difference between the two de1 VSYS tectors is that IC2 has an open-drain outUP 0.8 put. If the battery voltage drops but remains within the 1.1 to 1.3V range, 0.6 IC1s output is low, and Q2 switches off. 0.4 Q3 switches on because IC2s output is still in the high-impedance state. If VBAT 0.2 drops below 1.1V, IC2s output switches 0 low, Q3 turns off, and, as a result, Q1 also 0 0.5 1 1.5 2 VBAT switches off. As soon as VBAT drops below 1.1V, the load disconnects from the The load disconnects from the battery when the voltage drops below 1.1V and reconnects when the battery. The load reconnects to the bat- battery charges above 1.3V. tery only when the battery charges to a voltage higher than 1.3V. At voltages of are low-threshold MOSFETs from Su- higher voltages of Li-ion batteries by se1.1 to 1.3V, IC2 cannot switch on Q3 be- pertex (www.supertex.com). The circuit lecting the voltage detectors. cause the ICs output is an open-drain uses no trimming resistors. You can setype and VSYS is low. IC1s output must as- lect IC1 and IC2 off the shelf with 100- Is this the best Design Idea in this sume a high state to switch on Q2 and to mV steps and 2% switching-point accu- issue? Vote at www.ednmag.com/edn finally switch on Q1 on. The transistors racy. You can adapt the circuit for the mag/vote.asp.

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design

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in CCM forces the diode to brutally stop conducting. Also in DCM, valley switching ensures minimum switching losses that COSS and all the parasitic capacitances bring. In valley switching, or QR (quasiresonant) operation, the curve of the drainsource voltage, VDS, of a typical flyback converter, shows that when the power switch closes, you observe a low level due to the RDS(ON) IP product (Figure 1a). At the switch opening, VDS rises quickly and starts to ring at a high frequency because of the leakage-inductance presence. During this time, the primary current transfers to the secondary, and a reflected level of N (VOUT VF) appears on the MOSFET drain, where N is the secondary-to-primary turns ratio, VOUT is the output voltage, and VF is the secondarydiode forward drop. As soon as the primary current has fallen to zero in DCM operation, the transformer core is fully demagnetized (Figure 1b). The drain

Two diodes change demagnetization-signal polarity

Christophe Basso, On Semiconductor, Toulouse, Cedex, France
ower-supply designers usually like flyback converters to operate in DCM (discontinuous-conduction mode) rather than in CCM (continuousconduction mode). In DCM, the flyback converter is a first-order system at low frequencies, which eases the feedbackloop compensation. You can use a lowcost secondary rectifier, thanks to soft blocking conditions. In DCM, IP goes to zero, and the diode stops conducting, whereas the power-switch turn-on event

Figure 1

(a)

(b)

A typical drain-source waveform of a flyback converter shows high-frequency ringing (a). In DCM operation, the primary current ramps up and down to zero (b).

Figure 2
VAUX

VOUT

20.0 10.0 0

GND VIN

10.0 20.0

20.0 10.0 0 10.0 20.0 (a) (b)

An auxiliary winding (a) lets you observe the flux image in the transformers core for both flyback and forward operation (b).

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design

ideas
HV VOUT HV VOUT NP 1N4148 DAUX NS VAUX RVALLEY NP

Figure 3

VAUX

56

NS

10 F

RVALLEY

NA

NAUX GND

2 VDEM

1N4148 VDEM

1N4148

(a)

(b)

A simple component arrangement allows forward-mode detection with a flyback-like PWM controller (a) or flyback-mode detection with a forwardlike controller (b).

branch starts to ring but at a lower frequency than in Figure 1a because the primary inductance, LP, is now inFigure 4 volved. This natural oscillation exhibits the following frequency value, where CLUMP represents all of the circuits parasitic capacitances, such as COSS and the stray capacitance from the transformer. 1 FRING = . 2 L P C LUMP As with any sinusoidal signal, there are peaks and valleys. When you restart the switch in the valley, all the parasitic capacitance values are at their lowest possible levels. Also, the capacitive losses, which are equal to 1/2 CLUMP VDS2 FSW, are small because the MOSFET is no longer the seat of turn-on losses, which removes the usual turn-on parasitics. That is the secret of QR operation. You can easily observe the core flux through an auxiliary winding (Figure 2a). Thanks to the coupling between the windings, the auxiliary section delivers a voltage image of the cores flux through the following formula:
VAUX = N d . dt

700

500

300

100

100 532 SEC 536 SEC 540 SEC 544 SEC 548 SEC

When you properly adjust the time constant using RVALLEY, the switch restarts in the middle of the valley.

Now, you can wire the winding either

in flyback operation, as the power winding, or in forward operation. The observed signals look the same but have different polarity (Figure 2b). Note that both signals center about ground. The problem lies in the fact that most PWM controllers accept only the flyback polarity. Typical examples include the MC33364 and MC44608 (www.onsemi. com). In battery-charger applications, you usually wire the auxiliary winding the one that self-supplies the controller and gives the demagnetization signal in forward mode. The reason is simple:

When the battery you charge is close to 0V, the auxiliary windings are also nearly 0V because both windings are coupled in flyback mode. By operating in forward mode, whatever happens on the secondary side is invisible, and the voltage is always there to supply the controller. However, the demagnetization signal now has the wrong polarity, and the controller doesnt restart at the cores reset event. Figure 3a shows a way around this problem. You still wire the winding for forward operation, but you add two extra diodes in series with the winding. At
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design

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iliary winding in flyback mode (Figure 3b). The problem and the cure are similar. When you properly select RVALLEY, this resistance naturally combines with sensepin internal capacitance to add switch delay right in the middle of the wave (Figure 4). Some controllers exhibit different demagnetization threshold levels. The MC33364 starts at around 1V, and the MC44608 toggles at 65 mV. Because of the diodes, you clamp VDEM between 600 mV, which could not trigger the MC33364. A small offset from the internal reference to the demagnetization pin brought by a 150-k resistor and a typical RVALLEY of 10 k have provided good circuit operation.

the switch closing, you apply N VHV, where N is the ratio between the auxiliary winding, NA, and the primary winding, NP. You clamp VDEM to 0.6V, and the current circulates through RVALLEY. At the switch opening, the voltage reverses and becomes positive but clamped to 0.6V on VDEM. When this level collapses, the PWM controller reactivates the power switch. You can implement this same type of circuit for PWM controllers that need a forward demagnetization signal but for which you would like to operate the aux-

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Simple scheme keeps current drain constant

Peter Gttler, APS Software Engineering GmbH, Cologne, Germany
t is sometimes advantageous to keep the overall current conFigure 1 sumption of an electronic device constant. A large, seven-segment disI3 ISUP R1 play, for example, draws nearly zero 12 TO IN OUT current when no segment is on to hun24V IC2 50 dreds of milliamps when fully lit. This 7805 heavily varying current can cause EMI ILOAD GND problems when a device receives its pow1 F er through long cables from a remote C3 I1 power supply. The low-parts-count cir+ C2 + R2 C4 C1 cuit in Figure 1 keeps current consumpI2 I4 10 F 10 F 0.1 F tion constant. IC2 is an ordinary threeGND terminal regulator that supplies 5V to the IC1 7905 load, R2. IC2 draws a total current IN OUT I3 ILOAD+I4. (I4 is approximately 8 mA, the quiescent current of IC2). The negative three-terminal voltage regulator, IC1, maintains 5V across R1. The current through R1 is I2eI3. So, I2 5V/R1 I3, and total supply current ISUP I1e5V/R1. I1 is This circuit maintains a constant supply current of approximately 102 mA. approximately 2 mA, the quiescent current of IC1. If the load draws more cur- mA. C1 and C4 are input-filter capacitors, ence voltage.) If your application cannot rent, IC1 reduces I2 and vice versa. C2 improves ripple rejection, and C3 pro- tolerate the 5V drop across R1, try using This regulation works well as long as vides stability. Note that R1 dissipates an LM337 with a 1.25V reference voltage I3 is smaller than 5V/R1. If the load draws (5V)2/R1 and must have an adequate for IC1. more current, IC1 stops regulating and power rating. IC1 and IC2 may require the voltage drop across R1 rises above 5V. heat-sinking. The minimum supply volt- Is this the best Design Idea in this This example sets R1 at 50 , setting the age for this circuit is 12V. (The minimum issue? Vote at www.ednmag.com/edn supply current, ISUP, to approximately 102 input voltage for IC2 7V IC1s refer- mag/vote.asp.

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design

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RS-232/485 converter has automatic flow control

John Howard, Kw Aware, Ventura, CA
S-485 communications can provide longer range and better IC1 VCC Figure 1 MAX232 noise immunity than RSVCC 0.1 F 1 232, as well as multidrop capability. BeC1+ VCC 16 cause it does not have separate transmit 2 0.1 F V+ and receive lines, RS-485 requires flow GND 15 0.1 F 3 C1 control. RS-232/485 converters often use T1OUT 14 4 one of the RS-232 handshaking lines to C2+ R1IN 13 0.1 F 5 C control direction, but several communi2 R1OUT 12 RS-232 cations-software packages do not supIC2 6 V T1IN 11 DB-9 CONNECTOR VCC MAX483 port flow control. The circuit in Figure 2 7 T T2IN 10 2OUT Rx 1 is an RS-232/485 converter that uses the 1 8 8 3 R2OUT 9 RO Tx VCC R2IN transmitted signal itself to control the 2 7 5 RE A GND flow. The circuit uses MAX232 and 3 6 R2 DE B 0.1 F MAX483 interface circuits, IC1 and IC2 RS-485 120 GND 5 4 from Maxim Integrated Products (www. DI VCC maxim-ic.com) to convert between the TRIGGER ICs respective signal levels and logic levIC3 VCC LINE 100k els. Because both ICs invert the signal, the LM555 circuit preserves the original sense of the 1 signal. The MAX483 is normally in the R1 VCC 8 GND 2 7 receiving mode. When transmission beVCC TR DISCH 3 6 gins, the signal triggers IC3, the LM555 OUT THRESH timer, which in turn toggles IC2s DE and 4 5 RST RE lines, putting the chip into the transCTL C1 mitting mode. 0.1 F 10k Q1 Q1, the 2N3906, fully discharges C1 2N3906 each time the trigger line goes low, restarting the timing cycle. The values of R1 and C1 determine how long IC3 maintains the transmitting mode after transmission ends. This interval should be Automatic flow control makes RS-232/485 conversion easy. long enough such that the converter doesnt switch directions while sending so long that the converter misses received is in farads. The flow control responds characters containing long sequences of characters. The interval T in seconds is within a few microseconds after transzeros. On the other hand, it shouldnt be T 1/R1C1, where R1 is in ohms, and C1 mission commences, so the converter does not miss any bits at low TRANSMITTED DATA and medium data rates. The (LOGIC SIDE OF INTERFACE CHIPS) application for this circuit operates at 14,400 bps. FigTIMED DELAY AFTER DELAY IN TOGGLING ure 2 shows the timing of the TRANSMISSION ENDS Figure 2 FLOW CONTROL (SET BY C1 AND R1) serial and flow-control lines. (SEVERAL MICROSECONDS) The entire circuit can fit into FLOW-CONTROL LINE (LOW=RECEIVE, HIGH=TRANSMIT) a DB-25 (or even a DB-9) back shell.

RECEIVED DATA (LOGIC SIDE OF INTERFACE CHIPS)

R1 and C1 determine how long the transmitting mode lasts.

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TABLE 1RESISTANCE VERSUS TEMPERATURE FOR PT100 RTD ELEMENT
C 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 2 3 4 5 92.16 92.55 92.95 93.34 93.73 94.12 94.52 94.91 95.3 95.69 96.09 96.48 96.87 97.26 97.65 98.04 98.44 98.83 99.22 99.61 100 100.39 100.78 101.17 101.56 101.95 C 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 102.34 102.73 103.12 103.51 103.9 104.29 104.68 105.07 105.46 105.85 106.24 106.63 107.02 107.4 107.79 108.18 108.57 108.96 109.35 109.73 110.12 110.51 110.9 111.29 111.67 112.06 C 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 112.45 112.83 113.22 113.61 114 114.38 114.77 115.15 115.54 115.93 116.31 116.7 117.08 117.47 117.86 118.24 118.63 119.01 119.4 119.78 120.17 120.55 120.94 121.32 121.71 122.09 C 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 122.47 122.86 123.24 123.63 124.01 124.39 124.78 125.16 125.54 125.93 126.31 126.69 127.08 127.46 127.84 128.22 128.61 128.99 129.37 129.75 130.13 130.52 130.9 131.28 131.66 132.04 C 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 132.42 132.8 133.18 133.57 133.95 134.33 134.71 135.09 135.47 135.85 136.23 136.61 136.99 137.37 137.75 138.13 138.51 138.88 139.26 139.64 140.02 140.4 140.78 141.16 141.54 141.91 142.29

Circuit provides accurate RTD measurements

Tito Smailagich, ENIC, Belgrade, Yugoslavia
he circuit in Figure 1 is an efficient measuring circuit for PT100 RTD elements. IC1 provides an accurate 2.5V output and, together with P1 and R1, also provides a stable 1-mA current to the RTD element. The output of IC2 is 0.1V. P2 provides a zero adjustment (at 0 C) for IC3, an amplifier with a gain of 25. P3 provides a gain adjustment. If, for example, you replace the RTD element by a fixed resistance of 124.78 (the RTDs resistance in Table 1 at 64 C), you would trim P3 to obtain 0.64V output. Tolerance values for Class A and B elements are 0.35 and 0.8 C, respectively. You can use the standard values from Table 1 or, if you need more accuracy, you can calibrate the PT100 element in a controlledtemperature environment.

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RTD

649k GAIN ADJUST 5V VCC 3 6 IC2 LTC1050 27k 2 4 7 + 6 IC3 LTC1050 OUTPUT P1

Figure 1

PT100 5V VCC

5V VCC 1-mA ADJUST IC1 MC1403 GND OUT 2 2.5V 500 P1 0.1 F R1 2.21k 3 2 +

1 0.1 F

IN

VEE 5V 10.2k ZERO ADJUST P2 27k

VEE 5V

1k

0.1V

274

This circuit provides accurate temperature measurements using a PT100 RTD element.

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