OPA2107

OPA 210 7
OPA 2107

Precision Dual Difet OPERATIONAL AMPLIFIER

FEATURES
q LOW DRIFT: 10V/C max q LOW IB: 10pA max q FAST SETTLING TIME: 2s to 0.01% q UNITY-GAIN STABLE q VERY LOW NOISE: 8nV/Hz at 10kHz q LOW VOS: 1mV max

APPLICATIONS
q DATA ACQUISITION q DAC OUTPUT AMPLIFIER q OPTOELECTRONICS q HIGH-IMPEDANCE SENSOR AMPS q HIGH-PERFORMANCE AUDIO CIRCUITRY q MEDICAL EQUIPMENT, CT SCANNERS

DESCRIPTION
The OPA2107 dual operational amplifier provides precision Difet performance with the cost and space savings of a dual op amp. It is useful in a wide range of precision and low-noise analog circuitry and can be used to upgrade the performance of designs currently using BIFET type amplifiers. The OPA2107 is fabricated on a proprietary dielectrically isolated (Difet ) process. This holds input bias currents to very low levels without sacrificing other important parameters, such as input offset voltage, drift and noise. Laser-trimmed input circuitry yields excellent DC performance. Superior dynamic performance is achieved, yet quiescent current is held to under 2.5mA per amplifier. The OPA2107 is unitygain stable. The OPA2107 is available in plastic DIP and SOIC packages. Industrial temperature range versions are available.

+V S (8)

In (2, 6)

+In (3, 5)

Cascode

Output (1, 7)

V S (4)

Difet Burr-Brown Corp. BIFET National Semiconductor

International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111 Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132

1989 Burr-Brown Corporation

PDS-863E 1

OPA2107

Printed in U.S.A. April, 1998

SPECIFICATIONS
At TA = +25C, VS = 15V, unless otherwise noted. OPA2107AP, AU PARAMETER OFFSET VOLTAGE(1) Input Offset Voltage Over Specified Temperature Average Drift Over Specified Temperature Power Supply Rejection INPUT BIAS CURRENT(1) Input Bias Current Over Specified Temperature Input Offset Current Over Specified Temperature INPUT NOISE Voltage: f = 10Hz f = 100Hz f = 1kHz f = 10kHz BW = 0.1 to 10Hz BW = 10 to 10kHz Current: f = 0.1Hz thru 20kHz BW = 0.1Hz to 10Hz INPUT IMPEDANCE Differential Common-Mode INPUT VOLTAGE RANGE Common-Mode Input Range Over Specified Temperature Common-Mode Rejection OPEN-LOOP GAIN Open-Loop Voltage Gain Over Specified Temperature DYNAMIC RESPONSE Slew Rate Settling Time: 0.1% 0.01% Gain Bandwidth Product THD + Noise Channel Separation POWER SUPPLY Specified Operating Voltage Operating Voltage Range Current OUTPUT Voltage Output Over Specified Temperature Short Circuit Current Output Resistance, Open-Loop Capacitive Load Stability TEMPERATURE RANGE Specification Operating Storage Thermal Resistance (J-A) 8-Pin DIP 8-Lead Surface Mount NOTE: (1) Specified with devices fully warmed up. RL = 2k 10.5 10.2 80 82 80 13 CONDITION MIN TYP MAX UNITS

VCM = 0V VS = 10 to 18V VCM = 0V VCM = 0V

80

100 0.5 3 96 4 0.25 1

1 2 10

mV mV V/C dB pA nA pA nA nV/Hz nV/Hz nV/Hz nV/Hz Vp-p Vrms fA/Hz fAp-p || pF || pF V V dB dB dB V/s s s MHz % dB V V mA V V mA pF

10 1.5 8 1

RS = 0

30 12 9 8 1.2 0.85 1.2 23 1013 || 2 1014 || 4 11 10.5 94 96 94 18 1.5 2 4.5 0.001 120 15 4.5 12 11.5 40 70 1000 +85 +85 +125 90 175

VCM = 10V VO = 10V, RL = 2k

G = +1 G = 1, 10V Step G = 100 G = +1, f = 1kHz f = 100Hz, RL = 2k

4.5

11 10.5 10

1MHz G = +1 25 25 40

C C C C/W C/W

OPA2107

PIN CONFIGURATION
Top View DIP, SOIC

ABSOLUTE MAXIMUM RATINGS(1)

Supply Voltage ................................................................................... 18V Input Voltage Range ..................................................................... VS 2V Differential Input Voltage ........................................................ Total VS 4V Operating Temperature P and U Packages ........................................................ 25C to + 85C Storage Temperature P and U Packages ....................................................... 40C to +125C Output Short Circuit to Ground (TA = +25C) ........................... Continuous Junction Temperature .................................................................... +175C Lead Temperature P Package (soldering, 10s) ......................................................... +300C U Package, SOIC (3s) ................................................................ +260C NOTE: Stresses above these ratings may cause permanent damage.

Out A 1 In A 2 +In A 3 VS 4 A B

8 +V S 7 Out B 6 In B 5 +In B

PACKAGE/ORDERING INFORMATION

ELECTROSTATIC DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PRODUCT OPA2107AP OPA2107AU

PACKAGE Plastic DIP SO-8 SOIC

PACKAGE DRAWING NUMBER(1) 006 182

TEMPERATURE RANGE 25 to +85C 25 to +85C

NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

OPA2107

TYPICAL PERFORMANCE CURVES

TA = +25C, VS = 15V unless otherwise noted.
INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 1k 100

TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY at 1kHz vs SOURCE RESISTANCE 1k

Voltage Noise, E O (n/V/ Hz)

EO RS

Voltage Noise (nV/ Hz)

100

Voltage Noise

Current Noise

10

Current Noise (A/ Hz)

100

OPA2107 + Resistor 10

10 Current Noise 1 1 10 100 1k Frequency (Hz) 10k 100k 1M Voltage Noise

Resistor Noise Only

0.1

1 100 1k 10k 100k 1M 10M 100M Source Resistance ( )

INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE 10nA 10nA 10

INPUT BIAS AND OFFSET CURRENT vs INPUT COMMON-MODE VOLTAGE 10

1nA
Bias Current (pA)

1nA
Offset Current (pA)

Bias Current (pA)

Offset Current 1 1

100 Bias Current 10

100

10

0.1

0.1

Offset Current

1 0.1 50

25

+25

+50

+75

+100

0.1 +125

0.01 15 10 5 0 +5 +10 +15 Common-Mode Voltage (V)

0.01

Ambient Temperature (C)

POWER SUPPLY AND COMMON-MODE REJECTION vs FREQUENCY 120 +PSR 100

PSR, CMR (dB)

COMMON-MODE REJECTION vs INPUT COMMON-MODE VOLTAGE 120 100 110

Common-Mode Rejection (dB)

100

80 60 40 20 0 10

PSR CMR

80 60 40 20 0

90

80

70 15 10 5 0 +5 +10 +15 Common-Mode Voltage (V)

100

1k

10k

100k

1M

10M

Frequency (Hz)

OPA2107

Offset Current (pA)

TYPICAL PERFORMANCE CURVES (CONT)

TA = +25C, VS = 15V unless otherwise noted.
MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY

OPEN-LOOP FREQUENCY RESPONSE 120 100

Voltage Gain (dB)

0 RL = 2k CL = 100pF

30

Phase Shift (Degrees)

80 60 40 20 0 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) 180

Output Voltage (Vp-p)

45

20 R L = 2k

90

AOL

10

135

0 10k

100k Frequency (Hz)

1M

10M

GAIN-BANDWIDTH AND SLEW RATE vs TEMPERATURE 8 25 6

GAIN-BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE

22 A V = +100 RL = 2k

Gain-Bandwidth (MHz)

Gain-Bandwidth (MHz)

6 Slew Rate 4 Gain-Bandwidth

20

20

15

Slew Rate (V/s)

Slew Rate

18

10

16 Gain-Bandwidth

0 50 25 0 +25 +50 +75 +100 Ambient Temperature (C)

5 +125

4 5 10 15 20 Supply Voltage (VS )

14

SETTLING TIME vs CLOSED-LOOP GAIN 5

7

SUPPLY CURRENT vs TEMPERATURE

4 0.01% VO = 10V Step 2 RL = 2k 0.1% CL = 100pF

Supply Current (mA)

6 Total of Both Op Amps 5

Settling Time (s)

0 1 10 100 1000 Closed-Loop Gain (V/V)

3 50 25 0 +25 +50 +75 +100 +125 Ambient Temperature (C)

OPA2107

Slew Rate (V/s)

TYPICAL PERFORMANCE CURVES (CONT)

TA = +25C, V S = 15V unless otherwise noted.

CHANNEL SEPARATION vs FREQUENCY 150 120

OPEN-LOOP GAIN vs SUPPLY VOLTAGE

Channel Separation (dB)

140 RL = 130

110
Voltage Gain (dB)

100

120

RL = 2k

90

80 110 10 100 1k Frequency (Hz) 10k 100k

70 5 10 15 20 Supply Voltage (VS )

TOTAL HARMONIC DISTORTION vs FREQUENCY 1 6.5Vrms

THD + Noise (%rms) THD + Noise (%rms)

THD + NOISE vs FREQUENCY AND OUTPUT VOLTAGE 1

A V = +11V/V RS 0.1 Noise Limited 2Vp-p 2k

0.1

RS

2k

A V = +101V/V 0.01 A V = +11V/V 0.001 1 A V = +1V/V 10 100 1k 10k 100k

0.01

Noise Limited Noise Limited

10Vp-p

20Vp-p

0.001 1 10 100 1k 10k 100k Frequency (Hz)

Frequency (Hz)

OPA2107 LARGE-SIGNAL RESPONSE

OPA2107 SMALL-SIGNAL RESPONSE

Time (2s/div)

Output Voltage (20mV/div)

Output Voltage (5V/div)

Time (200ns/div)

OPA2107

APPLICATIONS INFORMATION AND CIRCUITS

The OPA2107 is unity-gain stable and has excellent phase margin. This makes it easy to use in a wide variety of applications. Power supply connections should be bypassed with capacitors positioned close to the amplifier pins. In most cases, 0.1F ceramic capacitors are adequate. Applications with larger load currents and fast transient signals may need up to 1F tantalum bypass capacitors. INPUT BIAS CURRENT The OPA2107s Difet input stages have very low input bias currentan order of magnitude lower than BIFET op amps. Circuit board leakage paths can significantly degrade performance. This is especially evident with the SO-8 surfacemount package where pin-to-pin dimensions are particularly small. Residual soldering flux, dirt, and oils, which conduct leakage current, can be removed by proper cleaning. In most instances a two-step cleaning process is adequate using a clean organic solvent rinse followed by de-ionized water. Each rinse should be followed by a 30-minute bake at 85C. A circuit board guard pattern effectively reduces errors due to circuit board leakage (Figure 1). By encircling critical high impedance nodes with a low impedance connection at the same circuit potential, any leakage currents will flow harmlessly to the low impedance node. Guard traces should be placed on all levels of a multiple-layer circuit board.

In

3 2 A

1/2 OPA2107 1 INA105 RF 5k 2 25k 25k 5

RG

101 RF 6 5 5k 25k B 7 1 1/2 OPA2107 3 25k

Output

+In

IB = 5pA Max Gain = 100 ~ CMRR ~ 95dB RIN = 1013

Differential Voltage Gain = 1 + 2RF/RG = 100

FIGURE 2. FET Input Instrumentation Amplifier.

E1 In

3 2 A

1/2 OPA2107 1 INA106 RF 10k 2 10k 100k 5 EO Output

RG

202 RF 6 10k 100k B 7 1 1/2 OPA2107 3 10k

E2 +In
Inverting Buffer

2 3 A 1 Out In

2 3 A 1 Out

EO = [10 (1 + 2RF /RG) (E2 E1)] = 1000 (E2 E1) Using the INA106 for an output difference amplifier extends the input common-mode range of an instrumentation amplifier to 10V. A conventional IA with a unity-gain difference amplifier has an input common-mode range limited to 5V for an output swing of 10V. This is because a unitygain difference amp needs 5V at the input for 10V at the output, allowing only 5V additional for common-mode range.

In

Non-Inverting

2 In 3 A 1 Out

FIGURE 3. Precision Instrumentation Amplifier.

FIGURE 1. Connection of Input Guard.

OPA2107

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