stored in memory location ALGORITHM: STEP 1: Move the data from the given address to AX register STEP 2: Set the second value and move into Bx register STEP 3; Add the content of AX register while BX register STEP 4: Move the content of AX register to give memory address STEP 5: Check if carry is not present jump to step 7 STEP 6: Increment C register STEP 7: Move the content of C reg to the given memory address STEP 8: Stop
PROGRAM: ADDRESS LABEL 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 MNEMONICS MOV SI,[8500] MOV DI,[8502] OPCODE COMMENTS A1 00 85 8B IE 02 85 B1 00 03 C3 A3 00 86 73 02 FE C1 88 OE O2 86 F4 Move the contents of the given address into ax register Move the contents of the given address to BX reg Initialize C register Add the context of AX to BX Move the content of AX reg to given memory address If carry is not present jump to loop Increment C reg Move the content of c reg in the given memory address
HLT
SUBRACTION OF TWO SIXTEEN BIT DATA USING 8086 AIM: To subtract the two given number of 16 bit data stored in memory location ALGORITHM: STEP 1: Move the data from the given address to AX register STEP 2: Set the second value and move into Bx register STEP 3; Subtract the content of AX register while BX register STEP 4: Move the content of AX register to give memory address STEP 5: Check if carry is not present jump to step 7 STEP 6: Increment C register STEP 7: Move the content of C reg to the given memory address STEP 8: Stop
PROGRAM: ADDRESS LABEL 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 MNEMONICS MOV SI,[8500] MOV DI,[8502] OPCODE COMMENTS A1 00 85 8B IE 02 85 B1 00 03 C3 A3 00 86 73 02 FE C1 88 OE O2 86 F4 Move the contents of the given address into ax register Move the contents of the given address to BX reg Initialize C register Subtract the context of AX to BX Move the content of AX reg to given memory address If carry is not present jump to loop Increment C reg Move the content of c reg in the given memory address
HLT
MULTIPLICATION OF TWO 16 BIT DATA AIM: To multiply the two 16 bit numbers and store it in memory address using 8036 kit ALGORITHM: STEP 1: Get the first data & move it into AX-register STEP 2: Get the second data & store it into BX register STEP 3: Multiply the content of AX & BX into memory location STEP 4: Store the content of AX & BX in given memory address STEP 5: Step the program FLOW CHART
START Move the content of the given address into AX register Move the content of the given address into BX Multiply content of AX and BX Move the content of AX to the given address Move the content of BX to the given address
8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410
HLT
A1 00 85 8B 1E 02 85 F7 E3 A3 00 86 86 16 02 86 F4
Move the contents of given address in AX register Move the contents of given address in BX register Multiply the content in AX,BX Move the contents of register and store in given address Move the contents of register and store in given address Stop
AIM: To divide the two 16 bit no and store the result in memory of 8086 kit ALGORITHM: STEP 1: Get the value of the memory location and move it to AX-reg STEP 2: Get the value of memory location & move it to BX reg STEP 3: Divide the content of AX & BX register STEP 4: Move the content of AX reg to the given memory location STEP 5: Stop the program FLOW CHART
START Move the content of the given address into AX register Move the content of the given address into BX
Divide content of AX by BX
Move the content of AX to the given address Move the content of BX to the given address
STOP
PROGRAM
Address 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410
label
opcode A1 00 85 8B 1E 02 85 F7 F3 A3 00 86 86 16 02 86 F4
Comments Move the contents of given address in AX register Move the contents of given address in BX register Divide the content in AX,BX Move the contents of register and store in given address Move the contents of register and store in given address Stop
HLT
PROGRAM TO SORT AN ARRAY IN ASCENDING ARRAY AIM: To write a program to sort an array of data in ascending order ALGORITHM: STEP 1: Set SI register as pointer for array STEP 2: Set CL register as count for N-1 repetitions STEP 3: Initialize array pointer STEP 4: Set CH as count for N-1 comparisons STEP 5: Increment the array pointer STEP 6: compare the next element of the array with AL STEP 7: Check carry flag is always set then got to Step 12 otherwise go to Next step STEP 8: Exchange the content of memory pointed by SI and the content of Previous memory location STEP 9: Decrement the count for comparisons STEP 10: Check zero flag if zero flag is reset then go to step 6 otherwise go To next step STEP 11: Decrement the count for comparisons (CH reg) STEP 12: Check zero flag if zero flag is reset then go to step 3, otherwise go To next step STEP 13: Stop
FLOW CHART
START Load the address of array in SI register Load the count in CL register
Is cf=1
Yes no
Yes A
STOP
PROGRAM: Address 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 841A 841B 841C 841D 841E 841F 8420 8421 8422 8423 label Mnemonics MOV SI,[8500] MOV CL,[SI] DEC CL repeat MOV SI, [8500] MOV CH,[SI] DEC CH repeat cmp INC SI MOV AL,[SI] INC SI CMP AL,[SI] JC ahead XCHG AL,[SI] XCHG AL,[SI-1] ahead DEC CH JNZ repeat cmp DEC CL JNZ repeat HLT opcode BE 00 85 8A 0C FE C9 BE 00 85 8A 2C FE CD 46 8A 04 46 3A 04 72 05 86 04 86 44 FF FE CD 75 F0 FE C9 75 E4 F4 Comments Set the SI regisre as pointer for array Set CL for count Decrement the CL Initialize pointer Set CH for cmp sount Decrement CH Increment the pointer Get the first data Compare with next element in the array If carry is set go to ahead Else exchange the values of AX ,memory
Decrement the count Repeat comparison until CH=0 Decrement CL Repeat the operation until CL=0 Stop
PROGRAM TO SORT AN ARRAY IN DESCENDING ARRAY AIM: To write a program to sort an array of data in descending order ALGORITHM: STEP 1: Set SI register as pointer for array STEP 2: Set CL register as count for N-1 repetitions STEP 3: Initialize array pointer STEP 4: Set CH as count for N-1 comparisons STEP 5: Increment the array pointer STEP 6: compare the next element of the array with AL STEP 7: Check carry flag is always set then got to Step 12 otherwise go to Next step STEP 8: Exchange the content of memory pointed by SI and the content of Previous memory location STEP 9: Decrement the count for comparisons STEP 10: Check zero flag if zero flag is reset then go to step 6 otherwise go To next step STEP 11: Decrement the count for comparisons (CH reg) STEP 12: Check zero flag if zero flag is reset then go to step 3, otherwise go To next step STEP 13: Stop
FLOW CHART
START Load the address of array in SI register Load the count in CL register
Is cf=0
Yes no
Yes A
STOP
PROGRAM:
Address 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 841A 841B 841C 841D 841E 841F 8420 8421 8422 8423
label
opcode BE 00 85 8A 0C FE C9 BE 00 85 8A 2C FE CD 46 8A 04 46 3A 04 72 05 86 04 86 44 FF FE CD 75 F0 FE C9 75 E4 F4
Comments Set the SI regisre as pointer for array Set CL for count Decrement the CL Initialize pointer Set CH for cmp sount Decrement CH Increment the pointer Get the first data Compare with next element in the array If carry is not set go to ahead Else exchange the values of AX ,memory
repeat
repeat cmp
INC SI MOV AL,[SI] INC SI CMP AL,[SI] JNC ahead XCHG AL,[SI] XCHG AL,[SI-1]
Decrement the count Repeat comparison until CH=0 Decrement CL Repeat the operation until CL=0 Stop
SEARCH FOR SMALLEST DATA IN AN ARRRAY AIM: To write an assembly language program to search the smallest data in an array. ALGORITHM: STEP1: Load the starting address of the array in SI register STEP2: Load the address of the result in DI register STEP3: Load the number of bytes in the array in CL register STEP4: Increment the array pointer STEP5: Get the first byte of the array in AL STEP6: Decrement the byte count STEP7: Increment the array pointer STEP8: Get the next byte of the array in BL register STEP9: Compare the AL and BL value of the array STEP10: Check if carry flag is set then go to step 12 else go to step 11 STEP11: Move BL to AL STEP12: Decrement the byte count STEP13: Check if zero flag is set if so go to step 14 else go to step7 STEP14: Store the smallest data in memory pointer DI STEP15: Stop
START Load the address of array in SI register Load the address of result in DI register
Is cf=1
yes no
Move BL to AL
no
Is zf=1
PROGRAM: ADDRESS 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 841A 841B 841C LABEL MNEMONICS MOV SI,[8500] MOV DI,[8600] MOV CL,[SI] INC SI MOV AL,[SI[ DEC CL again INC SI MOV BL,[SI] CMP AL ,BL JC ahead MOV AL,BL ahead DEC CL JNZ again MOV [DI],AL HLT OPCODE COMMENTS BE 00 85 BF 00 86 8A 0C 46 8A 04 FE C9 46 8A 1C 3A C3 72 02 8A C3 FE C9 75 F3 88 05 F4 Set the SI register as pointer for array Set the DI register as pointer for result Set the CL as count Increment SI Set the first value in AL Decrement the count Increment pointer Get the next data in BL Compare AL and BL values If CF is set go to ahead else do next step Move the value of BL to AL Decrement the count If zero flag is not set go to again else go to next step Smallest data is stored in DI End
SEARCH FOR LARGEST DATA IN AN ARRRAY AIM: To write an assembly language program to search the largest data in an array. ALGORITHM: STEP1: Load the starting address of the array in SI register STEP2: Load the address of the result in DI register STEP3: Load the number of bytes in the array in CL register STEP4: Increment the array pointer STEP5: Get the first byte of the array in AL STEP6: Decrement the byte count STEP7: Increment the array pointer STEP8: Get the next byte of the array in BL register STEP9: Compare the AL and BL value of the array STEP10: Check if carry flag is not set then go to step 12 else go to step 11 STEP11: Move BL to AL STEP12: Decrement the byte count STEP13: Check if zero flag is set if so go to step 14 else go to step7 STEP14: Store the smallest data in memory pointer DI STEP15: Stop
START Load the address of array in SI register Load the address of result in DI register
Is cf=1
no yes
Move BL to AL
no
Is zf=1
PROGRAM: ADDRESS LABEL 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 841A 841B 841C MNEMONICS MOV SI,[8500] MOV DI,[8600] MOV CL,[SI] INC SI MOV AL,[SI[ DEC CL again INC SI MOV BL,[SI] CMP AL ,BL JNC ahead MOV AL,BL ahead DEC CL JNZ again MOV [DI],AL HLT OPCODE COMMENTS BE 00 85 BF 00 86 8A 0C 46 8A 04 FE C9 46 8A 1C 3A C3 73 02 8A C3 FE C9 75 F3 88 05 F4 Set the SI register as pointer for array Set the DI register as pointer for result Set the CL as count Increment SI Set the first value in AL Decrement the count Increment pointer Get the next data in BL Compare AL and BL values If CF is not set go to ahead else do next step Move the value of BL to AL Decrement the count If zero flag is not set go to again else go to next step Largest data is stored in DI End
ASCII TO BINARY CONVERSION AIM: To write an assembly language program to convert an array of ASCII character to binary array. ALGORITHM: STEP1: Set the SI as pointer for ASCII array STEP2: Set the DI as pointer for binary array STEP3: Clear the direction flag for auto increment of pointers STEP4: Move the end character 20Hto BL STEP5: Get the byte of ASCII array in AL STEP6: Compare the AL and BL register STEP7: Check the zero flag if it is set go to step 13 else go to next step STEP8: Subtract 30H from AL register STEP9: Compare AL with OAH STEP10: Subtract 07H from AL register STEP11: Store the binary value AL in memory STEP12: Go to step 5 STEP13: Stop
PROGRAM: ADDRESS LABEL 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 MNEMONICS MOV SI,[8500] MOV DI,[8800] CLD MOV BL,20H next LOD SB CMP AL ,BL JE exit SUB AL,30H CMP AL ,0AH JC store store Exit SUB AL,07H STO SB JMP next HLT OPCODE COMMENTS BE 00 85 BF 00 88 FC B3 20 AC 3A C3 74 0B 2C 30 3C 0A 72 02 2C 07 AA EB F0 F4 Set the SI register as pointer for ASCII array Set the DI register as pointer for binary array Clear Df for auto increment of SI& DI Load the end Character in BL req Load abyte ofASCII array in AL req Check for end of string If zero flag is set then go to exit If zero flag is not set then sub30H from AL Check whether AL>OAH If AL>OAH then go to store If AL>-OAH then sub O7H from AL Store the binary value in mem Jump to convert next byte stop
BINARY TO ASCII CONVERTION AIM: To write an assembly language program to convert an array of binary character to ASCII ALGORITHM: STEP 1: Set SI as pointer for binary array STEP 2: Set DI as pointer for ASCII array STEP 3: Clear direction flag for auto increment of pointers STEP 4: Move the end character 20H to BL req STEP 5: Load a byte of binary array in Al req STEP 6: Compare AL & BL STEP 7: Check zero flag, if zero flag is set then go to step 24 otherwise go to next step STEP 8: Save the byte in BH req STEP 9: Logically AND AL with OFH to mask the upper nibble STEP 10: Compare AL with OAH STEP 11: Check carry flag, if carry flag is set then go to step 13 otherwise go Next step STEP 12: Add 07H to Al req STEP 13: Add 30H to AL req STEP 14: Store AL req in memory STEP 15: Move the saved byte in byte in BH req to Al req STEP 16: Logically AND AL req with FOH to mask the lower nibble STEP 17: Rotate the upper nibble in Al req to lower nibble position STEP 18: Compare AL with OAH STEP 19: Check carry flag if carry flag is set then go to stop 21 otherwise go to next step STEP 20: Add O7H to Al req STEP 21: Add 30H to AL req STEP 22: Store AL req in memory STEP 23: Jump to step 5 STEP 24: Stop
PROGRAM: ADDRESS LABEL 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 841A 841B 841C 841D 841E 841F 8420 8421 8422 8423 8424 8425 8426 8427 8428 8429
OPCODE COMMENTS BE 00 85 BF 00 88 FC B3 20 AC 3A C3 74 20 8A F8 2A OF 3C OA 7C O2 04 07 04 30 AA 3A C7 24 FO B1 O4 D2 10 3C OA 7C 02 04 07 04 Set the SI register as pointer for ASCII array Set the DI register as pointer for binary array Clear Df for auto increment of SI& DI Load the end Character in BL req Load a byte of ASCII array in AL data in AL Check for end of string If zero flag is set then go to exit Save the byte in BH req Mask the upper nibble of binasry data Check whether lower nibble is less than OAH then add 30H If lower nibble is greater than OAH then add 37H Store ASCII code of lower nibble in memory Get the data in Al req Mask the lower nibble
next
LOD SB CMP AL ,BL JE exit Mov BH,AL AND AL OFH CMP AL OAH JL skip 1
Skip 1
Add AL O7H Add AL 30H STOSB MOV AL BH AND AL OFOH MOV CL O4H ROL AL CL CMP AL OAH JL skip 2 ADD AL 07H
Skip 2
ADD AL 30H
Rotate upper nibble to lower nibble Check whether lower nibble is less than OAh If upper nibble less than OAh then add 30H If upper nibble >OAH then add 37H Store ASCII code of upper nibble
30 AA EE DB F4
MULTIPLICATION OF TWO 8 BIT DATA USING 8051 AIM: To write an assembly level program to multiply two 8 bit numbers using 8051 ALGORITHM: STEP1: Load the address of data in DPTR STEP2: Move the first data from external memory to a and save in B STEP3: Increment DPTR and move second data from external memory to B STEP4: Perform multiplication to get the product in A and B STEP5: Increment the DPTR and save A in memory STEP6: Increment DPTR and move B to A ,save it in memory STEP7: Stop FLOW CHART START Load the address of the data in DPTR Load the first data in B
Multiply A by B
Increment DPTR and save the low byte Increment the DPTR
STOP
PROGRAM ADDRES S 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 LABEL MNEMONICS MOV DPTR,#8500 MOVX A,@DPTR MOV B,A INC DPTR MOVX A,@DPTR MUL A,B INC DPTR MOVX @DPTR,A INC DPTR MOV A,B MOVX @DPTR,A SJMP HALT OPCOD E 90 85 00 E0 F5 F0 A3 E0 A4 A3 F0 A3 E5 F0 F0 80 FE COMMENTS Load address of first data in DPTR Move the first data in A Save the first data in B Increment the DPTR Load next data in A Get the product in A and B Increment the DPTR Save lower byte to external memory Increment the DPTR Move higher byte to external memory Stop
RESULT: Thus multiplication is done using 8051 is performed and output is verified DIVSION OF TWO 8 BIT DATA USING 8051
AIM: To write an assembly level program to multiply two 8 bit numbers using 8051 ALGORITHM: STEP1: Load the address of data in DPTR STEP2: Move the dividend from external memory to A and save in RO STEP3: Increment DPTR and move divisor from external memory to B STEP4: Perform division to get the product in A and B STEP5: Increment the DPTR and save quotient in memory STEP6: Increment DPTR and move remainder to A ,save it in memory STEP7: Stop FLOW CHART START Load the address of the data in DPTR Load the dividend value in Ro
Divide A by B
STOP
PROGRAM ADDRES S 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 840A 840B 840C 840D 840E 840F 8410 8411 8412 LABEL MNEMONICS MOV DPTR,#8500 MOVX A,@DPTR MOV RO,A INC DPTR MOVX A,@DPTR MOV B,A MOV RO,A DIV A,B INC DPTR MOVX @DPTR,A INC DPTR MOV A,B MOVX @DPTR,A SJMP HALT OPCOD E 90 85 00 E0 F8 A3 E0 F5 F0 E8 84 A3 F0 A3 E5 F0 F0 80 FE COMMENTS Load address of first data in DPTR Move the first data in A Save the first data in B Increment the DPTR Load next data in A Get the product in A and B Increment the DPTR Save lower byte to external memory Increment the DPTR Move higher byte to external memory Stop
RESULT: Thus division is done using 8051 is performed and output is verified
START
Clear RO register
Increment Ro Register
Stop
PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT LIST DW 53H, 15H, 19H, 02H DEST EQU 3000H COUNT EQU 05H DATA ENDS CODE SEGMENT START: MOV AX, DATA MOV DS, AX MOV AX, 15H MOV SI, OFFSET LIST MOV DI, DEST MOV CX, COUNT MOV AX, 00 CLD REP SCASW JZ LOOP MOV AX, 01 LOOP MOV [DI], AX MOV AH, 4CH INT 21H CODE ENDS END START INPUT: LIST: 53H, 15H, 19H, 02H OUTPUT: 3000 01
PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT LIST DW 53H, 15H, 19H, 02H REPLACE EQU 30H COUNT EQU 05H DATA ENDS CODE SEGMENT START: MOV AX, DATA MOV DS, AX MOV AX, 15H MOV SI, OFFSET LIST MOV CX, COUNT MOV AX, 00 CLD REP SCASW JNZ LOOP MOV DI, LABEL LIST MOV [DI], REPLACE LOOP CODE ENDS END START INPUT: LIST: 53H, 15H, 19H, 02H OUTPUT: LIST: 53H, 30H, 19H, 02H MOV AH, 4CH INT 21H
PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT SOURCE EQU 2000H DEST EQU 3000H COUNT EQU 05H DATA ENDS CODE SEGMENT START: MOV AX, DATA MOV DS, AX MOV ES, AX MOV SI, SOURCE MOV DI, DEST MOV CX, COUNT CLD REP MOVSW MOV AH, 4CH INT 21H CODE ENDS END START INPUT: 2000 2001 2002 2003 2004 48 84 67 90 21 OUTPUT: 3000 3001 3002 3003 3004 48 84 67 90 21
PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT LIST DW 53H, 25H, 19H, 02H COUNT EQU 04H DATA ENDS CODE SEGMENT START: MOV AX, DATA MOV DS, AX MOV DX, COUNT-1 LOOP2: AGAIN: MOV CX, DX MOV SI, OFFSET LIST MOV AX, [SI] CMP AX, [SI+2] JC LOOP1 XCHG [SI +2], AX XCHG [SI], AX LOOP1: ADD SI, 02 LOOP AGAIN DEC DX JNZ LOOP2 MOV AH, 4CH INT 21H CODE ENDS END START INPUT: LIST: 53H, 25H, 19H, 02H OUTPUT: LIST: 02H, 19H, 25H, 53H
MODE 0 SIMPLE I/O MODE: This mode provides simple I/O operations for each of the three ports and is suitable for synchronous data transfer. In this mode all the ports can be configured either as input or output port. Let us initialize port A as input port and port B as output port
PROGRAM: ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 4100 START: MVI A, 90 Initialize port A as Input and 4101 Port B as output. 4102 OUT C6 Send Mode Control word 4103 4104 IN C0 Read from Port A 4105 4106 OUT C2 Display the data in port B 4107 4108 STA 4200 Store the data read from Port 4109 A in 4200 410A 410B HLT Stop the program. MODE1 STROBED I/O MODE: In this mode, port A and port B are used as data ports and port C is used as control signals for strobed I/O data transfer. Let us initialize port A as input port in mode1 MAIN PROGRAM: ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 4100 START: MVI A, B4 Initialize port A as Input port in 4101 mode 1. 4102 OUT C6 Send Mode Control word 4103 4104 MVI A,09 Set the PC4 bit for INTE A 4105 4106 OUT C6 Display the data in port B 4107 EI 4108 MVI A,08 Enable RST5.5 4109 410A SIM EI 410B HLT Stop the program. ISR (Interrupt Service Routine) ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 4200 START: IN C0 Read from port A 4201 4202 STA 4500 Store in 4500.
HLT
Sub program: ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 405E JMP 4200 Go to 4200 405F 4060 BSR MODE (Bit Set Reset mode)
Any lines of port c can be set or reset individually without affecting other lines using this mode. Let us set PC0 and PC3 bits using this mode. PROGRAM:
ADDRESS OPCODES LABEL MNEMONICS 4100 START: MVI 4101 4102 OUT 4103 4104 MVI 4105 4106 OUT 4107 4109 HLT
OPERAND COMMENTS A, 01 Set PC0 C6 A,07 C6 Send Mode Control word Set PC3 Send Mode Control word Stop the program.
RESULT: Thus 8255 is interfaced and its characteristics in mode0,mode1 and BSR mode is studied.
APPARATUS REQUIRED: 8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus, CRO.
Mode 0 Interrupt on terminal count: The output will be initially low after mode set operations. After loading the counter, the output will be remaining low while counting and on terminal count; the output will become high, until reloaded again.
Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by changing the jumper J3 and then execute the following program. Program: Address Opcodes 4100 4102 4104 4106 4108 410A 410C Label Mnemonic Operands START: MVI A, 30 OUT CE MVI A, 05 OUT C8 MVI A, 00 OUT C8 HLT Comments Channel 0 in mode 0 Send Mode Control word LSB of count Write count to register MSB of count Write count to register
It is observed in CRO that the output of Channel 0 is initially LOW. After giving six clock pulses, the output goes HIGH. Mode 1 Programmable ONE-SHOT: After loading the counter, the output will remain low following the rising edge of the gate input. The output will go high on the terminal count. It is retriggerable; hence the output will remain low for the full count, after any rising edge of the gate input. Example: The following program initializes channel 0 of 8253 in Mode 1 and also initiates triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to high level after 5 clock pulses. Execute the program, give clock pulses through the debounce logic and verify using CRO. Address Opcodes 4100 4102 4104 4106 4108 410A 410C 4100 Label Mnemonic Operands START: MVI A, 32 OUT CE MVI A, 05 OUT C8 MVI A, 00 OUT C8 OUT D0 HLT Comments Channel 0 in mode 1 Send Mode Control word LSB of count Write count to register MSB of count Write count to register Trigger Gate0
Mode 2 Rate Generator: It is a simple divide by N counter. The output will be low for one period of the input clock. The period from one output pulse to the next equals the number of input counts in the count register. If the count register is reloaded between output pulses the present period will not be affected but the subsequent period will reflect the new value.
Example: Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the CLK1 to PCLK. Address 4100 4102 4104 4106 4108 410A Opcodes 3E 74 D3 CE 3E 0A D3 CA 3E 00 D3 CA Label Mnemonic Operands START: MVI A, 74 OUT CE MVI A, 0A OUT CA MVI A, 00 OUT CA Comments Channel 1 in mode 2 Send Mode Control word LSB of count Write count to register MSB of count Write count to register
410C 76 HLT In CRO observe simultaneously the input clock to channel 1 and the output at Out1. Mode 3 Square wave generator: It is similar to Mode 2 except that the output will remain high until one half of count and go low for the other half for even number count. If the count is odd, the output will be high for (count + 1)/2 counts. This mode is used of generating Baud rate for 8251A (USART).
Example: We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0. Address Opcodes Label Mnemonic Operands Comments 4100 3E 36 START: MVI A, 36 Channel 0 in mode 3 4102 D3 CE OUT CE Send Mode Control word 4104 3E 0A MVI A, 0A LSB of count 4106 D3 C8 OUT C8 Write count to register 4108 3E 00 MVI A, 00 MSB of count 410A D3 C8 OUT C8 Write count to register 410C 76 HLT Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz. This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz. Vary the frequency by varying the count. Here the maximum count is FFFF H. So, the square wave will remain high for 7FFF H counts and remain low for 7FFF H counts. Thus with the input clock frequency of 1.5 MHz, which corresponds to a period of 0.067 microseconds, the resulting square wave has an ON time of 0.02184 microseconds and an OFF time of 0.02184 microseconds. To increase the time period of square wave, set the jumpers such that CLK2 of 8253 is connected to OUT 0. Using the above-mentioned program, output a square wave of frequency 150 KHz at channel 0. Now this is the clock to channel 2. Mode 4: Software Triggered Strobe: The output is high after mode is set and also during counting. On terminal count, the output will go low for one clock period and becomes high again. This mode can be used for interrupt generation. The following program initializes channel 2 of 8253 in mode 4. Example: Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the output OUT 2. Counter 2 will generate a pulse after 1 second. Address Opcodes 4100 4102 Label Mnemonic Operands START: MVI A, 36 OUT CE Comments Channel 0 in mode 0 Send Mode Control word
4104 4106 4108 410A 410C 410E 4110 4112 4114 4116 4118
MVI OUT MVI OUT MVI OUT MVI OUT MVI OUT HLT
A, 0A C8 A, 00 C8 A, B8 CE A, 98 CC A, 3A CC
LSB of count Write count to register MSB of count Write count to register Channel 2 in Mode 4 Send Mode control Word LSB of Count Write Count to register MSB of Count Write Count to register
Mode 5 Hardware triggered strobe: Counter starts counting after rising edge of trigger input and output goes low for one clock period when terminal count is reached. The counter is retriggerable. Example: The program that follows initializes channel 0 in mode 5 and also triggers Gate 0. Connect CLK 0 to debounce circuit. Execute the program. After giving Six clock pulses, you can see using CRO, the initially HIGH output goes LOW. The output ( OUT 0 pin) goes high on the next clock pulse. Address Opcodes 4100 4102 4104 4106 4108 410A 410C Label Mnemonic Operands START: MVI A, 1A OUT CE MVI A, 05 OUT C8 MVI A, 00 OUT D0 HLT Comments Channel 0 in mode 5 Send Mode Control word LSB of count Write count to register MSB of count Trigger Gate 0
Result: Thus the 8253 has been interfaced to 8085 p and six different modes of 8253 have been studied.
THEORY:
A motor in which the rotor is able to assume only discrete stationary angular position is a stepper motor. The rotary motion occurs in a step-wise manner from one equilibrium position to the next. Stepper Motors are used very wisely in position control systems like printers, disk drives, process control machine tools, etc. The basic two-phase stepper motor consists of two pairs of stator poles. Each of the four poles has its own winding. The excitation of any one winding generates a North Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic system has two end faces. It is a permanent magnet with one face as South Pole and the other as North Pole. The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC current to run the motor in clockwise direction. By reversing the phase sequence as A1, B2, A2, B1, anticlockwise stepping can be obtained. 2-PHASE SWITCHING SCHEME: In this scheme, any two adjacent stator windings are energized. The switching scheme is shown in the table given below. This scheme produces more torque.
ANTICLOCKWISE STEP A1 A2 B1 CLOCKWISE STEP A1 A2
B2
DATA
B1
B2
DATA
1 2 3 4
1 0 0 1
0 1 1 0
0 0 1 1
1 1 0 0
9h 5h 6h Ah
1 2 3 4
1 0 0 1
0 1 1 0
1 1 0 0
0 0 1 1
Ah 6h 5h 9h
ADDRESS DECODING LOGIC: The 74138 chip is used for generating the address decoding logic to generate the device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data bus to the stepper motor driving circuitry. Stepper Motor requires logic signals of relatively high power. Therefore, the interface circuitry that generates the driving pulses use silicon darlington pair transistors. The inputs for the interface circuit are TTL pulses generated under software control using the Microcontroller Kit. The TTL levels of pulse sequence from the data bus is translated to high voltage output pulses using a buffer 7407 with open collector.
PROGRAM :
Address
OPCODES
Label
Comments ORG 4100h DPTR, #TABLE Load the start address of switching scheme data TABLE into Data Pointer (DPTR) Load the count in R0 Load the number in TABLE into A Push DPTR value to Stack Load the Motor port address into DPTR Send the value in A to stepper Motor port address Delay loop to cause a specific amount of time delay before next data item is sent to the Motor POP back DPTR value from Stack Increment DPTR to point to next item in the table Decrement R0, if not zero repeat the loop Short jump to Start of the program to make the motor rotate continuously Values as per twophase switching scheme
4100
START :
MOV
4103 4105 4106 4108 410A 410D 410E 4110 4112 4114 4116 4118 411A 411B 411D LOOP:
MOV MOVX PUSH PUSH MOV MOVX MOV MOV DJNZ DJNZ POP POP INC DJNZ SJMP
R0, #04 A, @DPTR DPH DPL DPTR, #0FFC0h @DPTR, A R4, #0FFh R5, #0FFh R5, DELAY1 R4, DELAY DPL DPH DPTR R0, LOOP START
DELAY : DELAY 1:
411F
TABLE :
DB
09 05 06 0Ah
PROCEDURE: Enter the above program starting from location 4100.and execute the same. The stepper motor rotates. Varying the count at R4 and R5 can vary the speed.
Entering the data in the look-up TABLE in the reverse order can vary direction of rotation. RESULT: Thus a stepper motor was interfaced with 8051 and run in forward and reverse directions at various speeds.