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Design of single-phase active power filter using

analogue cascade controller


K.M. Tsang and W.L. Chan

Abstract: A very-low-cost active power filter with power-factor-correction capability for solving
power quality problem is proposed. Model-based cascade controller design is presented for the
control of the shunt active filter. Harmonic reductions and power-factor correction will both be
carried out by the proposed filter. Discussions on the design of the current and voltage control
loops are given. Circuit implementation of the proposed control scheme is presented and
experimental results are included to demonstrate the effectiveness of the proposed design scheme.

1 Introduction long as the dynamics of the inner current loop are much
faster than the outer voltage loop, cascade control can be
Power quality is an increasing problem that affects users on implemented. To achieve a high power factor and low
the power grid and has significant economic consequences current THD, the bandwidth of the current loop has to be
[1]. Active power filters as solutions to power quality sufficiently fast to produce the compensating current. At the
problems have become more and more important nowa- same time, the current loop must have sufficient attenuation
days [2]. The aim of a shunt active filter [3] is to generate to reduce the effect of supply voltage and regulated DC bus
and inject a suitable current into the power system so as to voltage on the inductor current. To be able to carry out
cancel the harmonic content of the distorted load and to cascade control and to provide a steady reference inductor
obtain a unity power factor. Hysteresis controllers are very current, the bandwidth of the voltage loop cannot be too
popular because they are robust and able to achieve very fast. The main difference between the proposed design and
fast dynamic response. However, their steady-state perfor- conventional design is that a feedforward controller is
mance is not good, current errors can be up to twice the added. Also, the filter reference current can be generated in
hysteresis band and the switching frequency is variable [3]. multiplying the voltage loop controller output by the supply
The use of a variable hysteresis band to control switching voltage waveform, whereas harmonics of load current are
frequency is an approach to overcome the problems of the obtained via frequency analysis in the conventional design.
basic control strategy at the expense of increased circuit As no additional hardware and interface are required to
complexity [4]. The dead-beat and predictive current control generate the reference filter current, the design of the control
algorithms [5] offer both fast dynamic response and good circuit is much simpler and the cost of building the
steady-state performance. The dead-beat technique suffers controller is low. Circuit implementation and experimental
from sensitivity to parameter variations owing to the circuit examples are included to demonstrate the simplicity and
model utilised in the design of the controller and to the effectiveness of the proposed design scheme.
absence of integrator action. In [5], a fuzzy logic tuned
dead-beat controller was proposed to overcome parameter 2 Model of active power filter
sensitivity problems. Recently, artificial intelligence con-
trollers [6, 7] have also been proposed for the control of A schematic diagram for a single-phase shunt active filter
active filters. In general, the control of active filters is is shown in Fig. 1 and the state-space averaging model
complex and their costs are high. To be more effective in describing the voltage and current dynamics are given by
solving power quality problem, it is better to install more
filters of smaller rating [8]. Li_F ðtÞ ¼ð2dðtÞ  1Þvc ðtÞ  vs ðtÞ
To facilitate low-cost analogue control, cascade control ð1Þ
C v_ c ðtÞ ¼  iF ðtÞ
of shunt active filter is proposed in this paper. Simple
proportional plus integral controllers can easily be designed
based on the state average model of the shunt active is(t) iL(t)
filter. The overall design is composed of two control loops vs(t) Nonlinear load
with the voltage loop outside the inner current loop. As to be filtered

iF (t)
r The Institution of Engineering and Technology 2006
IEE Proceedings online no. 20050511
L
doi:10.1049/ip-epa:20050511
Paper first received 12th December 2005 and in final revised form 3rd March C vc(t )
2006
The authors are with the Department of Electrical Engineering, The Hong
Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong, People’s
Republic of China
E-mail: steve.tsang@polyu.edu.hk Fig. 1 Single-phase shunt active filter

IEE Proc.-Electr. Power Appl., Vol. 153, No. 5, September 2006 735
where L is the filter inductance, C is the capacitance, iF (t) is content of the reference signal is composed of the supply
the filter inductor current, vc(t) is the DC bus voltage, vs(t) is frequency and its higher harmonics. To track the reference
the supply voltage and d(t) is the duty ratio, respectively. current, the bandwidth of the current control loop has to be
set as high as possible such that the gain and phase
3 Cascade controller design variations of the closed-loop control process up to 20th
harmonics are small. The characteristic equation of the
From (1), the shunt active filter can be decomposed into a current loop is given by
voltage control loop and a current control loop. The aim of
the proposed control is to obtain a supply current in phase DðsÞ ¼ Ls2 þ 2KP2 Uc s þ 2KI2 Uc
with the supply voltage. Two PI controllers are required. If the undamped natural frequency oI of the current loop is
One ensures proper DC bus voltage regulation and the set to 1/m times the switching frequency of the filter such
other shapes the filter current. that
rffiffiffiffiffiffiffiffiffiffiffiffiffiffi
3.1 Current loop control 2pfs 2KI2 Uc
oI ¼ ¼ ; m4 ð6Þ
From (1), if the DC bus voltage is assumed to be well re- m L
gulated at Uc, the current dynamics can be approximated as where fs is the switching frequency of the filter, the required
Li_F ðtÞ ¼ 2Uc dðtÞ  vc ðtÞ  vs ðtÞ ð2Þ KI2 is thus given by

A block diagram representation of the current loop control ð2pÞ2 fs2 L


KI2 ¼ ð7Þ
is shown in Fig. 2 where ir(t) is the reference filter current 2m2 Uc
that will be generated by the difference between the primary The damping ratio of the current loop is governed by
voltage loop PI controller and the load current. To reduce
2KP2 Uc
the effect of the DC bus voltage vc(t) and the supply voltage 2zoI ¼
vs (t) on the filter current iF (t), a feedforward controller L
GF (s) and a proportional plus integral (PI) controller is where z is the damping ratio of the current loop. If the
included within the control loop. The purpose of the current loop is set to be critically damped with damping
feedforward controller GF (s) is to cancel the effect of vc(t) ratio equal to 1,
and vs(t) on the output filter current iF(t) and it takes the 2KP2 Uc 2pfs L
form 2oI ¼ ) KP2 ¼ ð8Þ
L mUc
1 Hence with the current loop PI controller of (4) with
GF ðsÞ ¼ ð3Þ
2Uc settings of (7) and (8), the undamped natural frequency of
The added PI controller tries to compensate for the the current loop will be 1/m times the switching frequency
discrepancies in the control loop and it takes the form and the current loop is critically damped. From (5), if
the bus voltage is well regulated at Uc, the dynamics of the
KP s þ KI2
GPI2 ðsÞ ¼ 2 ð4Þ current loop are independent of the load current and the
s supply voltage.
where KP2 and KI2 are constants. With the added
feedforward and feedback controllers, the output filter 3.1.1 Robustness analysis: For the current con-
current becomes trol loop, the uncertainly arises from the output regulated
2Uc ðKP2 s þ KI2 Þ voltage Uc. If there is a 20% increase in the bus voltage,pffiffiffiffiffiffiffi
IF ðsÞ ¼ Ir ðsÞ ð5Þ from (6) the undamped natural frequency becomes 1:2
Ls2 þ 2KP2 Uc s þ 2KI2 Uc
oI ¼ 1:0954o
pffiffiffiffiffiffiffiI and the damping ratio of the current loop
where IF (s) and Ir(s) are the Laplace transform of the filter becomes 1:2 ¼ 1:0954. When there is a 20% reduction in
current iF (t) and the reference current ir(t), and s is the the bus voltage,
Laplace variable, respectively. From (5), the settings of KP2 pffiffiffiffiffiffiffi from (6) the undamped natural frequency
becomes 0:8oI p ¼ffiffiffiffiffiffi
0:8944o
ffi I and the damping ratio of the
and KI2 play an important role in the shunt active filter as
current loop is 0:8 ¼ 0:8944. Even if there is a 20%
they will affect the rejection of disturbances and the
change in the output regulated voltage, the current loop is
following of the reference current Ir(s). In practice, vc(t) is
still well under control with small changes in the undamped
composed of a well regulated DC component and small
natural frequency and damping ratio. In actual practice, the
ripples and vs(t) is in phase with the reference ir(t).
bus voltage ripples will normally be less than 5% of the
The major concern in the current control loop is to reduce
regulated voltage and the changes in the undamped natural
the effect of disturbances and to try to track the reference
frequency and damping ratio will be much less.
current Ir(s). The feedforward controller and the feedback
controllers reduces the disturbance effects caused by vc(t) 3.2 Primary voltage control loop
and vs(t). The reference current Ir(s) is derived from the From (1), if the filter current iF(t) is taken as the control
supply voltage and the load current, and the frequency input to the shunt filter, the transfer function between the
regulated bus voltage and the filter current can be written as
feedforward controller
vs (t)+vc (t) 1 Vc ðsÞ 1
2Uc vs (t)+vc (t) Gv ðsÞ ¼ ¼ ð9Þ
IF ðsÞ Cs
PI controller The purpose of the voltage control loop is to regulate the
ir(t) + d(t) - 1 iF (t) DC bus voltage and to generate a reference current to
+ GPI2(s) + 2Uc +
- Ls
compensate for the harmonics in the load such that high
power factor and low current THD can be achieved. The
filter current iF (t) can be obtained by taking the difference
between the supply current is(t) and the load current iL(t).
Fig. 2 Current control loop The required supply current is(t) can be obtained by
736 IEE Proc.-Electr. Power Appl., Vol. 153, No. 5, September 2006
introducing a PI controller within the control loop. where Vr(s) is the Laplace transform of the reference
Consider a PI controller of the form voltage vr(t), and IL(s) is the Laplace transform of the
load current iL(t). The constant term Wo and DC
KI1 component of the load current can easily be eliminated
GP I1 ðsÞ ¼ KP1 þ ð10Þ
s by the PI controller. Since Vs(s) is the supply voltage
where KP1 and KI1 are constants, applying to (9) with the and IL(s) is the load current, they will consists of the
required supply current derived from the supplied voltage frequency component of the supply frequency, its higher
harmonics and there may be a DC component. To reduce
Vs(s); the block diagram of the voltage control loop is
shown in Fig. 3a where a is a constant. Assuming that a the effect of the supply voltage and output load current
steady state can be reached and the steady-state output of on the DC bus voltage and to have a smooth steady-state PI
controller output, the bandwidth of the voltage loop has
the PI controller w(t) is Wo, the block diagram of the
voltage loop at the steady state can be approximate by to be very much less than the supply frequency such that
Fig. 3b. The output bus voltage can be approximated as the fundamental frequency and its higher harmonics of the
current reference are substantially attenuated by the voltage
 
Gv ðsÞ Wo control loop. If the steady-state PI controller output is
Vc ðsÞ ¼ aWo Vs ðsÞ  þ IL ðsÞ smooth, the generated supply current reference will have
1  GP I1 ðsÞGv ðsÞ s
small THD. If the bandwidth of the voltage loop is
GP I1 ðsÞGv ðsÞ too high, the disturbances will be reflected on the bus
 Vr ðsÞ
1  GPI1 ðsÞGv ðsÞ voltage and as a result on the generated supply current
  reference. The supply current reference will be corrupted by
s Wo
¼ 2 aWo Vi ðsÞ  þ IL ðsÞ higher harmonics. The voltage loop characteristic equation
Cs þ KP1 s þ KI1 s
is given by
KP1 s þ KI1
þ 2 Vr ðsÞ ð11Þ
Cs þ KP1 s þ KI1 DðsÞ ¼ Cs2 þ KP1 s þ KI1 ð12Þ

Fig. 3 Blocks diagrams of voltage control loop and full block diagram
a Voltage control loop
b Steady-state approximation of voltage control loop
c Full block diagram for control of shunt active filter

IEE Proc.-Electr. Power Appl., Vol. 153, No. 5, September 2006 737
with undamped natural frequency The bus DC voltage was set to Uc ¼ 200 V. Note that the
rffiffiffiffiffiffi setting of Uc had to be larger than the peak supply voltage
K I1 vs(t), and a was set to 0.01 such that the peak value of
on ¼ ð13Þ
C avi (t) was about 1.56 V. The setting of a was to make sure
and the damping ratio z governed by that the multiplier output would not be easily saturated.
KP The switching frequency was set to fs ¼ 40 kHz and the
2zon ¼ 1 undamped natural frequency of the current loop was set to
C 1/5 of the switching frequency with m ¼ 5. From (7),
or
ð2pfs Þ2 L ð2pÞ2  400002  500  106
K P1 KI2 ¼ ¼ ¼ 3158:3
z¼ ð14Þ 2m2 Uc 2  52  200
2on C
If the damping ratio of the current loop is set to 1, from (8)
Clearly the undamped natural frequency on is independent
of the load current. If the bandwidth of the voltage loop is 2pfs L 2p  40000  500  106
K P2 ¼ ¼ ¼ 0:1257
set to 1/n times the supply frequency fv, the integral gain KI1 mUc 5  200
becomes and the current loop PI controller of (4) becomes
ð2pÞ2 fv2 C 3158:3
KI1 ¼ ð15Þ GPI2 ðsÞ ¼ 0:1257 þ
n2 s
If the damping ratio of the voltage loop is set to one, the The gain variation and phase shift up to 1 kHz between the
proportional gain KP1 becomes reference filter current and the filter current under ideal
4pfv C conditions are negligible which means that the inductor
K P1 ¼ ð16Þ current can follow the reference filter current very well up to
n
1 kHz. For the voltage control loop, the bandwidth was set
For the voltage control loop, the characteristic is indepen- to 1/10 of the supply frequency fv and the proportional gain
dent of loading conditions. Hence the control design with and integral gain from (15) and (16) are given by
(10), (15) and (16) will produce a well controlled voltage
loop under different loading conditions. A full block 4pfv C 4p  50  470  106
KP1 ¼ ¼ ¼ 0:0295
diagram of the proposed control scheme is shown in Fig. 3c. n 10
and
4 Circuit implementation
ð2pfv Þ2 C ð2p  50Þ2  470  106
K I1 ¼ ¼ ¼ 0:4638
For proper operation of the inverter, it is necessary to n2 102
maintain a DC bus voltage greater than the peak of the line The voltage loop PI controller of (10) becomes
voltage [9]. The AC side inductor must be large enough to
0:4638
prevent excessive ripple in the filter current, while small GPI1 ¼ 0:0295 þ
enough to allow the rate of change required for current s
tracking. The value is dependent on the nonlinear load From the transfer function between the reference voltage
characteristics, and is typically less than 1 mH [9]. To and output bus voltage in the ideal case, frequency
demonstrate the simple design and effectiveness of the components of 50 Hz and above will have at least 14 dB
proposed controller, an experimental shunt active filter was attenuation. Hence frequency components of 50 Hz or
built with L ¼ 500 mH, C ¼ 470 mF, nominal supply voltage above will be attenuated by the control loop and the output
was 110 V RMS and the supply frequency was fv ¼ 50 Hz. response of the voltage loop PI controller will be very steady

Fig. 4 Circuit diagram of shunt active filter controller


1 Filter current sensing resistor
2 Load current sensing resistor
3 Voltage loop PI controller
4 Analogue multiplier
5 Current loop PI controller
6 Feedforward controller
7 Summing junction

738 IEE Proc.-Electr. Power Appl., Vol. 153, No. 5, September 2006
with little influence from the supply voltage and load analyser. The RMS load current was 1.21 A. There were
current. The steady output of the voltage loop PI controller clearly a lot of 3rd, 5th, 7th etc. high-order harmonics and
warrants a good generation of the reference supply current. the current THD was 80.4%. The power factor of the
The hardware implementation of the proposed shunt active circuit was 0.76. When the active filter was introduced, there
filter controller is shown in Fig. 4. was clearly a significant improvement in the power factor
and the current THD. Figure 6 shows the effects when the
proposed active filter was added. The RMS supply current
5 Experimental results became 1.26 A. The high order harmonics had clearly been
reduced and the current THD was 6.4%. The power factor
To demonstrate the performance of the filter under different
of the overall system was 0.99. Figure 7 shows the condition
working conditions, different supply voltages and loading
of the active filter with channel 1 indicating the filter current
conditions were tested.
and channel 2 indicating the AC coupled DC bus voltage.
A common nonlinear load was AC to DC conversion
The DC bus voltage was well regulated with about 9 V
using a full-bridge rectifying circuit. The nominal supply
peak-to-peak variation.
voltage was 110 V RMS and the voltage THD was around To further demonstrate the robustness of the active filter,
3%. Figure 5 shows the load current waveform, the load
the supply voltage was reduced to 80 V RMS. Figure 8
current spectrum, the load current THD and the power
shows the load current waveform, the load current
factor obtained from the Fluke 41B power harmonics spectrum, the load current THD and the power factor
obtained from the Fluke 41B power harmonics analyser.
The RMS load current was 1.54 A. There were clearly a lot
of 3rd, 5th, 7th etc. high order harmonics and the current
THD was 69.1%. The power factor of the circuit was 0.78.

Fig. 5 Nonlinear load


a Supply current waveform
b Supply current spectrum
c THD of supply current Fig. 7 Condition of active filter
d Power factor obtained from Fluke 41B power harmonics analyser Channel 1: filter current
Channel 2: AC-coupled DC bus voltage

Fig. 6 Performance of active filter Fig. 8 Nonlinear load with 80 V RMS supply
a Supply current waveform a Supply current waveform
b Supply current spectrum b Supply current spectrum
c THD of supply current c THD of supply current
d Power factor obtained from Fluke 41B power harmonics analyser d Power factor obtained from Fluke 41B power harmonics analyser

IEE Proc.-Electr. Power Appl., Vol. 153, No. 5, September 2006 739
4

load current (A)


1

-1

-2

-3

-4
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
time (sec)
a

3
Fig. 9 Performance of active filter

supply current (A)


2
a Supply current waveform
b Supply current spectrum 1
c THD of supply current
d Power factor obtained from Fluke 41B power harmonics analyser 0

-1

-2

-3

-4
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
time (sec)
b

2
supply current (A)

-1
Fig. 10 Condition of active filter
Channel 1: filter current -2
Channel 2: AC-coupled DC bus voltage
-3
1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7
time (sec)
When the active filter was introduced, there was clearly a
c
significant improvement in the power factor and the current
THD. Figure 9 shows the effects when the proposed active Fig. 11 Performance of active filter for changing load
filter was added. The high order harmonics had clearly been a Load current
reduced and the current THD was 3.7%. The power factor b Supply current
of the overall system was 1.00. Figure 10 shows the c Closer investigation of supply current
condition of the active filter with channel 1 indicating the
filter current and channel 2 indicating the AC-coupled DC
bus voltage. The DC bus voltage was well regulated with supply current was caused by the slow response of the
about 8 V peak-to-peak variation. voltage control loop.
To demonstrate the dynamic response of the active All experimental results demonstrated that the DC bus
filter, the rectified load demand was changed from 0.39 voltage was well regulated and the effectiveness of the
to 1.55 A. Figure 11 shows the load current demand proposed active filter in harmonic reduction and power
and supply current during the transition. It took around factor correction. The active filter was also robust to load
2 s for the supply current to settle down. Figure 11c shows and supply variations.
a closer look at the supply current during the transition.
Even though the settling time took around 2 s, the 6 Conclusions
supply current was still very sinusoidal during the
transition because the bandwidth of the current loop A new PFC shunt active filter has been successfully
controller was very much quicker than the voltage implemented. The controller settings can easily be obtained
loop. The slow settling time of the amplitude of the from the state average model and filter settings. The
740 IEE Proc.-Electr. Power Appl., Vol. 153, No. 5, September 2006
proposed cascade controller provides a simple solution to 3 Dell’Aquila, A., Lecci, A., and Liserre, M.: ‘A comparison between two
power factor correction and reduction of harmonics loads. predictive controllers for single-phase active filter’. Proc. IECON,
Nov. 2003, Vol. 3, pp. 2294–2299
The mathematical burden of resolving the load current to 4 Pan, C.T., Huang, Y.S., and Jong, T.L.: ‘A constantly sampled current
fundamental and harmonics is not required. The controller controller with switch status dependent inner bound’, IEEE Trans. Ind.
has been shown to be robust against load and supply Electron., 2003, 50, (3), pp. 528–535
5 Dell’Aquila, A., Lecci, A., and Liserre, M.: ‘Microcontroller-based
changes. fuzzy logic active filter for selective harmonic compensation’. Proc. IAS,
Oct. 2003, Vol. 1, pp. 285–292
7 Acknowledgment 6 Shatshat, R.E., Salama, M.M.A., and Kazerani, M.: ‘Artificial
intelligent controller for current source converter-based modular
active power filters’, IEEE Trans. Power Deliv., 2004, 19, (3),
The authors gratefully acknowledge the support of the pp. 1314–1320
Hong Kong Polytechnic University. 7 Nishida, K., Rukonuzzman, M., and Nakaoka, M.: ‘Advanced current
control implementation with robust deadbeat algorithm for shunt
single-phase voltage-source type active power filter’, IEE Proc., Electr.
8 References Power Appl., 2004, 151, (3), pp. 283–288
8 Tsang, K.M., Chan, W.L.: ‘Single phase active power filter using
1 McGranaghan, M., and Roettger, B.: ‘Economic evaluation of power analogue cascade controller’, China patent pending number
quality’, IEEE Power Eng. Rev., 2002, 22, (2), pp. 8–12 200510082286.3, July 2005
2 Singh, B., Al-Haddad, K., and Chandra, A.: ‘A review of active power 9 Yunus, H.I., and Bass, R.M.: ‘Comparison of VSI and CSI topologies
filters for power quality improvement’, IEEE Trans. Ind. Electron., for single-phase active power filters’. Proc. PESC, June 1996, Vol. 2,
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