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# Russ. J. Numer. Anal. Math. Modelling, Vol. 25, No. 3, pp. 253259 (2010) DOI 10.1515/ RJNAMM.2010.

## An estimation of voltage settling time for RC-circuits

Yu. M. NECHEPURENKO and G. V. OVCHINNIKOV
Abstract We propose and justify an upper bound for voltage settling time in RC-circuits based on a new upper bound for the solution norm of Hermitian ODAE systems. An algorithm for efcient calculation of this upper bound is proposed. Results of numerical experiments are presented and discussed.

1. Introduction
Electromagnetic analysis allows one to reduce the study of the effect of nonideal connections on the transmission of a signal in super-large-scale integration circuits to analysis of various electric circuits, in particular, circuits consisting of resistors and capacitors (RC-circuits) . An RC-circuit is a set of port (input) nodes, a set of internal nodes, and a bus which is the relative base for voltage measurement at the nodes. The nodes are connected with each other and with the bus by edges, each of which is either a resistor, or a capacitor. An example of the circuit described above is presented in Fig. 1, where 0 denotes the port node and 1, . . . , n denote internal nodes. In these problems, the voltage vector u p (t) at the ports is assumed to be known and the voltage vector uin (t) at the internal nodes is to be determined. Let uin (0) = 0, u p (0) = 0, and at the time moment t = 0 the voltage starts changing continuously at the ports having piecewise-linear continuous and bounded derivatives; and for some > 0 they are set: u p (t) u p ( ) for t . Then there exists the nite limit
t

## (1.1) 0 for which the (1.2)

For given u p (t) and > 0 we dene T (u p ) as the least T following inequality holds: uin (t) uin ()
2

+ T.

Institute of Numerical Mathematics, Russian Academy of Sciences, Moscow 119333, Russia Moscow Institute of Physics and Technology, Dolgoprudny 141700, Russia
The work was supported by the Russian Foundation for Basic Research (10-01-00513) and by the program Modern Problems of Theoretical Mathematics, project Optimization of computational algorithms for solution of problems of mathematical physics.

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## Yu. M. Nechepurenko and G. V. Ovchinnikov

Hereafter we call this value the voltage settling time at the internal nodes with the accuracy . This paper is devoted to the upper estimate for the value T (u p ). Section 2 presents the mathematical statement of this problem. We show that it is reduced to the estimation of the norm of the solution to a Hermitian system of ordinary differential and algebraic equations. The desired estimate of the value T (u p ) is derived in Section 3. Section 4 describes its possible numerical implementation and gives the calculation results for the circuit presented in Fig. 1.

## 2. Mathematical statement of the problem

The simulation of RC-circuits based on the Ohm and Kirchhoff laws is reduced to the solution of the initial value problems for linear systems of ordinary differential and algebraic equations of the following form: Cuin +C p u p + Guin + G p u p = 0 (2.1)

where the dot denotes the time derivative; u p (t) R p and uin (t) Rn are the voltage vectors at the ports and internal nodes, respectively; C, C p and G, G p are the matrices of the capacities and values inverse to resistors. In this case, C p and G p are rectangular n p matrices, and C and G are square symmetric matrices of the order n having nonnegative diagonal elements and possessing the non-strict diagonal dominance . According to the Gershgorin circle theorem , this guarantees the nonnegative deniteness of both matrices. Further we assume that one can reach each internal node from each port node just by moving along the resistor edges. Then the matrix G will be positive denite . By S and R we denote n p-matrices satisfying the equations GR + G p = 0 and CS +C p = 0 (2.3) respectively. Note that these equations always have solutions. Indeed, the kth column of the matrix R is the voltage vector at the internal nodes of the circuit obtained from the original one by removing all the capacitors, provided that the unit voltage is set at its kth port node and zero voltage is set at all other port nodes. Similarly, the kth column of the matrix S is the vector of the voltage derivatives uin at the internal nodes for the circuit obtained from the original one by removing all the resistors, provided that the vector u p has the unit kth component and zero other components. Using equalities (2.2) and (2.3), we can represent the function uin (t) satisfying (2.1) in the following form: uin (t) = Ru p (t) + y(t) (2.4) (2.2)

An estimation of voltage

255

## where y satises the equation Cy + Gy = C(S R)u p . (2.5)

The reverse assertion is also valid: relations (2.4), (2.5) and equalities (2.2), (2.3) imply (2.1). For the case considered here with u p (0) = 0, uin (0) = 0 we get the following initial value problem for y: y(0) = 0, Cy + Gy = C(S R)u p . (2.6)

It follows from  that the solution to initial value problem (2.6) exists, is unique, and is represented in the form
t

y(t) =
0

e(st)C

+G

## P(S R)u p (s)ds.

(2.7)

1 ( C + G)1 d 2 i where is a sufciently smooth, simple, positively oriented closed contour enveloping all nite eigenvalues of the pencil C +G; P is the right spectral projection onto the reducing subspace corresponding to the set of nite eigenvalues of this pencil , i.e., 1 P= ( C + G)1Cd . 2 i Note that the matrix C+ satises the following equalities: C+ = C+C = P, CC+ = P , CC+C = C, C+CC+ = C+

Here

i.e., it is a certain generalization of the traditional MoorePenrose pseudoinverse matrix  for the matrix C and coincides with it in the case P = P . Applying (2.4) to (1.2), we get that the internal node voltage setting time T (u p ) with the accuracy is the least T > 0 such that y(t) y()
2

+ T.

(2.8)

## 3. Derivation of the estimate

The following theorem is valid. Theorem 3.1. If we can reach each internal node in the RC-circuit considered here from each port node by moving only along the resistor edges and the input signal possesses the properties described in the Introduction, then uin () = Ru p ( ) (3.1)

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## Yu. M. Nechepurenko and G. V. Ovchinnikov

and T (u p ) where

c 1 max 0, ln

= 1/max (CG1 )

c=

C+

2 0

## e(s ) (S R)u p (s) 2 ds

and max () denotes the maximal eigenvalue and is the voltage settling time for the port nodes. Proof. The following estimate was proposed and justied in : etC
+G

C+ 2 et ,

(3.5)

where is dened in (3.3). Applying (3.5) to (2.7), we get the following estimate:
t

y(t)

C+

2 0

## Taking into account that u p (t) = 0 for t > , we have y(t)

2

c e(t ) ,

(3.6)

where c is dened in (3.4). First, relation (3.6) implies y() = 0, which together with (2.4) proves equality (3.1), and, second, this implies the validity of inequality (2.8) for T satisfying the inequality c eT

This immediately implies estimate (3.2). With some roughness, this estimate can be simplied and transformed to a form which is more explicit and convenient for computations. Corollary 3.1. Under the conditions of Theorem 3.1 we have T (u p ) where Test =

(u p ) 1 max 0, ln
2

(3.7)

C+

SR

(3.8) (3.9)

(u p ) =
0

e(s ) u p (s) 2 ds
0

u p (s) 2 ds.

An estimation of voltage

257

5

0 0

50

100

150

200

250

300

350

400

450

## (solid line) and its upper estimate (dashed line).

Note that estimate (3.7) contains the value 1/ having the dimensionality of time and also the two dimensionless values and (u p )/ , the rst one depends on the considered RC-circuit only and the second one depends on , u p , and the required accuracy . This allows us to obtain upper estimates for the setting time for the given class of input signals based on (3.7).

4. Implementation
For numerical implementation of estimate (3.7) we rst calculate the modied Cholessky factorization for the given matrices of system (2.1):
T G = PG LG LT PG , G T T C = PC LC LC PC .

(4.1)

Here P are permutation matrices of order n, while LG and LC are lower triangular matrices of dimensions n n and n (n rankC), respectively. Since, in contrast to the matrix G, the matrix C is, generally speaking, semidenite, for this matrix we use the so-called LDLT factorization . The matrix PC is chosen so that the last m rows of the matrix LC are zero, where m is the number of zero rows (columns) of the matrix C. The matrix PG and the remaining freedom of the choice of the matrix PC are used to decrease the number of nonzero entries in the matrices LG and LC , respectively . Further, we calculate the matrices R and S by solving systems (2.2) and (2.3) based on obtained factorization (4.1) and thus get S R 2 . In this case, since m

258
5 4 3 2 1 0 0

50

100

150

200
2

250

300

350

400

450

## Figure 3. Values u p (t) (dotted line), y(t)

T 800 600 400 200 0 0

0.5

1.5

2.5

## Figure 4. Values T (u p ) (solid line) and Test (dashed line).

columns of the matrix C are zero, the corresponding m rows of the matrix S may be chosen arbitrarily. In order to reduce S R 2 , we take them equal to the corresponding rows of the matrix R. Using some iterative algorithm for the calculation of singular values (Lanczos method, simultaneous iterations, conjugate gradient method), we calculate
T max (CG1 ) = L1 PG PC LC 2 , 2 G

LC

2 2

as the squares of the maximal singular values of the corresponding matrices. For the calculation of the norm of the matrix C+ , we use its approximation of the form
+ C = (C + G)1C(C + G)1 < C+ ,

> 0.

+ As was shown in , C C+ for 0 and hence for a sufciently small we have C+ 2 (C + G)1 PC LC 2 . 2

Note that the algorithm mentioned above does not require explicit forming of the matrices, which allows us to take into account their sparse structure in the computation of the maximal singular values .

An estimation of voltage

259

Finally, we calculate the values and by formulas (3.3) and (3.8). After that, the voltage settling time estimation at internal nodes with the given accuracy for different input signals requires only the storage of the values and . For each input signal u p we have to choose and calculate (u p ) according to (3.9) and then calculate Test according to (3.7). Consider the circuit presented in Fig. 1 as an example. Let the resistor values be measured in kilohms, the capacitors be measured in picofarads, the time be measured in nanoseconds, and all resistor and capacitor values be equal to one. The matrices of corresponding system (2.1) are the following: C is diagonal with the zero last diagonal element and other diagonal elements equal to 1, G is three-diagonal of the form [1, 2, 1], G p is a one-column matrix with the rst element equal to 1 and zero other elements, and C p is the one-column zero matrix. Let n = 50. Then for this system we have 4.06, 1/ 264. The input voltage u p (t), as well as y(t) 2 and its upper estimate are presented in Fig. 2 ( = 100) and in Fig. 3 ( = 1). In the rst case (u p ) 0.832, in the second case it is 0.998 (for the considered linear input voltage (u p ) 1 for 0 + 0). The comparison of these gures shows that the sharpness of the estimate of y(t) 2 weakly depends on . The dependences of T (u p ) and Test on for = 100 are presented in Fig. 4. This gure shows that the sharpness of the estimate is high in a wide range of values of . For example, for = 0.1 and 1 we have T (u p )/Test 0.933 and 0.807, respectively. Note that similar calculations performed by us for industrial circuits gave, as a rule, the value Test not exceeding 2T (u p ) in the case of monotone input voltage. A large value of C 2 C+ 2 resulted in the major contribution into the estimation worsening.

References
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