Bachelor of Technology
In
Electrical and Electronics Engineering
By
(04481A0245) (04481A0210)
(04481A0207) (04481A0249)
Smt.CH.SUJATHA, M.TECH
ASSOCIATE PROFESSOR
1
A NOVEL CONCEPT OF SINE PULSE
MODULATION USING WAVE FORM
GENERATORS
A Project Report
Submitted to the Faculty of Engineering of
Bachelor of Technology
In
Electrical and Electronics Engineering
By
(04481A0245) (04481A0210)
(04481A0207) (04481A0249)
Smt.CH.SUJATHA, M.TECH
ASSOCIATE PROFESSOR
2
2008
CERTIFICATE
[Smt.CH.SUJATHA] [Prof.P.V.R.L.NARASIMHAM]
3
ACKNOWLEDGEMENT
We specially thank all our Lab technicians for their advise in solving
practical problems that we encountered during the successful completing
our project. We convey our sincere thanks to our Librarian who offered best
support at all times for providing books and internet facilities for our
reference.
We also thank our friends for their constructive criticism, which made us
to work more hard to produce better reports.
Finally, we owe our thanks to our parents whose sacrifices in all respects
made us to reach our goal.
PROJECT
ASSOCIATES
4
CONTENTS
LIST OF FIGURES
LIST OF SYMBOLS
LIST OF ABBREVATIONS page
No
INTRODUCTION
5
5. STAGE-5
6. STAGE-6
6
1. CIRCUIT OF INVERTER
2. OUTPUT OF INVERTER CIRCUIT
5.4 ADDITIONAL WORK
• INTRODUCTION TO MATLAB
• PROGRAM OF SPWM
• OUT PUT WAVE FORM
CHAPTER-6 CONCLUSION & FUTURE SCOPE
LIST OF REFFERENCES
APPENDIX
LIST OF FIGURES
1.1. FIG SHOWING LINEAR MODULATION
1.2. FIG SHOWING AMPLITUDE MODULATION
1.3. FIG SHOWING MULTIPLE PULSE WIDTH MODULATAION
1.4. FIG SHOWING SINUSOIDAL PULSE WIDTH MODULATION
1.5. FIG SHOWING UNIPOLAR OPERATION
1.6. FIG SHOWING OUT PUT PULSES OF UNIPOLAR MODULATION
1.7. FIG SHOWING BIPOLAR OPERATION
1.8. FIG SHOWING OUT PUT PULSES OF BIPOLAR MODULATION
1.9. FIG SHOWING INVERTER OPERATION
2.1. FIG SHOWING BLOCK DIAGRAM
2.2. FIG SHOWING SINE PWM CIRCUIT
2.3. FIG SHOWING GENERATION OF SINE WAVE
2.4. FIG SHOWING THE WAVE FORM AT PIN-2
2.5. FIG SHOWING TO CONVERT SINE WAVE FORM TO SQUARE WAVE FORM
2.6. FIG SHOWING GENERATION OF PULSES
2.7. FIG SHOWING PULSES WAVE FORM
7
2.8. FIG FOR GENERATION OF TRIANGULAR WAVE
2.9. FIG FOR GENERATION OF TRIANGULAR WAVE AT PIN-3.
2.10. FIG FOR GENERATION OF PULSES
2.11. FIG SHOWING THE OUTPUT PULSES AT PIN-1 OF OA-4
2.12. FIG SHOWING THE PULSES OF INVERTER
2.13. FIG TO SHOW PULSES AT G12.
3.1 FIG SHOWING LF351 OPAMP
3.2 FIG SHOWING INTERNAL BLOCK DIAGRAM
3.3 FIG SHOWING DIP TOP VIEW OF LF351
3.4 FIG SHOWING NAND GATE
3.5 FIG SHOWING NAND DIP
3.6 FIG SHOWING DIP AND NOT GATE DIAGRAM
3.7 FIG SHOWING JFET REALISATION
3.8 FIG SHOWING PINDIAGRAM OF ICL8038
3.9 FIG SHOWING FUNCTION DIAGRAM OF ICL-8038.
3.10 FIG SHOWING PINDIAGRAM OF 74LS121.
3.11 FIG FUNCTION TABLE OF 74LS121
4.1 FIG SHOWING INPUT TO ICL-8038
4.2 FIG SHOWING HARD WARE SINWAVE KIT
4.3 FIG SHOWING HARDWARE OUTPUT AT POINT A
4.4 FIG SHOWING TRIANGULAR HARDWARE KIT
4.5 FIG SHOWING HARD WARE OUTPUT AT POINT B
4.6 FIG SHOWING HARDWARE KIT FOR GENERATION ON PULSES
4.7 FIGURE SHOWING OUTPUT PULSES GENERATED AT C
4.8 FIGURE SHOWING OUTPUT PULSES AT GATE 12 IN KIT
4.9 FIGURE SHOWING PULSES AT GATE12
4.10 FIGURE SHOWING OUTPUT PULSES AT G34 IN KIT
4.11 FIGURE SHOWING OUTPUT PULSES AT G34
5.1 FIGURE SHOWING GENERATION OF PULSES IN CASPOC
5.2 FIGURE SHOWING PULSES FOR G1 BY CASPOC
8
5.3 FIGURE SHOWING OUTPUT PULSES FOR GATE G2 IN CASPOC
5.4 FIGURE SHOWING INVERTER CKT IN CASPOC
5.5 FIGURE SHOWING OUTPUT WAVE FORM OF INVETER IN CASPOC
LIST OF SYMBOLS
L: INDUCTOR
C: CAPACITOR
V: SOURCE VOLTAGE
Q1, Q2, Q3, Q4 ARE SWITCHES.
LIST OF ABBREVATIONS:
PWM: PULSE WIDTH MODULATION
OP-AMP: OPERATIONAL AMPLIFIER
J-FET: JUNCTION FIELD EFFECT TRANSISTOR
SPWM: SINUSOIDAL PULSE WIDTH MODULATION.
9
ABSTRACT
In an inverter circuit, dc power is converted to ac power. The output frequency
of static inverter is determined by the rate at which semiconductor devices are switched
ON and OFF by inverter control circuitry consequently, an adjustable frequency ac
output can be readily provided. However, the basic switching action of inverter normally
results in non-sinusoidal output voltage and current waveforms that may adversely affect
motor load performance. The filtering of harmonics is not feasible when output frequency
varies over wide range; hence generation of ac waveform with low harmonic content is
important. When inverter feeds an ac motor the output voltage must be varied in
conjunction with frequency to maintain proper magnetic conditions.
Output voltage control is therefore an essential feature of adjustable
frequency system, and various techniques for achieving voltage control within inverter
are considered in this paper. The various PWM strategies which are commonly used in
inverters are multiple pulse width modulation, sinusoidal pulse width modulation, delta
modulation, trapezoidal modulation etc. The simulation results for each PWM strategy
are presented in this paper. The harmonic analysis of each PWM strategies carried out
by varying modulation index.
10
INTRODUCTION
The output voltage wave shapes produced by the PWM inverters determined
by the choice of carrier and modulating signals and their frequency ratio. The choice of
particular modulation strategy becomes more important as it affects the harmonic
generated and thereby the system efficiency. In many industrial applications it is often
11
required to control the output voltage of inverters to cope with the variations in dc input
voltage, for voltage regulation of inverters, and for constant v/f control requirements.
There are various technique to vary the inverter gain. The most efficient method for
controlling the gain is to incorporate pulse width modulation control within the inverters.
The following PWM strategies for voltage control and/or selective reduction of
harmonics in inverters are considered.
The project presents a novel circuit for generating the Sine PWM control
signals for a single phase inverter. Waveform generating IC’s are used to generate the
synchronized sine and triangular waveforms with a high accuracy and wide range of
frequencies. Experimental waveforms and frequency spectra of inverter output voltage
are presented
12
Chapter-1
1.1) Modulation:
13
1.1 Fig showing linear modulation.
14
1.2 FIG SHOWING AMPLITUDE MODULATION.
There are various techniques to vary the inverter gain. The most efficient method of
controlling the gain is to incorporate PWM control within the inverters. The commonly
used PWM techniques are
15
• Multi Pulse modulation
• Sinusoidal Pulse modulation
• Phase displacement control
In single pulse width modulation control there is only one pulse per half
cycle and the width of the pulse is varied to control the inverter output voltage. The figure
gives how the gating signals and output voltage of single-phase full-bridge inverters.
Here the gating signals are generated by comparing a rectangular reference signal of
amplitude Ar with a triangular carrier wave of amplitude Ac. The frequency of the
reference signal determines the fundamental frequency of the output voltage. The ratio of
Ar to Ac is called the modulating index.
M=Ar/Ac.
The rms output voltage can be given by the formula VRMS= Vs√ (δ/π).
By varying Ar from 0 to Ac, the pulse width δ can be modified from 0 deg to 180 deg and
the rms output voltage VO, from 0 to Vs.
ADVANTAGES:-
a. Due to the symmetry of the output voltage along the x-axis, the even
harmonics are absent.
DISADVANTAGE:-
a. The third harmonic is dominant and is high which will distort the output .
16
1.4) MULTI PULSE WIDTH MODULATION:-
p = fc / 2 f0 = mf / 2
The variation of modulation index (MI) from 0 to 1 varies the pulse width from 0
to π / p and output voltage varies between 0 to Vs. The output voltage for single phase
inverter is shown in Figure.
17
1.3 Fig showing MULTIPLE PULSE WIDTH MODULATAION.
If δ is the width of each pulse, the rms output voltage can be obtained from the following
equation.
VO= Vs√ (pδ/π).
ADVANTAGES:-
• The higher order harmonics produce negligible ripple or can easily be filtered
out.
DISADVANTAGES:-
• Due to larger number of switching on and off processes of power transistors, the
switching losses would increase.
• With large values of P, the amplitudes of LOH would be lower, but the
amplitude of that harmonics would increases.
In sinusoidal PWM, Instead of maintaining the width of all the pulses same as in
case of multiple pulse modulation, the width of each pulse is varied in proportion to the
amplitude of a sine wave which is evaluated at the same pulse. The gating signals are
generated by comparing sinusoidal reference signal with a triangular carrier wave of
frequency fc. This is generally used in industrial applications. The frequency of reference
wave is fr determine the inverter output frequency fo, and its peak amplitude Ar controls
the modulation index M, and then in turn the rms output voltage Vo. The no. of pulses per
18
half-cycle depends on the carrier frequency. The output voltage can be varied by varying
the modulation index M.
Ar controls the modulation index (MI) and the output voltage Vo. It can be observed that
the area of each pulse corresponds to the area under sine wave between the adjacent
midpoints of OFF periods on the gating signals. If δm is the width of mth pulse the rms
output voltage can be obtained as
P
V0 = Vs Σ √ [δm⁄ π]
m=1
There are again two types of sinusoidal pulse modulation are observed
• Unipolar sinusoidal pulse width modulation
• Bipolar sinusoidal pulse width modulation.
19
1.5.1) UNIPOLAR PULSE WIDTH MODULATION:
20
1.5.2) BIPOLAR PULSE WIDTH MODULATION:-
21
ADVANTAGES:-
Fn=(jmf±k)fc.
1) By varying the input dc voltage and maintaining the gain of the inverter
constant.
2) If the dc input voltage is fixed and it is not controllable a variable output
voltage can be obtained by varying the gain of the inverter, which is generally
accomplished by pulse width modulation.
Here the gain can be identified as the ratio of AC output voltage to DC input
voltage.
1) Single-Phase inverters
2) Three-Phase inverters
So, these inverters employs PWM control signal for producing an ac output voltage.
22
1.7) PRINCIPLE OF OPERATION:-
Vo= Vs/2
The logic circuit is designed in such a way that Q1 and Q2 are not turned on at the same
time. So here the PWM technique is used in such a way that the gate pulses is given to
the inverter which will decide the output of the inverter. So depending on width of pulses
the output of the inverter also varies accordingly. The below figure tells how inverter
works.
23
CHAPTER-2
CIRUIT DESCRIPTION
Sinusoidal
Wave form
generator
comparator
Input to Synchronizing
Pulses obtained
Pulses obtained
are given to
Wave form circuit are given to
inverter
generator inverter
Triangular
Wave form
generator
24
2.2) OPERATION OF THE CIRCUIT
25
The sinusoidal output of the waveform generator is applied to the non
inverting amplifier that controls the amplitude of the sine wave, and hence the
modulation index of the PWM scheme. The comparator OA4 compares the sine and the
triangular waveforms, there by generating the basic SPWM output. The gate drive
Signals for the four switches (G12 and G34) of the single phase inverter are obtained by
passing the basic PWM signal through a set of inverters and NAND gates, as shown in
Fig. The gate signals are then passed through suitable gate drivers that generate signals
with the proper amplitude and current capability to drive the particular switching device
selected.
26
2.3 FIG SHOWING GENERATION OF SINE WAVE
Here in the first step through op-amp OA-1 we will get 12V source by varying the
resistance 10k we can get variable voltage at the PIN-7. By varying the voltage at PIN-7
we will get FREQUENCY MODULATED WAVE FORM at ICL8038. Here the wave
form generator ICL8038 is integrated monolithic integrated chip which is used to
generate sine wave of variable frequency. Here the frequency can be varied by two ways
1. By varying the voltage at pin-8
2. By varying the resistance Rs which is at PIN-5 & PIN-6.
2) STAGE-2:-
Here at stage-2 we will generate triangular wave form. For generation of
the triangular wave form first the triangular wave is to be synchronized with the sine
wave form, to do this we first take the sine wave and convert it into a square wave form
by using comparator OA-2.which is not shown in figure.
27
2.5) FIG TO CONVERT SINE WAVE FORM TO SQUARE WAVE FORM
3) STAGE-3
28
Here in the third stage we will generate pulses by using IC74LS121 which is
a monostable multivibrator here at pins B & C we will give voltage at one third and at
two third so that it will used in generating pulses at zero crossings of the sine wave. Here
by varying the 10k resistance we can change the voltage of pulses.
4) STAGE-4
Here for after generation of pulses at zero crossings of sine wave these pulses are used to
short the terminals of JFET 2N4392.so at ever zero crossing a pulse shorts the JFET
which is used to short the capacitor Ct. So at each and every time of zero crossings of
wave forms a triangular wave will be generated at PIN-3 by the wave form generator
ICL8038. Here also we can vary the frequency in two ways
1. By changing the voltage at PIN-8.
2. By changing the resistance Rt which is at PIN-5 & PIN-6.
29
2.8 FIG FOR GENERATION OF TRIANGULAR WAVE.
30
5) STAGE-5
Here at the stage-5 we first decide the modulation index at IC OA-3 so that we will have
control on the output. Then the triangular wave form and the sine wave form at
comparator OA4 so that we will get pulses.
31
2
.11
FIG SHOWING THE OUTPUT PULSES AT PIN-1 OF OA-4.
6) STAGE-6
32
Here the pulses obtained at one set of NAND gates 74LS00 and NOT gate 74LS04 are
carried to gate G12 another set are carried to gate G34. Here pulses obtained to gate G34
are inverted so that they can be given to another set of pulses. Which are shown in the fig
33
CHAPTER-3
HARD WARE
1. LF353 OPAMP
2. LF351 OPAMP
3. ICL 8038 Wave form generator
4. 1N473 Zener diode.
5. 2N4392 j-fet.
6. 74LS121 Mono stable multivibrator.
7. 74LS00 Nand gate
8. 74LS04 Not gate.
9. Resistors
10. Capacitors.
34
3.3) DESCRIPTION OF COMPONENTS
1) LF353 OPAMP
Description:
low input offset voltage. It requires low supply current yet maintains a large gain-
bandwidth product and a fast slew rate. In addition, the matched high-voltage JFET input
analog converters, sample-and-hold circuits, and many other circuits. The LF353 is
35
INTERNAL BLOCK DIAGRAM:
2) LF351 OPAMP:
This is also same as that of LF351, but with little modifications. These
circuits are high speed J–FET input single operational amplifiers incorporating well
matched, high voltage J–FET and bipolar transistors in a monolithic integrated circuit.
The devices feature high slew rates, low input bias and offset currents, and low offset
voltage temperature coefficient.
3) NAND GATE:-
36
3.4 FIG SHOWING NAND GATE
This NAND gate we have taken is QUAD-2 INPUT NAND gate which has 4 NAND
GATES built in it. An NAND gate has two or more than two inputs as indicated. It
recognizes only the even no. of pulses.
4) NOT GATE:-
37
3.6 FIG SHOWING DIP AND NOT GATE DIAGRAM.
Here the IC designed is HEX INVERTER not gate which contains 6 NOT gates.
5)2N4392 j-fet:
38
3.7 FIG SHOWING JFET REALISATION
Here the JFET used is a N-CHANNAL which can be used for the SWITCHING
purpose. The forward drain current IDss =50mA.
Application Information:
An external capacitor C is charged and discharged by two current sources. Current source
#2 is switched on and off by a flip-flop, while current source #1 is on continuously.
Assuming that the flip-flop is in a state such that current source #2 is off,
39
3.8 FIG SHOWING PINDIAGRAM OF ICL8038
and the capacitor is charged with a current I, the voltage across the capacitor rises linearly
with time. When this voltage reaches the level of comparator #1 (set at 2/3 of the supply
voltage), the flip-flop is triggered, changes states, and releases current source #2. This
current source normally carries a current 2I, thus the capacitor is discharged with anet-
current I and the voltage across it drops linearly with time. When it has reached the level
of comparator #2 (set at 1/3 of the supply voltage), the flip-flop is triggered into its
original state and the cycle starts again.
With the current sources set at I and 2I respectively, the charge and
discharge times are equal. Thus a triangle waveform is created across the capacitor and
the flip-flop produces a square wave. Both waveforms are fed to buffer stages and are
available at pins 3 and 9. The levels of the current sources can, however, be selected over
a wide range with two external resistors. Therefore, with the two currents set at values
different from I and 2I, an asymmetrical saw tooth appears at Terminal 3 and pulses with
a duty cycle from less than 1% to greater than 99% are available at Terminal 9. The sine
wave is created by feeding the triangle wave into a nonlinear network (sine converter).
40
This network provides decreasing shunt impedance as the potential of the triangle moves
toward the two extremes.
41
Thus a 50% duty cycle is achieved when RA = RB.
If the duty cycle is to be varied over a small range about 50% only, the connection shown
in Figure 3B is slightly more convenient. A 1kΩ potentiometer may not allow the duty
cycle to be adjusted through 50% on all devices. If a 50% duty cycle is required, a 2kΩ or
5kΩ potentiometer should be used. With two separate timing resistors, the frequency is
given by:
If RA = RB = R
f=0.33/RC
42
Once fired the output are independent of further transitions of the inputs
and are a function only of the timing components. Input pulses may be of any duration
relative to the output pulse. Output pulses length may be varied from 40 nanosecs to 28
secds by choosing appropriate timing components. With no external time in components
an output pulse of typically 30 or 35 nano secs is achieved which may be used as ad-c
triggered reset signal. Out put raise and fall times are TTL compatible and independent
for pulse length.
Jitter free operation is maintained over the full temperature and Vcc ranges
for more than six decades of timing capacitance and more than one decade of timing
resistance.
CHAPTER-4
43
HARD WARE CIRCUIT RESULTS
The above circuit shows the input circuit to the wave form generator of both triangular
wave form and the sinusoidal wave form generator. By varying the 10k pot we can vary
the output of the both sine wave frequency and triangular wave frequency.
44
AT FIRST STAGE:-
45
AT FOURTH STAGE:
AT FIFTH STAGE:
46
4.6 FIG SHOWING HARDWARE KIT FOR GENERATION ON PULSES
47
4.8 FIGURE SHOWING OUTPUT PULSES AT GATE 12 IN KIT
48
OUTPUT FOR GATE G34:
CHAPTER-5
49
SOFTWARE RESULTS
50
5.2) SIMULATED CIRCUIT FOR GENERATION OF PULSES:
1)CIRCUIT FOR GENERATION OF PULSES
51
5.2 FIGURE SHOWING PULSES FOR G1 BY CASPOC.
Here the wave form given is generated by comparing sine wave with the triangular
wave. Here no. of pulses per half cycle are five.
52
5.3 FIGURE SHOWING OUTPUT PULSES FOR GATE G2 IN CASPOC
Here the wave forms obtained are another set which are obtained by the not
inverter
1) CIRCUIT OF INVERTER
53
5.4 FIGURE SHOWING INVERTER CKT IN CASPOC
Here the inverter circuit shown is simulated with an voltage of 500 VOLTS
with MOSFET.
54
5.5 FIGURE SHOWING OUTPUT WAVE FORM OF INVETER IN CASPOC.
Here the fig shown is out put voltage of an inverter circuit here both voltage and current
wave forms are giving.
55
MATLAB INTRODUCTION:
Mat lab is a matrix based software package meant for power system analysis.
It gives numerical solutions to various vector matrix operations. The combination of
analysis capabilities, flexibilities, reliability and powerful graphics make MATLAB the
premier software package for electrical engineers.
56
CHAPTER-6
CONCLUSION
57
This project mainly describes about how the sinusoidal pulse width
modulation is realized in operation of inverters and how the output voltage is get varied
with the sinusoidal pulse width modulation eliminating the disadvantages of the single
pulse width and multiple pulse width modulations. Simulation models are developed both
in mat lab and in caspoc how we will get pulses and output voltage. From these
simulations we can observe how the pulses width is getting varied in sinusoidal pulse
width modulation.
each stage of the circuit and the wave form resembles similar to that of practical work.
The SPWM control circuit proposed in the project is simple and gives a wide range of
output frequencies. The waveforms obtained are accurate, and the frequency and the
number of pulses per half-cycle can be easily varied. The experimental waveforms and
APPENDIX
58
LF 353 JFET INPUT OPERATION AMPLIFIER
LF351
59
Single Operational Amplifier (JFET)
60
74LS121: MONOSTABLE WITH SCHMITT TRIGGER INPUTS
61
ICL8038
62
63
2N4392: JFET SWITCHINGN CHANNEL- DEPLETION
64