DM74LS138 DM74LS139 Decoder/Demultiplexer

August 1986 Revised March 2000

DM74LS138 DM74LS139 Decoder/Demultiplexer

General Description
These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The DM74LS138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The DM74LS139 comprises two separate two-line-to-fourline decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications. All of these decoders/demultiplexers feature fully buffered inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system design.

Features
Designed specifically for high speed: Memory decoders Data transmission systems DM74LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception DM74LS139 contains two fully independent 2-to-4-line decoders/demultiplexers Schottky clamped for high performance Typical propagation delay (3 levels of logic) DM74LS138 DM74LS139 21 ns 21 ns

Typical power dissipation DM74LS138 32 mW DM74LS139 34 mW

Ordering Code:
Order Number DM74LS138M DM74LS138SJ DM74LS138N DM74LS139M DM74LS139SJ DM74LS139N Package Number M16A M16D N16E M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.

2000 Fairchild Semiconductor Corporation

DS006391

www.fairchildsemi.com

DM74LS138 DM74LS139

Connection Diagrams
DM74LS138 DM74LS139

Function Tables
DM74LS138 Inputs Enable X L H H H H H H H H H X L L L L L L L L Select X X X X X X L L L L L H L H L L H H H L L H L H H H L H H H H H L H H H H H H H H H H L H H H H H H H H H H L H H H H H Outputs Inputs Enable G H L L L L H H H H H H H L H H H H H H H H H H L H H H H H H H H H H L
H = HIGH Level L = LOW Level X = Dont Care Note 1: G2 = G2A + G2B

DM74LS139 Outputs Y0 H L H H H Y1 H H L H H Y2 H H H L H Y3 H H H H L

Select B X L L H H A X L H L H

G1 G2 (Note 1) C B A YO Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H H H L H H H H H H H H H H L H H H

Logic Diagrams
DM74LS138 DM74LS139

www.fairchildsemi.com