Action Sensing Speech Using iMEMS: KBN College of Engineering

Action sensing speech using iMEMS
Abstract
Today the effective use of computers (e.g. those with internet browsers and graphical interfaces) involves the use of some sort of cursor control like what a mouse provides. However, a standard mouse is not always the best option for all users. There are currently many devices available to provide computer access to persons who do not have use of their arms or legs. There is no single solution as each device and application has to be tailored to each users unique preferences and abilities. To provide a better option for users with spinal cord injuries or severe disabilities an inexpensive wireless head tilt mouse using an accelerometer has been designed and built and its targeting performance compared to traditional mouse devices to show feasibility. The head tilt mouse uses Bluetooth to communicate with the host computer. Software running on the host translates accelerometer readings into cursor movements and, currently, button presses into mouse clicks.
Dept of Biomedical Engineering KBN College of Engineering.
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INTRODUCTION A hands-free, wireless mouse, which operates by using the tilt of the users head, has been designed and built. The goal of this device is to improve the lives of people with severe physical disabilities by providing mouse pointer control comparable to what is available to able-bodied people. The device can also be used by able-bodied people as an inexpensive, hands-free alternative to the traditional mouse [1]. With the new device, the user moves the mouse cursor around the computer screen in a handsfree manner. This movement is detected using an embedded accelerometer. Head movement information is transmitted wirelessly over the Bluetooth protocol to the users computer. Software running on the computer translates the head movements into mouse cursor movements. The tilt mouse is shown in Figure 1 embedded in a baseball cap. The tilt mouse senses a users head movement; processes it; then transmits the movement data through a Bluetooth wireless radio to the users computer. The computer then translates these data to actual mouse cursor movements. Other than at the physical layer, the communication is essentially one way (i.e. from the tilt mouse to the users computer). The host computer does not need to communicate back to the tilt mouse. This effectively reduces the complexity of the communication protocol. The system block diagram is shown in Figure 2.As can be seen in Figure 1, the device is smaller than the size of a standard deck of playing cards.
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The experiments showed that users were able to acquire a target with the head tilt mouse in 10.9 seconds on average, with 48 target misses for 24 targets. Misses are defined as a mouse click event which occurred when the mouse cursor is positioned outside of the target. The minimum average time to acquire a target was 8.8 seconds and the maximum was 13.6 seconds. This compares to 1.6 seconds for the optical mouse and 1.9 for the touchpad, each with essentially zero misses. The average time to acquire targets for each user and device is shown in Figure 7. Figure 8 shows the average number of target misses for each user.
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89C51 Micro controller The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4kbytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmels high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional non-volatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications Software requirements 1. Embedded C Description of Embedded C The C programming language is a general purpose programming language that
provides code efficiency, elements of structured programming, and a rich set of operators. Its generality combined with its absence of restrictions, makes C a convenient and effective programming solution for a wide variety of software tasks. Many applications can be solved more easily and efficiently with C than with other more specialized languages. Cx51 is not a universal C compiler adapted of the 89C51 target .It is a ground-up implementation dedicated to generating extremely fast and compact for the 89C51 microcontroller. Cx51 provides you with the flexibility of programming in C and the code efficiency and speed of assembly language. The C language on its own is not capable of performing operations (such as input and output) that would normally require intervention from the operating system. Instead, these capabilities are provided as a part of the standard library .Because these functions are separate from the language itself, C is especially suited for producing code that is portable across a wide number of platforms. Since Cx51 is a cross compiler, some aspects of the C programming language and standard libraries are altered or enhanced to address the peculiarities of an embedded target processor. Dept of Biomedical Engineering KBN College of Engineering. Page 5

WHAT IS AN ACCELEROMETER? An accelerometer is an instrument for measuring acceleration, detecting and measuring vibrations, or for measuring acceleration due to gravity (inclination). Accelerometers can be used to measure vibration on vehicles, machines, buildings, process control systems and safety installations. They can also be used to measure seismic activity, inclination, machine vibration, dynamic distance and speed with or without the influence of gravity. HOW DOES AN ACCELEROMETER WORK? Used for calculating acceleration and measuring vibrations, the accelerometer is capable of detecting even the slightest movements, from the tilting of a building to smallest vibration caused by a musical instrument. Inside the accelerometer sensor minute structures are present that produces electrical charges if the sensor experiences any movement. Accelerometers need to be placed on the surface of the object in order to determine the vibrations. It is not capable of work in isolation or apart from the object it is required to assess, it must be firmly attached to the object in order to give precise readings. KINDS OF ACCELEROMETER The two kinds of basic accelerometers are: 1. ANALOG ACCELEROMETER At times Inputs and output readings also matter especially when it comes to determining the kind of accelerometer that needs to be placed on a certain object. If the output is digital then a digital accelerometer must be placed and vice versa. The main feature of this accelerometer is that the output tends to change when there is even a slight change in the input. The most common type of this accelerometer is used in airbags of automobiles, to note the sudden drop in the speed of the vehicle and to trigger the airbag release. Even laptops are now being equipped with accelerometers in order to protect the hard drive against any physical dangers, caused mainly due to accidental drops.
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2. DIGITAL ACCELEROMETER The digital accelerometer is more sophisticated than the analog. Here the amount of high voltage time is proportional to the acceleration. One of its major advantages is that it is more stable and produces a direct output signal. Accelerometers are now also used in aerospace and many military applications, such as missile launch, weapon fire system, rocket deployment etc. Many a times these accelerometers are used to protect fragile equipment during cargo transportation, and report any strain that might cause a possible damage. Some companies have also managed to develop a wireless 3-axis accelerometers which are not only low in cost but are also shock durable. This 3-axis accelerometer has sensors that are used to protect mobiles and music players. Also these sensors are used in some of the devices used for traffic navigation and control.
PIEZOELECTRIC SENSOR Depending upon the kind of work, the accelerometers vary in the way they are prepared and how they work. Some accelerometers use piezoelectricity, these are man-made. In such accelerometers the acceleration is calculated based upon the charges derived from the microscopic crystalline structures when they are accelerated due to motion.
MEMS ACCELEROMETER Another kind works with the capacitance and the changes initiated within it as a result of some accelerative force. This technology is used from automotive industry to agriculture industry and from NASA to military researches and operations.
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STRAIN GAUGE This device is used to measure strain in an object, which is detected by a foil strain element. If the object, to which the gauge is attached is somehow deformed that creates electrical charges and is known as the gauge factor.
ACCELEROMETER IS USED IN: AUTOMOTIVE INDUSTRY Due to high demand and wide spread use of accelerometers in the automotive industry and new hi-tech technology, these sensors are now light weight and are available at low cost and reduced prices. MICROPHONES Microphones also carry accelerometers. That is how they are able to detect the minute frequencies. ROBOTICS The forces that can cause vibrations which are detected by the accelerometer can be static, dynamic or gravitational. Certain accelerometers are rated G. G stands for Gravity. Such accelerometers are used mostly in robotics. They are more sensitive to motion and can be triggered at the slightest changes in gravitational pulls.
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8-Bit MC Compatible A/D Converters with 8-Channel
The adc0808, adc0809 data acquisition component is a monolithic cmos device with an 8-bit analogue-to-digital converter, 8-channel multiplexer and microprocessor compatible control logic. The 8-bit a/d converter uses successive approximation as the conversion technique. The converter features a high impedance chopper stabilized comparator, a 256r voltage divider with analogue switch tree and a successive approximation register. The 8-channel multiplexer can directly access any of 8-single-ended analogue signals. The device eliminates the need for external zero and full-scale adjustments. Easy interfacing to microprocessors is provided by the latched and decoded multiplexer address inputs and latched ttl tri-state outputs. The design of the adc0808, adc0809 has been optimized by incorporating the most desirable aspects of several a/d conversion techniques. The adc0808, adc0809 offers high speed, high accuracy, minimal temperature dependence, excellent long-term accuracy and repeatability, and consumes minimal power. These features make this device ideally suited to applications from process and machine control to consumer and automotive applications. For 16-channel multiplexer with common output (sample/hold port) see adc0816 data sheet. (See an-247 for more information.)
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THE LM 386 Audio-amp
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The LM 386 is a high power op-amp. It is used to drive a speaker. The inverting input has been connected to the negative rail and the non-inverting input has been connected to a capacitor. Resistors inside the chip bias this input so that it only requires about 7mV before the chip turns on. This voltage is called the off-set voltage. When a signal is applied to the + input, the chip amplifies the waveform and the result appears on pin 5. The gain of the chip depends on the impedance of the path between pins 1 and 8. We have placed variable impedance, made up of a 22u and 10k pot between these pins and by varying the resistance of the pot, the gain of the chip will be adjusted. The gain can be adjusted from 30 to 200 and these figures are shown on the overlay of the board. ULN 2803:
IC ULN 2004 1
16
2 3 4 5 6 7 8 Dept of Biomedical Engineering KBN College of Engineering.
15 14 13 12 11 10 9 Vcc Page 12
Since the digital outputs of the some circuits cannot sink much current, they are not capable of driving relays directly. So, high-voltage high-current Darlington arrays are designed for interfacing low-level logic circuitry and multiple peripheral power loads. The series ULN2000A/L ICs drive seven relays with continuous load current ratings to 600mA for each input. At an appropriate duty cycle depending on ambient temperature and number of drivers turned ON simultaneously, typical power loads totaling over 260W [400mA x 7, 95V] can be controlled. Typical loads include relays, solenoids, stepping motors, magnetic print hammers, multiplexed LED and incandescent displays, and heaters. These Darlington arrays are furnished in 16-pin dual in-line plastic packages (suffix A) and 16-lead surface-mountable SOICs (suffix L). All devices are pinned with outputs opposite inputs to facilitate ease of circuit board layout. The input of ULN 2004 is TTL-compatible open-collector outputs. As each of these outputs can sink a maximum collector current of 500 mA, miniature PCB relays can be easily driven. No additional free-wheeling clamp diode is required to be connected across the relay since each of the outputs has inbuilt free-wheeling diodes. The Series ULN20x4A/L features series input resistors for operation directly from 6 to 15V CMOS or PMOS logic outputs.
1N4148 signal diode: Signal diodes are used to process information (electrical signals) in circuits, so they are only required to pass small currents of up to 100mA. General purpose signal diodes such as the 1N4148 are made from silicon and have a forward voltage drop of 0.7V.
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MOTHER BOARD The field parameters are monitored by this Microcontroller chip with the help of user written program and generates alert message for LCD display and fault code for remote monitoring end transmission. The Microcontroller Chip has input port for getting fault condition of field parameters and Stop signal through RF Receiver and output port for sending fault code to DTMF Encoder and switching Relay [MCB] for isolating power line from load. INTRODUCTION OF MICRO-CONTROLLER The general definition of a microcontroller is a single chip computer, which refers to the fact that they contain all of the functional sections (CPU, RAM, ROM, I/O, ports and timers) of a traditionally defined computer on a single integrated circuit. Some experts even describe them as special purpose computers with several qualifying distinctions that separate them from other computers. Microcontrollers are "embedded" inside some other device (often a consumer product) so that they can control the features or actions of the product. Another name for a microcontroller, therefore, is "embedded controller." Microcontrollers are dedicated to one task and run one specific program. The program is stored in ROM (read-only memory) and generally does not change. Microcontrollers are often low-power devices. A desktop computer is almost always plugged into a wall socket and might consume 50 watts of electricity. A battery-operated microcontroller might consume 50 mill watts.
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A microcontroller has a dedicated input device and often (but not always) has a small LED or LCD display for output. A microcontroller also takes input from the device it is controlling and controls the device by sending signals to different components in the device. A microcontroller is often small and low cost. The components are chosen to minimize size and to be as inexpensive as possible. A microcontroller is often, but not always, ruggedized in some way. The microcontroller controlling a car's engine, for example, has to work in temperature extremes that a normal computer generally cannot handle. A car's microcontroller in Kashmir regions has to work fine in -30 degree F (-34 C) weather, while the same microcontroller in Gujarat region might be operating at 120 degrees F (49 C). When you add the heat naturally generated by the engine, the temperature can go as high as 150 or 180 degrees F (65-80 C) in the engine compartment. On the other hand, a microcontroller embedded inside a VCR hasn't been ruggedized at all. Clearly, the distinction between a computer and a microcontroller is sometimes blurred. Applying these guidelines will, in most cases, clarify the role of a particular device.
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32 P0.6 33 Action sensing speech using iMEMS P0.5 40 vcc 12 MHz 18 29 XTAL2 PSEN 30 pF 30 31 +VCC 10 MFD/63V 20K RESET SWITCH 17 9 P3.7 16 P3.6 15 P3.5 14 P3.4 rd wr t1 t0 int1 int0 txd rxd P3.2 11 P3.1 10 P3.0 20 vss P3.3 12 13 ALE EA RST P0.4 35 P0.3 36 P1.7 P0.2 8 37 P1.6 P0.1 7 38 P1.5 P0.0 6 39 P1.4 5 P1.3 4 P2.7 P1.2 28 ad7 ad6 ad5 ad4 ad3 ad2 ad1 ad0 D3 D1 & D2
COMPLETE CIRCUIT DIAGRAM [mother board] of 89c51 34

30 pF XTAL1
19
+Vcc
230 AC
X1
R1
C1 C2
port 0
8 x 2.2 K
89c51
3 P2.6 P1.1 27 2 P2.5 P1.0 26 11 P2.4 25 P2.3 24 P2.2 23 P2.1 22 P2.0 21 1
port 1
a15 a14 a13 a12 a11 a10 a9 a8
port 3
port 2
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The mother board of 89C51 has following sections: Power Supply, 89C51 IC, Oscillator, Reset Switch & I/O ports. Let us see these sections in detail. POWER SUPPLY: This section provides the clean and harmonic free power to IC to function properly. The output of the full wave rectifier section, which is built using two rectifier diodes, is given to filter capacitor. The electrolytic capacitor C1 filters the pulsating dc into pure dc and given to Vin pin-1 of regulator IC 7805.This three terminal IC regulates the rectified pulsating dc to constant +5 volts. C2 & C3 provides ground path to harmonic signals present in the inputted voltage. The Vout pin-3 gives constant, regulated and spikes free +5 volts to the mother board. The allocation of the pins of the 89C51 follows a U-shape distribution. The top left hand corner is Pin 1 and down to bottom left hand corner is Pin 20. And the bottom right hand corner is Pin 21 and up to the top right hand corner is Pin 40. The Supply Voltage pin Vcc is 40 and ground pin Vss is 20. OSCILLATOR: If the CPU is the brain of the system then the oscillator, or clock, is the heartbeat. It provides the critical timing functions for the rest of the chip. The greatest timing accuracy is achieved with a crystal or ceramic resonator. For crystals of 2.0 to 12.0 MHz, the recommended capacitor values should be in the range of 15 to 33pf2. Across the oscillator input pins 18 & 19 a crystal x1 of 4.7 MHz to 20 MHz value can be connected. The two ceramic disc type capacitors of value 30pF are connected across crystal and ground stabilizes the oscillation frequency generated by crystal.
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I/O PORTS: There are a total of 32 i/o pins available on this chip. The amazing part about these ports is that they can be programmed to be either input or output ports, even "on the fly" during operation! Each pin can source 20 mA (max) so it can directly drive an LED. They can also sink a maximum of 25 Ma current. Some pins for these I/O ports are multiplexed with an alternate function for the peripheral features on the device. In general, when a peripheral is enabled, that pin may not be used as a general purpose I/O pin. The alternate function of each pin is not discussed here, as port accessing circuit takes care of that. This 89C51 IC has four I/O ports and is discussed in detail: P0.0 TO P0.7 PORT0 is an 8-bit [pins 32 to 39] open drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs and configured to be multiplexed low order address/data bus then has internal pull ups. External pull ups are required during program verification. P1.0 TO P1.7 PORT1 is an 8-bit wide [pins 1 to 8], bi-directional port with internal pull ups. P1.0 and P1.1 can be configured to be the timer/counter 2 external count input and the timer/counter 2 trigger input respectively. P2.0 TO P2.7 PORT2 is an 8-bit wide [pins 21 to 28], bi-directional port with internal pull ups. The PORT2 output buffers can sink/source four TTL inputs. It receives the high-order address bits and some control signals during Flash programming and verification.
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P3.0 TO P3.7 PORT3 is an 8-bit wide [pins 10 to 17], bi-directional port with internal pull ups. The Port3 output buffers can sink/source four TTL inputs. It also receives some control signals for Flash programming and verification.
PSEN Program Store Enable [Pin 29] is the read strobe to external program memory.
ALE Address Latch Enable [Pin 30] is an output pulse for latching the low byte of the address during accesses to external memory.
EA External Access Enable [Pin 31] must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H upto FFFFH.
RST Reset input [Pin 9] must be made high for two machine cycles to resets the devices oscillator. The potential difference is created using 10MFD/63V electrolytic capacitor and 20KOhm resistor with a reset switch.
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LCD MODULE
LCDs can add a lot to any application in terms of providing an useful interface for the user, debugging an application or just giving it a "professional" look. The most common type of LCD controller is the Hitachi 44780 which provides a relatively simple interface between a processor and an LCD. Using this interface is often not attempted by inexperienced designers and programmers because it is difficult to find good documentation on the interface, initializing the interface can be a problem and the displays themselves are expensive. The most common connector used for the 44780 based LCDs is 14 pins in a row, with pin centers 0.100" apart. The pins are wired as:
lcd data write waveform DATA R/_S
R/_W E 450 nSec
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Pins 1 2 3 4 5 6 7 14
Description Ground Vcc Contrast Voltage "R/S" _Instruction/Register Select "R/W" _Read/Write LCD Registers "E" Clock Data I/O Pins
The interface is a parallel bus, allowing simple and fast reading/writing of data to and from the LCD.
The LCD Data Write Waveform will write an ASCII Byte out to the LCD's screen. The ASCII code to be displayed is eight bits long and is sent to the LCD either four or eight bits at a time. If four bit mode is used, two "nibbles" of data (Sent high four bits and then low four bits with an "E" Clock pulse with each nibble) are sent to make up a full eight bit transfer. The "E" Clock is used to initiate the data transfer within the LCD.
Sending parallel data as either four or eight bits are the two primary modes of operation. While there are secondary considerations and modes, deciding how to send the data to the LCD is most critical decision to be made for an LCD interface application.
The different instructions available for use with the 44780 are shown in the table below: R/S R/W D7 D6 D5 D4 D3 D2 D1 D0 Instruction/Description Page 21

4 0 0 0 0 0 0 0 0 0 1 1 5 0 0 0 0 0 0 0 0 1 0 1 14 0 0 0 0 0 0 0 1 BF D D 13 0 0 0 0 0 0 1 A * D D 12 0 0 0 0 0 1 A A * D D 11 0 0 0 0 1 DL A A * D D 10 0 0 0 1 SC N A A * D D 9 0 0 1 D RL F A A * D D 8 0 1 ID C * * A A * D D 7 1 * S B * * A A * D D Pins Clear Display Return Cursor and LCD to Home Position Set Cursor Move Direction Enable Display/Cursor Move Cursor/Shift Display Set Interface Length Move Cursor into CGRAM Move Cursor to Display Poll the "Busy Flag" Write a Character to the Display at the Current Cursor Position Read the Character on the Display at the Current Cursor Position
The bit descriptions for the different commands are: "*" - Not Used/Ignored. This bit can be either "1" or "0" Most LCD displays have a 44780 and support chip to control the operation of the LCD. The 44780 is responsible for the external interface and provides sufficient control lines for sixteen characters on the LCD. The support chip enhances the I/O of the 44780 to support up to 128 characters on an LCD. From the table above, it should be noted that the first two entries ("8x1", "16x1") only have the 44780 and not the support chip. This is why the ninth character in the 16x1 does not "appear" at address 8 and shows up at the address that is common for a two line LCD.
The Character Set available in the 44780 is basically ASCII. It is "basically" because some characters do not follow the ASCII convention fully (probably the most significant difference is 0x05B or "\" is not available). The ASCII Control Characters (0x008 to 0x01F) do not respond as control characters and may display funny (Japanese) characters. <<,,
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The last aspect of the LCD to discuss is how to specify a contrast voltage to the Display. +Vcc Shift Register LCD Data Write Data Data Pin-3 Clock Contrast E Clock R6 D0 D1 Dn E
10K pot Process
S/R
0 0
or
LCD
LCD
LCD Contrast Circuit
Experts typically use a potentiometer wired as a voltage divider. This will provide an easily variable voltage between Ground and Vcc, which will be used to specify the contrast (or "darkness") of the characters on the LCD screen. You may find that different LCDs work differently with lower voltages providing darker characters in some and higher voltages do the same thing in others.
Timer NE/SA/SE555/SE555C
DESCRIPTION The 555 monolithic timing circuits is a highly stable controller capable of producing accurate time delays, or oscillation. In the time delay mode of operation, the time is precisely Dept of Biomedical Engineering KBN College of Engineering. Page 23

controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200mA. FEATURES Turn-off time less than 2s Max. Operating frequency greater than 500 kHz Timing from microseconds to hours Operates in both astable and monostable modes High output current Adjustable duty cycle TTL compatible Temperature stability of 0.005% per C
APPLICATIONS Precision timing Pulse generation Sequential timing Time delay generation Pulse width modulation
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PHOTO MODULES FOR PCM REMOTE CONTROL SYSTEMS DESCRIPTION THE TSOP17... SERIES ARE MINIATURIZED RECEIVERS FOR INFRARED REMOTE CONTROL SYSTEMS. PIN DIODE
AND PREAMPLIFIER ARE ASSEMBLED ON LEAD FRAME, THE EPOXY PACKAGE IS DESIGNED AS IR FILTER. DEMODULATED OUTPUT SIGNAL CAN DIRECTLY BE DECODED BY A MICROPROCESSOR.
THE
THE
TSOP17... IS
STANDARD IR REMOTE CONTROL RECEIVER SERIES, SUPPORTING ALL MAJOR TRANSMISSION CODES.
FEATURES PHOTO DETECTOR AND PREAMPLIFIER IN ONE PACKAGE INTERNAL FILTER FOR PCM FREQUENCY IMPROVED SHIELDING AGAINST ELECTRICAL FIELD DISTURBANCE TTL AND CMOS COMPATIBILITY OUTPUT ACTIVE LOW LOW POWER CONSUMPTION HIGH IMMUNITY AGAINST AMBIENT LIGHT CONTINUOUS DATA TRANSMISSION POSSIBLE (1200 BIT/S) SUITABLE BURST LENGTH .10 CYCLES/BURST
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REGULATED POWER SUPPLY The circuit needs two different voltages, +5v & +12v, to work. these dual voltages are supplied by this specially designed power supply. The power supply, unsung hero of every electronic circuit, plays very important role in smooth running of the connected circuit. the main object of this power supply is, as the name itself implies, to deliver the required amount of stabilized and pure power to the circuit. every typical power supply contains the following sections: 1. Step-down Transformer: The conventional supply, which is generally available to the user, is 230V AC. It is necessary to step down the mains supply to the desired level. This is achieved by using suitably rated step-down transformer. While designing the power supply, it is necessary to go for little higher rating transformer than the required one. The reason for this is, for proper working of the regulator IC (say KIA 7805) it needs at least 2.5V more than the expected output voltage 2. Rectifier stage: Then the step-downed Alternating Current is converted into Direct Current. This rectification is achieved by using passive components such as diodes. If the power supply is designed for low voltage/current drawing loads/circuits (say +5V), it is sufficient to employ full-wave rectifier with centre-tap transformer as a power source. While choosing the diodes the PIV rating is taken into consideration. 3. Filter stage: But this rectified output contains some percentage of superimposed a.c. ripples. So to filter these a.c. components filter stage is built around the rectifier stage. The cheap, reliable, simple and effective filtering for low current drawing loads (say upto 50 mA) is done by using shunt capacitors. This electrolytic capacitor has polarities, take care while connecting the circuit.
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KIA 78xx Series
1 2
4. Voltage Regulation: The filtered d.c. output is not stable. It varies in accordance with the fluctuations in mains supply or varying load current. This variation of load current is observed due to voltage drop in transformer windings, rectifier and filter circuit. These variations in d.c. output voltage may cause inaccurate or erratic operation or even malfunctioning of many electronic circuits. For example, the circuit boards which are implanted by CMOS or TTL ICs. The stabilization of d.c. output is achieved by using the three terminal voltage regulator IC. This regulator IC comes in two flavors: 78xx for positive voltage output and 79xx for negative voltage output. For example 7805 gives +5V output and 7905 gives -5V stabilized output. These regulator ICs have in-built short-circuit protection and auto-thermal cutout provisions. If the load current is very high the IC needs heat sink to dissipate the internally generated power.
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Action sensing speech using iMEMS Circuit Description:

A D.C. power supply which maintains the output voltage constant irrespective of a.c. mains fluctuations or load variations is known as regulated d.c. power supply. It is also referred as full-wave regulated power supply as it uses four diodes in bridge fashion with the transformer. This laboratory power supply offers excellent line and load regulation and output voltages of +5V & +12 V at output currents up to one amp. 1. Step-down Transformer: The transformer rating is 230V AC at Primary and 12-0-12V, 1Ampers across secondary winding. This transformer has a capability to deliver a current of 1Ampere, which is more than enough to drive any electronic circuit or varying load. The 12VAC appearing across the secondary is the RMS value of the waveform and the peak value would be 12 x 1.414 = 16.8 volts. This value limits our choice of rectifier diode as 1N4007, which is having PIV rating more than 16Volts. 2. Rectifier Stage: The two diodes D1 & D2 are connected across the secondary winding of the transformer as a full-wave rectifier. During the positive half-cycle of secondary voltage, the end A of the secondary winding becomes positive and end B negative. This makes the diode D1 forward biased and diode D2 reverse biased. Therefore diode D1 conducts while diode D2 does not. During the negative half-cycle, end A of the secondary winding becomes negative and end B positive. Therefore diode D2 conducts while diode D1 does not. Note that current across the centre tap terminal is in the same direction for both half-cycles of input A.C. voltage. Therefore, pulsating d.c. is obtained at point C with respect to Ground.
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CIRCUIT DIAGRAM OF +5V & +12V FULL WAVE REGULATED POWER
D1 1
IC1 7812
IC1 7805
+12V
9V +5V
230AC C1
C2
C3
C4
D2 1
X 1
SUPPLY Parts List: SEMICONDUCTORS IC1 IC2 D1& D2 CAPACITORS C1 C2 to C4 MISCELLANEOUS X1 7812 Regulator IC 7805 Regulator IC 1N4007 Rectifier Diodes 1 1 2
1000 f/25V Electrolytic 0.1F Ceramic Disc type
1 3
230V AC Pri,14-0-14 1Amp Sec Transformer
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3. Filter Stage: Here Capacitor C1 is used for filtering purpose and connected across the rectifier output. It filters the a.c. components present in the rectified d.c. and gives steady d.c. voltage. As the rectifier voltage increases, it charges the capacitor and also supplies current to the load. When capacitor is charged to the peak value of the rectifier voltage, rectifier voltage starts to decrease. As the next voltage peak immediately recharges the capacitor, the discharge period is of very small duration. Due to this continuous charge-discharge-recharge cycle very little ripple is observed in the filtered output. Moreover, output voltage is higher as it remains substantially near the peak value of rectifier output voltage. This phenomenon is also explained in other form as: the shunt capacitor offers a low reactance path to the a.c. components of current and open circuit to d.c. component. During positive half cycle the capacitor stores energy in the form of electrostatic field. During negative half cycle, the filter capacitor releases stored energy to the load. 4. Voltage Regulation Stage: Across the point D and Ground there is rectified and filtered d.c. In the present circuit KIA 7812 three terminal voltage regulator IC is used to get +12V and KIA 7805 voltage regulator IC is used to get +5V regulated d.c. output. In the three terminals, pin 1 is input i.e., rectified & filtered d.c. is connected to this pin. Pin 2 is common pin and is grounded. The pin 3 gives the stabilized d.c. output to the load. The circuit shows two more decoupling capacitors C2 & C3, which provides ground path to the high frequency noise signals. Across the point E and F with respect to ground +5V & +12V stabilized or regulated d.c output is measured, which can be connected to the required circuit.
MAX 232
Dept of Biomedical Engineering KBN College of Engineering. Page 33
RS 232 CONVERTER (MAX 232N) Serial Port: This is the device, which is used to convert TTL/RS232 vice versa. RS-232Protocol In telecommunications, RS-232 is a standard for serial binary data interconnection between a DTE (Data terminal equipment) and a DCE (Data Circuit-terminating Equipment). It is commonly used in computer serial ports. The RS-232 standard defines the voltage levels that correspond to logical one and logical zero levels. Valid signals are plus or minus 3 to 15 volts. The range near zero volts is not a valid RS-232 level; logic one is defined as a negative voltage, the signal condition is called marking, and has the functional significance of OFF. RS-232 was created for one purpose, to interface between Data Terminal Equipment (DTE) and Data Communications Equipment (DCE) employing serial binary data interchange. So as stated the DTE is the terminal or computer and the DCE is the modem or other communications device. RS-232 pin-outs for IBM compatible computers are shown below. There are two configurations that are typically used: one for a 9-pin connector and the other for a 25-pin connector.
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Fig. 4.1 Pin Description of MAX 232
Logic Diagram (Positive Logic)

Dept of Biomedical Engineering KBN College of Engineering. Page 35
Fig. 4.2 Logic Diagram of MAX232
Fig. Operating Characteristics Dept of Biomedical Engineering KBN College of Engineering. Page 36
LOW POWER QUAD OPERATIONAL AMPLIFIERS

General Description The LM124 series consists of four independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. Application areas include transducer amplifiers, DC gain blocks and all the conventional op amp circuits which now can be more easily implemented in single power supply systems. For example, the LM124 series can be directly operated off of the standard +5V power supply voltage which is used in digital systems and will easily provide the required interface electronics without requiring the additional 15V Dept of Biomedical Engineering KBN College of Engineering. Page 37
Obstacle sensor circuit (comparators)

The lm139/lm239/lm339/lm324 family of devices is a monolithic quad of independently functioning comparators designed to meet the needs for a medium speed, ttl compatible comparator. For industrial applications. Since no anti-saturation clamps are used on the output such as a baker clamp or other active circuitry, the output leakage current in the off state is typically 0.5na. This makes the device ideal for system applications where it is desired to switch a node to ground while leaving it totally unaffected in the off state. Other features include single supply, low voltage operation with an input common mode range from ground up to approximately one volt below vcc. The output is an uncommitted collector so it may be used with a pull-up resistor and a separate output supply to give switching levels from any voltage up to 36v down to a vcc sat above ground (approx. 100 mv), sinking currents up to 15 ma. In addition it may be used as a single pole switch to ground, leaving the Dept of Biomedical Engineering KBN College of Engineering. Page 38

switched node unaffected while in the off state. Power dissipation with all four comparators in the off state is typically 4 mw from a single 5v supply (1 mw/comparator).
Fig1
Comparator circuits
Figure 1 shows a basic comparator circuit for converting low level analog signals to a high level digital output. The output pull-up resistor should be chosen high enough so as to avoid excessive power dissipation yet low enough to supply enough drive to switch whatever load circuitry is used on the comparator output. Resistors r1 and r2 are used to set the input threshold trip voltage (vref) at any value desired within the input common mode range of the comparator.
Page 39
Comparators with Hysterics

The circuit shown in figure 1 suffers from one basic drawback in that if the input signal is a slowly varying low level signal, the comparator may be forced to stay within its linear region between the outputs high and low states for an undesirable length of time. If this happens, it runs the risk of oscillating since it is basically an uncompensated, high gain op amp. To prevent this, a small amount of positive feedback or hysterics is added around the comparator. Figure 6 shows a comparator with a small amount of positive feedback. In order to insure proper comparator action, the components should be chosen as follows: Rpull-up < rload and r1 > rpull-up this will insure that the comparator will always switch fully up to +vcc and not be pulled down by the load or feedback. The amount of feedback is chosen arbitrarily to insure proper switching with the particular type of input signal used. If the output swing is 5v, for example, and it is desired to feedback 1% or 50 mv, then r1 100 r2. To describe circuit operation, assume that the inverting input goes above the reference input (vin > vref). This will drive the output, vo, towards ground which in turn pulls vref down through r1. Since vref is actually the non-inverting input to the comparator, it too will drive the output towards ground insuring the fastest possible switching time regardless of how slow the input moves. If the input then travels down to vref, the same procedure will occur only in the opposite direction insuring that the output will be driven hard towards +vcc.
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;--------------------------------------------------------------------------------------------------------; AUTHOR : e - logic co. ; COUNTRY : INDIA ; CODE: LCD INTERFACE IN 4BIT MODE ; CPU : AT89C51@11.0592MHZ ;---------------------------------------------------------------------------------------------------------
$MOD51 ;--------------------------------------------------------------------------------------------------------; CONSTANT DECLARATIONS ;--------------------------------------------------------------------------------------------------------COUNT L1 L2 L3 (94 - A7) L4 NUL MX D_OF ICR CD EQU EQU EQU EQU EQU 0CH 06H 01H 10011000B 10011001B 00H 0FFH P2 OUT.0 OUT.1 OUT.2 OUT.3 Page 41 ;WRITE ;READ EQU EQU EQU EQU EQU 00H 38H 3 80H 0C0H 94H 0D4H
; ;(D4 - E7)
WTCMD EQU DATA COMMAND NOTE 3 RDCMD EQU DATA COMMAND NOTE 3 DCLB DCUB OUT LOD1 LOD2 LOD3 LOD4 EQU EQU EQU BIT BIT BIT BIT

E RS DAT MT1 MT11 MT2 MT22 LCD BIT OUT.7 ;DEFINE LCD ENABLE PIN ON PORT 2.2 BIT OUT.6 ;DEFINE LCD REGISTER SELECT PIN ON PORT 2.0 EQU BIT BIT BIT BIT DAT.3 P1 DAT.0 DAT.1 DAT.2
DATA P0 ;DEFINE LCD DATA PORT ON PORT 1 EQU BIT ;SDA=PIN5 BIT ;SCL=PIN6 P3 I_O.2 I_O.3
I_O SDA SCL
;--------------------------------------------------------------------------------------------------------DSEG AT 20H FLAG: MOTORCONDITION P_DATA: ASCI_RSULT: RAM_ADDR: VAR: VAR1: DS BIT DS DS DS DS DS 1 FLAG.0 1 3 3 1 1
;--------------------------------------------------------------------------------------------------------; BY PASS INTERRUPT VECTOR ;--------------------------------------------------------------------------------------------------------CSEG AT 00H LJMP LCD4_MAIN ;--------------------------------------------------------------------------------------------------------; MAIN LINE CODE ;--------------------------------------------------------------------------------------------------------CSEG AT 30H Dept of Biomedical Engineering KBN College of Engineering. Page 42

LCD4_MAIN: MOV DAT, #NUL MOV I_O, #0FFH MOV OUT, #0FFH CALL LCD4_INIT ;-----------------------------------------------------------------------------------------------------------LCD4_MAIN1: LCALL LINE1 MOV DPTR, #DSP_TST ACALL DSP_MSG LCALL LINE2 MOV DPTR, #DSP_TST1 ACALL DSP_MSG ACALL ACALL ACALL ACALL HALF_SEC HALF_SEC HALF_SEC HALF_SEC ;CLEAR LCD
MOV A, #CD ACALL COMMAND MOV A, #L1 ACALL COMMAND MOV A, #'X' ACALL DATA_WR MOV A, #'-' ACALL DATA_WR MOV A, #'>' ACALL DATA_WR MOV A, #L2 ACALL COMMAND MOV A, #'Y' ACALL DATA_WR MOV A, #'-' ACALL DATA_WR Dept of Biomedical Engineering KBN College of Engineering.
Page 43

MOV A, #'>' ACALL DATA_WR ;---------------------------------------------------------------------------------------------------------------------MOV A, #L2 ;INITIAL POSITION OF CURSOR ACALL COMMAND MOV CALL A,#WTCMD WR_ST ;LOAD WRITE COMMAND ;SEND IT
MOV A,#05H ;SLEEP COUNT CALL WRT ;SEND IT MOV A, #11111111B ;GET DATA CALL WRT ;SEND IT CALL STOP ;SEND STOP CONDITION CALL DELAY_16MS ;---------------------------------------------------------------------------------------------------------------------MOV A,#WTCMD ;LOAD WRITE COMMAND CALL WR_ST ;SEND IT MOV A,#06H ;INTERRUPT SETUP CALL WRT ;SEND IT MOV A, #00010000B ;GET DATA CALL WRT ;SEND IT CALL STOP ;SEND STOP CONDITION CALL DELAY_16MS ;---------------------------------------------------------------------------------------------------------------------MOV A,#WTCMD ;LOAD WRITE COMMAND CALL WR_ST ;SEND IT MOV A,#07H ;MODE OF OPERATION CALL WRT ;SEND IT MOV A, #00000001B ;GET DATA CALL WRT ;SEND IT CALL STOP ;SEND STOP CONDITION CALL DELAY_16MS ;---------------------------------------------------------------------------------------------------------------------MOV A,#WTCMD ;LOAD WRITE COMMAND CALL WR_ST ;SEND IT
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MOV A,#08H ;SAMPLES PER SECONDS CALL WRT ;SEND IT MOV A, #11111111B ;GET DATA CALL WRT ;SEND IT CALL STOP ;SEND STOP CONDITION CALL DELAY_16MS ;---------------------------------------------------------------------------------------------------------------------MOV A,#WTCMD ;LOAD WRITE COMMAND CALL WR_ST ;SEND IT MOV A,#09H ;TAP DETECTION CALL WRT ;SEND IT MOV A, #00000000B ;GET DATA CALL WRT ;SEND IT CALL STOP ;SEND STOP CONDITION CALL DELAY_16MS ;---------------------------------------------------------------------------------------------------------------------MOV A,#WTCMD ;LOAD WRITE COMMAND CALL WR_ST ;SEND IT MOV A,#0AH CALL WRT MOV A, #00000000B CALL WRT CALL STOP CALL DELAY_16MS ;TAP DETECTION ;SEND IT ;GET DATA ;SEND IT ;SEND STOP CONDITION
;---------------------------------------------------------------------------------------------------------------------;---------------------------------------------------------------------------------------------------------------------AGAIN: MOV A,#WTCMD ;LOAD WRITE COMMAND CALL WR_ST ;SEND IT MOV CALL A,#00H WRT ;SAMPLES PER SECONDS ;SEND IT ;GET DATA BYTE
CALL CREAD MOV A, R1 MOV VAR, A CALL CONV
Page 45

MOV A, #L2+3 CALL COMMAND CALL TEMP CALL STOP ;SEND STOP CONDITION ;------------------------------------------------------------------------------------------------------------------MOV A, VAR CLR C CJNE A, #8, NEXT11 SJMP ENDD NEXT11: JNC HY ;A > VALUE SJMP ENDD ;------------------------------------------------------------------------------------------------------------------HY: CLR C CJNE A, #20, NEXT2 SJMP FORWARD_STEP NEXT2: JC FORWARD_STEP ;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + CLR C CJNE A, #54, NEXT1 SJMP ENDD NEXT1: JNC ENDD ;A > VALUE SJMP REVERSE_STEP ;------------------------------------------------------------------------------------------------------------------ENDD: CLR CLR CLR CLR MT1 MT11 MT2 MT22
;################################################################### CTT: MOV A,#WTCMD CALL WR_ST MOV A,#01H ;LOAD WRITE COMMAND ;SEND IT ;SAMPLES PER SECONDS Page 46

CALL WRT ;SEND IT ;GET DATA BYTE
CALL CREAD MOV A, R1 MOV VAR1, A CALL CONV MOV A, #L1+3 CALL COMMAND CALL TEMP
CALL STOP ;SEND STOP CONDITION ;------------------------------------------------------------------------------------------------------------------MOV A, VAR1 CLR C CJNE A, #8, NEXT12 SJMP ENDD1 NEXT12: JNC HY1 ;A > VALUE SJMP ENDD1 ;------------------------------------------------------------------------------------------------------------------HY1: CLR C CJNE A, #20, NEXT22 SJMP FORWARD_STEP1 NEXT22: JC FORWARD_STEP1 ;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + CLR C CJNE A, #54, NEXT13 SJMP ENDD1 NEXT13: JNC ENDD1 ;A > VALUE SJMP REVERSE_STEP1 ;--------------------------------------------------------------------------------------------------------------------ENDD1: CLR MT1 CLR MT11 CLR MT2 CLR MT22 JMP AGAIN
Page 47

; ************************************************************************** ************ ; ************************************************************************** ************ FORWARD_STEP: CPL LOD1 CALL HALF_SEC JMP AGAIN ;----------------------------------------------------------------------------------------------------------REVERSE_STEP: CPL LOD2 CALL HALF_SEC JMP AGAIN ; ************************************************************************** ************ ; ************************************************************************** ************ FORWARD_STEP1: CPL LOD3 CALL HALF_SEC JMP AGAIN ;--------------------------------------------------------------------------------------------------------REVERSE_STEP1: CPL LOD4 CALL HALF_SEC JMP AGAIN ;--------------------------------------------------------------------------------------------------------; LCD LINE SELECT 1 OR 2 ;--------------------------------------------------------------------------------------------------------LINE1: MOV A, #L1 ;INITIAL POSITIO OF CURSOR ACALL COMMAND ACALL DLY_100US RET LINE2: MOV A, #L2 ;INITIAL POSITION OF CURSOR Page 48

ACALL COMMAND ACALL DLY_100US RET ;--------------------------------------------------------------------------------------------------------------SEND: MOV SBUF,A ;LOAD THE DATA HERE: JNB TI,HERE ;STAY UNTIL LAST BIT SENT CLR TI ;GET READY FOR NEXT CHARACTER RET ;--------------------------------------------------------------------------------------------------------------RCV: JB RI, $ MOV A, SBUF MOV P_DATA, A CLR RI RET ;--------------------------------------------------------------------------------------------------------; LCD INITIALISATION STARTS HERE ;--------------------------------------------------------------------------------------------------------LCD4_INIT: MOV A, #MX ;2 LINE 5X7 ACALL COMMAND MOV A, #D_OF ;LCD ON CURSOR OFF ACALL COMMAND MOV A, #CD ;CLEAR LCD ACALL COMMAND MOV A, #ICR ;SHIFT CURSOR RIGHT ACALL COMMAND RET ;--------------------------------------------------------------------------------------------------------; COMMAND WRITE ;--------------------------------------------------------------------------------------------------------COMMAND: ACALL MOV CLR ;CLR SETB CLR RET READY LCD, A RS RW E E ;IS LCD READY? ;ISSUE COMMAND CODE ;RS=0 FOR COMMAND ;R/W=0 TO WRITE TO LCD| ;E=1 FOR H-TO-L PULSE ;E=0 ,LATCH IN
;--------------------------------------------------------------------------------------------------------; DATA WRITE ;--------------------------------------------------------------------------------------------------------Dept of Biomedical Engineering KBN College of Engineering. Page 49

DATA_WR: ACALL MOV SETB RS ;CLR SETB CLR RET ;--------------------------------------------------------------------------------------------------------;--------------------------------------------------------------------------------------------------------CONV: ACALL BIN_DEC_CONV ACALL DEC_ASCI_CONV RET ;--------------------------------------------------------------------------------------------------------; CONVERTING BIN (HEX) TO DEC (00-FF TO 000-255) ;--------------------------------------------------------------------------------------------------------BIN_DEC_CONV: ; MOV MOV MOV DIV MOV INC MOV DIV MOV INC MOV R0, #RAM_ADDR A, ADC B, #10 AB @R0, B R0 B, #10 AB @R0, B R0 @R0, A READY LCD, A RW E E ;IS LCD READY? ;ISSUE DATA ;RS=1 FOR DATA ;R/W=0 TO WRITE TO LCD ;E=1 FOR H-TO-L PULSE ;E=0 ,LATCH IN
RET ;--------------------------------------------------------------------------------------------------------; CONVERTING DEC DIGITS TO DISPLAYABLE ASCII DIGITS ;--------------------------------------------------------------------------------------------------------DEC_ASCI_CONV: MOV MOV MOV MOV ORL MOV INC INC DJNZ R0, #RAM_ADDR R1, #ASCI_RSULT R2, #COUNT A, @R0 A, #30H @R1, A R0 R1 R2, H2 Page 50
H2:

RET ;--------------------------------------------------------------------------------------------------------TEMP: MOV R2, #COUNT MOV R1, #ASCI_RSULT+2 NXT: MOV A, @R1 ;MOV LCD_DATA, A ACALL DATA_WR DEC R1 DJNZ R2, NXT
RET ;--------------------------------------------------------------------------------------------------------; BUSY FLAG CHECK ;--------------------------------------------------------------------------------------------------------READY: PUSH 00 PUSH 01 MOV R0, #30 D_LOOP1: MOV R1, #255 D_LOOP2: DJNZ R1, D_LOOP2 DJNZ R0, D_LOOP1 POP 01 POP 00 RET ;--------------------------------------------------------------------------------------------------------; DATA DISPLY ;--------------------------------------------------------------------------------------------------------DSP_MSG: CLR A ;A=0 MOVC A, @A+DPTR JZ OVR ACALL DATA_WR INC DPTR SJMP DSP_MSG OVR: RET
;--------------------------------------------------------------------------------------------------------; DELAY SUBRUTIEN ;--------------------------------------------------------------------------------------------------------DELAY_8US: NOP NOP Dept of Biomedical Engineering KBN College of Engineering. Page 51

NOP NOP NOP NOP RET ;--------------------------------------------------------------------------------------------------------DLY_100US: PUSH 00 MOV R0, #00 D_LOOP: DJNZ R0, D_LOOP POP 00 RET ;--------------------------------------------------------------------------------------------------------DELAY_16MS: PUSH 00 PUSH 01 MOV R0, #100 D_LOOP11: MOV R1, #255 D_LOOP22: DJNZ R1, D_LOOP22 DJNZ R0, D_LOOP11 POP 01 POP 00 RET ;--------------------------------------------------------------------------------------------------------HALF_SEC: PUSH 00 PUSH 01 PUSH 02 MOV R2, #0AH HAF_SEC1: MOV R1, #64H HAF_SEC2: MOV R0, #0FFH BACK: DJNZ R0, BACK DJNZ R1, HAF_SEC2 DJNZ R2, HAF_SEC1 POP 02 POP 01 POP 00 RET DLY_3: ACALL ACALL ACALL ACALL ACALL ACALL HALF_SEC HALF_SEC HALF_SEC HALF_SEC HALF_SEC HALF_SEC Page 52
; ;

RET ; ************************************************************************** *************** ; THIS ROUTINE SENDS WRT CONTENTS OF THE ACCUMULATOR ; TO THE EEPROM AND INCLUDES START CONDITION. REFER TO THE DATA SHEETS ; FOR DISCUSSION OF START AND STOP CONDITIONS. ; ************************************************************************** **************** WR_ST: MOV SETB SETB NOP NOP NOP NOP NOP NOP CLR NOP NOP NOP NOP NOP NOP CLR OTSLP: RLC JNC SETB JMP BITLS: CLR OTSL1: SETB NOP NOP NOP NOP NOP NOP CLR DJNZ R2,#8 SDA SCL ;LOOP COUNT -- EQUAL TO BIT COUNT ;INSURE DATA IS HI ;INSURE CLOCK IS HI ;NOTE 1 ;NOTE 1 SDA ;START CONDITION -- DATA = 0 ;NOTE 1 ;NOTE 1 SCL A BITLS SDA OTSL1 SDA SCL ;CLOCK = 0 ;SHIFT BIT ;DATA = 1 ;CONTINUE ;DATA = 0 ;CLOCK HI ;NOTE 1 ;NOTE 1 SCL R2,OTSLP ;CLOCK LOW ;DECREMENT COUNTER
Page 53

SETB NOP SETB NOP NOP NOP NOP NOP NOP CLR RET ; ************************************************************************** ************** ; THIS ROUTINE SENDS WRT CONTENTS OF ACCUMLATOR TO EEPROM ; WITHOUT SENDING A START CONDITION. ; ************************************************************************** ************** WRT: COUNT OTLP: JNC SETB JMP BITL: OTL1: NOP NOP NOP NOP NOP NOP CLR DJNZ SETB NOP SETB NOP NOP NOP NOP Dept of Biomedical Engineering KBN College of Engineering. MOV RLC BITL SDA OTL1 CLR SETB SDA SCL R2,#8 A ;LOOP COUNT -- EQUAL TO BIT ;SHIFT BIT ;DATA = 1 ;CONTINUE ;DATA = 0 ;CLOCK HI ;NOTE 1 ;NOTE 1 SDA SCL ;TURN PIN INTO INPUT ;NOTE 1 ;CLOCK ACK ;NOTE 1 ;NOTE 1 SCL
SCL R2,OTLP SDA SCL
;CLOCK LOW ;DECREMENT COUNTER ;TURN PIN INTO INPUT ;NOTE 1 ;CLOCK ACK ;NOTE 1 ;NOTE 1 Page 54

NOP NOP CLR
SCL RET ; ************************************************************************** ************** STOP: CLR NOP NOP NOP NOP NOP NOP SETB NOP NOP NOP NOP NOP NOP SETB SCL SDA ;STOP CONDITION SET DATA LOW ;NOTE 1 ;NOTE 1 ;SET CLOCK HI ;NOTE 1 ;NOTE 1
SDA ;SET DATA HIGH RET ; ************************************************************************** ************** ; THIS ROUTINE READS A BYTE OF DATA FROM EEPROM ; FROM EEPROM CURRENT ADDRESS POINTER. ; RETURNS THE DATA BYTE IN R1 ; ************************************************************************** ************** CREAD: MOV A,#RDCMD ;LOAD READ COMMAND CALL WR_ST ;SEND IT CALL IN ;READ DATA MOV R1,A ;STORE DATA CALL STOP ;SEND STOP CONDITION RET ; ************************************************************************** ************* ; THIS ROUTINE READS IN A BYTE FROM THE EEPROM ; AND STORES IT IN THE ACCUMULATOR Dept of Biomedical Engineering KBN College of Engineering. Page 55

; ************************************************************************** ************** IN: INLP: NOP NOP NOP NOP NOP NOP NOP SETB CLR JNB CPL MOV SETB CLR R2,#8 SDA SCL ;LOOP COUNT ;SET DATA BIT HIGH FOR INPUT ;CLOCK LOW ;NOTE 1 ;NOTE 1
SCL C SDA,INL1 C A
;CLOCK HIGH ;CLEAR CARRY ;JUMP IF DATA = 0 ;SET CARRY IF DATA = 1 ;ROTATE DATA INTO
INL1: RLC ACCUMULATOR DJNZ R2,INLP ;DECREMENT COUNTER CLR SCL ;CLOCK LOW RET ; ************************************************************************** ************** ; THIS ROUTINE TEST FOR WRITE DONE CONDITION ; BY TESTING FOR AN ACK. ; THIS ROUTINE CAN BE RUN AS SOON AS A STOP CONDITION ; HAS BEEN GENERATED AFTER THE LAST DATA BYTE HAS BEEN SENT ; TO THE EEPROM. THE ROUTINE LOOPS UNTIL AN ACK IS RECEIVED FROM ; THE EEPROM. NO ACK WILL BE RECEIVED UNTIL THE EEPROM IS DONE WITH ; THE WRITE OPERATION. ; ************************************************************************** ************** ACKTST: MOV A,#WTCMD ;LOAD WRITE COMMAND TO SEND ADDRESS MOV R2,#8 ;LOOP COUNT -- EQUAL TO BIT COUNT CLR SDA ;START CONDITION -- DATA = 0 NOP ;NOTE 1 NOP NOP NOP ;NOTE 1 Dept of Biomedical Engineering KBN College of Engineering. Page 56

NOP NOP CLR AKTLP: RLC JNC SETB JMP AKTLS: CLR AKTL1: SETB NOP NOP NOP NOP NOP NOP CLR DJNZ SETB NOP SETB NOP NOP NOP NOP NOP NOP JNB JMP EXIT: CLR NOP NOP NOP NOP NOP NOP SETB NOP NOP NOP NOP NOP SETB SCL CLR SDA,EXIT ACKTST SCL SDA
SCL A AKTLS SDA AKTL1 SDA SCL
;CLOCK = 0 ;SHIFT BIT ;DATA = 1 ;CONTINUE ;DATA = 0 ;CLOCK HI ;NOTE 1 ;NOTE 1
SCL R2,AKTLP SDA SCL
;CLOCK LOW ;DECREMENT COUNTER ;TURN PIN INTO INPUT ;NOTE 1 ;CLOCK ACK ;NOTE 1 ;NOTE 1 ;EXIT IF ACK (WRITE DONE) ;START OVER ;CLOCK LOW ;DATA LOW ;NOTE 1 ;NOTE 1 ;CLOCK HIGH ;NOTE 1
SDA
;STOP CONDITION Page 57

RET ; ************************************************************************** ************** SDELAY: MOV R2,#25 NEXT: MOV R3,#255 TOP: DJNZ R3,TOP DJNZ R2,NEXT RET ;-----------------------------------------------------------------------------------------------------------DEALAY: MOV R1,#50 REPP2: NOP DJNZ R1,REPP2 RET ;--------------------------------------------------------------------------------------------------------------DELAY: INLOP: MOV MOV DJNZ DJNZ R0,#0FH R1,#0FFH R1,$ R0,INLOP
RET ;--------------------------------------------------------------------------------------------------------------DELAY1:MOV R0,#0FFH INLOP1: MOV R1,#0FFH DJNZ R1,$ DJNZ R0,INLOP1 RET ;--------------------------------------------------------------------------------------------------------------DELAY4: INLO2: INLO1: MOV MOV MOV DJNZ DJNZ DJNZ R5,#12H R0,#0FFH R1,#0FFH R1,$ R0,INLO1 R5,INLO2
RET ;--------------------------------------------------------------------------------------------------------; ASCII LOOK-UP TABLE ;--------------------------------------------------------------------------------------------------------Dept of Biomedical Engineering KBN College of Engineering. Page 58

DSP_TST: DSP_TST1: DB DB ' APPLIANCE CTRL ',0 ' USING MEMS ', 0
TABLE:
DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB
00001000B, '8' 00000111B, '7' 00000110B, '6' 00000101B, '5' 00000100B, '4' 00000011B, '3' 00000010B, '2' 00000001B, '1' 00000000B, '0' 00111111B, 'H' 00111110B, 'G' 00111101B, 'F' 00111100B, 'E' 00111011B, 'D' 00111010B, 'C' 00111001B, 'B' 00111000B, 'A'
END
Page 59
REFERENCES [1] Ferrol R. Blackmon,Computer Science Department,Georgia State University,Atlanta, Georgia, USA 30303 Target Acquisition by a Hands-free Wireless Tilt Mouse 2010 [2] Ferrol R. Blackmon, Michael Weeks, Wireless Tilt Mouse: Providing Mouse-type Access for Computer Users with Spinal Cord Injuries or Disabilities, 1st International Conference on Pervasive Technologies Related to Assistive Environments (PETRA08), International Workshop on Ambient Assistive Technologies for Intelligent Healthcare Services (AASTIH08), Athens, Greece, ACM International Conference Proceed- ings Series, July, 2008. [3] Adriane B. Randolph,Individual-Technology Fit: Matching Individual Characteristics and Features of Biometric Interface Technologies with Performance, Georgia State University, 2007, Doctoral Dissertation. [4] Julien Kronegg, Svyatoslav Voloshynovskiy, Thierry Pun, Brain- Computer Interface Model: Upper-capacity bound, Signal-tonoise Ratio Estimation, and Optimal Number of Symbols, Tech. Rep. 04.03, Computer Vision and Multimedia Laboratory, Computing Dept of Biomedical Engineering KBN College of Engineering. Page 60

Centre, University of Geneva, Rue General Dufour, 24, CH-1211, Geneva, Switzerland, 2004. [5] Grupo de Robotica,
Page 61
Action sensing speech using iMEMS REFERENCE

BOOKS
1. Electronics for you 2. 8051 micro controller (mazidi and mazidi) 3. 8051 micro controller(gopal sing) 4. Fair child sem conducatior co-operation 5. Operational amplifiers
Websites
1. Www.epanaroma.com 2. Www.national semiconductor.com
[1] ucis specification of the scada/ems and its communications system, utility consulting international, cupertino, california, usa [2] arevas functional specification design documents and users manuals, areva, france
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Dept of Biomedical Engineering KBN College of Engineering.