General Introduction
Chapter 1
Faculty of Engineering
Multimedia University
October 2011
Objectives
At the end of this chapter, students must be able to define/explain:
general technology & architecture of advanced microprocessors including, RISC, CISC, the Intel x86, Multi-core family and PowerPC Moores Law types of performance benchmarks history and evolution of microprocessor
Content
Part 1: Part 2: Part 3: Part 4: Part 5: Microprocessor RISC Architecture CISC Architecture Microprocessor Benchmarks A Brief History of Microprocessors
Computer System
Moores Law
Gordon Moore: co-founder of Intel Moore's law: the number of transistors per chip doubles every two years Original statement (1965): the number of transistors per chip doubles every year
Moores Law
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Microprocessor Benchmark
In order to compare the performances of various microprocessors, benchmark numbers have been used. They have become the indicators in the race of processor performance among competitors.
100 MIP S
1100 iCOMP
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acronym for kilo-, million-, or gigainstructions per second, respectively. The unit is commonly used to give the rate at which a processor executes instructions.
Drystone - A test program used to measure MIPS, the program, measures MIPS normalized to a VAX 1.1 computer
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iCOMP
iCOMP (Intel Comparative Microprocessor Performance index) devised by Intel to compare the speeds of various 80x86 processors.
The iCOMP1 rating was used to rate the speed of all Intel microprocessors through the Pentium.
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Modern Benchmarks
SYSmark (2012) A productivity benchmark representing current business usage models of multitasking with background computing.
SPEC CPU A computer intensive benchmark focuses on the component-level performance, including the performance of the processor, chipset, memory architecture, and software compiler. 3D Mark A Direct3D performance indicator, measuring 3D operation performance using the Microsofts DirectX interface engine. Quake 3 Arena A 3D gaming performance indicator of OpenGL, another 3D rendering interface engine.
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1974
Intel
1977
Intel
1980
Motorola
Motorola 68000 32-bit CPU, 16-bit data bus, 16MB memory, memory management, 10MHz
1985
Intel
Intel 80386 0.8m CMOS, 32-bit CPU, 4GB memory, 5MIPs, 275,000 transistors, 33MHz Intel 80486 improved 80386, added 8K internal cache, internal math co-processor, 54 MIPs for DX2-66, 1.2 million transistors, 50MHz
1989
Intel
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1993
Intel
1999
AMD
Athlon AMD beats Intel processor in any benchmarks for the first time in history, 3-way instruction decoder, enhanced 3Dnow! technology, superscalar FPU, 0.25m CMOS, 22 million transistors
Pentium 4 0.18m CMOS, 42 million transistors, 2GHz
2000
Intel
2001
Intel
Itanium 64-bit processor, IA-64 microarchitecture, built from ground up with EPIC (Explicit Parallel Instruction Computing) design technology.
2006
2008
Intel
Intel
Introduced Core 2 Duo technology. Support both 32 and 64 bits micro processors.
Introduced Intel Core i7 where it consists of 4 physical cores and it is a 64 bits micro processor.
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80386
The 80386 is an advanced 32-bit microprocessor optimized for multitasking operating systems and designed for applications needing very high performance.
The 32-bit registers and data paths support 32-bit addresses and data types. The processor can address up to four gigabytes of physical memory and 64 terabytes (246 bytes) of virtual memory. The on-chip memory-management facilities include address translation registers, advanced multitasking hardware, a protection mechanism, and paged virtual memory. The first IBM-compatible to use the 386 was the Compaq 386, before IBM used it in high-end models of their PS/2 series. It is also used in HP's RS series and many others.
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80486
Incorporates an 80386-like microprocessor, an 80387-like numeric coprocessor and an 8K byte cache memory system into one integrated package. The average speed improvement for a typical mix of instructions is about 50 percent over the 80386 operated at the same clock speed.
Newer versions of the 80486 execute instructions at even higher speeds with a 66 MHz double-clocked version.
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Pentium Series
Features: To improve data transfer rates, the size of data bus was increased to 64 bits. Intel Pentium CPU used branch prediction to improve effectiveness of pipeline architecture. (Branch prediction was further enhanced in Pentium MMX processors)
To reduce CPU power consumption the core voltage was reduced on all Pentium MMX, and many mobile and embedded Pentium processors.
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Pentium at a Glance
Introduction: Type: Frequency (MHz): L1 cache size (KB): 1993 32-bit microprocessor 60 - 233 8-16
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The Pentium is a widely used personal computer microprocessor from the Intel Corporation. The Pentium contains 3.1 million transistors. The Pentium Pro, released in 1995, was designed for PC servers and workstations that needed to serve multiple users or needed the speed required for graphics-intensive applications. The Pentium II is a Pentium Pro with Intel's MMX technology included. It comes in microprocessor clock speeds of 233 MHz (millions of cycles per second), 266 MHz, and 300 MHz.
The low-end Pentium II is Celeron, without the L2 cache, and Xeon, a high-end Pentium that replaces the Pentium Pro for enterprise server and workstation computers.
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Pentium III
The Pentium III processor features 70 new instructions, Internet Streaming SIMD extensions, that dramatically enhance the performance of advanced imaging, 3D, streaming audio, video and speech recognition applications.
Number of Transistors: 9.5 million Speed: 650MHz to 1.2GHz
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A multi-core processor is an integrated circuit to which two or more processors have been attached for enhanced performance, reduced power consumption, and more efficient simultaneous processing of multiple tasks A dual core set-up is somewhat comparable to having multiple, separate processors installed in the same computer, but because the two processors are actually plugged into the same socket, the connection between them is faster.
Ideally, a dual core processor is nearly twice as powerful as a single core processor.
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have all of the basic features of Core micro-architecture: 32 KB instruction and data level 1 caches, 2 MB level 2 cache, Wide Dynamic Execution with ability to execute up to 4 instructions per clock cycle, Advanced Digital Media Boost feature that allows the core execute one 128-bit SSE instruction per CPU cycle, support for SSE2 and SSE2 instructions, and many core and package power-saving modes.
Core Duo With two microprocessor cores on one die these Duo processors perform better than Core Solo in multi-threading applications or when running more than one program at the same time.
Extra CPU core increases CPU power consumption, although Corespecific power saving modes help to keep the increase in power consumption to minimum. Thermal Design Power (average dissipated power) of Core Duo CPUs is 31 Watt, which is only 4 Watt higher than TDP of Core Solo microprocessors.
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PowerPC - Introduction
PowerPC is a RISC microprocessor architecture created by the 1991 AppleIBMMotorola alliance, known as AIM. PowerPC is largely based on IBM's earlier POWER architecture, and retains a high level of compatibility with it.
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Support for operation in both big-endian and littleendian modes Single-precision forms of some floating point instructions, in addition to double-precision forms A complete 64-bit specification, which is backward compatible with the 32-bit mode A paged memory management architecture which is used extensively in server and PC systems Addition of a new memory management architecture called Book-E, replaced the conventional paged memory management architecture for embedded applications
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Operating systems that work on the PowerPC architecture are generally divided into those which are:
Oriented towards the general-purpose PowerPC systems. Oriented towards the embedded PowerPC systems.
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